{ "arm64": { "events": [ ["0x0000", "SW_INCR", "Instruction architecturally executed, Condition code check pass, software increment"], ["0x0001", "L1I_CACHE_REFILL", "Level 1 instruction cache refill"], ["0x0002", "L1I_TLB_REFILL", "Level 1 instruction TLB refill"], ["0x0003", "L1D_CACHE_REFILL", "Level 1 data cache refill"], ["0x0004", "L1D_CACHE", "Level 1 data cache access"], ["0x0005", "L1D_TLB_REFILL", "Level 1 data TLB refill"], ["0x0006", "LD_RETIRED", "Instruction architecturally executed, Condition code check pass, load"], ["0x0007", "ST_RETIRED", "Instruction architecturally executed, Condition code check pass, store"], ["0x0008", "INST_RETIRED", "Instruction architecturally executed"], ["0x0009", "EXC_TAKEN", "Exception taken"], ["0x000A", "EXC_RETURN", " Instruction architecturally executed, Condition code check pass, exception return"], ["0x000B", "CID_WRITE_RETIRED", "Instruction architecturally executed, Condition code check pass, write to CONTEXTIDR"], ["0x000C", "PC_WRITE_RETIRED", "D, Instruction architecturally executed, Condition code check pass, Software change of the PC"], ["0x000D", "BR_IMMED_RETIRED", "Branch Instruction architecturally executed, immediate"], ["0x000E", "BR_RETURN_RETIRED", "Branch Instruction architecturally executed, procedure return, taken"], ["0x000F", "UNALIGNED_LDST_RETIRED", "Instruction architecturally executed, Condition code check pass, unaligned load or store"], ["0x0010", "BR_MIS_PRED", "Branch instruction Speculatively executed, mispredicted or not predicted "], ["0x0011", "CPU_CYCLES", "Cycle"], ["0x0012", "BR_PRED", "Predictable branch instruction Speculatively executed"], ["0x0013", "MEM_ACCESS", " Data memory access"], ["0x0014", "L1I_CACHE", " Level 1 instruction cache access "], ["0x0015", "L1D_CACHE_WB", " Level 1 data cache write-back"], ["0x0016", "L2D_CACHE", " Level 2 data cache access"], ["0x0017", "L2D_CACHE_REFILL", "Level 2 data cache refill"], ["0x0018", "L2D_CACHE_WB", "Level 2 data cache write-back"], ["0x0019", "BUS_ACCESS", "Bus access"], ["0x001A", "MEMORY_ERROR", "Local memory error"], ["0x001B", "INST_SPEC", "Operation speculatively executed"], ["0x001C", "TTBR_WRITE_RETIRED", "Instruction architecturally executed, Condition code check pass, write to TTBR"], ["0x001D", "BUS_CYCLES", "Bus cycle "], ["0x001F", "L1D_CACHE_ALLOCATE", " Level 1 data cache allocation without refill"], ["0x0020", "L2D_CACHE_ALLOCATE", "Level 2 data cache allocation without refill"], ["0x0021", "BR_RETIRED", "Instruction architecturally executed, branch"], ["0x0022", "BR_MIS_PRED_RETIRED", "Branch Instruction architecturally executed, mispredicted "], ["0x0023", "STALL_FRONTEND", "No operation sent for execution due to the frontend"], ["0x0024", "STALL_BACKEND", "No operation sent for execution due to the backend "], ["0x0025", "L1D_TLB", "Level 1 data TLB access"], ["0x0026", "L1I_TLB", "Level 1 instruction TLB access"], ["0x0027", "L2I_CACHE", "Level 2 instruction cache access "], ["0x0028", "L2I_CACHE_REFILL", "Level 2 instruction cache refill"], ["0x0029", "L3D_CACHE_ALLOCATE", "Level 3 data cache allocation without refill"], ["0x002A", "L3D_CACHE_REFILL", "Level 3 data cache refill"], ["0x002B", "L3D_CACHE", "Level 3 data cache access "], ["0x002C", "L3D_CACHE_WB", "Level 3 data cache write-back"], ["0x002D", "L2D_TLB_REFILL", "Level 2 data TLB refill "], ["0x002E", "L2I_TLB_REFILL", "Level 2 instruction TLB refill "], ["0x002F", "L2D_TLB", "Level 2 data TLB access "], ["0x0030", "L2I_TLB", "Level 2 instruction TLB access "], ["0x0031", "REMOTE_ACCESS", "Access to another socket in a multi-socket system "], ["0x0032", "LL_CACHE", "Last level cache access"], ["0x0033", "LL_CACHE_MISS", "Last level cache miss"], ["0x0034", "DTLB_WALK", "Data TLB access with at least one translation table walk"], ["0x0035", "ITLB_WALK", "Instruction TLB access with at least one translation table walk"], ["0x0036", "LL_CACHE_RD", "Last level cache access, read"], ["0x0037", "LL_CACHE_MISS_RD", "Last level cache miss, read "], ["0x0038", "REMOTE_ACCESS_RD", "Access to another socket in a multi-socket system, read"], ["0x0039", "L1D_CACHE_LMISS_RD", "Level 1 data cache long-latency read miss"], ["0x003A", "OP_RETIRED", "Micro-operation architecturally executed"], ["0x003B", "OP_SPEC", "Micro-operation Speculatively executed"], ["0x003C", "STALL", "No operation sent for execution"], ["0x003D", "STALL_SLOT_BACKEND", "No operation sent for execution on a Slot due to the backend"], ["0x003E", "STALL_SLOT_FRONTEND", "No operation sent for execution on a Slot due to the frontend "], ["0x003F", "STALL_SLOT", "No operation sent for execution on a Slot "], ["0x0040", "L1D_CACHE_RD", "Level 1 data cache access, read"], ["0x0041", "L1D_CACHE_WR", "Level 1 data cache access, write"], ["0x0042", "L1D_CACHE_REFILL_RD", "Level 1 data cache refill, read"], ["0x0043", "L1D_CACHE_REFILL_WR", "Level 1 data cache refill, write"], ["0x0044", "L1D_CACHE_REFILL_INNER", "Level 1 data cache refill, inner"], ["0x0045", "L1D_CACHE_REFILL_OUTER", "Level 1 data cache refill, outer"], ["0x0046", "L1D_CACHE_WB_VICTIM", "Level 1 data cache write-back, victim"], ["0x0047", "L1D_CACHE_WB_CLEAN", "Level 1 data cache write-back, cleaning and coherency"], ["0x0048", "L1D_CACHE_INVAL", "Level 1 data cache invalidate"], ["0x004C", "L1D_TLB_REFILL_RD", "Level 1 data TLB refill, read"], ["0x004D", "L1D_TLB_REFILL_WR", "Level 1 data TLB refill, write"], ["0x004E", "L1D_TLB_RD", "Level 1 data TLB access, read"], ["0x004F", "L1D_TLB_WR", "Level 1 data TLB access, write"], ["0x0050", "L2D_CACHE_RD", "Level 2 data cache access, read"], ["0x0051", "L2D_CACHE_WR", "Level 2 data cache access, write"], ["0x0052", "L2D_CACHE_REFILL_RD", "Level 2 data cache refill, read"], ["0x0053", "L2D_CACHE_REFILL_WR", "Level 2 data cache refill, write"], ["0x0056", "L2D_CACHE_WB_VICTIM", "Level 2 data cache write-back, victim"], ["0x0057", "L2D_CACHE_WB_CLEAN", "Level 2 data cache write-back, cleaning and coherency"], ["0x0058", "L2D_CACHE_INVAL", "Level 2 data cache invalidate"], ["0x005C", "L2D_TLB_REFILL_RD", "Level 2 data TLB refill, read"], ["0x005D", "L2D_TLB_REFILL_WR", "Level 2 data TLB refill, write"], ["0x005E", "L2D_TLB_RD", "Level 2 data TLB access, read"], ["0x005F", "L2D_TLB_WR", "Level 2 data TLB access, write"], ["0x0060", "BUS_ACCESS_RD", "Bus access, read"], ["0x0061", "BUS_ACCESS_WR", "Bus access, write"], ["0x0062", "BUS_ACCESS_SHARED", "Bus access, Normal, Cacheable, Shareable"], ["0x0063", "BUS_ACCESS_NOT_SHARED", "Bus access, not Normal, Cacheable, Shareable"], ["0x0064", "BUS_ACCESS_NORMAL", "Bus access, normal"], ["0x0065", "BUS_ACCESS_PERIPH", "Bus access, peripheral"], ["0x0066", "MEM_ACCESS_RD", "Data memory access, read"], ["0x0067", "MEM_ACCESS_WR", "Data memory access, write"], ["0x0068", "UNALIGNED_LD_SPEC", "Unaligned access, read"], ["0x0069", "UNALIGNED_ST_SPEC", "Unaligned access, write"], ["0x006A", "UNALIGNED_LDST_SPEC", "Unaligned access"], ["0x006C", "LDREX_SPEC", "Exclusive operation Speculatively executed, Load-Exclusive"], ["0x006D", "STREX_PASS_SPEC", "Exclusive operation Speculatively executed, Store-Exclusive pass"], ["0x006E", "STREX_FAIL_SPEC", "Exclusive operation Speculatively executed, Store-Exclusive fail"], ["0x006F", "STREX_SPEC", "Exclusive operation Speculatively executed, Store-Exclusive"], ["0x0070", "LD_SPEC", "Operation speculatively executed, load"], ["0x0071", "ST_SPEC", "Operation speculatively executed, store"], ["0x0072", "LDST_SPEC", "Operation speculatively executed, load or store"], ["0x0073", "DP_SPEC", "Operation speculatively executed, integer data processing"], ["0x0074", "ASE_SPEC", "Operation speculatively executed, Advanced SIMD"], ["0x0075", "VFP_SPEC", "Operation speculatively executed, scalar floating-point"], ["0x0076", "PC_WRITE_SPEC", "Operation speculatively executed, Software change of the PC"], ["0x0077", "CRYPTO_SPEC", "Operation speculatively executed, Cryptographic instruction"], ["0x0078", "BR_IMMED_SPEC", "Branch Speculatively executed, immediate branch"], ["0x0079", "BR_RETURN_SPEC", "Branch Speculatively executed, procedure return"], ["0x007A", "BR_INDIRECT_SPEC", "Branch Speculatively executed, indirect branch"], ["0x007C", "ISB_SPEC", "Barrier Speculatively executed, ISB"], ["0x007D", "DSB_SPEC", "Barrier Speculatively executed, DSB"], ["0x007E", "DMB_SPEC", "Barrier Speculatively executed, DMB"], ["0x007F", "CSDB_SPEC", "Barrier Speculatively executed, CSDB"], ["0x0081", "EXC_UNDEF", "Exception taken, other synchronous"], ["0x0082", "EXC_SVC", "Exception taken, Supervisor Call"], ["0x0083", "EXC_PABORT", "Exception taken, Instruction Abort"], ["0x0084", "EXC_DABORT", "Exception taken, Data Abort or SError"], ["0x0086", "EXC_IRQ", "Exception taken, IRQ"], ["0x0087", "EXC_FIQ", "Exception taken, FIQ"], ["0x0088", "EXC_SMC", "Exception taken, Secure Monitor Call"], ["0x008A", "EXC_HVC", "Exception taken, Hypervisor Call"], ["0x008B", "EXC_TRAP_PABORT", "Exception taken, Instruction Abort not Taken locally"], ["0x008C", "EXC_TRAP_DABORT", "Exception taken, Data Abort or SError not Taken locally"], ["0x008D", "EXC_TRAP_OTHER", "Exception taken, other traps not Taken locally"], ["0x008E", "EXC_TRAP_IRQ", "Exception taken, IRQ not Taken locally"], ["0x008F", "EXC_TRAP_FIQ", "Exception taken, FIQ not Taken locally"], ["0x0090", "RC_LD_SPEC", "Release consistency operation Speculatively executed, Load-Acquire"], ["0x0091", "RC_ST_SPEC", "Release consistency operation Speculatively executed, Store-Release"], ["0x00A0", "L3D_CACHE_RD", "Level 3 data cache access, read"], ["0x00A1", "L3D_CACHE_WR", "Level 3 data cache access, write"], ["0x00A2", "L3D_CACHE_REFILL_RD", "Level 3 data cache refill, read"], ["0x00A3", "L3D_CACHE_REFILL_WR", "Level 3 data cache refill, write"], ["0x00A6", "L3D_CACHE_WB_VICTIM", "Level 3 data cache write-back, victim"], ["0x00A7", "L3D_CACHE_WB_CLEAN", "Level 3 data cache write-back, cleaning and coherency"], ["0x00A8", "L3D_CACHE_INVAL", "Level 3 data cache invalidate"], ["0x4000", "SAMPLE_POP", "Statistical Profiling sample population"], ["0x4001", "SAMPLE_FEED", "Statistical Profiling sample taken"], ["0x4002", "SAMPLE_FILTRATE", "Statistical Profiling sample taken and not removed by filtering"], ["0x4003", "SAMPLE_COLLISION", "Statistical Profiling sample collided with previous sample"], ["0x4004", "CNT_CYCLES", "Constant frequency cycles"], ["0x4005", "STALL_BACKEND_MEM", "Memory stall cycles"], ["0x4006", "L1I_CACHE_LMISS", "Level 1 instruction cache long-latency miss"], ["0x4009", "L2D_CACHE_LMISS_RD", "Level 2 data cache long-latency read miss"], ["0x400A", "L2I_CACHE_LMISS", "Level 2 instruction cache long-latency miss"], ["0x400B", "L3D_CACHE_LMISS_RD", "Level 3 data cache long-latency read miss"], ["0x400C", "TRB_WRAP", "Trace buffer current write pointer wrapped"], ["0x400E", "TRB_TRIG", "Trace buffer Trigger Event "], ["0x4010", "TRCEXTOUT0", "Trace unit external output 0"], ["0x4011", "TRCEXTOUT1", "Trace unit external output 1"], ["0x4012", "TRCEXTOUT2", "Trace unit external output 2"], ["0x4013", "TRCEXTOUT3", "Trace unit external output 3 "], ["0x4018", "CTI_TRIGOUT4", "Cross-trigger Interface output trigger 4"], ["0x4019", "CTI_TRIGOUT5", "Cross-trigger Interface output trigger 5"], ["0x401A", "CTI_TRIGOUT6", "Cross-trigger Interface output trigger 6"], ["0x401B", "CTI_TRIGOUT7", "Cross-trigger Interface output trigger 7"], ["0x4020", "LDST_ALIGN_LAT", "Access with additional latency from alignment"], ["0x4021", "LD_ALIGN_LAT", "Load with additional latency from alignment"], ["0x4022", "ST_ALIGN_LAT", "Store with additional latency from alignment"], ["0x4024", "MEM_ACCESS_CHECKED", "Checked data memory access"], ["0x4025", "MEM_ACCESS_RD_CHECKED", "Checked data memory access, read"], ["0x4026", "MEM_ACCESS_WR_CHECKED", "Checked data memory access, write "], ["0x8000", "SIMD_INST_RETIRED", "Instruction architecturally executed, SIMD"], ["0x8001", "ASE_INST_RETIRED", "Instruction architecturally executed, Advanced SIMD"], ["0x8002", "SVE_INST_RETIRED", "Instruction architecturally executed, SVE"], ["0x8003", "ASE_SVE_INST_RETIRED", "Instruction architecturally executed, Advanced SIMD or SVE"], ["0x8004", "SIMD_INST_SPEC", "Operation speculatively executed, SIMD"], ["0x8005", "ASE_INST_SPEC", "Operation speculatively executed, Advanced SIMD"], ["0x8006", "SVE_INST_SPEC", "Operation speculatively executed, SVE, including load and store"], ["0x8007", "ASE_SVE_INST_SPEC", "Operation speculatively executed, Advanced SIMD or SVE"], ["0x8008", "UOP_SPEC", "Microarchitectural operation speculatively executed"], ["0x8009", "ASE_UOP_SPEC", "Microarchitectural operation speculatively executed, Advanced SIMD"], ["0x800A", "SVE_UOP_SPEC", "Microarchitectural operation speculatively executed, SVE"], ["0x800B", "ASE_SVE_UOP_SPEC", "Microarchitectural operation speculatively executed, Advanced SIMD or SVE"], ["0x800C", "SIMD_UOP_SPEC", "Microarchitectural operation speculatively executed, SIMD"], ["0x800E", "SVE_MATH_SPEC", "Operation speculatively executed, SVE math accelerator"], ["0x8010", "FP_SPEC", "Floating-point operation speculatively executed, including SIMD"], ["0x8011", "ASE_FP_SPEC", "Floating-point operation speculatively executed, Advanced SIMD"], ["0x8012", "SVE_FP_SPEC", "Floating-point operation speculatively executed, SVE"], ["0x8013", "ASE_SVE_FP_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE"], ["0x8014", "FP_HP_SPEC", "Floating-point operation speculatively executed, half precision"], ["0x8015", "ASE_FP_HP_SPEC", "Floating-point operation speculatively executed, Advanced SIMD half precision"], ["0x8016", "SVE_FP_HP_SPEC", "Floating-point operation speculatively executed, SVE half precision"], ["0x8017", "ASE_SVE_FP_HP_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE half precision"], ["0x8018", "FP_SP_SPEC", "Floating-point operation speculatively executed, single precision"], ["0x8019", "ASE_FP_SP_SPEC", "Floating-point operation speculatively executed, Advanced SIMD single precision"], ["0x801A", "SVE_FP_SP_SPEC", "Floating-point operation speculatively executed, SVE single precision"], ["0x801B", "ASE_SVE_FP_SP_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE single precision"], ["0x801C", "FP_DP_SPEC", "Floating-point operation speculatively executed, double precision"], ["0x801D", "ASE_FP_DP_SPEC", "Floating-point operation speculatively executed, Advanced SIMD double precision"], ["0x801E", "SVE_FP_DP_SPEC", "Floating-point operation speculatively executed, SVE double precision"], ["0x801F", "ASE_SVE_FP_DP_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE double precision"], ["0x8020", "FP_DIV_SPEC", "Floating-point operation speculatively executed, divide"], ["0x8021", "ASE_FP_DIV_SPEC", "Floating-point operation speculatively executed, Advanced SIMD divide"], ["0x8022", "SVE_FP_DIV_SPEC", "Floating-point operation speculatively executed, SVE divide"], ["0x8023", "ASE_SVE_FP_DIV_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE divide"], ["0x8024", "FP_SQRT_SPEC", "Floating-point operation speculatively executed, square root"], ["0x8025", "ASE_FP_SQRT_SPEC", "Floating-point operation speculatively executed, Advanced SIMD square root"], ["0x8026", "SVE_FP_SQRT_SPEC", "Floating-point operation speculatively executed, SVE square root"], ["0x8027", "ASE_SVE_FP_SQRT_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE square-root"], ["0x8028", "FP_FMA_SPEC", "Floating-point operation speculatively executed, FMA"], ["0x8029", "ASE_FP_FMA_SPEC", "Floating-point operation speculatively executed, Advanced SIMD FMA"], ["0x802A", "SVE_FP_FMA_SPEC", "Floating-point operation speculatively executed, SVE FMA"], ["0x802B", "ASE_SVE_FP_FMA_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE FMA"], ["0x802C", "FP_MUL_SPEC", "Floating-point operation speculatively executed, multiply"], ["0x802D", "ASE_FP_MUL_SPEC", "Floating-point operation speculatively executed, Advanced SIMD multiply"], ["0x802E", "SVE_FP_MUL_SPEC", "Floating-point operation speculatively executed, SVE multiply"], ["0x802F", "ASE_SVE_FP_MUL_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE multiply"], ["0x8030", "FP_ADDSUB_SPEC", "Floating-point operation speculatively executed, add or subtract"], ["0x8031", "ASE_FP_ADDSUB_SPEC", "Floating-point operation speculatively executed, Advanced SIMD add or subtract"], ["0x8032", "SVE_FP_ADDSUB_SPEC", "Floating-point operation speculatively executed, SVE add or subtract"], ["0x8033", "ASE_SVE_FP_ADDSUB_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE add or subtract"], ["0x8034", "FP_RECPE_SPEC", "Floating-point operation speculatively executed, reciprocal estimate"], ["0x8035", "ASE_FP_RECPE_SPEC", "Floating-point operation speculatively executed, Advanced SIMD reciprocal estimate"], ["0x8036", "SVE_FP_RECPE_SPEC", "Floating-point operation speculatively executed, SVE reciprocal estimate"], ["0x8037", "ASE_SVE_FP_RECPE_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE reciprocal estimate"], ["0x8038", "FP_CVT_SPEC", "Floating-point operation speculatively executed, convert"], ["0x8039", "ASE_FP_CVT_SPEC", "Floating-point operation speculatively executed, Advanced SIMD convert"], ["0x803A", "SVE_FP_CVT_SPEC", "Floating-point operation speculatively executed, SVE convert"], ["0x803B", "ASE_SVE_FP_CVT_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE convert"], ["0x803C", "SVE_FP_AREDUCE_SPEC", "Floating-point operation speculatively executed, SVE accumulating reduction"], ["0x803D", "ASE_FP_PREDUCE_SPEC", "Floating-point operation speculatively executed, Advanced SIMD pairwise add step"], ["0x803E", "SVE_FP_VREDUCE_SPEC", "Floating-point operation speculatively executed, SVE vector reduction"], ["0x803F", "ASE_SVE_FP_VREDUCE_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE vector reduction"], ["0x8040", "INT_SPEC", "Integer operation speculatively executed"], ["0x8041", "ASE_INT_SPEC", "Integer operation speculatively executed, Advanced SIMD"], ["0x8042", "SVE_INT_SPEC", "Integer operation speculatively executed, SVE"], ["0x8043", "ASE_SVE_INT_SPEC", "Integer operation speculatively executed, Advanced SIMD or SVE"], ["0x8044", "INT_DIV_SPEC", "Integer operation speculatively executed, divide"], ["0x8045", "INT_DIV64_SPEC", "Integer operation speculatively executed, 64-bit divide"], ["0x8046", "SVE_INT_DIV_SPEC", "Integer operation speculatively executed, SVE divide"], ["0x8047", "SVE_INT_DIV64_SPEC", "Integer operation speculatively executed, SVE 64-bit divide"], ["0x8048", "INT_MUL_SPEC", "Integer operation speculatively executed, multiply"], ["0x8049", "ASE_INT_MUL_SPEC", "Integer operation speculatively executed, Advanced SIMD multiply"], ["0x804A", "SVE_INT_MUL_SPEC", "Integer operation speculatively executed, SVE multiply"], ["0x804B", "ASE_SVE_INT_MUL_SPEC", "Integer operation speculatively executed, Advanced SIMD or SVE multiply"], ["0x804C", "INT_MUL64_SPEC", "Integer operation speculatively executed, 64x64 multiply"], ["0x804D", "SVE_INT_MUL64_SPEC", "Integer operation speculatively executed, SVE 64x64 multiply"], ["0x804E", "INT_MULH64_SPEC", "Integer operation speculatively executed, 64x64 multiply returning high part"], ["0x804F", "SVE_INT_MULH64_SPEC", "Integer operation speculatively executed, SVE 64x64 multiply high part"], ["0x8058", "NONFP_SPEC", "Non-floating-point operation speculatively executed"], ["0x8059", "ASE_NONFP_SPEC", "Non-floating-point operation speculatively executed, Advanced SIMD"], ["0x805A", "SVE_NONFP_SPEC", "Non-floating-point operation speculatively executed, SVE"], ["0x805B", "ASE_SVE_NONFP_SPEC", "Non-floating-point operation speculatively executed, Advanced SIMD or SVE"], ["0x805D", "ASE_INT_VREDUCE_SPEC", "Integer operation speculatively executed, Advanced SIMD reduction"], ["0x805E", "SVE_INT_VREDUCE_SPEC", "Integer operation speculatively executed, SVE reduction"], ["0x805F", "ASE_SVE_INT_VREDUCE_SPEC", "Integer operation speculatively executed, Advanced SIMD or SVE reduction"], ["0x8060", "SVE_PERM_SPEC", "Operation speculatively executed, SVE permute"], ["0x8061", "SVE_PERM_IGRANULE_SPEC", "Operation speculatively executed, SVE intra-granule permute"], ["0x8062", "SVE_PERM_XGRANULE_SPEC", "Operation speculatively executed, SVE cross-granule permute"], ["0x8063", "SVE_PERM_VARIABLE_SPEC", "Operation speculatively executed, SVE programmable permute"], ["0x8064", "SVE_XPIPE_SPEC", "Operation speculatively executed, SVE cross-pipe"], ["0x8065", "SVE_XPIPE_Z2R_SPEC", "Operation speculatively executed, SVE vector to scalar cross-pipe"], ["0x8066", "SVE_XPIPE_R2Z_SPEC", "Operation speculatively executed, SVE scalar to vector cross-pipe"], ["0x8067", "SVE_PGEN_NVEC_SPEC", "Operation speculatively executed, SVE predicate-only"], ["0x8068", "SVE_PGEN_SPEC", "Operation speculatively executed, SVE predicate generating"], ["0x8069", "SVE_PGEN_FLG_SPEC", "Operation speculatively executed, SVE predicate flag setting"], ["0x806A", "SVE_PGEN_CMP_SPEC", "Operation speculatively executed, SVE vector compare"], ["0x806B", "SVE_PGEN_FCM_SPEC", "Floating-point operation speculatively executed, SVE vector compare"], ["0x806C", "SVE_PGEN_LOGIC_SPEC", "Operation speculatively executed, SVE predicate logical"], ["0x806D", "SVE_PPERM_SPEC", "Operation speculatively executed, SVE predicate permute"], ["0x806E", "SVE_PSCAN_SPEC", "Operation speculatively executed, SVE predicate scan"], ["0x806F", "SVE_PCNT_SPEC", "Operation speculatively executed, SVE predicate count"], ["0x8070", "SVE_PLOOP_WHILE_SPEC", "Operation speculatively executed, SVE predicate loop while"], ["0x8071", "SVE_PLOOP_TEST_SPEC", "Operation speculatively executed, SVE predicate loop test"], ["0x8072", "SVE_PLOOP_ELTS_SPEC", "Operation speculatively executed, SVE predicate loop elements"], ["0x8073", "SVE_PLOOP_TERM_SPEC", "Operation speculatively executed, SVE predicate loop termination"], ["0x8074", "SVE_PRED_SPEC", "Operation speculatively executed, SVE predicated"], ["0x8075", "SVE_PRED_EMPTY_SPEC", "Operation speculatively executed, SVE predicated with no active predicates"], ["0x8076", "SVE_PRED_FULL_SPEC", "Operation speculatively executed, SVE predicated with all active predicates"], ["0x8077", "SVE_PRED_PARTIAL_SPEC", "Operation speculatively executed, SVE predicated with partially active predicates"], ["0x8078", "SVE_UNPRED_SPEC", "Operation speculatively executed, SVE unpredicated"], ["0x8079", "SVE_PRED_NOT_FULL_SPEC", "SVE predicated operations Speculatively executed with no active or partially active predicates"], ["0x807C", "SVE_MOVPRFX_SPEC", "Operation speculatively executed, SVE MOVPRFX"], ["0x807D", "SVE_MOVPRFX_Z_SPEC", "Operation speculatively executed, SVE MOVPRFX zeroing predication"], ["0x807E", "SVE_MOVPRFX_M_SPEC", "Operation speculatively executed, SVE MOVPRFX merging predication"], ["0x807F", "SVE_MOVPRFX_U_SPEC", "Operation speculatively executed, SVE MOVPRFX unfused"], ["0x8080", "SVE_LDST_SPEC", "Operation speculatively executed, SVE load, store, or prefetch"], ["0x8081", "SVE_LD_SPEC", "Operation speculatively executed, SVE load"], ["0x8082", "SVE_ST_SPEC", "Operation speculatively executed, SVE store"], ["0x8083", "SVE_PRF_SPEC", "Operation speculatively executed, SVE prefetch"], ["0x8084", "ASE_SVE_LDST_SPEC", "Operation speculatively executed, Advanced SIMD or SVE load or store"], ["0x8085", "ASE_SVE_LD_SPEC", "Operation speculatively executed, Advanced SIMD or SVE load"], ["0x8086", "ASE_SVE_ST_SPEC", "Operation speculatively executed, Advanced SIMD or SVE store"], ["0x8087", "PRF_SPEC", "Operation speculatively executed, Prefetch"], ["0x8088", "BASE_LDST_REG_SPEC", "Operation speculatively executed, general-purpose register load, store, or prefetch"], ["0x8089", "BASE_LD_REG_SPEC", "Operation speculatively executed, general-purpose register load"], ["0x808A", "BASE_ST_REG_SPEC", "Operation speculatively executed, general-purpose register store"], ["0x808B", "BASE_PRF_SPEC", "Operation speculatively executed, general-purpose register prefetch"], ["0x808C", "FPASE_LDST_REG_SPEC", "Operation speculatively executed, SIMD&FP register load or store"], ["0x808D", "FPASE_LD_REG_SPEC", "Operation speculatively executed, SIMD&FP register load"], ["0x808E", "FPASE_ST_REG_SPEC", "Operation speculatively executed, SIMD&FP register store"], ["0x8090", "SVE_LDST_REG_SPEC", "Operation speculatively executed, SVE unpredicated load or store register"], ["0x8091", "SVE_LDR_REG_SPEC", "Operation speculatively executed, SVE unpredicated load register"], ["0x8092", "SVE_STR_REG_SPEC", "Operation speculatively executed, SVE unpredicated store register"], ["0x8094", "SVE_LDST_PREG_SPEC", "Operation speculatively executed, SVE load or store predicate register"], ["0x8095", "SVE_LDR_PREG_SPEC", "Operation speculatively executed, SVE load predicate register"], ["0x8096", "SVE_STR_PREG_SPEC", "Operation speculatively executed, SVE store predicate register"], ["0x8098", "SVE_LDST_ZREG_SPEC", "Operation speculatively executed, SVE load or store vector register"], ["0x8099", "SVE_LDR_ZREG_SPEC", "Operation speculatively executed, SVE load vector register"], ["0x809A", "SVE_STR_ZREG_SPEC", "Operation speculatively executed, SVE store vector register"], ["0x809C", "SVE_LDST_CONTIG_SPEC", "Operation speculatively executed, SVE contiguous load, store, or prefetch element"], ["0x809D", "SVE_LD_CONTIG_SPEC", "Operation speculatively executed, SVE contiguous load element"], ["0x809E", "SVE_ST_CONTIG_SPEC", "Operation speculatively executed, SVE contiguous store element"], ["0x809F", "SVE_PRF_CONTIG_SPEC", "Operation speculatively executed, SVE contiguous prefetch element"], ["0x80A0", "SVE_LDSTNT_CONTIG_SPEC", "Operation speculatively executed, SVE non-temporal contiguous load or store element"], ["0x80A1", "SVE_LDNT_CONTIG_SPEC", "Operation speculatively executed, SVE non-temporal contiguous load element"], ["0x80A2", "SVE_STNT_CONTIG_SPEC", "Operation speculatively executed, SVE non-temporal contiguous store element"], ["0x80A4", "ASE_SVE_LDST_MULTI_SPEC", "Operation speculatively executed, Advanced SIMD or SVE contiguous load or store multiple vector"], ["0x80A5", "ASE_SVE_LD_MULTI_SPEC", "Operation speculatively executed, Advanced SIMD or SVE contiguous load multiple vector"], ["0x80A6", "ASE_SVE_ST_MULTI_SPEC", "Operation speculatively executed, Advanced SIMD or SVE contiguous store multiple vector"], ["0x80A8", "SVE_LDST_MULTI_SPEC", "Operation speculatively executed, SVE contiguous load or store multiple vector"], ["0x80A9", "SVE_LD_MULTI_SPEC", "Operation speculatively executed, SVE contiguous load multiple vector"], ["0x80AA", "SVE_ST_MULTI_SPEC", "Operation speculatively executed, SVE contiguous store multiple vector"], ["0x80AC", "SVE_LDST_NONCONTIG_SPEC", "Operation speculatively executed, SVE non-contiguous load, store, or prefetch"], ["0x80AD", "SVE_LD_GATHER_SPEC", "Operation speculatively executed, SVE gather-load"], ["0x80AE", "SVE_ST_SCATTER_SPEC", "Operation speculatively executed, SVE scatter-store"], ["0x80AF", "SVE_PRF_GATHER_SPEC", "Operation speculatively executed, SVE gather-prefetch"], ["0x80B0", "SVE_LDST64_NONCONTIG_SPEC", "Operation speculatively executed, SVE 64-bit non-contiguous load, store, or prefetch"], ["0x80B1", "SVE_LD64_GATHER_SPEC", "Operation speculatively executed, SVE 64-bit gather-load"], ["0x80B2", "SVE_ST64_SCATTER_SPEC", "Operation speculatively executed, SVE 64-bit scatter-store"], ["0x80B3", "SVE_PRF64_GATHER_SPEC", "Operation speculatively executed, SVE 64-bit gather-prefetch"], ["0x80B4", "ASE_SVE_UNALIGNED_LDST_SPEC", "Advanced SIMD or SVE unaligned accesses"], ["0x80B5", "ASE_SVE_UNALIGNED_LD_SPEC", "Advanced SIMD or SVE unaligned read accesses"], ["0x80B6", "ASE_SVE_UNALIGNED_ST_SPEC", "Advanced SIMD or SVE unaligned write accesses"], ["0x80B8", "ASE_SVE_UNALIGNED_CONTIG_LDST_SPEC", "Advanced SIMD or SVE unaligned contiguous accesses"], ["0x80B9", "ASE_SVE_UNALIGNED_CONTIG_LD_SPEC", "Advanced SIMD or SVE unaligned contiguous read accesses"], ["0x80BA", "ASE_SVE_UNALIGNED_CONTIG_ST_SPEC", "Advanced SIMD or SVE unaligned contiguous write accesses"], ["0x80BC", "SVE_LDFF_SPEC", "Operation speculatively executed, SVE first-fault load"], ["0x80BD", "SVE_LDFF_FAULT_SPEC", "Operation speculatively executed, SVE first-fault load which set FFR bit to 0b0"], ["0x80C0", "FP_SCALE_OPS_SPEC", "Scalable floating-point element ALU operations Speculatively executed"], ["0x80C1", "FP_FIXED_OPS_SPEC", "Non-scalable floating-point element ALU operations Speculatively executed"], ["0x80C2", "FP_HP_SCALE_OPS_SPEC", "Scalable half-precision floating-point element ALU operations Speculatively executed"], ["0x80C3", "FP_HP_FIXED_OPS_SPEC", "Non-scalable half-precision floating-point element ALU operations Speculatively executed"], ["0x80C4", "FP_SP_SCALE_OPS_SPEC", "Scalable single-precision floating-point element ALU operations Speculatively executed"], ["0x80C5", "FP_SP_FIXED_OPS_SPEC", "Non-scalable single-precision floating-point element ALU operations Speculatively executed"], ["0x80C6", "FP_DP_SCALE_OPS_SPEC", "Scalable double-precision floating-point element ALU operations Speculatively executed"], ["0x80C7", "FP_DP_FIXED_OPS_SPEC", "Non-scalable double-precision floating-point element ALU operations Speculatively executed"], ["0x80C8", "INT_SCALE_OPS_SPEC", "Scalable integer element ALU operations Speculatively executed"], ["0x80C9", "INT_FIXED_OPS_SPEC", "Non-scalable integer element ALU operations Speculatively executed"], ["0x80CA", "LDST_SCALE_OPS_SPEC", "Scalable load or store element Operations speculatively executed"], ["0x80CB", "LDST_FIXED_OPS_SPEC", "Non-scalable load or store element Operations speculatively executed"], ["0x80CC", "LD_SCALE_OPS_SPEC", "Scalable load element Operations speculatively executed"], ["0x80CD", "LD_FIXED_OPS_SPEC", "Non-scalable load element Operations speculatively executed"], ["0x80CE", "ST_SCALE_OPS_SPEC", "Scalable store element Operations speculatively executed"], ["0x80CF", "ST_FIXED_OPS_SPEC", "Non-scalable store element Operations speculatively executed"], ["0x80DA", "LDST_SCALE_BYTES_SPEC", "Scalable load and store bytes Speculatively executed"], ["0x80DB", "LDST_FIXED_BYTES_SPEC", "Non-scalable load and store bytes Speculatively executed"], ["0x80DC", "LD_SCALE_BYTES_SPEC", "Scalable load bytes Speculatively executed"], ["0x80DD", "LD_FIXED_BYTES_SPEC", "Non-scalable load bytes Speculatively executed"], ["0x80DE", "ST_SCALE_BYTES_SPEC", "Scalable store bytes Speculatively executed"], ["0x80DF", "ST_FIXED_BYTES_SPEC", "Non-scalable store bytes Speculatively executed"], ["0x80E1", "ASE_INT8_SPEC", "Integer operation speculatively executed, Advanced SIMD 8-bit"], ["0x80E2", "SVE_INT8_SPEC", "Integer operation speculatively executed, SVE 8-bit"], ["0x80E3", "ASE_SVE_INT8_SPEC", "Integer operation speculatively executed, Advanced SIMD or SVE 8-bit"], ["0x80E5", "ASE_INT16_SPEC", "Integer operation speculatively executed, Advanced SIMD 16-bit"], ["0x80E6", "SVE_INT16_SPEC", "Integer operation speculatively executed, SVE 16-bit"], ["0x80E7", "ASE_SVE_INT16_SPEC", "Integer operation speculatively executed, Advanced SIMD or SVE 16-bit"], ["0x80E9", "ASE_INT32_SPEC", "Integer operation speculatively executed, Advanced SIMD 32-bit"], ["0x80EA", "SVE_INT32_SPEC", "Integer operation speculatively executed, SVE 32-bit"], ["0x80EB", "ASE_SVE_INT32_SPEC", "Integer operation speculatively executed, Advanced SIMD or SVE 32-bit"], ["0x80ED", "ASE_INT64_SPEC", "Integer operation speculatively executed, Advanced SIMD 64-bit"], ["0x80EE", "SVE_INT64_SPEC", "Integer operation speculatively executed, SVE 64-bit"], ["0x80EF", "ASE_SVE_INT64_SPEC", "Integer operation speculatively executed, Advanced SIMD or SVE 64-bit"], ["0x80F1", "ASE_FP_DOT_SPEC", "Floating-point operation speculatively executed, Advanced SIMD dot-product"], ["0x80F2", "SVE_FP_DOT_SPEC", "Floating-point operation speculatively executed, SVE dot-product"], ["0x80F3", "ASE_SVE_FP_DOT_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE dot-product"], ["0x80F5", "ASE_FP_MMLA_SPEC", "Floating-point operation speculatively executed, Advanced SIMD matrix multiply"], ["0x80F6", "SVE_FP_MMLA_SPEC", "Floating-point operation speculatively executed, SVE matrix multiply"], ["0x80F7", "ASE_SVE_FP_MMLA_SPEC", "Floating-point operation speculatively executed, Advanced SIMD or SVE matrix multiply"], ["0x80F9", "ASE_INT_DOT_SPEC", "Operation speculatively executed, Advanced SIMD integer dot-product"], ["0x80FA", "SVE_INT_DOT_SPEC", "Integer operation speculatively executed, SVE dot-product"], ["0x80FB", "ASE_SVE_INT_DOT_SPEC", "Integer operation speculatively executed, Advanced SIMD or SVE dot-product"], ["0x80FD", "ASE_INT_MMLA_SPEC", "Integer operation speculatively executed, Advanced SIMD matrix multiply"], ["0x80FE", "SVE_INT_MMLA_SPEC", "Integer operation speculatively executed, SVE matrix multiply"], ["0x80FF", "ASE_SVE_INT_MMLA_SPEC", "Integer operation speculatively executed, Advanced SIMD or SVE matrix multiply"], ["0x8107", "BR_SKIP_RETIRED", "Branch Instruction architecturally executed, not taken"], ["0x8108", "BR_IMMED_TAKEN_RETIRED", "Branch Instruction architecturally executed, immediate, taken"], ["0x8109", "BR_IMMED_SKIP_RETIRED", "Branch Instruction architecturally executed, immediate, not taken"], ["0x810A", "BR_IND_TAKEN_RETIRED", "Branch Instruction architecturally executed, indirect, taken"], ["0x810B", "BR_IND_SKIP_RETIRED", "Branch Instruction architecturally executed, indirect, not taken"], ["0x810C", "BR_INDNR_TAKEN_RETIRED", "Branch Instruction architecturally executed, indirect excluding procedure return, taken"], ["0x810D", "BR_INDNR_SKIP_RETIRED", "Branch Instruction architecturally executed, indirect excluding procedure return, not taken"], ["0x810E", "BR_RETURN_ANY_RETIRED", "Branch Instruction architecturally executed, procedure return"], ["0x810F", "BR_RETURN_SKIP_RETIRED", "Branch Instruction architecturally executed, procedure return, not taken"], ["0x8110", "BR_IMMED_PRED_RETIRED", "Branch Instruction architecturally executed, predicted immediate"], ["0x8111", "BR_IMMED_MIS_PRED_RETIRED", "Branch Instruction architecturally executed, mispredicted immediate"], ["0x8112", "BR_IND_PRED_RETIRED", "Branch Instruction architecturally executed, predicted indirect"], ["0x8113", "BR_IND_MIS_PRED_RETIRED", "Branch Instruction architecturally executed, mispredicted indirect"], ["0x8114", "BR_RETURN_PRED_RETIRED", "Branch Instruction architecturally executed, predicted procedure return"], ["0x8115", "BR_RETURN_MIS_PRED_RETIRED", "Branch Instruction architecturally executed, mispredicted procedure return"], ["0x8116", "BR_INDNR_PRED_RETIRED", "Branch Instruction architecturally executed, predicted indirect excluding procedure return"], ["0x8117", "BR_INDNR_MIS_PRED_RETIRED", "Branch Instruction architecturally executed, mispredicted indirect excluding procedure return"], ["0x8118", "BR_TAKEN_PRED_RETIRED", "Branch Instruction architecturally executed, predicted branch, taken"], ["0x8119", "BR_TAKEN_MIS_PRED_RETIRED", "Branch Instruction architecturally executed, mispredicted branch, taken"], ["0x811A", "BR_SKIP_PRED_RETIRED", "Branch Instruction architecturally executed, predicted branch, not taken"], ["0x811B", "BR_SKIP_MIS_PRED_RETIRED", "Branch Instruction architecturally executed, mispredicted branch, not taken"], ["0x811C", "BR_PRED_RETIRED", "Branch Instruction architecturally executed, predicted branch"], ["0x811D", "BR_IND_RETIRED", "Instruction architecturally executed, indirect branch"], ["0x811E", "BR_INDNR_RETIRED", "Branch Instruction architecturally executed, indirect excluding procedure return"], ["0x811F", "BRB_FILTRATE", "Branch Record captured"], ["0x8120", "INST_FETCH_PERCYC", "Event in progress, INST_FETCH"], ["0x8121", "MEM_ACCESS_RD_PERCYC", "Event in progress, MEM_ACCESS_RD"], ["0x8124", "INST_FETCH", "Instruction memory access"], ["0x8125", "BUS_REQ_RD_PERCYC", "Bus read transactions in progress"], ["0x8126", "BUS_REQ_WR_PERCYC", "Bus write transactions in progress"], ["0x8128", "DTLB_WALK_PERCYC", "Event in progress, DTLB_WALK"], ["0x8129", "ITLB_WALK_PERCYC", "Event in progress, ITLB_WALK"], ["0x812A", "SAMPLE_FEED_BR", "Statistical Profiling sample taken, branch"], ["0x812B", "SAMPLE_FEED_LD", "Statistical Profiling sample taken, load"], ["0x812C", "SAMPLE_FEED_ST", "Statistical Profiling sample taken, store"], ["0x812D", "SAMPLE_FEED_OP", "Statistical Profiling sample taken, matching operation type"], ["0x812E", "SAMPLE_FEED_EVENT", "Statistical Profiling sample taken, matching events"], ["0x812F", "SAMPLE_FEED_LAT", "Statistical Profiling sample taken, exceeding minimum latency"], ["0x8130", "L1D_TLB_RW", "Level 1 data TLB demand access"], ["0x8131", "L1I_TLB_RD", "Level 1 instruction TLB demand access"], ["0x8132", "L1D_TLB_PRFM", "Level 1 data TLB software preload"], ["0x8133", "L1I_TLB_PRFM", "Level 1 instruction TLB software preload"], ["0x8134", "DTLB_HWUPD", "Data TLB hardware update of translation table"], ["0x8135", "ITLB_HWUPD", "Instruction TLB hardware update of translation table"], ["0x8136", "DTLB_STEP", "Data TLB translation table walk, step"], ["0x8137", "ITLB_STEP", "Instruction TLB translation table walk, step"], ["0x8138", "DTLB_WALK_LARGE", "Data TLB large page translation table walk"], ["0x8139", "ITLB_WALK_LARGE", "Instruction TLB large page translation table walk"], ["0x813A", "DTLB_WALK_SMALL", "Data TLB small page translation table walk"], ["0x813B", "ITLB_WALK_SMALL", "Instruction TLB small page translation table walk"], ["0x813C", "DTLB_WALK_RW", "Data TLB demand access with at least one translation table walk"], ["0x813D", "ITLB_WALK_RD", "Instruction TLB demand access with at least one translation table walk"], ["0x813E", "DTLB_WALK_PRFM", "Data TLB software preload access with at least one translation table walk"], ["0x813F", "ITLB_WALK_PRFM", "Instruction TLB software preload access with at least one translation table walk"], ["0x8140", "L1D_CACHE_RW", "Level 1 data cache demand access"], ["0x8141", "L1I_CACHE_RD", "Level 1 instruction cache demand fetch"], ["0x8142", "L1D_CACHE_PRFM", "Level 1 data cache software preload"], ["0x8143", "L1I_CACHE_PRFM", "Level 1 instruction cache software preload"], ["0x8144", "L1D_CACHE_MISS", "Level 1 data cache demand access miss"], ["0x8145", "L1I_CACHE_HWPRF", "Level 1 instruction cache hardware prefetch"], ["0x8146", "L1D_CACHE_REFILL_PRFM", "Level 1 data cache refill, software preload"], ["0x8147", "L1I_CACHE_REFILL_PRFM", "Level 1 instruction cache refill, software preload"], ["0x8148", "L2D_CACHE_RW", "Level 2 data cache demand access"], ["0x8149", "L2I_CACHE_RD", "Level 2 instruction cache demand fetch"], ["0x814A", "L2D_CACHE_PRFM", "Level 2 data cache software preload"], ["0x814B", "L2I_CACHE_PRFM", "Level 2 instruction cache software preload"], ["0x814C", "L2D_CACHE_MISS", "Level 2 data cache demand access miss"], ["0x814D", "L2I_CACHE_HWPRF", "Level 2 instruction cache hardware prefetch"], ["0x814E", "L2D_CACHE_REFILL_PRFM", "Level 2 data cache refill, software preload"], ["0x814F", "L2I_CACHE_REFILL_PRFM", "Level 2 instruction cache refill, software preload"], ["0x8150", "L3D_CACHE_RW", "Level 3 data cache demand access"], ["0x8151", "L3D_CACHE_PRFM", "Level 3 data cache software preload"], ["0x8152", "L3D_CACHE_MISS", "Level 3 data cache demand access miss"], ["0x8153", "L3D_CACHE_REFILL_PRFM", "Level 3 data cache refill, software preload"], ["0x8154", "L1D_CACHE_HWPRF", "Level 1 data cache hardware prefetch"], ["0x8155", "L2D_CACHE_HWPRF", "Level 2 data cache hardware prefetch"], ["0x8156", "L3D_CACHE_HWPRF", "Level 3 data cache hardware prefetch"], ["0x8157", "LL_CACHE_HWPRF", "Last level cache hardware prefetch"], ["0x8158", "STALL_FRONTEND_MEMBOUND", "Frontend stall cycles, memory bound"], ["0x8159", "STALL_FRONTEND_L1I", "Frontend stall cycles, level 1 instruction cache"], ["0x815A", "STALL_FRONTEND_L2I", "Frontend stall cycles, level 2 instruction cache"], ["0x815B", "STALL_FRONTEND_MEM", "Frontend stall cycles, last level PE cache or memory"], ["0x815C", "STALL_FRONTEND_TLB", "Frontend stall cycles, TLB"], ["0x8160", "STALL_FRONTEND_CPUBOUND", "Frontend stall cycles, processor bound"], ["0x8161", "STALL_FRONTEND_FLOW", "Frontend stall cycles, flow control"], ["0x8162", "STALL_FRONTEND_FLUSH", "Frontend stall cycles, flush recovery"], ["0x8163", "STALL_FRONTEND_RENAME", "Frontend stall cycles, rename full"], ["0x8164", "STALL_BACKEND_MEMBOUND", "Backend stall cycles, memory bound"], ["0x8165", "STALL_BACKEND_L1D", "Backend stall cycles, level 1 data cache"], ["0x8166", "STALL_BACKEND_L2D", "Backend stall cycles, level 2 data cache"], ["0x8167", "STALL_BACKEND_TLB", "Backend stall cycles, TLB"], ["0x8168", "STALL_BACKEND_ST", "Backend stall cycles, store"], ["0x816A", "STALL_BACKEND_CPUBOUND", "Backend stall cycles, processor bound"], ["0x816B", "STALL_BACKEND_BUSY", "Backend stall cycles, backend busy"], ["0x816C", "STALL_BACKEND_ILOCK", "Backend stall cycles, input dependency"], ["0x816D", "STALL_BACKEND_RENAME", "Backend stall cycles, rename full"], ["0x816E", "STALL_BACKEND_ATOMIC", "Backend stall cycles, atomic operation"], ["0x816F", "STALL_BACKEND_MEMCPYSET", "Backend stall cycles, Memory Copy or Set operation"], ["0x8170", "CAS_NEAR_FAIL", "Atomic memory Operation speculatively executed, Compare and Swap fail"], ["0x8171", "CAS_NEAR_PASS", "Atomic memory Operation speculatively executed, Compare and Swap pass"], ["0x8172", "CAS_NEAR_SPEC", "Atomic memory Operation speculatively executed, Compare and Swap near"], ["0x8173", "CAS_FAR_SPEC", "Atomic memory Operation speculatively executed, Compare and Swap far"], ["0x8174", "CAS_SPEC", "Atomic memory Operation speculatively executed, Compare and Swap"], ["0x8175", "LSE_LD_SPEC", "Atomic memory Operation speculatively executed, load"], ["0x8176", "LSE_ST_SPEC", "Atomic memory Operation speculatively executed, store"], ["0x8177", "LSE_LDST_SPEC", "Atomic memory Operation speculatively executed, load or store"], ["0x8178", "REMOTE_ACCESS_WR", "Access to another socket in a multi-socket system, write"], ["0x8179", "BRNL_INDNR_TAKEN_RETIRED", "Branch Instruction architecturally executed, indirect branch without link excluding procedure return, taken"], ["0x817A", "BL_TAKEN_RETIRED", "Branch Instruction architecturally executed, branch with link, taken"], ["0x817B", "BRNL_TAKEN_RETIRED", "Branch Instruction architecturally executed, branch without link, taken"], ["0x817C", "BL_IND_TAKEN_RETIRED", "Branch Instruction architecturally executed, indirect branch with link, taken"], ["0x817D", "BRNL_IND_TAKEN_RETIRED", "Branch Instruction architecturally executed, indirect branch without link, taken"], ["0x817E", "BL_IMMED_TAKEN_RETIRED", "Branch Instruction architecturally executed, direct branch with link, taken"], ["0x817F", "BRNL_IMMED_TAKEN_RETIRED", "Branch Instruction architecturally executed, direct branch without link, taken"], ["0x8180", "BR_UNCOND_RETIRED", "Branch Instruction architecturally executed, unconditional branch"], ["0x8181", "BR_COND_RETIRED", "Branch Instruction architecturally executed, conditional branch"], ["0x8182", "BR_COND_TAKEN_RETIRED", "Branch Instruction architecturally executed, conditional branch, taken"], ["0x8183", "BR_HINT_COND_RETIRED", "Branch Instruction architecturally executed, hinted conditional"], ["0x8184", "BR_HINT_COND_PRED_RETIRED", "Branch Instruction architecturally executed, predicted hinted conditional"], ["0x8185", "BR_HINT_COND_MIS_PRED_RETIRED", "Branch Instruction architecturally executed, mispredicted hinted conditional"], ["0x8186", "UOP_RETIRED", "Micro-operation architecturally executed"], ["0x8188", "DTLB_WALK_BLOCK", "Data TLB block translation table walk"], ["0x8189", "ITLB_WALK_BLOCK", "Instruction TLB block translation table walk"], ["0x818A", "DTLB_WALK_PAGE", "Data TLB page translation table walk"], ["0x818B", "ITLB_WALK_PAGE", "Instruction TLB page translation table walk"], ["0x818D", "BUS_REQ_RD", "Bus request, read"], ["0x818E", "BUS_REQ_WR", "Bus request, write"], ["0x818F", "BUS_REQ", "Bus request"], ["0x8190", "ISNP_HIT_RD", "Snoop hit, demand instruction fetch"], ["0x8191", "ISNP_HIT_NEAR_RD", "Snoop hit in near cache, demand instruction fetch"], ["0x8192", "ISNP_HIT_FAR_RD", "Snoop hit in far cache, demand instruction fetch"], ["0x8193", "ISNP_HIT_REMOTE_RD", "Snoop hit in remote cache, demand instruction fetch"], ["0x8194", "DSNP_HIT_RD", "Snoop hit, demand data read"], ["0x8195", "DSNP_HIT_NEAR_RD", "Snoop hit in near cache, demand data read"], ["0x8196", "DSNP_HIT_FAR_RD", "Snoop hit in far cache, demand data read"], ["0x8197", "DSNP_HIT_REMOTE_RD", "Snoop hit in remote cache, demand data read"], ["0x8198", "DSNP_HIT_WR", "Snoop hit, demand data write"], ["0x8199", "DSNP_HIT_NEAR_WR", "Snoop hit in near cache, demand data write"], ["0x819A", "DSNP_HIT_FAR_WR", "Snoop hit in far cache, demand data write"], ["0x819B", "DSNP_HIT_REMOTE_WR", "Snoop hit in remote cache, demand data write"], ["0x819C", "DSNP_HIT_RW", "Snoop hit, demand data access"], ["0x819D", "DSNP_HIT_NEAR_RW", "Snoop hit in near cache, demand data access"], ["0x819E", "DSNP_HIT_FAR_RW", "Snoop hit in far cache, demand data access"], ["0x819F", "DSNP_HIT_REMOTE_RW", "Snoop hit in remote cache, demand data access"], ["0x81A0", "DSNP_HIT_PRFM", "Snoop hit, software data preload"], ["0x81A1", "DSNP_HIT_NEAR_PRFM", "Snoop hit in near cache, software data preload"], ["0x81A2", "DSNP_HIT_FAR_PRFM", "Snoop hit in far cache, software data preload"], ["0x81A3", "DSNP_HIT_REMOTE_PRFM", "Snoop hit in remote cache, software data preload"], ["0x81A4", "DSNP_HIT_HWPRF", "Snoop hit, hardware data prefetch"], ["0x81A5", "DSNP_HIT_NEAR_HWPRF", "Snoop hit in near cache, hardware data prefetch"], ["0x81A6", "DSNP_HIT_FAR_HWPRF", "Snoop hit in far cache, hardware data prefetch"], ["0x81A7", "DSNP_HIT_REMOTE_HWPRF", "Snoop hit in remote cache, hardware data prefetch"], ["0x81A8", "ISNP_HIT_PRFM", "Snoop hit, software instruction preload"], ["0x81A9", "ISNP_HIT_NEAR_PRFM", "Snoop hit in near cache, software instruction preload"], ["0x81AA", "ISNP_HIT_FAR_PRFM", "Snoop hit in far cache, software instruction preload"], ["0x81AB", "ISNP_HIT_REMOTE_PRFM", "Snoop hit in remote cache, software instruction preload"], ["0x81AC", "ISNP_HIT_HWPRF", "Snoop hit, hardware instruction prefetch"], ["0x81AD", "ISNP_HIT_NEAR_HWPRF", "Snoop hit in near cache, hardware instruction prefetch"], ["0x81AE", "ISNP_HIT_FAR_HWPRF", "Snoop hit in far cache, hardware instruction prefetch"], ["0x81AF", "ISNP_HIT_REMOTE_HWPRF", "Snoop hit in remote cache, hardware instruction prefetch"], ["0x81B0", "ISNP_HIT", "Snoop hit, instruction"], ["0x81B1", "ISNP_HIT_NEAR", "Snoop hit in near cache, instruction"], ["0x81B2", "ISNP_HIT_FAR", "Snoop hit in far cache, instruction"], ["0x81B3", "ISNP_HIT_REMOTE", "Snoop hit in remote cache, instruction"], ["0x81B4", "DSNP_HIT", "Snoop hit, data"], ["0x81B5", "DSNP_HIT_NEAR", "Snoop hit in near cache, data"], ["0x81B6", "DSNP_HIT_FAR", "Snoop hit in far cache, data"], ["0x81B7", "DSNP_HIT_REMOTE", "Snoop hit in remote cache, data"], ["0x81B8", "L1I_CACHE_REFILL_HWPRF", "Level 1 instruction cache refill, hardware prefetch"], ["0x81B9", "L2I_CACHE_REFILL_HWPRF", "Level 2 instruction cache refill, hardware prefetch"], ["0x81BC", "L1D_CACHE_REFILL_HWPRF", "Level 1 data cache refill, hardware prefetch"], ["0x81BD", "L2D_CACHE_REFILL_HWPRF", "Level 2 data cache refill, hardware prefetch"], ["0x81BE", "L3D_CACHE_REFILL_HWPRF", "Level 3 data cache refill, hardware prefetch"], ["0x81BF", "LL_CACHE_REFILL_HWPRF", "Last level cache refill, hardware prefetch"], ["0x81C0", "L1I_CACHE_HIT_RD", "Level 1 instruction cache demand fetch hit"], ["0x81C1", "L2I_CACHE_HIT_RD", "Level 2 instruction cache demand fetch hit"], ["0x81C4", "L1D_CACHE_HIT_RD", "Level 1 data cache demand hit, read"], ["0x81C5", "L2D_CACHE_HIT_RD", "Level 2 data cache demand hit, read"], ["0x81C6", "L3D_CACHE_HIT_RD", "Level 3 data cache demand hit, read"], ["0x81C7", "LL_CACHE_HIT_RD", "Last level cache demand hit, read"], ["0x81C8", "L1D_CACHE_HIT_WR", "Level 1 data cache demand access hit, write"], ["0x81C9", "L2D_CACHE_HIT_WR", "Level 2 data cache demand access hit, write"], ["0x81CA", "L3D_CACHE_HIT_WR", "Level 3 data cache demand access hit, write"], ["0x81CB", "LL_CACHE_HIT_WR", "Last level cache demand access hit, write"], ["0x81CC", "L1D_CACHE_HIT_RW", "Level 1 data cache demand access hit"], ["0x81CD", "L2D_CACHE_HIT_RW", "Level 2 data cache demand access hit"], ["0x81CE", "L3D_CACHE_HIT_RW", "Level 3 data cache demand access hit"], ["0x81CF", "LL_CACHE_HIT_RW", "Last level cache demand access hit"], ["0x81D0", "L1I_CACHE_HIT_RD_FPRFM", "Level 1 instruction cache demand fetch first hit, fetched by software preload"], ["0x81D1", "L2I_CACHE_HIT_RD_FPRFM", "Level 2 instruction cache demand fetch first hit, fetched by software preload"], ["0x81D4", "L1D_CACHE_HIT_RD_FPRFM", "Level 1 data cache demand first hit, read, fetched by software preload"], ["0x81D5", "L2D_CACHE_HIT_RD_FPRFM", "Level 2 data cache demand first hit, read, fetched by software preload"], ["0x81D6", "L3D_CACHE_HIT_RD_FPRFM", "Level 3 data cache demand first hit, read, fetched by software preload"], ["0x81D7", "LL_CACHE_HIT_RD_FPRFM", "Last level cache demand first hit, read, fetched by software preload"], ["0x81D8", "L1D_CACHE_HIT_WR_FPRFM", "Level 1 data cache demand access first hit, write, fetched by software preload"], ["0x81D9", "L2D_CACHE_HIT_WR_FPRFM", "Level 2 data cache demand access first hit, write, fetched by software preload"], ["0x81DA", "L3D_CACHE_HIT_WR_FPRFM", "Level 3 data cache demand access first hit, write, fetched by software preload"], ["0x81DB", "LL_CACHE_HIT_WR_FPRFM", "Last level cache demand access first hit, write, fetched by software preload"], ["0x81DC", "L1D_CACHE_HIT_RW_FPRFM", "Level 1 data cache demand access first hit, fetched by software preload"], ["0x81DD", "L2D_CACHE_HIT_RW_FPRFM", "Level 2 data cache demand access first hit, fetched by software preload"], ["0x81DE", "L3D_CACHE_HIT_RW_FPRFM", "Level 3 data cache demand access first hit, fetched by software preload"], ["0x81DF", "LL_CACHE_HIT_RW_FPRFM", "Last level cache demand access first hit, fetched by software preload"], ["0x81E0", "L1I_CACHE_HIT_RD_FHWPRF", "Level 1 instruction cache demand fetch first hit, fetched by hardware prefetcher"], ["0x81E1", "L2I_CACHE_HIT_RD_FHWPRF", "Level 2 instruction cache demand fetch first hit, fetched by hardware prefetcher"], ["0x81E4", "L1D_CACHE_HIT_RD_FHWPRF", "Level 1 data cache demand first hit, read, fetched by hardware prefetcher"], ["0x81E5", "L2D_CACHE_HIT_RD_FHWPRF", "Level 2 data cache demand first hit, read, fetched by hardware prefetcher"], ["0x81E6", "L3D_CACHE_HIT_RD_FHWPRF", "Level 3 data cache demand first hit, read, fetched by hardware prefetcher"], ["0x81E7", "LL_CACHE_HIT_RD_FHWPRF", "Last level cache demand first hit, read, fetched by hardware prefetcher"], ["0x81E8", "L1D_CACHE_HIT_WR_FHWPRF", "Level 1 data cache demand access first hit, write, fetched by hardware prefetcher"], ["0x81E9", "L2D_CACHE_HIT_WR_FHWPRF", "Level 2 data cache demand access first hit, write, fetched by hardware prefetcher"], ["0x81EA", "L3D_CACHE_HIT_WR_FHWPRF", "Level 3 data cache demand access first hit, write, fetched by hardware prefetcher"], ["0x81EB", "LL_CACHE_HIT_WR_FHWPRF", "Last level cache demand access first hit, write, fetched by hardware prefetcher"], ["0x81EC", "L1D_CACHE_HIT_RW_FHWPRF", "Level 1 data cache demand access first hit, fetched by hardware prefetcher"], ["0x81ED", "L2D_CACHE_HIT_RW_FHWPRF", "Level 2 data cache demand access first hit, fetched by hardware prefetcher"], ["0x81EE", "L3D_CACHE_HIT_RW_FHWPRF", "Level 3 data cache demand access first hit, fetched by hardware prefetcher"], ["0x81EF", "LL_CACHE_HIT_RW_FHWPRF", "Last level cache demand access first hit, fetched by hardware prefetcher"], ["0x81F0", "L1I_CACHE_HIT_RD_FPRF", "Level 1 instruction cache demand fetch first hit, fetched by preload or prefetch"], ["0x81F1", "L2I_CACHE_HIT_RD_FPRF", "Level 2 instruction cache demand fetch first hit, fetched by preload or prefetch"], ["0x81F4", "L1D_CACHE_HIT_RD_FPRF", "Level 1 data cache demand first hit, read, fetched by preload or prefetch"], ["0x81F5", "L2D_CACHE_HIT_RD_FPRF", "Level 2 data cache demand first hit, read, fetched by preload or prefetch"], ["0x81F6", "L3D_CACHE_HIT_RD_FPRF", "Level 3 data cache demand first hit, read, fetched by preload or prefetch"], ["0x81F7", "LL_CACHE_HIT_RD_FPRF", "Last level cache demand first hit, read, fetched by preload or prefetch"], ["0x81F8", "L1D_CACHE_HIT_WR_FPRF", "Level 1 data cache demand access first hit, write, fetched by preload or prefetch"], ["0x81F9", "L2D_CACHE_HIT_WR_FPRF", "Level 2 data cache demand access first hit, write, fetched by preload or prefetch"], ["0x81FA", "L3D_CACHE_HIT_WR_FPRF", "Level 3 data cache demand access first hit, write, fetched by preload or prefetch"], ["0x81FB", "LL_CACHE_HIT_WR_FPRF", "Last level cache demand access first hit, write, fetched by preload or prefetch"], ["0x81FC", "L1D_CACHE_HIT_RW_FPRF", "Level 1 data cache demand access first hit, fetched by preload or prefetch"], ["0x81FD", "L2D_CACHE_HIT_RW_FPRF", "Level 2 data cache demand access first hit, fetched by preload or prefetch"], ["0x81FE", "L3D_CACHE_HIT_RW_FPRF", "Level 3 data cache demand access first hit, fetched by preload or prefetch"], ["0x81FF", "LL_CACHE_HIT_RW_FPRF", "Last level cache demand access first hit, fetched by preload or prefetch"], ["0x8200", "L1I_CACHE_HIT", "Level 1 instruction cache hit"], ["0x8201", "L2I_CACHE_HIT", "Level 2 instruction cache hit"], ["0x8204", "L1D_CACHE_HIT", "Level 1 data cache hit"], ["0x8205", "L2D_CACHE_HIT", "Level 2 data cache hit"], ["0x8206", "L3D_CACHE_HIT", "Level 3 data cache hit"], ["0x8207", "LL_CACHE_HIT", "Last level cache hit"], ["0x8208", "L1I_CACHE_HIT_PRFM", "Level 1 instruction cache software preload hit"], ["0x8209", "L2I_CACHE_HIT_PRFM", "Level 2 instruction cache software preload hit"], ["0x820C", "L1D_CACHE_HIT_PRFM", "Level 1 data cache software preload hit"], ["0x820D", "L2D_CACHE_HIT_PRFM", "Level 2 data cache software preload hit"], ["0x820E", "L3D_CACHE_HIT_PRFM", "Level 3 data cache software preload hit"], ["0x820F", "LL_CACHE_HIT_PRFM", "Last level cache software preload hit"], ["0x8214", "L1D_CACHE_HITM_RD", "Level 1 data cache demand hit modified, read"], ["0x8215", "L2D_CACHE_HITM_RD", "Level 2 data cache demand hit modified, read"], ["0x8216", "L3D_CACHE_HITM_RD", "Level 3 data cache demand hit modified, read"], ["0x8217", "LL_CACHE_HITM_RD", "Last level cache demand hit modified, read"], ["0x8218", "L1D_CACHE_HITM_WR", "Level 1 data cache demand access hit modified, write"], ["0x8219", "L2D_CACHE_HITM_WR", "Level 2 data cache demand access hit modified, write"], ["0x821A", "L3D_CACHE_HITM_WR", "Level 3 data cache demand access hit modified, write"], ["0x821B", "LL_CACHE_HITM_WR", "Last level cache demand access hit modified, write"], ["0x821C", "L1D_CACHE_HITM_RW", "Level 1 data cache demand access hit modified"], ["0x821D", "L2D_CACHE_HITM_RW", "Level 2 data cache demand access hit modified"], ["0x821E", "L3D_CACHE_HITM_RW", "Level 3 data cache demand access hit modified"], ["0x821F", "LL_CACHE_HITM_RW", "Last level cache demand access hit modified"], ["0x8224", "DSNP_HITM_RD", "Snoop hit, demand data read, modified"], ["0x8225", "DSNP_HITM_NEAR_RD", "Snoop hit in near cache, demand data read, modified"], ["0x8226", "DSNP_HITM_FAR_RD", "Snoop hit in far cache, demand data read, modified"], ["0x8227", "DSNP_HITM_REMOTE_RD", "Snoop hit in remote cache, demand data read, modified"], ["0x8228", "DSNP_HITM_WR", "Snoop hit, demand data write, modified"], ["0x8229", "DSNP_HITM_NEAR_WR", "Snoop hit in near cache, demand data write, modified"], ["0x822A", "DSNP_HITM_FAR_WR", "Snoop hit in far cache, demand data write, modified"], ["0x822B", "DSNP_HITM_REMOTE_WR", "Snoop hit in remote cache, demand data write, modified"], ["0x822C", "DSNP_HITM_RW", "Snoop hit, demand data access, modified"], ["0x822D", "DSNP_HITM_NEAR_RW", "Snoop hit in near cache, demand data access, modified"], ["0x822E", "DSNP_HITM_FAR_RW", "Snoop hit in far cache, demand data access, modified"], ["0x822F", "DSNP_HITM_REMOTE_RW", "Snoop hit in remote cache, demand data access, modified"], ["0x8230", "LOCAL_MEM", "Access to memory attached to this device"], ["0x8231", "LOCAL_MEM_RD", "Access to memory attached to this device, read"], ["0x8232", "LOCAL_MEM_WR", "Access to memory attached to this device, write"], ["0x8233", "LOCAL_MEM_RW", "Access to memory attached to this device, demand read or write"], ["0x8234", "LOCAL_MEM_PRFM", "Access to memory attached to this device, preload or prefetch"], ["0x8238", "REMOTE_MEM", "Access to memory attached to another socket in a multi-socket system"], ["0x8239", "REMOTE_MEM_RD", "Access to memory attached to another socket in a multi-socket system, read"], ["0x823A", "REMOTE_MEM_WR", "Access to memory attached to another socket in a multi-socket system, write"], ["0x823B", "REMOTE_MEM_RW", "Access to memory attached to another socket in a multi-socket system, demand read or write"], ["0x823C", "REMOTE_MEM_PRFM", "Access to memory attached to another socket in a multi-socket system, preload or prefetch"], ["0x8240", "L1I_LFB_HIT_RD", "Level 1 instruction cache demand fetch line-fill buffer hit"], ["0x8241", "L2I_LFB_HIT_RD", "Level 2 instruction cache demand fetch line-fill buffer hit"], ["0x8244", "L1D_LFB_HIT_RD", "Level 1 data cache demand line-fill buffer hit, read"], ["0x8245", "L2D_LFB_HIT_RD", "Level 2 data cache demand line-fill buffer hit, read"], ["0x8246", "L3D_LFB_HIT_RD", "Level 3 data cache demand line-fill buffer hit, read"], ["0x8247", "LL_LFB_HIT_RD", "Last level cache demand line-fill buffer hit, read"], ["0x8248", "L1D_LFB_HIT_WR", "Level 1 data cache demand access line-fill buffer hit, write"], ["0x8249", "L2D_LFB_HIT_WR", "Level 2 data cache demand access line-fill buffer hit, write"], ["0x824A", "L3D_LFB_HIT_WR", "Level 3 data cache demand access line-fill buffer hit, write"], ["0x824B", "LL_LFB_HIT_WR", "Last level cache demand access line-fill buffer hit, write"], ["0x824C", "L1D_LFB_HIT_RW", "Level 1 data cache demand access line-fill buffer hit"], ["0x824D", "L2D_LFB_HIT_RW", "Level 2 data cache demand access line-fill buffer hit"], ["0x824E", "L3D_LFB_HIT_RW", "Level 3 data cache demand access line-fill buffer hit"], ["0x824F", "LL_LFB_HIT_RW", "Last level cache demand access line-fill buffer hit"], ["0x8250", "L1I_LFB_HIT_RD_FPRFM", "Level 1 instruction cache demand fetch line-fill buffer first hit, recently fetched by software preload"], ["0x8251", "L2I_LFB_HIT_RD_FPRFM", "Level 2 instruction cache demand fetch line-fill buffer first hit, recently fetched by software preload"], ["0x8254", "L1D_LFB_HIT_RD_FPRFM", "Level 1 data cache demand line-fill buffer first hit, read, recently fetched by software preload"], ["0x8255", "L2D_LFB_HIT_RD_FPRFM", "Level 2 data cache demand line-fill buffer first hit, read, recently fetched by software preload"], ["0x8256", "L3D_LFB_HIT_RD_FPRFM", "Level 3 data cache demand line-fill buffer first hit, read, recently fetched by software preload"], ["0x8257", "LL_LFB_HIT_RD_FPRFM", "Last level cache demand line-fill buffer first hit, read, recently fetched by software preload"], ["0x8258", "L1D_LFB_HIT_WR_FPRFM", "Level 1 data cache demand access line-fill buffer first hit, write, recently fetched by software preload"], ["0x8259", "L2D_LFB_HIT_WR_FPRFM", "Level 2 data cache demand access line-fill buffer first hit, write, recently fetched by software preload"], ["0x825A", "L3D_LFB_HIT_WR_FPRFM", "Level 3 data cache demand access line-fill buffer first hit, write, recently fetched by software preload"], ["0x825B", "LL_LFB_HIT_WR_FPRFM", "Last level cache demand access line-fill buffer first hit, write, recently fetched by software preload"], ["0x825C", "L1D_LFB_HIT_RW_FPRFM", "Level 1 data cache demand access line-fill buffer first hit, recently fetched by software preload"], ["0x825D", "L2D_LFB_HIT_RW_FPRFM", "Level 2 data cache demand access line-fill buffer first hit, recently fetched by software preload"], ["0x825E", "L3D_LFB_HIT_RW_FPRFM", "Level 3 data cache demand access line-fill buffer first hit, recently fetched by software preload"], ["0x825F", "LL_LFB_HIT_RW_FPRFM", "Last level cache demand access line-fill buffer first hit, recently fetched by software preload"], ["0x8260", "L1I_LFB_HIT_RD_FHWPRF", "Level 1 instruction cache demand fetch line-fill buffer first hit, recently fetched by hardware prefetcher"], ["0x8261", "L2I_LFB_HIT_RD_FHWPRF", "Level 2 instruction cache demand fetch line-fill buffer first hit, recently fetched by hardware prefetcher"], ["0x8264", "L1D_LFB_HIT_RD_FHWPRF", "Level 1 data cache demand line-fill buffer first hit, read, recently fetched by hardware prefetcher"], ["0x8265", "L2D_LFB_HIT_RD_FHWPRF", "Level 2 data cache demand line-fill buffer first hit, read, recently fetched by hardware prefetcher"], ["0x8266", "L3D_LFB_HIT_RD_FHWPRF", "Level 3 data cache demand line-fill buffer first hit, read, recently fetched by hardware prefetcher"], ["0x8267", "LL_LFB_HIT_RD_FHWPRF", "Last level cache demand line-fill buffer first hit, read, recently fetched by hardware prefetcher"], ["0x8268", "L1D_LFB_HIT_WR_FHWPRF", "Level 1 data cache demand access line-fill buffer first hit, write, recently fetched by hardware prefetcher"], ["0x8269", "L2D_LFB_HIT_WR_FHWPRF", "Level 2 data cache demand access line-fill buffer first hit, write, recently fetched by hardware prefetcher"], ["0x826A", "L3D_LFB_HIT_WR_FHWPRF", "Level 3 data cache demand access line-fill buffer first hit, write, recently fetched by hardware prefetcher"], ["0x826B", "LL_LFB_HIT_WR_FHWPRF", "Last level cache demand access line-fill buffer first hit, write, recently fetched by hardware prefetcher"], ["0x826C", "L1D_LFB_HIT_RW_FHWPRF", "Level 1 data cache demand access line-fill buffer first hit, recently fetched by hardware prefetcher"], ["0x826D", "L2D_LFB_HIT_RW_FHWPRF", "Level 2 data cache demand access line-fill buffer first hit, recently fetched by hardware prefetcher"], ["0x826E", "L3D_LFB_HIT_RW_FHWPRF", "Level 3 data cache demand access line-fill buffer first hit, recently fetched by hardware prefetcher"], ["0x826F", "LL_LFB_HIT_RW_FHWPRF", "Last level cache demand access line-fill buffer first hit, recently fetched by hardware prefetcher"], ["0x8270", "L1I_LFB_HIT_RD_FPRF", "Level 1 instruction cache demand fetch line-fill buffer first hit, recently fetched by preload or prefetch"], ["0x8271", "L2I_LFB_HIT_RD_FPRF", "Level 2 instruction cache demand fetch line-fill buffer first hit, recently fetched by preload or prefetch"], ["0x8274", "L1D_LFB_HIT_RD_FPRF", "Level 1 data cache demand line-fill buffer first hit, read, recently fetched by preload or prefetch"], ["0x8275", "L2D_LFB_HIT_RD_FPRF", "Level 2 data cache demand line-fill buffer first hit, read, recently fetched by preload or prefetch"], ["0x8276", "L3D_LFB_HIT_RD_FPRF", "Level 3 data cache demand line-fill buffer first hit, read, recently fetched by preload or prefetch"], ["0x8277", "LL_LFB_HIT_RD_FPRF", "Last level cache demand line-fill buffer first hit, read, recently fetched by preload or prefetch"], ["0x8278", "L1D_LFB_HIT_WR_FPRF", "Level 1 data cache demand access line-fill buffer first hit, write, recently fetched by preload or prefetch"], ["0x8279", "L2D_LFB_HIT_WR_FPRF", "Level 2 data cache demand access line-fill buffer first hit, write, recently fetched by preload or prefetch"], ["0x827A", "L3D_LFB_HIT_WR_FPRF", "Level 3 data cache demand access line-fill buffer first hit, write, recently fetched by preload or prefetch"], ["0x827B", "LL_LFB_HIT_WR_FPRF", "Last level cache demand access line-fill buffer first hit, write, recently fetched by preload or prefetch"], ["0x827C", "L1D_LFB_HIT_RW_FPRF", "Level 1 data cache demand access line-fill buffer first hit, recently fetched by preload or prefetch"], ["0x827D", "L2D_LFB_HIT_RW_FPRF", "Level 2 data cache demand access line-fill buffer first hit, recently fetched by preload or prefetch"], ["0x827E", "L3D_LFB_HIT_RW_FPRF", "Level 3 data cache demand access line-fill buffer first hit, recently fetched by preload or prefetch"], ["0x827F", "LL_LFB_HIT_RW_FPRF", "Last level cache demand access line-fill buffer first hit, recently fetched by preload or prefetch"], ["0x8280", "L1I_CACHE_PRF", "Level 1 instruction cache, preload or prefetch hit"], ["0x8281", "L2I_CACHE_PRF", "Level 2 instruction cache, preload or prefetch hit"], ["0x8284", "L1D_CACHE_PRF", "Level 1 data cache, preload or prefetch hit"], ["0x8285", "L2D_CACHE_PRF", "Level 2 data cache, preload or prefetch hit"], ["0x8286", "L3D_CACHE_PRF", "Level 3 data cache, preload or prefetch hit"], ["0x8287", "LL_CACHE_PRF", "Last level cache, preload or prefetch hit"], ["0x8288", "L1I_CACHE_REFILL_PRF", "Level 1 instruction cache refill, preload or prefetch hit"], ["0x8289", "L2I_CACHE_REFILL_PRF", "Level 2 instruction cache refill, preload or prefetch hit"], ["0x828C", "L1D_CACHE_REFILL_PRF", "Level 1 data cache refill, preload or prefetch hit"], ["0x828D", "L2D_CACHE_REFILL_PRF", "Level 2 data cache refill, preload or prefetch hit"], ["0x828E", "L3D_CACHE_REFILL_PRF", "Level 3 data cache refill, preload or prefetch hit"], ["0x828F", "LL_CACHE_REFILL_PRF", "Last level cache refill, preload or prefetch hit"], ["0x8290", "ISNP_HIT_PRF", "Snoop hit, any instruction prefetch"], ["0x8291", "ISNP_HIT_NEAR_PRF", "Snoop hit in near cache, instruction preload or prefetch"], ["0x8292", "ISNP_HIT_FAR_PRF", "Snoop hit in far cache, instruction preload or prefetch"], ["0x8293", "ISNP_HIT_REMOTE_PRF", "Snoop hit in remote cache, instruction preload or prefetch"], ["0x8294", "DSNP_HIT_PRF", "Snoop hit, any data prefetch"], ["0x8295", "DSNP_HIT_NEAR_PRF", "Snoop hit in near cache, data preload or prefetch"], ["0x8296", "DSNP_HIT_FAR_PRF", "Snoop hit in far cache, data preload or prefetch"], ["0x8297", "DSNP_HIT_REMOTE_PRF", "Snoop hit in remote cache, data preload or prefetch"], ["0x8298", "LL_CACHE_RW", "Last level cache demand access"], ["0x8299", "LL_CACHE_PRFM", "Last level cache software preload"], ["0x829A", "LL_CACHE_REFILL", "Last level cache refill"], ["0x829B", "LL_CACHE_REFILL_PRFM", "Last level cache refill, software preload"], ["0x829C", "LL_CACHE_WB", "Last level cache write-back"], ["0x829D", "LL_CACHE_WR", "Last level cache access, write"], ["0x829F", "LL_CACHE_REFILL_WR", "Last level cache refill, write"], ["0x82A0", "MEM_ACCESS_RW", "Data memory access, demand access"], ["0x82A1", "INST_FETCH_RD", "Instruction memory access, demand fetch"], ["0x82A2", "MEM_ACCESS_PRFM", "Data memory access, preload"], ["0x82A3", "INST_FETCH_PRFM", "Instruction memory access, preload"] ], "cpus": [ { "name": "Cortex-A55", "implementer": "0x41", "partnum": "0xd05", "common_events": [ "0x0000", "0x0001", "0x0002", "0x0003", "0x0004", "0x0005", "0x0006", "0x0007", "0x0008", "0x0009", "0x000A", "0x000B", "0x000C", "0x000D", "0x000E", "0x000F", "0x0010", "0x0011", "0x0012", "0x0013", "0x0014", "0x0015", "0x0016", "0x0017", "0x0018", "0x0019", "0x001A", "0x001B", "0x001C", "0x001D", "0x0020", "0x0021", "0x0022", "0x0023", "0x0024", "0x0025", "0x0026", "0x0029", "0x002A", "0x002B", "0x002D", "0x002F", "0x0034", "0x0035", "0x0036", "0x0037", "0x0038", "0x0040", "0x0041", "0x0042", "0x0043", "0x0044", "0x0045", "0x0050", "0x0051", "0x0052", "0x0053", "0x0060", "0x0061", "0x0066", "0x0067", "0x0070", "0x0071", "0x0072", "0x0073", "0x0074", "0x0075", "0x0076", "0x0077", "0x0078", "0x0079", "0x007A", "0x0086", "0x0087", "0x00A0", "0x00A2" ], "implementation_defined_events": [ ["0x00C0", "L3D_CACHE_REFILL_PREFETCH", "Level 3 cache refill due to prefetch"], ["0x00C1", "L2D_CACHE_REFILL_PREFETCH", "Level 2 cache refill due to prefetch"], ["0x00C2", "L1D_CACHE_REFILL_PREFETCH", "Level 1 data cache refill due to prefetch"], ["0x00C3", "L2D_WS_MODE", "Level 2 cache write streaming mode"], ["0x00C4", "L1D_WS_MODE_ENTRY", "Level 1 data cache entering write streaming mode"], ["0x00C5", "L1D_WS_MODE", "Level 1 data cache write streaming mode"], ["0x00C6", "PREDECODE_ERROR", "Predecode error"], ["0x00C7", "L3D_WS_MODE", "Level 3 cache write streaming mode"], ["0x00C9", "BR_COND_PRED", "Predicted conditional branch executed"], ["0x00CA", "BR_INDIRECT_MIS_PRED", "Indirect branch mis-predicted"], ["0x00CB", "BR_INDIRECT_ADDR_MIS_PRED", "Indirect branch mis-predicted due to address mis-compare"], ["0x00CC", "BR_COND_MIS_PRED", "Conditional branch mis-predicted"], ["0x00CD", "BR_INDIRECT_ADDR_PRED", "Indirect branch with predicted address executed"], ["0x00CE", "BR_RETURN_ADDR_PRED", "Procedure return with predicted address executed"], ["0x00CF", "BR_RETURN_ADDR_MIS_PRED", "Procedure return mis-predicted due to address mis-compare"], ["0x00D0", "L2D_LLWALK_TLB", "Level 2 TLB last-level walk cache access"], ["0x00D1", "L2D_LLWALK_TLB_REFILL", "Level 2 TLB last-level walk cache refill"], ["0x00D2", "L2D_L2WALK_TLB", "Level 2 TLB level-2 walk cache access"], ["0x00D3", "L2D_L2WALK_TLB_REFILL", "Level 2 TLB level-2 walk cache refill"], ["0x00D4", "L2D_S2_TLB", "Level 2 TLB IPA cache access"], ["0x00D5", "L2D_S2_TLB_REFILL", "Level 2 TLB IPA cache refill"], ["0x00D6", "L2D_CACHE_STASH_DROPPED", "Level 2 cache stash dropped"], ["0x00E1", "STALL_FRONTEND_CACHE", "No operation issued due to the frontend, cache miss"], ["0x00E2", "STALL_FRONTEND_TLB", "No operation issued due to the frontend, TLB miss"], ["0x00E3", "STALL_FRONTEND_PDERR", "No operation issued due to the frontend, pre-decode error"], ["0x00E4", "STALL_BACKEND_ILOCK", "No operation issued due to the backend interlock"], ["0x00E5", "STALL_BACKEND_ILOCK_AGU", "No operation issued due to the backend, interlock, AGU"], ["0x00E6", "STALL_BACKEND_ILOCK_FPU", "No operation issued due to the backend, interlock, FPU"], ["0x00E7", "STALL_BACKEND_LD", "No operation issued due to the backend, load"], ["0x00E8", "STALL_BACKEND_ST", "No operation issued due to the backend, store"], ["0x00E9", "STALL_BACKEND_LD_CACHE", "No operation issued due to the backend, load, cache miss"], ["0x00EA", "STALL_BACKEND_LD_TLB", "No operation issued due to the backend, load, TLB miss"], ["0x00EB", "STALL_BACKEND_ST_STB", "No operation issued due to the backend, store, STB full"], ["0x00EC", "STALL_BACKEND_ST_TLB", "No operation issued due to the backend, store, TLB miss"] ] }, { "name": "Cortex-A76", "implementer": "0x41", "partnum": "0xd0b", "common_events": [ "0x0000", "0x0001", "0x0002", "0x0003", "0x0004", "0x0005", "0x0008", "0x0009", "0x000A", "0x000B", "0x0010", "0x0011", "0x0012", "0x0013", "0x0014", "0x0015", "0x0016", "0x0017", "0x0018", "0x0019", "0x001A", "0x001B", "0x001C", "0x001D", "0x0020", "0x0021", "0x0022", "0x0023", "0x0024", "0x0025", "0x0026", "0x0029", "0x002A", "0x002B", "0x002D", "0x002F", "0x0031", "0x0034", "0x0035", "0x0036", "0x0037", "0x0040", "0x0041", "0x0042", "0x0043", "0x0044", "0x0045", "0x0046", "0x0047", "0x0048", "0x004C", "0x004D", "0x004E", "0x004F", "0x0050", "0x0051", "0x0052", "0x0053", "0x0056", "0x0057", "0x0058", "0x005C", "0x005D", "0x005E", "0x005F", "0x0060", "0x0061", "0x0066", "0x0067", "0x0068", "0x0069", "0x006C", "0x006D", "0x006E", "0x006F", "0x0070", "0x0071", "0x0073", "0x0074", "0x0075", "0x0076", "0x0077", "0x0078", "0x0079", "0x007A", "0x007C", "0x007D", "0x007E", "0x0081", "0x0082", "0x0083", "0x0084", "0x0086", "0x0087", "0x0088", "0x008A", "0x008B", "0x008C", "0x008D", "0x008E", "0x008F", "0x0090", "0x0091", "0x00A0" ] }, { "name": "Cortex-A78", "implementer": "0x41", "partnum": "0xd41", "common_events": [ "0x0000", "0x0001", "0x0002", "0x0003", "0x0004", "0x0005", "0x0008", "0x0009", "0x000A", "0x000B", "0x0010", "0x0011", "0x0012", "0x0013", "0x0014", "0x0015", "0x0016", "0x0017", "0x0018", "0x0019", "0x001A", "0x001B", "0x001C", "0x001D", "0x0020", "0x0021", "0x0022", "0x0023", "0x0024", "0x0025", "0x0026", "0x0029", "0x002A", "0x002B", "0x002D", "0x002F", "0x0031", "0x0034", "0x0035", "0x0036", "0x0037", "0x0039", "0x003A", "0x003B", "0x003C", "0x003D", "0x003E", "0x003F", "0x0040", "0x0041", "0x0042", "0x0043", "0x0044", "0x0045", "0x0046", "0x0047", "0x0048", "0x004C", "0x004D", "0x004E", "0x004F", "0x0050", "0x0051", "0x0052", "0x0053", "0x0056", "0x0057", "0x0058", "0x005C", "0x005D", "0x005E", "0x005F", "0x0060", "0x0061", "0x0066", "0x0067", "0x0068", "0x0069", "0x006A", "0x006C", "0x006D", "0x006E", "0x006F", "0x0070", "0x0071", "0x0073", "0x0074", "0x0075", "0x0076", "0x0077", "0x0078", "0x0079", "0x007A", "0x007C", "0x007D", "0x007E", "0x0081", "0x0082", "0x0083", "0x0084", "0x0086", "0x0087", "0x0088", "0x008A", "0x008B", "0x008C", "0x008D", "0x008E", "0x008F", "0x0090", "0x0091", "0x00A0", "0x4004", "0x4005", "0x4006", "0x4009", "0x400B" ] }, { "name": "Cortex-A510", "implementer": "0x41", "partnum": "0xd46", "common_events": [ "0x0000", "0x0001", "0x0002", "0x0003", "0x0004", "0x0005", "0x0006", "0x0007", "0x0008", "0x0009", "0x000A", "0x000B", "0x000C", "0x000D", "0x000E", "0x0010", "0x0011", "0x0012", "0x0013", "0x0014", "0x0015", "0x0016", "0x0017", "0x0018", "0x0019", "0x001A", "0x001B", "0x001C", "0x001D", "0x0020", "0x0021", "0x0022", "0x0023", "0x0024", "0x0025", "0x0026", "0x002B", "0x002D", "0x002F", "0x0034", "0x0035", "0x0036", "0x0037", "0x0038", "0x0039", "0x003A", "0x003B", "0x003C", "0x003D", "0x003E", "0x003F", "0x0040", "0x0041", "0x0042", "0x0043", "0x0044", "0x0045", "0x0050", "0x0051", "0x0052", "0x0053", "0x0060", "0x0061", "0x0066", "0x0067", "0x0070", "0x0071", "0x0072", "0x0073", "0x0074", "0x0075", "0x0076", "0x0077", "0x0078", "0x0079", "0x007A", "0x0086", "0x0087", "0x00A0", "0x00A2", "0x4005", "0x4006", "0x4009", "0x400B", "0x400C", "0x400E", "0x4020", "0x4021", "0x4022", "0x4024", "0x4025", "0x4026", "0x8002", "0x8006", "0x8014", "0x8018", "0x801C", "0x80E3", "0x80E7", "0x80EB", "0x80EF" ], "implementation_defined_events": [ ["0x00C1", "L2D_CACHE_REFILL_PREFETCH", "L2 cache refill due to prefetch"], ["0x00C2", "L1D_CACHE_REFILL_PREFETCH", "L1 data cache refill due to prefetch"], ["0x00C3", "L2D_WS_MODE", "L2 cache write streaming mode"], ["0x00C4", "L1D_WS_MODE_ENTRY", "L1 data cache entering write streaming mode"], ["0x00C5", "L1D_WS_MODE", "L1 data cache write streaming mode"], ["0x00C7", "L3D_WS_MODE", "L3 cache write streaming mode"], ["0x00C8", "LL_WS_MODE", "Last level cache write streaming mode"], ["0x00C9", "BR_COND_PRED", "Predicted conditional branch executed"], ["0x00CA", "BR_INDIRECT_MIS_PRED", "Indirect branch mispredicted"], ["0x00CB", "BR_INDIRECT_ADDR_MIS_PRED", "Indirect branch mispredicted due to address miscompare"], ["0x00CC", "BR_COND_MIS_PRED", "Conditional branch mispredicted"], ["0x00CD", "BR_INDIRECT_ADDR_PRED", "Indirect branch with predicted address executed"], ["0x00CE", "BR_RETURN_ADDR_PRED", "Procedure return with predicted address executed"], ["0x00CF", "BR_RETURN_ADDR_MIS_PRED", "Procedure return mispredicted due to address miscompare"], ["0x00D0", "L2D_WALK_TLB", "L2 TLB walk cache access"], ["0x00D1", "L2D_WALK_TLB_REFILL", "L2 TLB walk cache refill"], ["0x00D4", "L2D_S2_TLB", "L2 TLB IPA cache access"], ["0x00D5", "L2D_S2_TLB_REFILL", "L2 TLB IPA cache refill"], ["0x00D6", "L2D_CACHE_STASH_DROPPED", "L2 cache stash dropped"], ["0x00E1", "STALL_FRONTEND_CACHE", "No operation issued due to the frontend, cache miss"], ["0x00E2", "STALL_FRONTEND_TLB", "No operation issued due to the frontend, TLB miss"], ["0x00E3", "STALL_FRONTEND_PDERR", "No operation issued due to the frontend, pre-decode error"], ["0x00E4", "STALL_BACKEND_ILOCK", "No operation issued due to the backend interlock"], ["0x00E5", "STALL_BACKEND_ILOCK_ADDR", "No operation issued due to the backend, address interlock"], ["0x00E6", "STALL_BACKEND_ILOCK_VPU", "No operation issued due to the backend, interlock, or the Vector Processing Unit (VPU)"], ["0x00E7", "STALL_BACKEND_LD", "No operation issued due to the backend, load"], ["0x00E8", "STALL_BACKEND_ST", "No operation issued due to the backend, store"], ["0x00E9", "STALL_BACKEND_LD_CACHE", "No operation issued due to the backend, load, cache miss"], ["0x00EA", "STALL_BACKEND_LD_TLB", "No operation issued due to the backend, load, TLB miss"], ["0x00EB", "STALL_BACKEND_ST_STB", "No operation issued due to the backend, store, Store Buffer (STB) full"], ["0x00EC", "STALL_BACKEND_ST_TLB", "No operation issued due to the backend, store, TLB miss"], ["0x00ED", "STALL_BACKEND_VPU_HAZARD", "No operation issued due to the backend, VPU hazard"], ["0x00EE", "STALL_SLOT_BACKEND_ILOCK", "Issue slot not issued due to interlock"] ] }, { "name": "Cortex-A520", "implementer": "0x41", "partnum": "0xd80", "common_events": [ "0x0000", "0x0001", "0x0002", "0x0003", "0x0004", "0x0005", "0x0006", "0x0007", "0x0008", "0x0009", "0x000A", "0x000B", "0x000C", "0x000D", "0x000E", "0x0010", "0x0011", "0x0012", "0x0013", "0x0014", "0x0015", "0x0016", "0x0017", "0x0018", "0x0019", "0x001A", "0x001B", "0x001C", "0x001D", "0x0020", "0x0021", "0x0022", "0x0023", "0x0024", "0x0025", "0x0026", "0x002B", "0x002D", "0x002F", "0x0034", "0x0035", "0x0036", "0x0037", "0x0038", "0x0039", "0x003A", "0x003B", "0x003C", "0x003D", "0x003E", "0x003F", "0x0040", "0x0041", "0x0042", "0x0043", "0x0044", "0x0045", "0x0050", "0x0051", "0x0052", "0x0053", "0x0060", "0x0061", "0x0066", "0x0067", "0x006E", "0x006F", "0x0070", "0x0071", "0x0072", "0x0073", "0x0074", "0x0075", "0x0076", "0x0077", "0x0078", "0x0079", "0x007A", "0x0086", "0x0087", "0x00A0", "0x00A2", "0x4005", "0x4006", "0x4009", "0x400B", "0x400C", "0x400E", "0x4010", "0x4011", "0x4012", "0x4013", "0x4018", "0x4019", "0x401A", "0x401B", "0x4020", "0x4021", "0x4022", "0x4024", "0x4025", "0x4026", "0x8002", "0x8006", "0x8014", "0x8018", "0x801C", "0x80E3", "0x80E7", "0x80EB", "0x80EF", "0x810C", "0x8110", "0x8111", "0x8114", "0x8115", "0x8116", "0x8117", "0x811C", "0x811D", "0x8120", "0x8121", "0x8124", "0x8125", "0x8128", "0x8129", "0x8134", "0x8135", "0x8136", "0x8137", "0x8138", "0x8139", "0x813A", "0x813B", "0x813C", "0x8154", "0x8155", "0x8156", "0x8158", "0x8159", "0x815B", "0x815C", "0x8160", "0x8161", "0x8162", "0x8164", "0x8165", "0x8167", "0x8168", "0x816B", "0x816C", "0x818D", "0x81BC", "0x81BD" ], "implementation_defined_events": [ ["0x00C3", "L2D_WS_MODE", "L2 cache write streaming mode"], ["0x00C4", "L1D_WS_MODE_ENTRY", "L1 data cache entering write streaming mode"], ["0x00C5", "L1D_WS_MODE", "L1 data cache write streaming mode"], ["0x00C7", "L3D_WS_MODE", "L3 cache write streaming mode"], ["0x00C8", "LL_WS_MODE", "Last level cache write streaming mode"], ["0x00D0", "L2D_WALK_TLB", "L2 TLB walk cache access"], ["0x00D1", "L2D_WALK_TLB_REFILL", "L2 TLB walk cache refill"], ["0x00D4", "L2D_S2_TLB", "L2 TLB IPA cache access"], ["0x00D5", "L2D_S2_TLB_REFILL", "L2 TLB IPA cache refill"], ["0x00D6", "L2D_CACHE_STASH_DROPPED", "L2 cache stash dropped"], ["0x00D7", "L1D_TLB_REFILL_ETS", "L1D TLB refill due to ETS replay"], ["0x00DA", "L2D_CACHE_REFILL_HWPRF_SPATIAL", "L2 cache refill due to L2 spatial prefetcher"], ["0x00DB", "L2D_CACHE_REFILL_HWPRF_OFFSET", "L2 cache refill due to L2 offset prefetcher"], ["0x00DC", "L2D_CACHE_REFILL_HWPRF_PATTERN", "L2 cache refill due to L2 pattern prefetcher"], ["0x00DD", "L2D_CACHE_REFILL_HWPRF_TLBD", "L2 cache refill due to L2 TLB prefetcher"], ["0x00DE", "L3D_CACHE_HWPRF_STRIDE", "L3 cache access due to L3 stride prefetcher"], ["0x00DF", "L3D_CACHE_HWPRF_OFFSET", "L3 cache access due to L3 offset prefetcher"], ["0x00E5", "STALL_BACKEND_ILOCK_ADDR", "No operation issued due to the backend, input dependency, address"], ["0x00E6", "STALL_BACKEND_ILOCK_VPU", "No operation issued due to the backend, input dependency, Vector Processing Unit"], ["0x00ED", "STALL_BACKEND_BUSY_VPU_HAZARD", "No operation issued due to the backend, VPU hazard"], ["0x00EE", "STALL_SLOT_BACKEND_ILOCK", "No operation sent for execution on a Slot due to the backend, input dependency"], ["0x00F0", "INST_SPEC_LDST_NUKE", "Instruction re-executed, read-after-read hazard"], ["0x82FA", "DTLB_WALK_HWPRF", "Data TLB access, hardware prefetcher"] ] }, { "name": "Cortex-A710", "implementer": "0x41", "partnum": "0xd47", "common_events": [ "0x0000", "0x0001", "0x0002", "0x0003", "0x0004", "0x0005", "0x0008", "0x0009", "0x000A", "0x000B", "0x0010", "0x0011", "0x0012", "0x0013", "0x0014", "0x0015", "0x0016", "0x0017", "0x0018", "0x0019", "0x001A", "0x001B", "0x001C", "0x001D", "0x0020", "0x0021", "0x0022", "0x0023", "0x0024", "0x0025", "0x0026", "0x0029", "0x002A", "0x002B", "0x002D", "0x002F", "0x0031", "0x0034", "0x0035", "0x0036", "0x0037", "0x0039", "0x003A", "0x003B", "0x003C", "0x003D", "0x003E", "0x003F", "0x0040", "0x0041", "0x0042", "0x0043", "0x0044", "0x0045", "0x0046", "0x0047", "0x0048", "0x004C", "0x004D", "0x004E", "0x004F", "0x0050", "0x0051", "0x0052", "0x0053", "0x0056", "0x0057", "0x0058", "0x005C", "0x005D", "0x005E", "0x005F", "0x0060", "0x0061", "0x0066", "0x0067", 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