/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Global Instruction Selector for the X86 target *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_GLOBALISEL_PREDICATE_BITSET const unsigned MAX_SUBTARGET_PREDICATES = 133; using PredicateBitset = llvm::PredicateBitsetImpl; #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET #ifdef GET_GLOBALISEL_TEMPORARIES_DECL mutable MatcherState State; typedef ComplexRendererFns(X86InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const; typedef void(X86InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const; const ISelInfoTy ISelInfo; static X86InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[]; static X86InstructionSelector::CustomRendererFn CustomRenderers[]; bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override; bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override; bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override; const int64_t *getMatchTable() const override; bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const std::array &Operands) const override; #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL #ifdef GET_GLOBALISEL_TEMPORARIES_INIT , State(0), ISelInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers) #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT #ifdef GET_GLOBALISEL_IMPL // Bits for subtarget features that participate in instruction matching. enum SubtargetFeatureBits : uint8_t { Feature_TruePredicateBit = 54, Feature_HasCMOVBit = 23, Feature_NoCMOVBit = 120, Feature_HasMMXBit = 95, Feature_Has3DNowBit = 97, Feature_HasSSE1Bit = 40, Feature_UseSSE1Bit = 47, Feature_HasSSE2Bit = 39, Feature_UseSSE2Bit = 48, Feature_HasSSE3Bit = 31, Feature_UseSSE3Bit = 57, Feature_HasSSSE3Bit = 96, Feature_UseSSSE3Bit = 58, Feature_UseSSE41Bit = 55, Feature_UseSSE42Bit = 61, Feature_HasSSE4ABit = 71, Feature_NoAVXBit = 67, Feature_HasAVXBit = 49, Feature_HasAVX2Bit = 43, Feature_HasAVX1OnlyBit = 41, Feature_HasAVX512Bit = 80, Feature_UseAVXBit = 45, Feature_NoAVX512Bit = 36, Feature_HasCDIBit = 84, Feature_HasVPOPCNTDQBit = 89, Feature_HasERIBit = 88, Feature_HasDQIBit = 82, Feature_NoDQIBit = 59, Feature_HasBWIBit = 83, Feature_NoBWIBit = 56, Feature_HasVLXBit = 81, Feature_NoVLXBit = 35, Feature_NoVLX_Or_NoBWIBit = 53, Feature_HasVNNIBit = 91, Feature_HasVP2INTERSECTBit = 93, Feature_HasBF16Bit = 94, Feature_HasFP16Bit = 86, Feature_HasAVXVNNIINT8Bit = 78, Feature_HasAVXVNNIBit = 72, Feature_NoVLX_Or_NoVNNIBit = 73, Feature_HasBITALGBit = 92, Feature_HasPOPCNTBit = 60, Feature_HasAESBit = 64, Feature_HasVAESBit = 66, Feature_NoVLX_Or_NoVAESBit = 65, Feature_HasFXSRBit = 32, Feature_HasX87Bit = 30, Feature_HasXSAVEBit = 109, Feature_HasXSAVEOPTBit = 110, Feature_HasXSAVECBit = 111, Feature_HasXSAVESBit = 112, Feature_HasPCLMULBit = 68, Feature_NoVLX_Or_NoVPCLMULQDQBit = 69, Feature_HasVPCLMULQDQBit = 70, Feature_HasGFNIBit = 75, Feature_HasFMABit = 33, Feature_HasFMA4Bit = 37, Feature_NoFMA4Bit = 34, Feature_HasXOPBit = 38, Feature_HasTBMBit = 8, Feature_NoTBMBit = 125, Feature_HasLWPBit = 9, Feature_HasMOVBEBit = 2, Feature_HasRDRANDBit = 3, Feature_HasF16CBit = 74, Feature_HasFSGSBaseBit = 113, Feature_HasLZCNTBit = 5, Feature_HasBMIBit = 6, Feature_HasBMI2Bit = 7, Feature_NoBMI2Bit = 124, Feature_HasVBMIBit = 85, Feature_HasVBMI2Bit = 90, Feature_HasIFMABit = 87, Feature_HasAVXIFMABit = 76, Feature_NoVLX_Or_NoIFMABit = 77, Feature_HasRTMBit = 101, Feature_HasSHABit = 63, Feature_HasRDSEEDBit = 4, Feature_HasSSEPrefetchBit = 50, Feature_NoSSEPrefetchBit = 98, Feature_HasPREFETCHIBit = 17, Feature_HasPrefetchWBit = 99, Feature_HasPREFETCHWT1Bit = 100, Feature_HasMWAITXBit = 123, Feature_HasCLDEMOTEBit = 21, Feature_HasMOVDIRIBit = 11, Feature_HasMOVDIR64BBit = 12, Feature_HasPTWRITEBit = 116, Feature_FPStackf32Bit = 28, Feature_FPStackf64Bit = 29, Feature_HasCLFLUSHBit = 51, Feature_HasCLFLUSHOPTBit = 19, Feature_HasCLWBBit = 20, Feature_HasWBNOINVDBit = 108, Feature_HasRDPIDBit = 115, Feature_HasWAITPKGBit = 10, Feature_HasINVPCIDBit = 114, Feature_HasCX8Bit = 121, Feature_HasCX16Bit = 122, Feature_HasENQCMDBit = 13, Feature_HasAMXFP16Bit = 106, Feature_HasCMPCCXADDBit = 18, Feature_HasAVXNECONVERTBit = 79, Feature_HasKLBit = 102, Feature_HasRAOINTBit = 107, Feature_HasSERIALIZEBit = 14, Feature_HasTSXLDTRKBit = 15, Feature_HasAMXTILEBit = 103, Feature_HasAMXBF16Bit = 105, Feature_HasAMXINT8Bit = 104, Feature_HasUINTRBit = 16, Feature_HasCRC32Bit = 62, Feature_Not64BitModeBit = 0, Feature_In64BitModeBit = 1, Feature_IsLP64Bit = 118, Feature_NotLP64Bit = 117, Feature_NotWin64WithoutFPBit = 119, Feature_IsPSBit = 128, Feature_NotPSBit = 127, Feature_KernelCodeBit = 129, Feature_NearDataBit = 131, Feature_IsNotPICBit = 130, Feature_OptForSizeBit = 44, Feature_OptForMinSizeBit = 42, Feature_OptForSpeedBit = 126, Feature_UseIncDecBit = 22, Feature_NoSSE41_Or_OptForSizeBit = 46, Feature_CallImmAddrBit = 132, Feature_FavorMemIndirectCallBit = 24, Feature_HasFastSHLDRotateBit = 27, Feature_HasMFenceBit = 52, Feature_UseIndirectThunkCallsBit = 26, Feature_NotUseIndirectThunkCallsBit = 25, }; PredicateBitset X86InstructionSelector:: computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const { PredicateBitset Features; if (true) Features.set(Feature_TruePredicateBit); if (Subtarget->canUseCMOV()) Features.set(Feature_HasCMOVBit); if (!Subtarget->canUseCMOV()) Features.set(Feature_NoCMOVBit); if (Subtarget->hasMMX()) Features.set(Feature_HasMMXBit); if (Subtarget->hasThreeDNow()) Features.set(Feature_Has3DNowBit); if (Subtarget->hasSSE1()) Features.set(Feature_HasSSE1Bit); if (Subtarget->hasSSE1() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE1Bit); if (Subtarget->hasSSE2()) Features.set(Feature_HasSSE2Bit); if (Subtarget->hasSSE2() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE2Bit); if (Subtarget->hasSSE3()) Features.set(Feature_HasSSE3Bit); if (Subtarget->hasSSE3() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE3Bit); if (Subtarget->hasSSSE3()) Features.set(Feature_HasSSSE3Bit); if (Subtarget->hasSSSE3() && !Subtarget->hasAVX()) Features.set(Feature_UseSSSE3Bit); if (Subtarget->hasSSE41() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE41Bit); if (Subtarget->hasSSE42() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE42Bit); if (Subtarget->hasSSE4A()) Features.set(Feature_HasSSE4ABit); if (!Subtarget->hasAVX()) Features.set(Feature_NoAVXBit); if (Subtarget->hasAVX()) Features.set(Feature_HasAVXBit); if (Subtarget->hasAVX2()) Features.set(Feature_HasAVX2Bit); if (Subtarget->hasAVX() && !Subtarget->hasAVX2()) Features.set(Feature_HasAVX1OnlyBit); if (Subtarget->hasAVX512()) Features.set(Feature_HasAVX512Bit); if (Subtarget->hasAVX() && !Subtarget->hasAVX512()) Features.set(Feature_UseAVXBit); if (!Subtarget->hasAVX512()) Features.set(Feature_NoAVX512Bit); if (Subtarget->hasCDI()) Features.set(Feature_HasCDIBit); if (Subtarget->hasVPOPCNTDQ()) Features.set(Feature_HasVPOPCNTDQBit); if (Subtarget->hasERI()) Features.set(Feature_HasERIBit); if (Subtarget->hasDQI()) Features.set(Feature_HasDQIBit); if (!Subtarget->hasDQI()) Features.set(Feature_NoDQIBit); if (Subtarget->hasBWI()) Features.set(Feature_HasBWIBit); if (!Subtarget->hasBWI()) Features.set(Feature_NoBWIBit); if (Subtarget->hasVLX()) Features.set(Feature_HasVLXBit); if (!Subtarget->hasVLX()) Features.set(Feature_NoVLXBit); if (!Subtarget->hasVLX() || !Subtarget->hasBWI()) Features.set(Feature_NoVLX_Or_NoBWIBit); if (Subtarget->hasVNNI()) Features.set(Feature_HasVNNIBit); if (Subtarget->hasVP2INTERSECT()) Features.set(Feature_HasVP2INTERSECTBit); if (Subtarget->hasBF16()) Features.set(Feature_HasBF16Bit); if (Subtarget->hasFP16()) Features.set(Feature_HasFP16Bit); if (Subtarget->hasAVXVNNIINT8()) Features.set(Feature_HasAVXVNNIINT8Bit); if (Subtarget->hasAVXVNNI()) Features.set(Feature_HasAVXVNNIBit); if (!Subtarget->hasVLX() || !Subtarget->hasVNNI()) Features.set(Feature_NoVLX_Or_NoVNNIBit); if (Subtarget->hasBITALG()) Features.set(Feature_HasBITALGBit); if (Subtarget->hasPOPCNT()) Features.set(Feature_HasPOPCNTBit); if (Subtarget->hasAES()) Features.set(Feature_HasAESBit); if (Subtarget->hasVAES()) Features.set(Feature_HasVAESBit); if (!Subtarget->hasVLX() || !Subtarget->hasVAES()) Features.set(Feature_NoVLX_Or_NoVAESBit); if (Subtarget->hasFXSR()) Features.set(Feature_HasFXSRBit); if (Subtarget->hasX87()) Features.set(Feature_HasX87Bit); if (Subtarget->hasXSAVE()) Features.set(Feature_HasXSAVEBit); if (Subtarget->hasXSAVEOPT()) Features.set(Feature_HasXSAVEOPTBit); if (Subtarget->hasXSAVEC()) Features.set(Feature_HasXSAVECBit); if (Subtarget->hasXSAVES()) Features.set(Feature_HasXSAVESBit); if (Subtarget->hasPCLMUL()) Features.set(Feature_HasPCLMULBit); if (!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ()) Features.set(Feature_NoVLX_Or_NoVPCLMULQDQBit); if (Subtarget->hasVPCLMULQDQ()) Features.set(Feature_HasVPCLMULQDQBit); if (Subtarget->hasGFNI()) Features.set(Feature_HasGFNIBit); if (Subtarget->hasFMA()) Features.set(Feature_HasFMABit); if (Subtarget->hasFMA4()) Features.set(Feature_HasFMA4Bit); if (!Subtarget->hasFMA4()) Features.set(Feature_NoFMA4Bit); if (Subtarget->hasXOP()) Features.set(Feature_HasXOPBit); if (Subtarget->hasTBM()) Features.set(Feature_HasTBMBit); if (!Subtarget->hasTBM()) Features.set(Feature_NoTBMBit); if (Subtarget->hasLWP()) Features.set(Feature_HasLWPBit); if (Subtarget->hasMOVBE()) Features.set(Feature_HasMOVBEBit); if (Subtarget->hasRDRAND()) Features.set(Feature_HasRDRANDBit); if (Subtarget->hasF16C()) Features.set(Feature_HasF16CBit); if (Subtarget->hasFSGSBase()) Features.set(Feature_HasFSGSBaseBit); if (Subtarget->hasLZCNT()) Features.set(Feature_HasLZCNTBit); if (Subtarget->hasBMI()) Features.set(Feature_HasBMIBit); if (Subtarget->hasBMI2()) Features.set(Feature_HasBMI2Bit); if (!Subtarget->hasBMI2()) Features.set(Feature_NoBMI2Bit); if (Subtarget->hasVBMI()) Features.set(Feature_HasVBMIBit); if (Subtarget->hasVBMI2()) Features.set(Feature_HasVBMI2Bit); if (Subtarget->hasIFMA()) Features.set(Feature_HasIFMABit); if (Subtarget->hasAVXIFMA()) Features.set(Feature_HasAVXIFMABit); if (!Subtarget->hasVLX() || !Subtarget->hasIFMA()) Features.set(Feature_NoVLX_Or_NoIFMABit); if (Subtarget->hasRTM()) Features.set(Feature_HasRTMBit); if (Subtarget->hasSHA()) Features.set(Feature_HasSHABit); if (Subtarget->hasRDSEED()) Features.set(Feature_HasRDSEEDBit); if (Subtarget->hasSSEPrefetch()) Features.set(Feature_HasSSEPrefetchBit); if (!Subtarget->hasSSEPrefetch()) Features.set(Feature_NoSSEPrefetchBit); if (Subtarget->hasPREFETCHI()) Features.set(Feature_HasPREFETCHIBit); if (Subtarget->hasPrefetchW()) Features.set(Feature_HasPrefetchWBit); if (Subtarget->hasPREFETCHWT1()) Features.set(Feature_HasPREFETCHWT1Bit); if (Subtarget->hasMWAITX()) Features.set(Feature_HasMWAITXBit); if (Subtarget->hasCLDEMOTE()) Features.set(Feature_HasCLDEMOTEBit); if (Subtarget->hasMOVDIRI()) Features.set(Feature_HasMOVDIRIBit); if (Subtarget->hasMOVDIR64B()) Features.set(Feature_HasMOVDIR64BBit); if (Subtarget->hasPTWRITE()) Features.set(Feature_HasPTWRITEBit); if (!Subtarget->hasSSE1()) Features.set(Feature_FPStackf32Bit); if (!Subtarget->hasSSE2()) Features.set(Feature_FPStackf64Bit); if (Subtarget->hasCLFLUSH()) Features.set(Feature_HasCLFLUSHBit); if (Subtarget->hasCLFLUSHOPT()) Features.set(Feature_HasCLFLUSHOPTBit); if (Subtarget->hasCLWB()) Features.set(Feature_HasCLWBBit); if (Subtarget->hasWBNOINVD()) Features.set(Feature_HasWBNOINVDBit); if (Subtarget->hasRDPID()) Features.set(Feature_HasRDPIDBit); if (Subtarget->hasWAITPKG()) Features.set(Feature_HasWAITPKGBit); if (Subtarget->hasINVPCID()) Features.set(Feature_HasINVPCIDBit); if (Subtarget->hasCX8()) Features.set(Feature_HasCX8Bit); if (Subtarget->hasCX16()) Features.set(Feature_HasCX16Bit); if (Subtarget->hasENQCMD()) Features.set(Feature_HasENQCMDBit); if (Subtarget->hasAMXFP16()) Features.set(Feature_HasAMXFP16Bit); if (Subtarget->hasCMPCCXADD()) Features.set(Feature_HasCMPCCXADDBit); if (Subtarget->hasAVXNECONVERT()) Features.set(Feature_HasAVXNECONVERTBit); if (Subtarget->hasKL()) Features.set(Feature_HasKLBit); if (Subtarget->hasRAOINT()) Features.set(Feature_HasRAOINTBit); if (Subtarget->hasSERIALIZE()) Features.set(Feature_HasSERIALIZEBit); if (Subtarget->hasTSXLDTRK()) Features.set(Feature_HasTSXLDTRKBit); if (Subtarget->hasAMXTILE()) Features.set(Feature_HasAMXTILEBit); if (Subtarget->hasAMXBF16()) Features.set(Feature_HasAMXBF16Bit); if (Subtarget->hasAMXINT8()) Features.set(Feature_HasAMXINT8Bit); if (Subtarget->hasUINTR()) Features.set(Feature_HasUINTRBit); if (Subtarget->hasCRC32()) Features.set(Feature_HasCRC32Bit); if (!Subtarget->is64Bit()) Features.set(Feature_Not64BitModeBit); if (Subtarget->is64Bit()) Features.set(Feature_In64BitModeBit); if (Subtarget->isTarget64BitLP64()) Features.set(Feature_IsLP64Bit); if (!Subtarget->isTarget64BitLP64()) Features.set(Feature_NotLP64Bit); if (Subtarget->isTargetPS()) Features.set(Feature_IsPSBit); if (!Subtarget->isTargetPS()) Features.set(Feature_NotPSBit); if (TM.getCodeModel() == CodeModel::Kernel) Features.set(Feature_KernelCodeBit); if (TM.getCodeModel() == CodeModel::Small ||TM.getCodeModel() == CodeModel::Kernel) Features.set(Feature_NearDataBit); if (!TM.isPositionIndependent()) Features.set(Feature_IsNotPICBit); if (Subtarget->isLegalToCallImmediateAddr()) Features.set(Feature_CallImmAddrBit); if (!Subtarget->slowTwoMemOps()) Features.set(Feature_FavorMemIndirectCallBit); if (Subtarget->hasFastSHLDRotate()) Features.set(Feature_HasFastSHLDRotateBit); if (Subtarget->hasMFence()) Features.set(Feature_HasMFenceBit); if (Subtarget->useIndirectThunkCalls()) Features.set(Feature_UseIndirectThunkCallsBit); if (!Subtarget->useIndirectThunkCalls()) Features.set(Feature_NotUseIndirectThunkCallsBit); return Features; } void X86InstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) { AvailableFunctionFeatures = computeAvailableFunctionFeatures((const X86Subtarget *)&MF.getSubtarget(), &MF); } PredicateBitset X86InstructionSelector:: computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const { PredicateBitset Features; if (!Subtarget->isTargetWin64() ||Subtarget->getFrameLowering()->hasFP(*MF)) Features.set(Feature_NotWin64WithoutFPBit); if (shouldOptForSize(MF)) Features.set(Feature_OptForSizeBit); if (MF->getFunction().hasMinSize()) Features.set(Feature_OptForMinSizeBit); if (!shouldOptForSize(MF)) Features.set(Feature_OptForSpeedBit); if (!Subtarget->slowIncDec() || shouldOptForSize(MF)) Features.set(Feature_UseIncDecBit); if (shouldOptForSize(MF) || !Subtarget->hasSSE41()) Features.set(Feature_NoSSE41_Or_OptForSizeBit); return Features; } // LLT Objects. enum { GILLT_s1, GILLT_s8, GILLT_s16, GILLT_s32, GILLT_s64, GILLT_s80, GILLT_s128, GILLT_v2s1, GILLT_v2s64, GILLT_v4s1, GILLT_v4s32, GILLT_v4s64, GILLT_v8s1, GILLT_v8s16, GILLT_v8s32, GILLT_v8s64, GILLT_v16s1, GILLT_v16s8, GILLT_v16s16, GILLT_v16s32, GILLT_v32s1, GILLT_v32s8, GILLT_v32s16, GILLT_v64s1, GILLT_v64s8, }; const static size_t NumTypeObjects = 25; const static LLT TypeObjects[] = { LLT::scalar(1), LLT::scalar(8), LLT::scalar(16), LLT::scalar(32), LLT::scalar(64), LLT::scalar(80), LLT::scalar(128), LLT::vector(ElementCount::getFixed(2), 1), LLT::vector(ElementCount::getFixed(2), 64), LLT::vector(ElementCount::getFixed(4), 1), LLT::vector(ElementCount::getFixed(4), 32), LLT::vector(ElementCount::getFixed(4), 64), LLT::vector(ElementCount::getFixed(8), 1), LLT::vector(ElementCount::getFixed(8), 16), LLT::vector(ElementCount::getFixed(8), 32), LLT::vector(ElementCount::getFixed(8), 64), LLT::vector(ElementCount::getFixed(16), 1), LLT::vector(ElementCount::getFixed(16), 8), LLT::vector(ElementCount::getFixed(16), 16), LLT::vector(ElementCount::getFixed(16), 32), LLT::vector(ElementCount::getFixed(32), 1), LLT::vector(ElementCount::getFixed(32), 8), LLT::vector(ElementCount::getFixed(32), 16), LLT::vector(ElementCount::getFixed(64), 1), LLT::vector(ElementCount::getFixed(64), 8), }; // Feature bitsets. enum { GIFBS_Invalid, GIFBS_FPStackf32, GIFBS_FPStackf64, GIFBS_Has3DNow, GIFBS_HasAVX, GIFBS_HasAVX1Only, GIFBS_HasAVX2, GIFBS_HasAVX512, GIFBS_HasAVXNECONVERT, GIFBS_HasBITALG, GIFBS_HasBMI, GIFBS_HasBMI2, GIFBS_HasBWI, GIFBS_HasCDI, GIFBS_HasCRC32, GIFBS_HasDQI, GIFBS_HasFP16, GIFBS_HasFastSHLDRotate, GIFBS_HasKL, GIFBS_HasLWP, GIFBS_HasMFence, GIFBS_HasMMX, GIFBS_HasMOVBE, GIFBS_HasMWAITX, GIFBS_HasPTWRITE, GIFBS_HasRTM, GIFBS_HasSERIALIZE, GIFBS_HasSHA, GIFBS_HasSSE1, GIFBS_HasSSE2, GIFBS_HasSSE3, GIFBS_HasSSE4A, GIFBS_HasTBM, GIFBS_HasTSXLDTRK, GIFBS_HasVLX, GIFBS_HasVPOPCNTDQ, GIFBS_HasWAITPKG, GIFBS_HasWBNOINVD, GIFBS_HasX87, GIFBS_HasXOP, GIFBS_In64BitMode, GIFBS_NoDQI, GIFBS_Not64BitMode, GIFBS_UseAVX, GIFBS_UseIncDec, GIFBS_UseSSE1, GIFBS_UseSSE2, GIFBS_UseSSE41, GIFBS_UseSSSE3, GIFBS_HasAES_HasAVX, GIFBS_HasAES_NoAVX, GIFBS_HasAMXBF16_In64BitMode, GIFBS_HasAMXFP16_In64BitMode, GIFBS_HasAMXINT8_In64BitMode, GIFBS_HasAMXTILE_In64BitMode, GIFBS_HasAVX_In64BitMode, GIFBS_HasAVX_NoBWI, GIFBS_HasAVX_NoVLX, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIFBS_HasAVX2_NoVLX, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIFBS_HasAVX512_HasVAES, GIFBS_HasAVX512_HasVLX, GIFBS_HasAVX512_HasVPCLMULQDQ, GIFBS_HasAVX512_NoBWI, GIFBS_HasAVX512_NoDQI, GIFBS_HasAVX512_NoVLX, GIFBS_HasBF16_HasVLX, GIFBS_HasBITALG_HasVLX, GIFBS_HasBITALG_NoVLX, GIFBS_HasBWI_HasVLX, GIFBS_HasBWI_NoVLX, GIFBS_HasCDI_HasVLX, GIFBS_HasCDI_NoVLX, GIFBS_HasDQI_HasVLX, GIFBS_HasDQI_NoBWI, GIFBS_HasDQI_NoVLX, GIFBS_HasFMA4_NoAVX512, GIFBS_HasFMA4_NoVLX, GIFBS_HasFP16_HasVLX, GIFBS_HasFSGSBase_In64BitMode, GIFBS_HasPCLMUL_NoAVX, GIFBS_HasPTWRITE_In64BitMode, GIFBS_HasRDPID_In64BitMode, GIFBS_HasRDPID_Not64BitMode, GIFBS_HasUINTR_In64BitMode, GIFBS_HasVAES_HasVLX, GIFBS_HasVAES_NoVLX, GIFBS_HasVLX_HasVPCLMULQDQ, GIFBS_HasVLX_HasVPOPCNTDQ, GIFBS_HasVPCLMULQDQ_NoVLX, GIFBS_HasVPOPCNTDQ_NoVLX, GIFBS_HasWAITPKG_In64BitMode, GIFBS_HasWAITPKG_Not64BitMode, GIFBS_In64BitMode_UseSSE2, GIFBS_Not64BitMode_OptForSize, GIFBS_NotWin64WithoutFP_OptForMinSize, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ, GIFBS_HasDQI_HasVLX_NoBWI, GIFBS_HasFMA_NoAVX512_NoFMA4, GIFBS_HasFMA_NoFMA4_NoVLX, }; const static PredicateBitset FeatureBitsets[] { {}, // GIFBS_Invalid {Feature_FPStackf32Bit, }, {Feature_FPStackf64Bit, }, {Feature_Has3DNowBit, }, {Feature_HasAVXBit, }, {Feature_HasAVX1OnlyBit, }, {Feature_HasAVX2Bit, }, {Feature_HasAVX512Bit, }, {Feature_HasAVXNECONVERTBit, }, {Feature_HasBITALGBit, }, {Feature_HasBMIBit, }, {Feature_HasBMI2Bit, }, {Feature_HasBWIBit, }, {Feature_HasCDIBit, }, {Feature_HasCRC32Bit, }, {Feature_HasDQIBit, }, {Feature_HasFP16Bit, }, {Feature_HasFastSHLDRotateBit, }, {Feature_HasKLBit, }, {Feature_HasLWPBit, }, {Feature_HasMFenceBit, }, {Feature_HasMMXBit, }, {Feature_HasMOVBEBit, }, {Feature_HasMWAITXBit, }, {Feature_HasPTWRITEBit, }, {Feature_HasRTMBit, }, {Feature_HasSERIALIZEBit, }, {Feature_HasSHABit, }, {Feature_HasSSE1Bit, }, {Feature_HasSSE2Bit, }, {Feature_HasSSE3Bit, }, {Feature_HasSSE4ABit, }, {Feature_HasTBMBit, }, {Feature_HasTSXLDTRKBit, }, {Feature_HasVLXBit, }, {Feature_HasVPOPCNTDQBit, }, {Feature_HasWAITPKGBit, }, {Feature_HasWBNOINVDBit, }, {Feature_HasX87Bit, }, {Feature_HasXOPBit, }, {Feature_In64BitModeBit, }, {Feature_NoDQIBit, }, {Feature_Not64BitModeBit, }, {Feature_UseAVXBit, }, {Feature_UseIncDecBit, }, {Feature_UseSSE1Bit, }, {Feature_UseSSE2Bit, }, {Feature_UseSSE41Bit, }, {Feature_UseSSSE3Bit, }, {Feature_HasAESBit, Feature_HasAVXBit, }, {Feature_HasAESBit, Feature_NoAVXBit, }, {Feature_HasAMXBF16Bit, Feature_In64BitModeBit, }, {Feature_HasAMXFP16Bit, Feature_In64BitModeBit, }, {Feature_HasAMXINT8Bit, Feature_In64BitModeBit, }, {Feature_HasAMXTILEBit, Feature_In64BitModeBit, }, {Feature_HasAVXBit, Feature_In64BitModeBit, }, {Feature_HasAVXBit, Feature_NoBWIBit, }, {Feature_HasAVXBit, Feature_NoVLXBit, }, {Feature_HasAVXBit, Feature_NoVLX_Or_NoBWIBit, }, {Feature_HasAVX2Bit, Feature_NoVLXBit, }, {Feature_HasAVX2Bit, Feature_NoVLX_Or_NoBWIBit, }, {Feature_HasAVX512Bit, Feature_HasVAESBit, }, {Feature_HasAVX512Bit, Feature_HasVLXBit, }, {Feature_HasAVX512Bit, Feature_HasVPCLMULQDQBit, }, {Feature_HasAVX512Bit, Feature_NoBWIBit, }, {Feature_HasAVX512Bit, Feature_NoDQIBit, }, {Feature_HasAVX512Bit, Feature_NoVLXBit, }, {Feature_HasBF16Bit, Feature_HasVLXBit, }, {Feature_HasBITALGBit, Feature_HasVLXBit, }, {Feature_HasBITALGBit, Feature_NoVLXBit, }, {Feature_HasBWIBit, Feature_HasVLXBit, }, {Feature_HasBWIBit, Feature_NoVLXBit, }, {Feature_HasCDIBit, Feature_HasVLXBit, }, {Feature_HasCDIBit, Feature_NoVLXBit, }, {Feature_HasDQIBit, Feature_HasVLXBit, }, {Feature_HasDQIBit, Feature_NoBWIBit, }, {Feature_HasDQIBit, Feature_NoVLXBit, }, {Feature_HasFMA4Bit, Feature_NoAVX512Bit, }, {Feature_HasFMA4Bit, Feature_NoVLXBit, }, {Feature_HasFP16Bit, Feature_HasVLXBit, }, {Feature_HasFSGSBaseBit, Feature_In64BitModeBit, }, {Feature_HasPCLMULBit, Feature_NoAVXBit, }, {Feature_HasPTWRITEBit, Feature_In64BitModeBit, }, {Feature_HasRDPIDBit, Feature_In64BitModeBit, }, {Feature_HasRDPIDBit, Feature_Not64BitModeBit, }, {Feature_HasUINTRBit, Feature_In64BitModeBit, }, {Feature_HasVAESBit, Feature_HasVLXBit, }, {Feature_HasVAESBit, Feature_NoVLXBit, }, {Feature_HasVLXBit, Feature_HasVPCLMULQDQBit, }, {Feature_HasVLXBit, Feature_HasVPOPCNTDQBit, }, {Feature_HasVPCLMULQDQBit, Feature_NoVLXBit, }, {Feature_HasVPOPCNTDQBit, Feature_NoVLXBit, }, {Feature_HasWAITPKGBit, Feature_In64BitModeBit, }, {Feature_HasWAITPKGBit, Feature_Not64BitModeBit, }, {Feature_In64BitModeBit, Feature_UseSSE2Bit, }, {Feature_Not64BitModeBit, Feature_OptForSizeBit, }, {Feature_NotWin64WithoutFPBit, Feature_OptForMinSizeBit, }, {Feature_HasAESBit, Feature_HasAVXBit, Feature_NoVLX_Or_NoVAESBit, }, {Feature_HasAVXBit, Feature_HasPCLMULBit, Feature_NoVLX_Or_NoVPCLMULQDQBit, }, {Feature_HasDQIBit, Feature_HasVLXBit, Feature_NoBWIBit, }, {Feature_HasFMABit, Feature_NoAVX512Bit, Feature_NoFMA4Bit, }, {Feature_HasFMABit, Feature_NoFMA4Bit, Feature_NoVLXBit, }, }; // ComplexPattern predicates. enum { GICP_Invalid, }; // See constructor for table contents // PatFrag predicates. enum { GIPFP_I64_Predicate_AndMask64 = GIPFP_I64_Invalid + 1, GIPFP_I64_Predicate_BTCBTSMask64, GIPFP_I64_Predicate_BTRMask64, GIPFP_I64_Predicate_PrefetchWT1Level, GIPFP_I64_Predicate_i16immSExt8, GIPFP_I64_Predicate_i32immSExt8, GIPFP_I64_Predicate_i64immSExt32, GIPFP_I64_Predicate_i64immSExt8, GIPFP_I64_Predicate_i64immZExt32, GIPFP_I64_Predicate_i64immZExt32SExt8, GIPFP_I64_Predicate_i64timmSExt32, GIPFP_I64_Predicate_immff00_ffff, }; bool X86InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const { switch (PredicateID) { case GIPFP_I64_Predicate_AndMask64: { return isMask_64(Imm) && !isUInt<32>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_BTCBTSMask64: { return !isInt<32>(Imm) && isPowerOf2_64(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_BTRMask64: { return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_PrefetchWT1Level: { return Imm < 3; llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i16immSExt8: { return isInt<8>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i32immSExt8: { return isInt<8>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i64immSExt32: { return isInt<32>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i64immSExt8: { return isInt<8>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i64immZExt32: { return isUInt<32>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i64immZExt32SExt8: { return isUInt<32>(Imm) && isInt<8>(static_cast(Imm)); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i64timmSExt32: { return isInt<32>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_immff00_ffff: { return Imm >= 0xff00 && Imm <= 0xffff; llvm_unreachable("ImmediateCode should have returned"); return false; } } llvm_unreachable("Unknown predicate"); return false; } // PatFrag predicates. enum { GIPFP_APFloat_Predicate_fpimm0 = GIPFP_APFloat_Invalid + 1, GIPFP_APFloat_Predicate_fpimm1, GIPFP_APFloat_Predicate_fpimmneg0, GIPFP_APFloat_Predicate_fpimmneg1, }; bool X86InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const { switch (PredicateID) { case GIPFP_APFloat_Predicate_fpimm0: { return Imm.isExactlyValue(+0.0); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_APFloat_Predicate_fpimm1: { return Imm.isExactlyValue(+1.0); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_APFloat_Predicate_fpimmneg0: { return Imm.isExactlyValue(-0.0); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_APFloat_Predicate_fpimmneg1: { return Imm.isExactlyValue(-1.0); llvm_unreachable("ImmediateCode should have returned"); return false; } } llvm_unreachable("Unknown predicate"); return false; } bool X86InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const { llvm_unreachable("Unknown predicate"); return false; } bool X86InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const std::array &Operands) const { const MachineFunction &MF = *MI.getParent()->getParent(); const MachineRegisterInfo &MRI = MF.getRegInfo(); (void)MRI; llvm_unreachable("Unknown predicate"); return false; } X86InstructionSelector::ComplexMatcherMemFn X86InstructionSelector::ComplexPredicateFns[] = { nullptr, // GICP_Invalid }; // Custom renderers. enum { GICR_Invalid, }; X86InstructionSelector::CustomRendererFn X86InstructionSelector::CustomRenderers[] = { nullptr, // GICR_Invalid }; bool X86InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const { MachineFunction &MF = *I.getParent()->getParent(); MachineRegisterInfo &MRI = MF.getRegInfo(); const PredicateBitset AvailableFeatures = getAvailableFeatures(); NewMIVector OutMIs; State.MIs.clear(); State.MIs.push_back(&I); if (executeMatchTable(*this, OutMIs, State, ISelInfo, getMatchTable(), TII, MRI, TRI, RBI, AvailableFeatures, CoverageInfo)) { return true; } return false; } const int64_t *X86InstructionSelector::getMatchTable() const { constexpr static int64_t MatchTable0[] = { GIM_SwitchOpcode, /*MI*/0, /*[*/46, 227, /*)*//*default:*//*Label 61*/ 63086, /*TargetOpcode::G_ADD*//*Label 0*/ 186, /*TargetOpcode::G_SUB*//*Label 1*/ 1803, /*TargetOpcode::G_MUL*//*Label 2*/ 2884, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_AND*//*Label 3*/ 3954, /*TargetOpcode::G_OR*//*Label 4*/ 9364, /*TargetOpcode::G_XOR*//*Label 5*/ 13234, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_CONCAT_VECTORS*//*Label 6*/ 20965, 0, 0, /*TargetOpcode::G_BITCAST*//*Label 7*/ 21121, 0, 0, 0, 0, /*TargetOpcode::G_INTRINSIC_LRINT*//*Label 8*/ 22667, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_INTRINSIC*//*Label 9*/ 22990, /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 10*/ 28683, /*TargetOpcode::G_ANYEXT*//*Label 11*/ 31047, /*TargetOpcode::G_TRUNC*//*Label 12*/ 31458, /*TargetOpcode::G_CONSTANT*//*Label 13*/ 32316, /*TargetOpcode::G_FCONSTANT*//*Label 14*/ 32585, 0, 0, /*TargetOpcode::G_SEXT*//*Label 15*/ 32736, 0, /*TargetOpcode::G_ZEXT*//*Label 16*/ 33596, /*TargetOpcode::G_SHL*//*Label 17*/ 34384, /*TargetOpcode::G_LSHR*//*Label 18*/ 34977, /*TargetOpcode::G_ASHR*//*Label 19*/ 35554, /*TargetOpcode::G_FSHL*//*Label 20*/ 36131, /*TargetOpcode::G_FSHR*//*Label 21*/ 36338, /*TargetOpcode::G_ROTR*//*Label 22*/ 36545, /*TargetOpcode::G_ROTL*//*Label 23*/ 38007, /*TargetOpcode::G_ICMP*//*Label 24*/ 39515, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_UMULH*//*Label 25*/ 41072, /*TargetOpcode::G_SMULH*//*Label 26*/ 41260, /*TargetOpcode::G_UADDSAT*//*Label 27*/ 41448, /*TargetOpcode::G_SADDSAT*//*Label 28*/ 41809, /*TargetOpcode::G_USUBSAT*//*Label 29*/ 42170, /*TargetOpcode::G_SSUBSAT*//*Label 30*/ 42531, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_FADD*//*Label 31*/ 42892, /*TargetOpcode::G_FSUB*//*Label 32*/ 43714, /*TargetOpcode::G_FMUL*//*Label 33*/ 44536, /*TargetOpcode::G_FMA*//*Label 34*/ 45358, 0, /*TargetOpcode::G_FDIV*//*Label 35*/ 46532, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_FNEG*//*Label 36*/ 47354, /*TargetOpcode::G_FPEXT*//*Label 37*/ 47445, /*TargetOpcode::G_FPTRUNC*//*Label 38*/ 47924, /*TargetOpcode::G_FPTOSI*//*Label 39*/ 48230, /*TargetOpcode::G_FPTOUI*//*Label 40*/ 48638, /*TargetOpcode::G_SITOFP*//*Label 41*/ 48805, /*TargetOpcode::G_UITOFP*//*Label 42*/ 49937, /*TargetOpcode::G_FABS*//*Label 43*/ 50675, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_SMIN*//*Label 44*/ 50766, /*TargetOpcode::G_SMAX*//*Label 45*/ 51703, /*TargetOpcode::G_UMIN*//*Label 46*/ 52640, /*TargetOpcode::G_UMAX*//*Label 47*/ 53577, /*TargetOpcode::G_ABS*//*Label 48*/ 54514, 0, 0, /*TargetOpcode::G_BR*//*Label 49*/ 55213, 0, 0, 0, 0, 0, /*TargetOpcode::G_CTTZ_ZERO_UNDEF*//*Label 50*/ 55226, /*TargetOpcode::G_CTLZ*//*Label 51*/ 55311, 0, /*TargetOpcode::G_CTPOP*//*Label 52*/ 55870, /*TargetOpcode::G_BSWAP*//*Label 53*/ 56974, 0, 0, 0, 0, /*TargetOpcode::G_FSQRT*//*Label 54*/ 57064, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_STRICT_FADD*//*Label 55*/ 57844, /*TargetOpcode::G_STRICT_FSUB*//*Label 56*/ 58666, /*TargetOpcode::G_STRICT_FMUL*//*Label 57*/ 59488, /*TargetOpcode::G_STRICT_FDIV*//*Label 58*/ 60310, 0, /*TargetOpcode::G_STRICT_FMA*//*Label 59*/ 61132, /*TargetOpcode::G_STRICT_FSQRT*//*Label 60*/ 62306, // Label 0: @186 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 78*/ 1802, /*GILLT_s8*//*Label 62*/ 216, /*GILLT_s16*//*Label 63*/ 330, /*GILLT_s32*//*Label 64*/ 502, /*GILLT_s64*//*Label 65*/ 674, 0, 0, 0, /*GILLT_v2s64*//*Label 66*/ 874, 0, /*GILLT_v4s32*//*Label 67*/ 955, /*GILLT_v4s64*//*Label 68*/ 1158, 0, /*GILLT_v8s16*//*Label 69*/ 1216, /*GILLT_v8s32*//*Label 70*/ 1419, /*GILLT_v8s64*//*Label 71*/ 1477, 0, /*GILLT_v16s8*//*Label 72*/ 1509, /*GILLT_v16s16*//*Label 73*/ 1590, /*GILLT_v16s32*//*Label 74*/ 1648, 0, /*GILLT_v32s8*//*Label 75*/ 1680, /*GILLT_v32s16*//*Label 76*/ 1738, 0, /*GILLT_v64s8*//*Label 77*/ 1770, // Label 62: @216 GIM_Try, /*On fail goto*//*Label 79*/ 329, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 80*/ 258, // Rule ID 21047 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, 1:{ *:[i8] }) => (INC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC8r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21047, GIR_Done, // Label 80: @258 GIM_Try, /*On fail goto*//*Label 81*/ 282, // Rule ID 21051 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, -1:{ *:[i8] }) => (DEC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC8r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21051, GIR_Done, // Label 81: @282 GIM_Try, /*On fail goto*//*Label 82*/ 312, // Rule ID 21003 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21003, GIR_Done, // Label 82: @312 GIM_Try, /*On fail goto*//*Label 83*/ 328, // Rule ID 20995 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20995, GIR_Done, // Label 83: @328 GIM_Reject, // Label 79: @329 GIM_Reject, // Label 63: @330 GIM_Try, /*On fail goto*//*Label 84*/ 501, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 85*/ 373, // Rule ID 20859 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, 128:{ *:[i16] }) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -128:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20859, GIR_Done, // Label 85: @373 GIM_Try, /*On fail goto*//*Label 86*/ 397, // Rule ID 21048 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, 1:{ *:[i16] }) => (INC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC16r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21048, GIR_Done, // Label 86: @397 GIM_Try, /*On fail goto*//*Label 87*/ 421, // Rule ID 21052 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, -1:{ *:[i16] }) => (DEC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC16r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21052, GIR_Done, // Label 87: @421 GIM_Try, /*On fail goto*//*Label 88*/ 454, // Rule ID 21006 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (ADD16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21006, GIR_Done, // Label 88: @454 GIM_Try, /*On fail goto*//*Label 89*/ 484, // Rule ID 21004 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21004, GIR_Done, // Label 89: @484 GIM_Try, /*On fail goto*//*Label 90*/ 500, // Rule ID 20996 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20996, GIR_Done, // Label 90: @500 GIM_Reject, // Label 84: @501 GIM_Reject, // Label 64: @502 GIM_Try, /*On fail goto*//*Label 91*/ 673, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 92*/ 545, // Rule ID 20861 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, 128:{ *:[i32] }) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -128:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20861, GIR_Done, // Label 92: @545 GIM_Try, /*On fail goto*//*Label 93*/ 569, // Rule ID 21049 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }) => (INC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC32r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21049, GIR_Done, // Label 93: @569 GIM_Try, /*On fail goto*//*Label 94*/ 593, // Rule ID 21053 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }) => (DEC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC32r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21053, GIR_Done, // Label 94: @593 GIM_Try, /*On fail goto*//*Label 95*/ 626, // Rule ID 21007 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (ADD32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21007, GIR_Done, // Label 95: @626 GIM_Try, /*On fail goto*//*Label 96*/ 656, // Rule ID 21005 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21005, GIR_Done, // Label 96: @656 GIM_Try, /*On fail goto*//*Label 97*/ 672, // Rule ID 20997 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20997, GIR_Done, // Label 97: @672 GIM_Reject, // Label 91: @673 GIM_Reject, // Label 65: @674 GIM_Try, /*On fail goto*//*Label 98*/ 873, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 99*/ 717, // Rule ID 20863 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 128:{ *:[i64] }) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -128:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20863, GIR_Done, // Label 99: @717 GIM_Try, /*On fail goto*//*Label 100*/ 742, // Rule ID 20868 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 2147483648, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 2147483648:{ *:[i64] }) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -2147483648:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-2147483648, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20868, GIR_Done, // Label 100: @742 GIM_Try, /*On fail goto*//*Label 101*/ 766, // Rule ID 21050 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }) => (INC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC64r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21050, GIR_Done, // Label 101: @766 GIM_Try, /*On fail goto*//*Label 102*/ 790, // Rule ID 21054 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }) => (DEC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC64r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21054, GIR_Done, // Label 102: @790 GIM_Try, /*On fail goto*//*Label 103*/ 823, // Rule ID 21008 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (ADD64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21008, GIR_Done, // Label 103: @823 GIM_Try, /*On fail goto*//*Label 104*/ 856, // Rule ID 21009 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (ADD64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21009, GIR_Done, // Label 104: @856 GIM_Try, /*On fail goto*//*Label 105*/ 872, // Rule ID 20998 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20998, GIR_Done, // Label 105: @872 GIM_Reject, // Label 98: @873 GIM_Reject, // Label 66: @874 GIM_Try, /*On fail goto*//*Label 106*/ 954, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 107*/ 907, // Rule ID 2232 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2232, GIR_Done, // Label 107: @907 GIM_Try, /*On fail goto*//*Label 108*/ 930, // Rule ID 2234 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2234, GIR_Done, // Label 108: @930 GIM_Try, /*On fail goto*//*Label 109*/ 953, // Rule ID 4290 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (add:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPADDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4290, GIR_Done, // Label 109: @953 GIM_Reject, // Label 106: @954 GIM_Reject, // Label 67: @955 GIM_Try, /*On fail goto*//*Label 110*/ 1157, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 111*/ 1026, // Rule ID 16322 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2), VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16322, GIR_Done, // Label 111: @1026 GIM_Try, /*On fail goto*//*Label 112*/ 1087, // Rule ID 23056 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src3, (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23056, GIR_Done, // Label 112: @1087 GIM_Try, /*On fail goto*//*Label 113*/ 1110, // Rule ID 2226 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2226, GIR_Done, // Label 113: @1110 GIM_Try, /*On fail goto*//*Label 114*/ 1133, // Rule ID 2228 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2228, GIR_Done, // Label 114: @1133 GIM_Try, /*On fail goto*//*Label 115*/ 1156, // Rule ID 4317 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (add:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPADDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4317, GIR_Done, // Label 115: @1156 GIM_Reject, // Label 110: @1157 GIM_Reject, // Label 68: @1158 GIM_Try, /*On fail goto*//*Label 116*/ 1215, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 117*/ 1191, // Rule ID 2236 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (add:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPADDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2236, GIR_Done, // Label 117: @1191 GIM_Try, /*On fail goto*//*Label 118*/ 1214, // Rule ID 4281 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (add:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPADDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4281, GIR_Done, // Label 118: @1214 GIM_Reject, // Label 116: @1215 GIM_Reject, // Label 69: @1216 GIM_Try, /*On fail goto*//*Label 119*/ 1418, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 120*/ 1287, // Rule ID 16321 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2), VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16321, GIR_Done, // Label 120: @1287 GIM_Try, /*On fail goto*//*Label 121*/ 1348, // Rule ID 23055 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src3, (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23055, GIR_Done, // Label 121: @1348 GIM_Try, /*On fail goto*//*Label 122*/ 1371, // Rule ID 2220 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2220, GIR_Done, // Label 122: @1371 GIM_Try, /*On fail goto*//*Label 123*/ 1394, // Rule ID 2222 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2222, GIR_Done, // Label 123: @1394 GIM_Try, /*On fail goto*//*Label 124*/ 1417, // Rule ID 4338 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (add:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4338, GIR_Done, // Label 124: @1417 GIM_Reject, // Label 119: @1418 GIM_Reject, // Label 70: @1419 GIM_Try, /*On fail goto*//*Label 125*/ 1476, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 126*/ 1452, // Rule ID 2230 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (add:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPADDDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2230, GIR_Done, // Label 126: @1452 GIM_Try, /*On fail goto*//*Label 127*/ 1475, // Rule ID 4308 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (add:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPADDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4308, GIR_Done, // Label 127: @1475 GIM_Reject, // Label 125: @1476 GIM_Reject, // Label 71: @1477 GIM_Try, /*On fail goto*//*Label 128*/ 1508, // Rule ID 4272 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (add:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPADDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4272, GIR_Done, // Label 128: @1508 GIM_Reject, // Label 72: @1509 GIM_Try, /*On fail goto*//*Label 129*/ 1589, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 130*/ 1542, // Rule ID 2214 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2214, GIR_Done, // Label 130: @1542 GIM_Try, /*On fail goto*//*Label 131*/ 1565, // Rule ID 2216 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2216, GIR_Done, // Label 131: @1565 GIM_Try, /*On fail goto*//*Label 132*/ 1588, // Rule ID 4356 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (add:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4356, GIR_Done, // Label 132: @1588 GIM_Reject, // Label 129: @1589 GIM_Reject, // Label 73: @1590 GIM_Try, /*On fail goto*//*Label 133*/ 1647, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 134*/ 1623, // Rule ID 2224 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (add:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2224, GIR_Done, // Label 134: @1623 GIM_Try, /*On fail goto*//*Label 135*/ 1646, // Rule ID 4332 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (add:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4332, GIR_Done, // Label 135: @1646 GIM_Reject, // Label 133: @1647 GIM_Reject, // Label 74: @1648 GIM_Try, /*On fail goto*//*Label 136*/ 1679, // Rule ID 4299 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (add:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPADDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4299, GIR_Done, // Label 136: @1679 GIM_Reject, // Label 75: @1680 GIM_Try, /*On fail goto*//*Label 137*/ 1737, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 138*/ 1713, // Rule ID 2218 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (add:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2218, GIR_Done, // Label 138: @1713 GIM_Try, /*On fail goto*//*Label 139*/ 1736, // Rule ID 4350 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (add:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4350, GIR_Done, // Label 139: @1736 GIM_Reject, // Label 137: @1737 GIM_Reject, // Label 76: @1738 GIM_Try, /*On fail goto*//*Label 140*/ 1769, // Rule ID 4326 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (add:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4326, GIR_Done, // Label 140: @1769 GIM_Reject, // Label 77: @1770 GIM_Try, /*On fail goto*//*Label 141*/ 1801, // Rule ID 4344 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (add:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4344, GIR_Done, // Label 141: @1801 GIM_Reject, // Label 78: @1802 GIM_Reject, // Label 1: @1803 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 158*/ 2883, /*GILLT_s8*//*Label 142*/ 1833, /*GILLT_s16*//*Label 143*/ 1899, /*GILLT_s32*//*Label 144*/ 1998, /*GILLT_s64*//*Label 145*/ 2097, 0, 0, 0, /*GILLT_v2s64*//*Label 146*/ 2199, 0, /*GILLT_v4s32*//*Label 147*/ 2280, /*GILLT_v4s64*//*Label 148*/ 2361, 0, /*GILLT_v8s16*//*Label 149*/ 2419, /*GILLT_v8s32*//*Label 150*/ 2500, /*GILLT_v8s64*//*Label 151*/ 2558, 0, /*GILLT_v16s8*//*Label 152*/ 2590, /*GILLT_v16s16*//*Label 153*/ 2671, /*GILLT_v16s32*//*Label 154*/ 2729, 0, /*GILLT_v32s8*//*Label 155*/ 2761, /*GILLT_v32s16*//*Label 156*/ 2819, 0, /*GILLT_v64s8*//*Label 157*/ 2851, // Label 142: @1833 GIM_Try, /*On fail goto*//*Label 159*/ 1898, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 160*/ 1881, // Rule ID 21018 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SUB8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21018, GIR_Done, // Label 160: @1881 GIM_Try, /*On fail goto*//*Label 161*/ 1897, // Rule ID 21010 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (SUB8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21010, GIR_Done, // Label 161: @1897 GIM_Reject, // Label 159: @1898 GIM_Reject, // Label 143: @1899 GIM_Try, /*On fail goto*//*Label 162*/ 1997, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 163*/ 1950, // Rule ID 21021 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21021, GIR_Done, // Label 163: @1950 GIM_Try, /*On fail goto*//*Label 164*/ 1980, // Rule ID 21019 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (SUB16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21019, GIR_Done, // Label 164: @1980 GIM_Try, /*On fail goto*//*Label 165*/ 1996, // Rule ID 21011 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (SUB16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21011, GIR_Done, // Label 165: @1996 GIM_Reject, // Label 162: @1997 GIM_Reject, // Label 144: @1998 GIM_Try, /*On fail goto*//*Label 166*/ 2096, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 167*/ 2049, // Rule ID 21022 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21022, GIR_Done, // Label 167: @2049 GIM_Try, /*On fail goto*//*Label 168*/ 2079, // Rule ID 21020 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (SUB32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21020, GIR_Done, // Label 168: @2079 GIM_Try, /*On fail goto*//*Label 169*/ 2095, // Rule ID 21012 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (SUB32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21012, GIR_Done, // Label 169: @2095 GIM_Reject, // Label 166: @2096 GIM_Reject, // Label 145: @2097 GIM_Try, /*On fail goto*//*Label 170*/ 2198, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 171*/ 2148, // Rule ID 21023 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21023, GIR_Done, // Label 171: @2148 GIM_Try, /*On fail goto*//*Label 172*/ 2181, // Rule ID 21024 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21024, GIR_Done, // Label 172: @2181 GIM_Try, /*On fail goto*//*Label 173*/ 2197, // Rule ID 21013 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (SUB64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21013, GIR_Done, // Label 173: @2197 GIM_Reject, // Label 170: @2198 GIM_Reject, // Label 146: @2199 GIM_Try, /*On fail goto*//*Label 174*/ 2279, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 175*/ 2232, // Rule ID 2298 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2298, GIR_Done, // Label 175: @2232 GIM_Try, /*On fail goto*//*Label 176*/ 2255, // Rule ID 2300 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2300, GIR_Done, // Label 176: @2255 GIM_Try, /*On fail goto*//*Label 177*/ 2278, // Rule ID 4380 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (sub:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSUBQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4380, GIR_Done, // Label 177: @2278 GIM_Reject, // Label 174: @2279 GIM_Reject, // Label 147: @2280 GIM_Try, /*On fail goto*//*Label 178*/ 2360, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 179*/ 2313, // Rule ID 2292 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2292, GIR_Done, // Label 179: @2313 GIM_Try, /*On fail goto*//*Label 180*/ 2336, // Rule ID 2294 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2294, GIR_Done, // Label 180: @2336 GIM_Try, /*On fail goto*//*Label 181*/ 2359, // Rule ID 4407 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (sub:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSUBDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4407, GIR_Done, // Label 181: @2359 GIM_Reject, // Label 178: @2360 GIM_Reject, // Label 148: @2361 GIM_Try, /*On fail goto*//*Label 182*/ 2418, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 183*/ 2394, // Rule ID 2302 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (sub:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSUBQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2302, GIR_Done, // Label 183: @2394 GIM_Try, /*On fail goto*//*Label 184*/ 2417, // Rule ID 4371 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (sub:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSUBQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4371, GIR_Done, // Label 184: @2417 GIM_Reject, // Label 182: @2418 GIM_Reject, // Label 149: @2419 GIM_Try, /*On fail goto*//*Label 185*/ 2499, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 186*/ 2452, // Rule ID 2286 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2286, GIR_Done, // Label 186: @2452 GIM_Try, /*On fail goto*//*Label 187*/ 2475, // Rule ID 2288 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2288, GIR_Done, // Label 187: @2475 GIM_Try, /*On fail goto*//*Label 188*/ 2498, // Rule ID 4428 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (sub:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4428, GIR_Done, // Label 188: @2498 GIM_Reject, // Label 185: @2499 GIM_Reject, // Label 150: @2500 GIM_Try, /*On fail goto*//*Label 189*/ 2557, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 190*/ 2533, // Rule ID 2296 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (sub:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSUBDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2296, GIR_Done, // Label 190: @2533 GIM_Try, /*On fail goto*//*Label 191*/ 2556, // Rule ID 4398 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (sub:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSUBDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4398, GIR_Done, // Label 191: @2556 GIM_Reject, // Label 189: @2557 GIM_Reject, // Label 151: @2558 GIM_Try, /*On fail goto*//*Label 192*/ 2589, // Rule ID 4362 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (sub:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSUBQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4362, GIR_Done, // Label 192: @2589 GIM_Reject, // Label 152: @2590 GIM_Try, /*On fail goto*//*Label 193*/ 2670, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 194*/ 2623, // Rule ID 2280 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2280, GIR_Done, // Label 194: @2623 GIM_Try, /*On fail goto*//*Label 195*/ 2646, // Rule ID 2282 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2282, GIR_Done, // Label 195: @2646 GIM_Try, /*On fail goto*//*Label 196*/ 2669, // Rule ID 4446 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (sub:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4446, GIR_Done, // Label 196: @2669 GIM_Reject, // Label 193: @2670 GIM_Reject, // Label 153: @2671 GIM_Try, /*On fail goto*//*Label 197*/ 2728, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 198*/ 2704, // Rule ID 2290 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (sub:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2290, GIR_Done, // Label 198: @2704 GIM_Try, /*On fail goto*//*Label 199*/ 2727, // Rule ID 4422 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (sub:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4422, GIR_Done, // Label 199: @2727 GIM_Reject, // Label 197: @2728 GIM_Reject, // Label 154: @2729 GIM_Try, /*On fail goto*//*Label 200*/ 2760, // Rule ID 4389 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (sub:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSUBDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4389, GIR_Done, // Label 200: @2760 GIM_Reject, // Label 155: @2761 GIM_Try, /*On fail goto*//*Label 201*/ 2818, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 202*/ 2794, // Rule ID 2284 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (sub:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2284, GIR_Done, // Label 202: @2794 GIM_Try, /*On fail goto*//*Label 203*/ 2817, // Rule ID 4440 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (sub:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4440, GIR_Done, // Label 203: @2817 GIM_Reject, // Label 201: @2818 GIM_Reject, // Label 156: @2819 GIM_Try, /*On fail goto*//*Label 204*/ 2850, // Rule ID 4416 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (sub:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4416, GIR_Done, // Label 204: @2850 GIM_Reject, // Label 157: @2851 GIM_Try, /*On fail goto*//*Label 205*/ 2882, // Rule ID 4434 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (sub:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4434, GIR_Done, // Label 205: @2882 GIM_Reject, // Label 158: @2883 GIM_Reject, // Label 2: @2884 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 218*/ 3953, /*GILLT_s16*//*Label 206*/ 2911, /*GILLT_s32*//*Label 207*/ 3010, /*GILLT_s64*//*Label 208*/ 3109, 0, 0, 0, /*GILLT_v2s64*//*Label 209*/ 3211, 0, /*GILLT_v4s32*//*Label 210*/ 3395, /*GILLT_v4s64*//*Label 211*/ 3476, 0, /*GILLT_v8s16*//*Label 212*/ 3660, /*GILLT_v8s32*//*Label 213*/ 3741, /*GILLT_v8s64*//*Label 214*/ 3799, 0, 0, /*GILLT_v16s16*//*Label 215*/ 3831, /*GILLT_v16s32*//*Label 216*/ 3889, 0, 0, /*GILLT_v32s16*//*Label 217*/ 3921, // Label 206: @2911 GIM_Try, /*On fail goto*//*Label 219*/ 3009, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 220*/ 2962, // Rule ID 21037 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (IMUL16rri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21037, GIR_Done, // Label 220: @2962 GIM_Try, /*On fail goto*//*Label 221*/ 2992, // Rule ID 21035 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (IMUL16rri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21035, GIR_Done, // Label 221: @2992 GIM_Try, /*On fail goto*//*Label 222*/ 3008, // Rule ID 21029 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (IMUL16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21029, GIR_Done, // Label 222: @3008 GIM_Reject, // Label 219: @3009 GIM_Reject, // Label 207: @3010 GIM_Try, /*On fail goto*//*Label 223*/ 3108, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 224*/ 3061, // Rule ID 21038 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (IMUL32rri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21038, GIR_Done, // Label 224: @3061 GIM_Try, /*On fail goto*//*Label 225*/ 3091, // Rule ID 21036 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (IMUL32rri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21036, GIR_Done, // Label 225: @3091 GIM_Try, /*On fail goto*//*Label 226*/ 3107, // Rule ID 21030 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (IMUL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21030, GIR_Done, // Label 226: @3107 GIM_Reject, // Label 223: @3108 GIM_Reject, // Label 208: @3109 GIM_Try, /*On fail goto*//*Label 227*/ 3210, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 228*/ 3160, // Rule ID 21039 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (IMUL64rri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21039, GIR_Done, // Label 228: @3160 GIM_Try, /*On fail goto*//*Label 229*/ 3193, // Rule ID 21040 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (IMUL64rri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21040, GIR_Done, // Label 229: @3193 GIM_Try, /*On fail goto*//*Label 230*/ 3209, // Rule ID 21031 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (IMUL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21031, GIR_Done, // Label 230: @3209 GIM_Reject, // Label 227: @3210 GIM_Reject, // Label 209: @3211 GIM_Try, /*On fail goto*//*Label 231*/ 3394, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 232*/ 3244, // Rule ID 4659 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMULLQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4659, GIR_Done, // Label 232: @3244 GIM_Try, /*On fail goto*//*Label 233*/ 3393, // Rule ID 18483 // GIM_CheckFeatures, GIFBS_HasDQI_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMULLQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMULLQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18483, GIR_Done, // Label 233: @3393 GIM_Reject, // Label 231: @3394 GIM_Reject, // Label 210: @3395 GIM_Try, /*On fail goto*//*Label 234*/ 3475, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 235*/ 3428, // Rule ID 2931 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2931, GIR_Done, // Label 235: @3428 GIM_Try, /*On fail goto*//*Label 236*/ 3451, // Rule ID 2939 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULLDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2939, GIR_Done, // Label 236: @3451 GIM_Try, /*On fail goto*//*Label 237*/ 3474, // Rule ID 4614 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mul:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMULLDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4614, GIR_Done, // Label 237: @3474 GIM_Reject, // Label 234: @3475 GIM_Reject, // Label 211: @3476 GIM_Try, /*On fail goto*//*Label 238*/ 3659, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 239*/ 3509, // Rule ID 4650 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mul:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMULLQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4650, GIR_Done, // Label 239: @3509 GIM_Try, /*On fail goto*//*Label 240*/ 3658, // Rule ID 18481 // GIM_CheckFeatures, GIFBS_HasDQI_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mul:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMULLQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMULLQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18481, GIR_Done, // Label 240: @3658 GIM_Reject, // Label 238: @3659 GIM_Reject, // Label 212: @3660 GIM_Try, /*On fail goto*//*Label 241*/ 3740, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 242*/ 3693, // Rule ID 2262 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2262, GIR_Done, // Label 242: @3693 GIM_Try, /*On fail goto*//*Label 243*/ 3716, // Rule ID 2264 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULLWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2264, GIR_Done, // Label 243: @3716 GIM_Try, /*On fail goto*//*Label 244*/ 3739, // Rule ID 4635 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mul:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULLWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4635, GIR_Done, // Label 244: @3739 GIM_Reject, // Label 241: @3740 GIM_Reject, // Label 213: @3741 GIM_Try, /*On fail goto*//*Label 245*/ 3798, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 246*/ 3774, // Rule ID 2935 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (mul:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMULLDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2935, GIR_Done, // Label 246: @3774 GIM_Try, /*On fail goto*//*Label 247*/ 3797, // Rule ID 4605 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mul:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMULLDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4605, GIR_Done, // Label 247: @3797 GIM_Reject, // Label 245: @3798 GIM_Reject, // Label 214: @3799 GIM_Try, /*On fail goto*//*Label 248*/ 3830, // Rule ID 4641 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mul:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMULLQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4641, GIR_Done, // Label 248: @3830 GIM_Reject, // Label 215: @3831 GIM_Try, /*On fail goto*//*Label 249*/ 3888, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 250*/ 3864, // Rule ID 2266 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (mul:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULLWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2266, GIR_Done, // Label 250: @3864 GIM_Try, /*On fail goto*//*Label 251*/ 3887, // Rule ID 4629 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mul:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULLWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4629, GIR_Done, // Label 251: @3887 GIM_Reject, // Label 249: @3888 GIM_Reject, // Label 216: @3889 GIM_Try, /*On fail goto*//*Label 252*/ 3920, // Rule ID 4596 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mul:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMULLDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4596, GIR_Done, // Label 252: @3920 GIM_Reject, // Label 217: @3921 GIM_Try, /*On fail goto*//*Label 253*/ 3952, // Rule ID 4623 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mul:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULLWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4623, GIR_Done, // Label 253: @3952 GIM_Reject, // Label 218: @3953 GIM_Reject, // Label 3: @3954 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 25, /*)*//*default:*//*Label 277*/ 9363, /*GILLT_s1*//*Label 254*/ 3985, /*GILLT_s8*//*Label 255*/ 4299, /*GILLT_s16*//*Label 256*/ 4365, /*GILLT_s32*//*Label 257*/ 4756, /*GILLT_s64*//*Label 258*/ 5947, 0, 0, /*GILLT_v2s1*//*Label 259*/ 7027, /*GILLT_v2s64*//*Label 260*/ 7341, /*GILLT_v4s1*//*Label 261*/ 7422, /*GILLT_v4s32*//*Label 262*/ 7736, /*GILLT_v4s64*//*Label 263*/ 7817, /*GILLT_v8s1*//*Label 264*/ 7898, /*GILLT_v8s16*//*Label 265*/ 8359, /*GILLT_v8s32*//*Label 266*/ 8440, /*GILLT_v8s64*//*Label 267*/ 8521, /*GILLT_v16s1*//*Label 268*/ 8553, /*GILLT_v16s8*//*Label 269*/ 8710, /*GILLT_v16s16*//*Label 270*/ 8791, /*GILLT_v16s32*//*Label 271*/ 8872, /*GILLT_v32s1*//*Label 272*/ 8904, /*GILLT_v32s8*//*Label 273*/ 9061, /*GILLT_v32s16*//*Label 274*/ 9142, /*GILLT_v64s1*//*Label 275*/ 9174, /*GILLT_v64s8*//*Label 276*/ 9331, // Label 254: @3985 GIM_Try, /*On fail goto*//*Label 278*/ 4298, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_Try, /*On fail goto*//*Label 279*/ 4108, // Rule ID 17927 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK1RegClassID, // GIR_Coverage, 17927, GIR_Done, // Label 279: @4108 GIM_Try, /*On fail goto*//*Label 280*/ 4217, // Rule ID 23233 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK1RegClassID, // GIR_Coverage, 23233, GIR_Done, // Label 280: @4217 GIM_Try, /*On fail goto*//*Label 281*/ 4297, // Rule ID 17923 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK1RegClassID, // GIR_Coverage, 17923, GIR_Done, // Label 281: @4297 GIM_Reject, // Label 278: @4298 GIM_Reject, // Label 255: @4299 GIM_Try, /*On fail goto*//*Label 282*/ 4364, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 283*/ 4347, // Rule ID 15703 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (AND8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15703, GIR_Done, // Label 283: @4347 GIM_Try, /*On fail goto*//*Label 284*/ 4363, // Rule ID 15695 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (AND8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15695, GIR_Done, // Label 284: @4363 GIM_Reject, // Label 282: @4364 GIM_Reject, // Label 256: @4365 GIM_Try, /*On fail goto*//*Label 285*/ 4755, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_Try, /*On fail goto*//*Label 286*/ 4475, // Rule ID 23892 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ROTL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i16] } (rotl:{ *:[i16] } -2:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTR16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23892, GIR_Done, // Label 286: @4475 GIM_Try, /*On fail goto*//*Label 287*/ 4575, // Rule ID 20977 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ROTL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (rotl:{ *:[i16] } -2:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTR16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20977, GIR_Done, // Label 287: @4575 GIM_Try, /*On fail goto*//*Label 288*/ 4651, // Rule ID 20875 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 255, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, 255:{ *:[i16] }) => (EXTRACT_SUBREG:{ *:[i16] } (MOVZX32rr8:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i8] } GR16:{ *:[i16] }:$src1, sub_8bit:{ *:[i32] })), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s8, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_CopySubReg, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src1 GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::GR8RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::GR16RegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr8, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_16bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 20875, GIR_Done, // Label 288: @4651 GIM_Try, /*On fail goto*//*Label 289*/ 4692, // Rule ID 15706 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (AND16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15706, GIR_Done, // Label 289: @4692 GIM_Try, /*On fail goto*//*Label 290*/ 4730, // Rule ID 15704 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (AND16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15704, GIR_Done, // Label 290: @4730 GIM_Try, /*On fail goto*//*Label 291*/ 4754, // Rule ID 15696 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (AND16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15696, GIR_Done, // Label 291: @4754 GIM_Reject, // Label 285: @4755 GIM_Reject, // Label 257: @4756 GIM_Try, /*On fail goto*//*Label 292*/ 5946, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 293*/ 4837, // Rule ID 22873 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22873, GIR_Done, // Label 293: @4837 GIM_Try, /*On fail goto*//*Label 294*/ 4912, // Rule ID 22885 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22885, GIR_Done, // Label 294: @4912 GIM_Try, /*On fail goto*//*Label 295*/ 4987, // Rule ID 15930 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15930, GIR_Done, // Label 295: @4987 GIM_Try, /*On fail goto*//*Label 296*/ 5062, // Rule ID 15942 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15942, GIR_Done, // Label 296: @5062 GIM_Try, /*On fail goto*//*Label 297*/ 5116, // Rule ID 22855 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22855, GIR_Done, // Label 297: @5116 GIM_Try, /*On fail goto*//*Label 298*/ 5170, // Rule ID 22867 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22867, GIR_Done, // Label 298: @5170 GIM_Try, /*On fail goto*//*Label 299*/ 5274, // Rule ID 23898 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ROTL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } (rotl:{ *:[i32] } -2:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTR32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23898, GIR_Done, // Label 299: @5274 GIM_Try, /*On fail goto*//*Label 300*/ 5328, // Rule ID 22859 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLSI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22859, GIR_Done, // Label 300: @5328 GIM_Try, /*On fail goto*//*Label 301*/ 5382, // Rule ID 15906 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15906, GIR_Done, // Label 301: @5382 GIM_Try, /*On fail goto*//*Label 302*/ 5436, // Rule ID 15924 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15924, GIR_Done, // Label 302: @5436 GIM_Try, /*On fail goto*//*Label 303*/ 5540, // Rule ID 20983 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ROTL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (rotl:{ *:[i32] } -2:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTR32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20983, GIR_Done, // Label 303: @5540 GIM_Try, /*On fail goto*//*Label 304*/ 5594, // Rule ID 15910 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLSI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15910, GIR_Done, // Label 304: @5594 GIM_Try, /*On fail goto*//*Label 305*/ 5651, // Rule ID 20873 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 65535, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 65535:{ *:[i32] }) => (MOVZX32rr16:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src1, sub_16bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/4, // src1 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR32RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOVZX32rr16, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20873, GIR_Done, // Label 305: @5651 GIM_Try, /*On fail goto*//*Label 306*/ 5708, // Rule ID 20874 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 255, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 255:{ *:[i32] }) => (MOVZX32rr8:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src1, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s8, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src1 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR8RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR32RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOVZX32rr8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20874, GIR_Done, // Label 306: @5708 GIM_Try, /*On fail goto*//*Label 307*/ 5753, // Rule ID 15707 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (AND32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15707, GIR_Done, // Label 307: @5753 GIM_Try, /*On fail goto*//*Label 308*/ 5795, // Rule ID 15705 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (AND32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15705, GIR_Done, // Label 308: @5795 GIM_Try, /*On fail goto*//*Label 309*/ 5856, // Rule ID 16106 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src2) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16106, GIR_Done, // Label 309: @5856 GIM_Try, /*On fail goto*//*Label 310*/ 5917, // Rule ID 22971 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src2, (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] })) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22971, GIR_Done, // Label 310: @5917 GIM_Try, /*On fail goto*//*Label 311*/ 5945, // Rule ID 15697 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (AND32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15697, GIR_Done, // Label 311: @5945 GIM_Reject, // Label 292: @5946 GIM_Reject, // Label 258: @5947 GIM_Try, /*On fail goto*//*Label 312*/ 7026, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 313*/ 6028, // Rule ID 22874 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22874, GIR_Done, // Label 313: @6028 GIM_Try, /*On fail goto*//*Label 314*/ 6103, // Rule ID 22886 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22886, GIR_Done, // Label 314: @6103 GIM_Try, /*On fail goto*//*Label 315*/ 6178, // Rule ID 15931 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15931, GIR_Done, // Label 315: @6178 GIM_Try, /*On fail goto*//*Label 316*/ 6253, // Rule ID 15943 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15943, GIR_Done, // Label 316: @6253 GIM_Try, /*On fail goto*//*Label 317*/ 6307, // Rule ID 22856 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22856, GIR_Done, // Label 317: @6307 GIM_Try, /*On fail goto*//*Label 318*/ 6361, // Rule ID 22868 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22868, GIR_Done, // Label 318: @6361 GIM_Try, /*On fail goto*//*Label 319*/ 6465, // Rule ID 23904 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ROTL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } (rotl:{ *:[i64] } -2:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTR64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23904, GIR_Done, // Label 319: @6465 GIM_Try, /*On fail goto*//*Label 320*/ 6519, // Rule ID 22860 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLSI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22860, GIR_Done, // Label 320: @6519 GIM_Try, /*On fail goto*//*Label 321*/ 6573, // Rule ID 15907 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15907, GIR_Done, // Label 321: @6573 GIM_Try, /*On fail goto*//*Label 322*/ 6627, // Rule ID 15925 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15925, GIR_Done, // Label 322: @6627 GIM_Try, /*On fail goto*//*Label 323*/ 6731, // Rule ID 20989 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ROTL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (rotl:{ *:[i64] } -2:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTR64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20989, GIR_Done, // Label 323: @6731 GIM_Try, /*On fail goto*//*Label 324*/ 6785, // Rule ID 15911 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLSI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15911, GIR_Done, // Label 324: @6785 GIM_Try, /*On fail goto*//*Label 325*/ 6830, // Rule ID 15708 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (AND64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15708, GIR_Done, // Label 325: @6830 GIM_Try, /*On fail goto*//*Label 326*/ 6875, // Rule ID 15709 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (AND64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15709, GIR_Done, // Label 326: @6875 GIM_Try, /*On fail goto*//*Label 327*/ 6936, // Rule ID 16107 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src2) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16107, GIR_Done, // Label 327: @6936 GIM_Try, /*On fail goto*//*Label 328*/ 6997, // Rule ID 22972 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src2, (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] })) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22972, GIR_Done, // Label 328: @6997 GIM_Try, /*On fail goto*//*Label 329*/ 7025, // Rule ID 15698 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (AND64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15698, GIR_Done, // Label 329: @7025 GIM_Reject, // Label 312: @7026 GIM_Reject, // Label 259: @7027 GIM_Try, /*On fail goto*//*Label 330*/ 7340, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK2RegClassID, GIM_Try, /*On fail goto*//*Label 331*/ 7150, // Rule ID 17928 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v2i1] } (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] }), VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 17928, GIR_Done, // Label 331: @7150 GIM_Try, /*On fail goto*//*Label 332*/ 7259, // Rule ID 23234 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src2, (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] })) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 23234, GIR_Done, // Label 332: @7259 GIM_Try, /*On fail goto*//*Label 333*/ 7339, // Rule ID 17924 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, // (and:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 17924, GIR_Done, // Label 333: @7339 GIM_Reject, // Label 330: @7340 GIM_Reject, // Label 260: @7341 GIM_Try, /*On fail goto*//*Label 334*/ 7421, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 335*/ 7374, // Rule ID 1842 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1842, GIR_Done, // Label 335: @7374 GIM_Try, /*On fail goto*//*Label 336*/ 7397, // Rule ID 1844 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1844, GIR_Done, // Label 336: @7397 GIM_Try, /*On fail goto*//*Label 337*/ 7420, // Rule ID 5343 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (and:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPANDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5343, GIR_Done, // Label 337: @7420 GIM_Reject, // Label 334: @7421 GIM_Reject, // Label 261: @7422 GIM_Try, /*On fail goto*//*Label 338*/ 7735, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK4RegClassID, GIM_Try, /*On fail goto*//*Label 339*/ 7545, // Rule ID 17929 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v4i1] } (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] }), VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 17929, GIR_Done, // Label 339: @7545 GIM_Try, /*On fail goto*//*Label 340*/ 7654, // Rule ID 23235 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src2, (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] })) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 23235, GIR_Done, // Label 340: @7654 GIM_Try, /*On fail goto*//*Label 341*/ 7734, // Rule ID 17925 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, // (and:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 17925, GIR_Done, // Label 341: @7734 GIM_Reject, // Label 338: @7735 GIM_Reject, // Label 262: @7736 GIM_Try, /*On fail goto*//*Label 342*/ 7816, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 343*/ 7769, // Rule ID 5370 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (and:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPANDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5370, GIR_Done, // Label 343: @7769 GIM_Try, /*On fail goto*//*Label 344*/ 7792, // Rule ID 16595 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPANDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16595, GIR_Done, // Label 344: @7792 GIM_Try, /*On fail goto*//*Label 345*/ 7815, // Rule ID 16619 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PANDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16619, GIR_Done, // Label 345: @7815 GIM_Reject, // Label 342: @7816 GIM_Reject, // Label 263: @7817 GIM_Try, /*On fail goto*//*Label 346*/ 7897, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 347*/ 7850, // Rule ID 1846 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPANDYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1846, GIR_Done, // Label 347: @7850 GIM_Try, /*On fail goto*//*Label 348*/ 7873, // Rule ID 5334 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (and:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPANDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5334, GIR_Done, // Label 348: @7873 GIM_Try, /*On fail goto*//*Label 349*/ 7896, // Rule ID 16564 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VANDPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16564, GIR_Done, // Label 349: @7896 GIM_Reject, // Label 346: @7897 GIM_Reject, // Label 264: @7898 GIM_Try, /*On fail goto*//*Label 350*/ 8358, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, GIM_Try, /*On fail goto*//*Label 351*/ 7973, // Rule ID 4070 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (KANDNBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KANDNBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4070, GIR_Done, // Label 351: @7973 GIM_Try, /*On fail goto*//*Label 352*/ 8084, // Rule ID 17926 // GIM_CheckFeatures, GIFBS_NoDQI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 17926, GIR_Done, // Label 352: @8084 GIM_Try, /*On fail goto*//*Label 353*/ 8145, // Rule ID 21561 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (KANDNBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KANDNBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21561, GIR_Done, // Label 353: @8145 GIM_Try, /*On fail goto*//*Label 354*/ 8256, // Rule ID 23232 // GIM_CheckFeatures, GIFBS_NoDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 23232, GIR_Done, // Label 354: @8256 GIM_Try, /*On fail goto*//*Label 355*/ 8275, // Rule ID 4054 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KANDBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4054, GIR_Done, // Label 355: @8275 GIM_Try, /*On fail goto*//*Label 356*/ 8357, // Rule ID 17922 // GIM_CheckFeatures, GIFBS_NoDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 17922, GIR_Done, // Label 356: @8357 GIM_Reject, // Label 350: @8358 GIM_Reject, // Label 265: @8359 GIM_Try, /*On fail goto*//*Label 357*/ 8439, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 358*/ 8392, // Rule ID 16594 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPANDrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16594, GIR_Done, // Label 358: @8392 GIM_Try, /*On fail goto*//*Label 359*/ 8415, // Rule ID 16618 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PANDrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16618, GIR_Done, // Label 359: @8415 GIM_Try, /*On fail goto*//*Label 360*/ 8438, // Rule ID 18502 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (and:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPANDQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18502, GIR_Done, // Label 360: @8438 GIM_Reject, // Label 357: @8439 GIM_Reject, // Label 266: @8440 GIM_Try, /*On fail goto*//*Label 361*/ 8520, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 362*/ 8473, // Rule ID 5361 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (and:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPANDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5361, GIR_Done, // Label 362: @8473 GIM_Try, /*On fail goto*//*Label 363*/ 8496, // Rule ID 16539 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPANDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16539, GIR_Done, // Label 363: @8496 GIM_Try, /*On fail goto*//*Label 364*/ 8519, // Rule ID 16563 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VANDPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16563, GIR_Done, // Label 364: @8519 GIM_Reject, // Label 361: @8520 GIM_Reject, // Label 267: @8521 GIM_Try, /*On fail goto*//*Label 365*/ 8552, // Rule ID 5325 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (and:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPANDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5325, GIR_Done, // Label 365: @8552 GIM_Reject, // Label 268: @8553 GIM_Try, /*On fail goto*//*Label 366*/ 8709, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_Try, /*On fail goto*//*Label 367*/ 8628, // Rule ID 4071 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v16i1] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] }), VK16:{ *:[v16i1] }:$src2) => (KANDNWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KANDNWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4071, GIR_Done, // Label 367: @8628 GIM_Try, /*On fail goto*//*Label 368*/ 8689, // Rule ID 21562 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src2, (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] })) => (KANDNWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KANDNWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21562, GIR_Done, // Label 368: @8689 GIM_Try, /*On fail goto*//*Label 369*/ 8708, // Rule ID 4055 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, // (and:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KANDWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4055, GIR_Done, // Label 369: @8708 GIM_Reject, // Label 366: @8709 GIM_Reject, // Label 269: @8710 GIM_Try, /*On fail goto*//*Label 370*/ 8790, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 371*/ 8743, // Rule ID 16593 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPANDrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16593, GIR_Done, // Label 371: @8743 GIM_Try, /*On fail goto*//*Label 372*/ 8766, // Rule ID 16617 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PANDrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16617, GIR_Done, // Label 372: @8766 GIM_Try, /*On fail goto*//*Label 373*/ 8789, // Rule ID 18501 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (and:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPANDQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18501, GIR_Done, // Label 373: @8789 GIM_Reject, // Label 370: @8790 GIM_Reject, // Label 270: @8791 GIM_Try, /*On fail goto*//*Label 374*/ 8871, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 375*/ 8824, // Rule ID 16538 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPANDYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16538, GIR_Done, // Label 375: @8824 GIM_Try, /*On fail goto*//*Label 376*/ 8847, // Rule ID 16562 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VANDPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16562, GIR_Done, // Label 376: @8847 GIM_Try, /*On fail goto*//*Label 377*/ 8870, // Rule ID 18518 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (and:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPANDQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18518, GIR_Done, // Label 377: @8870 GIM_Reject, // Label 374: @8871 GIM_Reject, // Label 271: @8872 GIM_Try, /*On fail goto*//*Label 378*/ 8903, // Rule ID 5352 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (and:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPANDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5352, GIR_Done, // Label 378: @8903 GIM_Reject, // Label 272: @8904 GIM_Try, /*On fail goto*//*Label 379*/ 9060, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_Try, /*On fail goto*//*Label 380*/ 8979, // Rule ID 4072 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v32i1] } (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] }), VK32:{ *:[v32i1] }:$src2) => (KANDNDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KANDNDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4072, GIR_Done, // Label 380: @8979 GIM_Try, /*On fail goto*//*Label 381*/ 9040, // Rule ID 21563 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src2, (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] })) => (KANDNDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KANDNDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21563, GIR_Done, // Label 381: @9040 GIM_Try, /*On fail goto*//*Label 382*/ 9059, // Rule ID 4056 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, // (and:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KANDDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4056, GIR_Done, // Label 382: @9059 GIM_Reject, // Label 379: @9060 GIM_Reject, // Label 273: @9061 GIM_Try, /*On fail goto*//*Label 383*/ 9141, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 384*/ 9094, // Rule ID 16537 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPANDYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16537, GIR_Done, // Label 384: @9094 GIM_Try, /*On fail goto*//*Label 385*/ 9117, // Rule ID 16561 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VANDPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16561, GIR_Done, // Label 385: @9117 GIM_Try, /*On fail goto*//*Label 386*/ 9140, // Rule ID 18517 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (and:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPANDQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18517, GIR_Done, // Label 386: @9140 GIM_Reject, // Label 383: @9141 GIM_Reject, // Label 274: @9142 GIM_Try, /*On fail goto*//*Label 387*/ 9173, // Rule ID 18534 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (and:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPANDQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18534, GIR_Done, // Label 387: @9173 GIM_Reject, // Label 275: @9174 GIM_Try, /*On fail goto*//*Label 388*/ 9330, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_Try, /*On fail goto*//*Label 389*/ 9249, // Rule ID 4073 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v64i1] } (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] }), VK64:{ *:[v64i1] }:$src2) => (KANDNQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KANDNQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4073, GIR_Done, // Label 389: @9249 GIM_Try, /*On fail goto*//*Label 390*/ 9310, // Rule ID 21564 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src2, (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] })) => (KANDNQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KANDNQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21564, GIR_Done, // Label 390: @9310 GIM_Try, /*On fail goto*//*Label 391*/ 9329, // Rule ID 4057 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, // (and:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KANDQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4057, GIR_Done, // Label 391: @9329 GIM_Reject, // Label 388: @9330 GIM_Reject, // Label 276: @9331 GIM_Try, /*On fail goto*//*Label 392*/ 9362, // Rule ID 18533 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (and:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPANDQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18533, GIR_Done, // Label 392: @9362 GIM_Reject, // Label 277: @9363 GIM_Reject, // Label 4: @9364 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 25, /*)*//*default:*//*Label 416*/ 13233, /*GILLT_s1*//*Label 393*/ 9395, /*GILLT_s8*//*Label 394*/ 9488, /*GILLT_s16*//*Label 395*/ 9554, /*GILLT_s32*//*Label 396*/ 9853, /*GILLT_s64*//*Label 397*/ 10958, 0, 0, /*GILLT_v2s1*//*Label 398*/ 12066, /*GILLT_v2s64*//*Label 399*/ 12159, /*GILLT_v4s1*//*Label 400*/ 12240, /*GILLT_v4s32*//*Label 401*/ 12333, /*GILLT_v4s64*//*Label 402*/ 12414, /*GILLT_v8s1*//*Label 403*/ 12495, /*GILLT_v8s16*//*Label 404*/ 12604, /*GILLT_v8s32*//*Label 405*/ 12685, /*GILLT_v8s64*//*Label 406*/ 12766, /*GILLT_v16s1*//*Label 407*/ 12798, /*GILLT_v16s8*//*Label 408*/ 12830, /*GILLT_v16s16*//*Label 409*/ 12911, /*GILLT_v16s32*//*Label 410*/ 12992, /*GILLT_v32s1*//*Label 411*/ 13024, /*GILLT_v32s8*//*Label 412*/ 13056, /*GILLT_v32s16*//*Label 413*/ 13137, /*GILLT_v64s1*//*Label 414*/ 13169, /*GILLT_v64s8*//*Label 415*/ 13201, // Label 393: @9395 GIM_Try, /*On fail goto*//*Label 417*/ 9487, // Rule ID 17931 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, // (or:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK1RegClassID, // GIR_Coverage, 17931, GIR_Done, // Label 417: @9487 GIM_Reject, // Label 394: @9488 GIM_Try, /*On fail goto*//*Label 418*/ 9553, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 419*/ 9536, // Rule ID 15673 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (OR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15673, GIR_Done, // Label 419: @9536 GIM_Try, /*On fail goto*//*Label 420*/ 9552, // Rule ID 21063 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (OR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21063, GIR_Done, // Label 420: @9552 GIM_Reject, // Label 418: @9553 GIM_Reject, // Label 395: @9554 GIM_Try, /*On fail goto*//*Label 421*/ 9852, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 422*/ 9664, // Rule ID 23893 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i16] } (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTS16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23893, GIR_Done, // Label 422: @9664 GIM_Try, /*On fail goto*//*Label 423*/ 9760, // Rule ID 20978 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTS16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20978, GIR_Done, // Label 423: @9760 GIM_Try, /*On fail goto*//*Label 424*/ 9797, // Rule ID 15676 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (OR16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15676, GIR_Done, // Label 424: @9797 GIM_Try, /*On fail goto*//*Label 425*/ 9831, // Rule ID 15674 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (OR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15674, GIR_Done, // Label 425: @9831 GIM_Try, /*On fail goto*//*Label 426*/ 9851, // Rule ID 15666 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (OR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15666, GIR_Done, // Label 426: @9851 GIM_Reject, // Label 421: @9852 GIM_Reject, // Label 396: @9853 GIM_Try, /*On fail goto*//*Label 427*/ 10957, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 428*/ 9934, // Rule ID 22881 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22881, GIR_Done, // Label 428: @9934 GIM_Try, /*On fail goto*//*Label 429*/ 10009, // Rule ID 22883 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22883, GIR_Done, // Label 429: @10009 GIM_Try, /*On fail goto*//*Label 430*/ 10084, // Rule ID 22869 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22869, GIR_Done, // Label 430: @10084 GIM_Try, /*On fail goto*//*Label 431*/ 10159, // Rule ID 15938 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15938, GIR_Done, // Label 431: @10159 GIM_Try, /*On fail goto*//*Label 432*/ 10234, // Rule ID 15940 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15940, GIR_Done, // Label 432: @10234 GIM_Try, /*On fail goto*//*Label 433*/ 10309, // Rule ID 15926 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] })) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15926, GIR_Done, // Label 433: @10309 GIM_Try, /*On fail goto*//*Label 434*/ 10363, // Rule ID 22877 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22877, GIR_Done, // Label 434: @10363 GIM_Try, /*On fail goto*//*Label 435*/ 10417, // Rule ID 22879 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22879, GIR_Done, // Label 435: @10417 GIM_Try, /*On fail goto*//*Label 436*/ 10521, // Rule ID 23899 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23899, GIR_Done, // Label 436: @10521 GIM_Try, /*On fail goto*//*Label 437*/ 10575, // Rule ID 22871 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22871, GIR_Done, // Label 437: @10575 GIM_Try, /*On fail goto*//*Label 438*/ 10629, // Rule ID 15934 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15934, GIR_Done, // Label 438: @10629 GIM_Try, /*On fail goto*//*Label 439*/ 10683, // Rule ID 15936 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15936, GIR_Done, // Label 439: @10683 GIM_Try, /*On fail goto*//*Label 440*/ 10787, // Rule ID 20984 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20984, GIR_Done, // Label 440: @10787 GIM_Try, /*On fail goto*//*Label 441*/ 10841, // Rule ID 15928 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15928, GIR_Done, // Label 441: @10841 GIM_Try, /*On fail goto*//*Label 442*/ 10886, // Rule ID 15677 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (OR32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15677, GIR_Done, // Label 442: @10886 GIM_Try, /*On fail goto*//*Label 443*/ 10928, // Rule ID 15675 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (OR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15675, GIR_Done, // Label 443: @10928 GIM_Try, /*On fail goto*//*Label 444*/ 10956, // Rule ID 15667 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (OR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15667, GIR_Done, // Label 444: @10956 GIM_Reject, // Label 427: @10957 GIM_Reject, // Label 397: @10958 GIM_Try, /*On fail goto*//*Label 445*/ 12065, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 446*/ 11039, // Rule ID 22882 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22882, GIR_Done, // Label 446: @11039 GIM_Try, /*On fail goto*//*Label 447*/ 11114, // Rule ID 22884 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22884, GIR_Done, // Label 447: @11114 GIM_Try, /*On fail goto*//*Label 448*/ 11189, // Rule ID 22870 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22870, GIR_Done, // Label 448: @11189 GIM_Try, /*On fail goto*//*Label 449*/ 11264, // Rule ID 15939 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15939, GIR_Done, // Label 449: @11264 GIM_Try, /*On fail goto*//*Label 450*/ 11339, // Rule ID 15941 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15941, GIR_Done, // Label 450: @11339 GIM_Try, /*On fail goto*//*Label 451*/ 11414, // Rule ID 15927 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] })) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15927, GIR_Done, // Label 451: @11414 GIM_Try, /*On fail goto*//*Label 452*/ 11468, // Rule ID 22878 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22878, GIR_Done, // Label 452: @11468 GIM_Try, /*On fail goto*//*Label 453*/ 11522, // Rule ID 22880 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22880, GIR_Done, // Label 453: @11522 GIM_Try, /*On fail goto*//*Label 454*/ 11626, // Rule ID 23905 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23905, GIR_Done, // Label 454: @11626 GIM_Try, /*On fail goto*//*Label 455*/ 11680, // Rule ID 22872 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22872, GIR_Done, // Label 455: @11680 GIM_Try, /*On fail goto*//*Label 456*/ 11734, // Rule ID 15935 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15935, GIR_Done, // Label 456: @11734 GIM_Try, /*On fail goto*//*Label 457*/ 11788, // Rule ID 15937 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15937, GIR_Done, // Label 457: @11788 GIM_Try, /*On fail goto*//*Label 458*/ 11892, // Rule ID 20990 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20990, GIR_Done, // Label 458: @11892 GIM_Try, /*On fail goto*//*Label 459*/ 11946, // Rule ID 15929 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15929, GIR_Done, // Label 459: @11946 GIM_Try, /*On fail goto*//*Label 460*/ 11991, // Rule ID 15678 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (OR64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15678, GIR_Done, // Label 460: @11991 GIM_Try, /*On fail goto*//*Label 461*/ 12036, // Rule ID 15679 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (OR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15679, GIR_Done, // Label 461: @12036 GIM_Try, /*On fail goto*//*Label 462*/ 12064, // Rule ID 15668 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (OR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15668, GIR_Done, // Label 462: @12064 GIM_Reject, // Label 445: @12065 GIM_Reject, // Label 398: @12066 GIM_Try, /*On fail goto*//*Label 463*/ 12158, // Rule ID 17932 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK2RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, // (or:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 17932, GIR_Done, // Label 463: @12158 GIM_Reject, // Label 399: @12159 GIM_Try, /*On fail goto*//*Label 464*/ 12239, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 465*/ 12192, // Rule ID 1848 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1848, GIR_Done, // Label 465: @12192 GIM_Try, /*On fail goto*//*Label 466*/ 12215, // Rule ID 1850 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1850, GIR_Done, // Label 466: @12215 GIM_Try, /*On fail goto*//*Label 467*/ 12238, // Rule ID 5397 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (or:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5397, GIR_Done, // Label 467: @12238 GIM_Reject, // Label 464: @12239 GIM_Reject, // Label 400: @12240 GIM_Try, /*On fail goto*//*Label 468*/ 12332, // Rule ID 17933 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK4RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, // (or:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 17933, GIR_Done, // Label 468: @12332 GIM_Reject, // Label 401: @12333 GIM_Try, /*On fail goto*//*Label 469*/ 12413, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 470*/ 12366, // Rule ID 5424 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (or:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPORDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5424, GIR_Done, // Label 470: @12366 GIM_Try, /*On fail goto*//*Label 471*/ 12389, // Rule ID 16598 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16598, GIR_Done, // Label 471: @12389 GIM_Try, /*On fail goto*//*Label 472*/ 12412, // Rule ID 16622 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16622, GIR_Done, // Label 472: @12412 GIM_Reject, // Label 469: @12413 GIM_Reject, // Label 402: @12414 GIM_Try, /*On fail goto*//*Label 473*/ 12494, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 474*/ 12447, // Rule ID 1852 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1852, GIR_Done, // Label 474: @12447 GIM_Try, /*On fail goto*//*Label 475*/ 12470, // Rule ID 5388 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (or:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5388, GIR_Done, // Label 475: @12470 GIM_Try, /*On fail goto*//*Label 476*/ 12493, // Rule ID 16568 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16568, GIR_Done, // Label 476: @12493 GIM_Reject, // Label 473: @12494 GIM_Reject, // Label 403: @12495 GIM_Try, /*On fail goto*//*Label 477*/ 12603, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_Try, /*On fail goto*//*Label 478*/ 12528, // Rule ID 4058 // GIM_CheckFeatures, GIFBS_HasDQI, // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4058, GIR_Done, // Label 478: @12528 GIM_Try, /*On fail goto*//*Label 479*/ 12602, // Rule ID 17930 // GIM_CheckFeatures, GIFBS_NoDQI, // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 17930, GIR_Done, // Label 479: @12602 GIM_Reject, // Label 477: @12603 GIM_Reject, // Label 404: @12604 GIM_Try, /*On fail goto*//*Label 480*/ 12684, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 481*/ 12637, // Rule ID 16597 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16597, GIR_Done, // Label 481: @12637 GIM_Try, /*On fail goto*//*Label 482*/ 12660, // Rule ID 16621 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16621, GIR_Done, // Label 482: @12660 GIM_Try, /*On fail goto*//*Label 483*/ 12683, // Rule ID 18504 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (or:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPORQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18504, GIR_Done, // Label 483: @12683 GIM_Reject, // Label 480: @12684 GIM_Reject, // Label 405: @12685 GIM_Try, /*On fail goto*//*Label 484*/ 12765, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 485*/ 12718, // Rule ID 5415 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (or:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPORDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5415, GIR_Done, // Label 485: @12718 GIM_Try, /*On fail goto*//*Label 486*/ 12741, // Rule ID 16542 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPORYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16542, GIR_Done, // Label 486: @12741 GIM_Try, /*On fail goto*//*Label 487*/ 12764, // Rule ID 16567 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VORPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16567, GIR_Done, // Label 487: @12764 GIM_Reject, // Label 484: @12765 GIM_Reject, // Label 406: @12766 GIM_Try, /*On fail goto*//*Label 488*/ 12797, // Rule ID 5379 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (or:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5379, GIR_Done, // Label 488: @12797 GIM_Reject, // Label 407: @12798 GIM_Try, /*On fail goto*//*Label 489*/ 12829, // Rule ID 4059 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, // (or:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4059, GIR_Done, // Label 489: @12829 GIM_Reject, // Label 408: @12830 GIM_Try, /*On fail goto*//*Label 490*/ 12910, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 491*/ 12863, // Rule ID 16596 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16596, GIR_Done, // Label 491: @12863 GIM_Try, /*On fail goto*//*Label 492*/ 12886, // Rule ID 16620 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16620, GIR_Done, // Label 492: @12886 GIM_Try, /*On fail goto*//*Label 493*/ 12909, // Rule ID 18503 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (or:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPORQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18503, GIR_Done, // Label 493: @12909 GIM_Reject, // Label 490: @12910 GIM_Reject, // Label 409: @12911 GIM_Try, /*On fail goto*//*Label 494*/ 12991, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 495*/ 12944, // Rule ID 16541 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPORYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16541, GIR_Done, // Label 495: @12944 GIM_Try, /*On fail goto*//*Label 496*/ 12967, // Rule ID 16566 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VORPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16566, GIR_Done, // Label 496: @12967 GIM_Try, /*On fail goto*//*Label 497*/ 12990, // Rule ID 18520 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (or:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPORQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18520, GIR_Done, // Label 497: @12990 GIM_Reject, // Label 494: @12991 GIM_Reject, // Label 410: @12992 GIM_Try, /*On fail goto*//*Label 498*/ 13023, // Rule ID 5406 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (or:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPORDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5406, GIR_Done, // Label 498: @13023 GIM_Reject, // Label 411: @13024 GIM_Try, /*On fail goto*//*Label 499*/ 13055, // Rule ID 4060 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, // (or:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4060, GIR_Done, // Label 499: @13055 GIM_Reject, // Label 412: @13056 GIM_Try, /*On fail goto*//*Label 500*/ 13136, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 501*/ 13089, // Rule ID 16540 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPORYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16540, GIR_Done, // Label 501: @13089 GIM_Try, /*On fail goto*//*Label 502*/ 13112, // Rule ID 16565 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VORPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16565, GIR_Done, // Label 502: @13112 GIM_Try, /*On fail goto*//*Label 503*/ 13135, // Rule ID 18519 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (or:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPORQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18519, GIR_Done, // Label 503: @13135 GIM_Reject, // Label 500: @13136 GIM_Reject, // Label 413: @13137 GIM_Try, /*On fail goto*//*Label 504*/ 13168, // Rule ID 18536 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (or:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPORQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18536, GIR_Done, // Label 504: @13168 GIM_Reject, // Label 414: @13169 GIM_Try, /*On fail goto*//*Label 505*/ 13200, // Rule ID 4061 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, // (or:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4061, GIR_Done, // Label 505: @13200 GIM_Reject, // Label 415: @13201 GIM_Try, /*On fail goto*//*Label 506*/ 13232, // Rule ID 18535 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (or:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPORQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18535, GIR_Done, // Label 506: @13232 GIM_Reject, // Label 416: @13233 GIM_Reject, // Label 5: @13234 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 25, /*)*//*default:*//*Label 530*/ 20964, /*GILLT_s1*//*Label 507*/ 13265, /*GILLT_s8*//*Label 508*/ 13772, /*GILLT_s16*//*Label 509*/ 13885, /*GILLT_s32*//*Label 510*/ 14239, /*GILLT_s64*//*Label 511*/ 14857, 0, 0, /*GILLT_v2s1*//*Label 512*/ 15441, /*GILLT_v2s64*//*Label 513*/ 15932, /*GILLT_v4s1*//*Label 514*/ 16273, /*GILLT_v4s32*//*Label 515*/ 16764, /*GILLT_v4s64*//*Label 516*/ 17105, /*GILLT_v8s1*//*Label 517*/ 17446, /*GILLT_v8s16*//*Label 518*/ 18185, /*GILLT_v8s32*//*Label 519*/ 18526, /*GILLT_v8s64*//*Label 520*/ 18867, /*GILLT_v16s1*//*Label 521*/ 18945, /*GILLT_v16s8*//*Label 522*/ 19199, /*GILLT_v16s16*//*Label 523*/ 19540, /*GILLT_v16s32*//*Label 524*/ 19881, /*GILLT_v32s1*//*Label 525*/ 19959, /*GILLT_v32s8*//*Label 526*/ 20213, /*GILLT_v32s16*//*Label 527*/ 20554, /*GILLT_v64s1*//*Label 528*/ 20632, /*GILLT_v64s8*//*Label 529*/ 20886, // Label 507: @13265 GIM_Try, /*On fail goto*//*Label 531*/ 13771, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1, GIM_Try, /*On fail goto*//*Label 532*/ 13388, // Rule ID 23238 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK1RegClassID, // GIR_Coverage, 23238, GIR_Done, // Label 532: @13388 GIM_Try, /*On fail goto*//*Label 533*/ 13501, // Rule ID 17935 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2), immAllOnesV:{ *:[v1i1] }) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK1RegClassID, // GIR_Coverage, 17935, GIR_Done, // Label 533: @13501 GIM_Try, /*On fail goto*//*Label 534*/ 13614, // Rule ID 23239 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, immAllOnesV:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK1RegClassID, // GIR_Coverage, 23239, GIR_Done, // Label 534: @13614 GIM_Try, /*On fail goto*//*Label 535*/ 13686, // Rule ID 17921 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK2RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src, immAllOnesV:{ *:[v1i1] }) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KNOTWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KNOTWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 17921, GIR_Done, // Label 535: @13686 GIM_Try, /*On fail goto*//*Label 536*/ 13770, // Rule ID 17939 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK1RegClassID, // GIR_Coverage, 17939, GIR_Done, // Label 536: @13770 GIM_Reject, // Label 531: @13771 GIM_Reject, // Label 508: @13772 GIM_Try, /*On fail goto*//*Label 537*/ 13884, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 538*/ 13815, // Rule ID 20856 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -128, // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -128:{ *:[i8] }) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, -128:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20856, GIR_Done, // Label 538: @13815 GIM_Try, /*On fail goto*//*Label 539*/ 13837, // Rule ID 165 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -1:{ *:[i8] }) => (NOT8r:{ *:[i8] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT8r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 165, GIR_Done, // Label 539: @13837 GIM_Try, /*On fail goto*//*Label 540*/ 13867, // Rule ID 15688 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (XOR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15688, GIR_Done, // Label 540: @13867 GIM_Try, /*On fail goto*//*Label 541*/ 13883, // Rule ID 15680 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (XOR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15680, GIR_Done, // Label 541: @13883 GIM_Reject, // Label 537: @13884 GIM_Reject, // Label 509: @13885 GIM_Try, /*On fail goto*//*Label 542*/ 14238, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 543*/ 13928, // Rule ID 20857 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -32768, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -32768:{ *:[i16] }) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -32768:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-32768, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20857, GIR_Done, // Label 543: @13928 GIM_Try, /*On fail goto*//*Label 544*/ 14024, // Rule ID 23894 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i16] } (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTC16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23894, GIR_Done, // Label 544: @14024 GIM_Try, /*On fail goto*//*Label 545*/ 14120, // Rule ID 20979 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTC16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20979, GIR_Done, // Label 545: @14120 GIM_Try, /*On fail goto*//*Label 546*/ 14146, // Rule ID 166 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -1:{ *:[i16] }) => (NOT16r:{ *:[i16] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT16r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 166, GIR_Done, // Label 546: @14146 GIM_Try, /*On fail goto*//*Label 547*/ 14183, // Rule ID 15691 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (XOR16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15691, GIR_Done, // Label 547: @14183 GIM_Try, /*On fail goto*//*Label 548*/ 14217, // Rule ID 15689 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (XOR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15689, GIR_Done, // Label 548: @14217 GIM_Try, /*On fail goto*//*Label 549*/ 14237, // Rule ID 15681 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (XOR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15681, GIR_Done, // Label 549: @14237 GIM_Reject, // Label 542: @14238 GIM_Reject, // Label 510: @14239 GIM_Try, /*On fail goto*//*Label 550*/ 14856, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 551*/ 14282, // Rule ID 20858 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -2147483648, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -2147483648:{ *:[i32] }) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -2147483648:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-2147483648, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20858, GIR_Done, // Label 551: @14282 GIM_Try, /*On fail goto*//*Label 552*/ 14336, // Rule ID 22857 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22857, GIR_Done, // Label 552: @14336 GIM_Try, /*On fail goto*//*Label 553*/ 14390, // Rule ID 22875 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22875, GIR_Done, // Label 553: @14390 GIM_Try, /*On fail goto*//*Label 554*/ 14494, // Rule ID 23900 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23900, GIR_Done, // Label 554: @14494 GIM_Try, /*On fail goto*//*Label 555*/ 14548, // Rule ID 15908 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15908, GIR_Done, // Label 555: @14548 GIM_Try, /*On fail goto*//*Label 556*/ 14602, // Rule ID 15932 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15932, GIR_Done, // Label 556: @14602 GIM_Try, /*On fail goto*//*Label 557*/ 14706, // Rule ID 20985 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20985, GIR_Done, // Label 557: @14706 GIM_Try, /*On fail goto*//*Label 558*/ 14740, // Rule ID 167 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }) => (NOT32r:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT32r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 167, GIR_Done, // Label 558: @14740 GIM_Try, /*On fail goto*//*Label 559*/ 14785, // Rule ID 15692 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (XOR32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15692, GIR_Done, // Label 559: @14785 GIM_Try, /*On fail goto*//*Label 560*/ 14827, // Rule ID 15690 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (XOR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15690, GIR_Done, // Label 560: @14827 GIM_Try, /*On fail goto*//*Label 561*/ 14855, // Rule ID 15682 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (XOR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15682, GIR_Done, // Label 561: @14855 GIM_Reject, // Label 550: @14856 GIM_Reject, // Label 511: @14857 GIM_Try, /*On fail goto*//*Label 562*/ 15440, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 563*/ 14917, // Rule ID 22858 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22858, GIR_Done, // Label 563: @14917 GIM_Try, /*On fail goto*//*Label 564*/ 14971, // Rule ID 22876 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22876, GIR_Done, // Label 564: @14971 GIM_Try, /*On fail goto*//*Label 565*/ 15075, // Rule ID 23906 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23906, GIR_Done, // Label 565: @15075 GIM_Try, /*On fail goto*//*Label 566*/ 15129, // Rule ID 15909 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15909, GIR_Done, // Label 566: @15129 GIM_Try, /*On fail goto*//*Label 567*/ 15183, // Rule ID 15933 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15933, GIR_Done, // Label 567: @15183 GIM_Try, /*On fail goto*//*Label 568*/ 15287, // Rule ID 20991 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20991, GIR_Done, // Label 568: @15287 GIM_Try, /*On fail goto*//*Label 569*/ 15321, // Rule ID 168 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }) => (NOT64r:{ *:[i64] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT64r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 168, GIR_Done, // Label 569: @15321 GIM_Try, /*On fail goto*//*Label 570*/ 15366, // Rule ID 15693 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (XOR64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15693, GIR_Done, // Label 570: @15366 GIM_Try, /*On fail goto*//*Label 571*/ 15411, // Rule ID 15694 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (XOR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15694, GIR_Done, // Label 571: @15411 GIM_Try, /*On fail goto*//*Label 572*/ 15439, // Rule ID 15683 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (XOR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15683, GIR_Done, // Label 572: @15439 GIM_Reject, // Label 562: @15440 GIM_Reject, // Label 512: @15441 GIM_Try, /*On fail goto*//*Label 573*/ 15931, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK2RegClassID, GIM_Try, /*On fail goto*//*Label 574*/ 15564, // Rule ID 23240 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v2i1] } (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] }), VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 23240, GIR_Done, // Label 574: @15564 GIM_Try, /*On fail goto*//*Label 575*/ 15673, // Rule ID 17936 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK2RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v2i1] } (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2), immAllOnesV:{ *:[v2i1] }) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 17936, GIR_Done, // Label 575: @15673 GIM_Try, /*On fail goto*//*Label 576*/ 15782, // Rule ID 23241 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src2, (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, immAllOnesV:{ *:[v2i1] })) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 23241, GIR_Done, // Label 576: @15782 GIM_Try, /*On fail goto*//*Label 577*/ 15850, // Rule ID 17920 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src, immAllOnesV:{ *:[v2i1] }) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KNOTWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KNOTWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 17920, GIR_Done, // Label 577: @15850 GIM_Try, /*On fail goto*//*Label 578*/ 15930, // Rule ID 17940 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 17940, GIR_Done, // Label 578: @15930 GIM_Reject, // Label 573: @15931 GIM_Reject, // Label 513: @15932 GIM_Try, /*On fail goto*//*Label 579*/ 16272, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 580*/ 16151, // Rule ID 20365 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src, immAllOnesV:{ *:[v2i64] }) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/6, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/6, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPTERNLOGQZrri, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/5, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20365, GIR_Done, // Label 580: @16151 GIM_Try, /*On fail goto*//*Label 581*/ 16202, // Rule ID 20373 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src, immAllOnesV:{ *:[v2i64] }) => (VPTERNLOGQZ128rri:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src, VR128X:{ *:[v2i64] }:$src, VR128X:{ *:[v2i64] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZ128rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20373, GIR_Done, // Label 581: @16202 GIM_Try, /*On fail goto*//*Label 582*/ 16225, // Rule ID 1854 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1854, GIR_Done, // Label 582: @16225 GIM_Try, /*On fail goto*//*Label 583*/ 16248, // Rule ID 1856 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1856, GIR_Done, // Label 583: @16248 GIM_Try, /*On fail goto*//*Label 584*/ 16271, // Rule ID 5451 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPXORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5451, GIR_Done, // Label 584: @16271 GIM_Reject, // Label 579: @16272 GIM_Reject, // Label 514: @16273 GIM_Try, /*On fail goto*//*Label 585*/ 16763, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK4RegClassID, GIM_Try, /*On fail goto*//*Label 586*/ 16396, // Rule ID 23242 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v4i1] } (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] }), VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 23242, GIR_Done, // Label 586: @16396 GIM_Try, /*On fail goto*//*Label 587*/ 16505, // Rule ID 17937 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK4RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v4i1] } (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2), immAllOnesV:{ *:[v4i1] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 17937, GIR_Done, // Label 587: @16505 GIM_Try, /*On fail goto*//*Label 588*/ 16614, // Rule ID 23243 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src2, (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, immAllOnesV:{ *:[v4i1] })) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 23243, GIR_Done, // Label 588: @16614 GIM_Try, /*On fail goto*//*Label 589*/ 16682, // Rule ID 17919 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src, immAllOnesV:{ *:[v4i1] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KNOTWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KNOTWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 17919, GIR_Done, // Label 589: @16682 GIM_Try, /*On fail goto*//*Label 590*/ 16762, // Rule ID 17941 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 17941, GIR_Done, // Label 590: @16762 GIM_Reject, // Label 585: @16763 GIM_Reject, // Label 515: @16764 GIM_Try, /*On fail goto*//*Label 591*/ 17104, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 592*/ 16983, // Rule ID 20364 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src, immAllOnesV:{ *:[v4i32] }) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/6, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/6, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPTERNLOGQZrri, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/5, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20364, GIR_Done, // Label 592: @16983 GIM_Try, /*On fail goto*//*Label 593*/ 17034, // Rule ID 20372 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src, immAllOnesV:{ *:[v4i32] }) => (VPTERNLOGQZ128rri:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src, VR128X:{ *:[v4i32] }:$src, VR128X:{ *:[v4i32] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZ128rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20372, GIR_Done, // Label 593: @17034 GIM_Try, /*On fail goto*//*Label 594*/ 17057, // Rule ID 5478 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPXORDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5478, GIR_Done, // Label 594: @17057 GIM_Try, /*On fail goto*//*Label 595*/ 17080, // Rule ID 16601 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPXORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16601, GIR_Done, // Label 595: @17080 GIM_Try, /*On fail goto*//*Label 596*/ 17103, // Rule ID 16625 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PXORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16625, GIR_Done, // Label 596: @17103 GIM_Reject, // Label 591: @17104 GIM_Reject, // Label 516: @17105 GIM_Try, /*On fail goto*//*Label 597*/ 17445, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 598*/ 17324, // Rule ID 20369 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src, immAllOnesV:{ *:[v4i64] }) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/6, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/6, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPTERNLOGQZrri, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/5, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20369, GIR_Done, // Label 598: @17324 GIM_Try, /*On fail goto*//*Label 599*/ 17375, // Rule ID 20377 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src, immAllOnesV:{ *:[v4i64] }) => (VPTERNLOGQZ256rri:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src, VR256X:{ *:[v4i64] }:$src, VR256X:{ *:[v4i64] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZ256rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20377, GIR_Done, // Label 599: @17375 GIM_Try, /*On fail goto*//*Label 600*/ 17398, // Rule ID 1858 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPXORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1858, GIR_Done, // Label 600: @17398 GIM_Try, /*On fail goto*//*Label 601*/ 17421, // Rule ID 5442 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPXORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5442, GIR_Done, // Label 601: @17421 GIM_Try, /*On fail goto*//*Label 602*/ 17444, // Rule ID 16572 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VXORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16572, GIR_Done, // Label 602: @17444 GIM_Reject, // Label 597: @17445 GIM_Reject, // Label 517: @17446 GIM_Try, /*On fail goto*//*Label 603*/ 18184, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, GIM_Try, /*On fail goto*//*Label 604*/ 17521, // Rule ID 21553 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (KXNORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21553, GIR_Done, // Label 604: @17521 GIM_Try, /*On fail goto*//*Label 605*/ 17632, // Rule ID 23236 // GIM_CheckFeatures, GIFBS_NoDQI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] }), VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 23236, GIR_Done, // Label 605: @17632 GIM_Try, /*On fail goto*//*Label 606*/ 17693, // Rule ID 4062 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2), immAllOnesV:{ *:[v8i1] }) => (KXNORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4062, GIR_Done, // Label 606: @17693 GIM_Try, /*On fail goto*//*Label 607*/ 17804, // Rule ID 17934 // GIM_CheckFeatures, GIFBS_NoDQI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v8i1] } (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2), immAllOnesV:{ *:[v8i1] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 17934, GIR_Done, // Label 607: @17804 GIM_Try, /*On fail goto*//*Label 608*/ 17865, // Rule ID 21554 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (KXNORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21554, GIR_Done, // Label 608: @17865 GIM_Try, /*On fail goto*//*Label 609*/ 17976, // Rule ID 23237 // GIM_CheckFeatures, GIFBS_NoDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src2, (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, immAllOnesV:{ *:[v8i1] })) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 23237, GIR_Done, // Label 609: @17976 GIM_Try, /*On fail goto*//*Label 610*/ 18012, // Rule ID 4050 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src, immAllOnesV:{ *:[v8i1] }) => (KNOTBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KNOTBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4050, GIR_Done, // Label 610: @18012 GIM_Try, /*On fail goto*//*Label 611*/ 18082, // Rule ID 17918 // GIM_CheckFeatures, GIFBS_HasAVX512_NoDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src, immAllOnesV:{ *:[v8i1] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KNOTWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KNOTWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 17918, GIR_Done, // Label 611: @18082 GIM_Try, /*On fail goto*//*Label 612*/ 18101, // Rule ID 4066 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KXORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4066, GIR_Done, // Label 612: @18101 GIM_Try, /*On fail goto*//*Label 613*/ 18183, // Rule ID 17938 // GIM_CheckFeatures, GIFBS_NoDQI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 17938, GIR_Done, // Label 613: @18183 GIM_Reject, // Label 603: @18184 GIM_Reject, // Label 518: @18185 GIM_Try, /*On fail goto*//*Label 614*/ 18525, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 615*/ 18404, // Rule ID 20363 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src, immAllOnesV:{ *:[v8i16] }) => (EXTRACT_SUBREG:{ *:[v8i16] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/6, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/6, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPTERNLOGQZrri, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/5, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20363, GIR_Done, // Label 615: @18404 GIM_Try, /*On fail goto*//*Label 616*/ 18455, // Rule ID 20371 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src, immAllOnesV:{ *:[v8i16] }) => (VPTERNLOGQZ128rri:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src, VR128X:{ *:[v8i16] }:$src, VR128X:{ *:[v8i16] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZ128rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20371, GIR_Done, // Label 616: @18455 GIM_Try, /*On fail goto*//*Label 617*/ 18478, // Rule ID 16600 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPXORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16600, GIR_Done, // Label 617: @18478 GIM_Try, /*On fail goto*//*Label 618*/ 18501, // Rule ID 16624 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PXORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16624, GIR_Done, // Label 618: @18501 GIM_Try, /*On fail goto*//*Label 619*/ 18524, // Rule ID 18506 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPXORQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18506, GIR_Done, // Label 619: @18524 GIM_Reject, // Label 614: @18525 GIM_Reject, // Label 519: @18526 GIM_Try, /*On fail goto*//*Label 620*/ 18866, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 621*/ 18745, // Rule ID 20368 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src, immAllOnesV:{ *:[v8i32] }) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/6, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/6, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPTERNLOGQZrri, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/5, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20368, GIR_Done, // Label 621: @18745 GIM_Try, /*On fail goto*//*Label 622*/ 18796, // Rule ID 20376 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src, immAllOnesV:{ *:[v8i32] }) => (VPTERNLOGQZ256rri:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src, VR256X:{ *:[v8i32] }:$src, VR256X:{ *:[v8i32] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZ256rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20376, GIR_Done, // Label 622: @18796 GIM_Try, /*On fail goto*//*Label 623*/ 18819, // Rule ID 5469 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPXORDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5469, GIR_Done, // Label 623: @18819 GIM_Try, /*On fail goto*//*Label 624*/ 18842, // Rule ID 16545 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPXORYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16545, GIR_Done, // Label 624: @18842 GIM_Try, /*On fail goto*//*Label 625*/ 18865, // Rule ID 16571 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VXORPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16571, GIR_Done, // Label 625: @18865 GIM_Reject, // Label 620: @18866 GIM_Reject, // Label 520: @18867 GIM_Try, /*On fail goto*//*Label 626*/ 18944, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_Try, /*On fail goto*//*Label 627*/ 18928, // Rule ID 20361 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src, immAllOnesV:{ *:[v8i64] }) => (VPTERNLOGQZrri:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src, VR512:{ *:[v8i64] }:$src, VR512:{ *:[v8i64] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20361, GIR_Done, // Label 627: @18928 GIM_Try, /*On fail goto*//*Label 628*/ 18943, // Rule ID 5433 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (xor:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPXORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5433, GIR_Done, // Label 628: @18943 GIM_Reject, // Label 626: @18944 GIM_Reject, // Label 521: @18945 GIM_Try, /*On fail goto*//*Label 629*/ 19198, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_Try, /*On fail goto*//*Label 630*/ 19020, // Rule ID 21555 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v16i1] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] }), VK16:{ *:[v16i1] }:$src2) => (KXNORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21555, GIR_Done, // Label 630: @19020 GIM_Try, /*On fail goto*//*Label 631*/ 19081, // Rule ID 4063 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK16RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v16i1] } (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2), immAllOnesV:{ *:[v16i1] }) => (KXNORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4063, GIR_Done, // Label 631: @19081 GIM_Try, /*On fail goto*//*Label 632*/ 19142, // Rule ID 21556 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src2, (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, immAllOnesV:{ *:[v16i1] })) => (KXNORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21556, GIR_Done, // Label 632: @19142 GIM_Try, /*On fail goto*//*Label 633*/ 19178, // Rule ID 4051 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src, immAllOnesV:{ *:[v16i1] }) => (KNOTWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KNOTWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4051, GIR_Done, // Label 633: @19178 GIM_Try, /*On fail goto*//*Label 634*/ 19197, // Rule ID 4067 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KXORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4067, GIR_Done, // Label 634: @19197 GIM_Reject, // Label 629: @19198 GIM_Reject, // Label 522: @19199 GIM_Try, /*On fail goto*//*Label 635*/ 19539, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 636*/ 19418, // Rule ID 20362 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src, immAllOnesV:{ *:[v16i8] }) => (EXTRACT_SUBREG:{ *:[v16i8] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] }), 15:{ *:[i8] }), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/6, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/6, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPTERNLOGQZrri, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/5, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20362, GIR_Done, // Label 636: @19418 GIM_Try, /*On fail goto*//*Label 637*/ 19469, // Rule ID 20370 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src, immAllOnesV:{ *:[v16i8] }) => (VPTERNLOGQZ128rri:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src, VR128X:{ *:[v16i8] }:$src, VR128X:{ *:[v16i8] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZ128rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20370, GIR_Done, // Label 637: @19469 GIM_Try, /*On fail goto*//*Label 638*/ 19492, // Rule ID 16599 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPXORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16599, GIR_Done, // Label 638: @19492 GIM_Try, /*On fail goto*//*Label 639*/ 19515, // Rule ID 16623 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PXORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16623, GIR_Done, // Label 639: @19515 GIM_Try, /*On fail goto*//*Label 640*/ 19538, // Rule ID 18505 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPXORQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18505, GIR_Done, // Label 640: @19538 GIM_Reject, // Label 635: @19539 GIM_Reject, // Label 523: @19540 GIM_Try, /*On fail goto*//*Label 641*/ 19880, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 642*/ 19759, // Rule ID 20367 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src, immAllOnesV:{ *:[v16i16] }) => (EXTRACT_SUBREG:{ *:[v16i16] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/6, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/6, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPTERNLOGQZrri, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/5, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20367, GIR_Done, // Label 642: @19759 GIM_Try, /*On fail goto*//*Label 643*/ 19810, // Rule ID 20375 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src, immAllOnesV:{ *:[v16i16] }) => (VPTERNLOGQZ256rri:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src, VR256X:{ *:[v16i16] }:$src, VR256X:{ *:[v16i16] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZ256rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20375, GIR_Done, // Label 643: @19810 GIM_Try, /*On fail goto*//*Label 644*/ 19833, // Rule ID 16544 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPXORYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16544, GIR_Done, // Label 644: @19833 GIM_Try, /*On fail goto*//*Label 645*/ 19856, // Rule ID 16570 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VXORPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16570, GIR_Done, // Label 645: @19856 GIM_Try, /*On fail goto*//*Label 646*/ 19879, // Rule ID 18522 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPXORQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18522, GIR_Done, // Label 646: @19879 GIM_Reject, // Label 641: @19880 GIM_Reject, // Label 524: @19881 GIM_Try, /*On fail goto*//*Label 647*/ 19958, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_Try, /*On fail goto*//*Label 648*/ 19942, // Rule ID 20360 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src, immAllOnesV:{ *:[v16i32] }) => (VPTERNLOGQZrri:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src, VR512:{ *:[v16i32] }:$src, VR512:{ *:[v16i32] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20360, GIR_Done, // Label 648: @19942 GIM_Try, /*On fail goto*//*Label 649*/ 19957, // Rule ID 5460 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (xor:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPXORDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5460, GIR_Done, // Label 649: @19957 GIM_Reject, // Label 647: @19958 GIM_Reject, // Label 525: @19959 GIM_Try, /*On fail goto*//*Label 650*/ 20212, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_Try, /*On fail goto*//*Label 651*/ 20034, // Rule ID 21557 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v32i1] } (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] }), VK32:{ *:[v32i1] }:$src2) => (KXNORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21557, GIR_Done, // Label 651: @20034 GIM_Try, /*On fail goto*//*Label 652*/ 20095, // Rule ID 4064 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK32RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v32i1] } (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2), immAllOnesV:{ *:[v32i1] }) => (KXNORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4064, GIR_Done, // Label 652: @20095 GIM_Try, /*On fail goto*//*Label 653*/ 20156, // Rule ID 21558 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src2, (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, immAllOnesV:{ *:[v32i1] })) => (KXNORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21558, GIR_Done, // Label 653: @20156 GIM_Try, /*On fail goto*//*Label 654*/ 20192, // Rule ID 4052 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src, immAllOnesV:{ *:[v32i1] }) => (KNOTDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KNOTDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4052, GIR_Done, // Label 654: @20192 GIM_Try, /*On fail goto*//*Label 655*/ 20211, // Rule ID 4068 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KXORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4068, GIR_Done, // Label 655: @20211 GIM_Reject, // Label 650: @20212 GIM_Reject, // Label 526: @20213 GIM_Try, /*On fail goto*//*Label 656*/ 20553, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 657*/ 20432, // Rule ID 20366 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src, immAllOnesV:{ *:[v32i8] }) => (EXTRACT_SUBREG:{ *:[v32i8] } (VPTERNLOGQZrri:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] }), 15:{ *:[i8] }), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/5, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/6, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/7, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/7, /*TempRegID*/6, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/7, GIR_BuildMI, /*InsnID*/6, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/5, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/6, /*TempRegID*/6, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/6, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/6, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/6, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPTERNLOGQZrri, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/5, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/15, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20366, GIR_Done, // Label 657: @20432 GIM_Try, /*On fail goto*//*Label 658*/ 20483, // Rule ID 20374 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src, immAllOnesV:{ *:[v32i8] }) => (VPTERNLOGQZ256rri:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src, VR256X:{ *:[v32i8] }:$src, VR256X:{ *:[v32i8] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZ256rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20374, GIR_Done, // Label 658: @20483 GIM_Try, /*On fail goto*//*Label 659*/ 20506, // Rule ID 16543 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPXORYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16543, GIR_Done, // Label 659: @20506 GIM_Try, /*On fail goto*//*Label 660*/ 20529, // Rule ID 16569 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VXORPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16569, GIR_Done, // Label 660: @20529 GIM_Try, /*On fail goto*//*Label 661*/ 20552, // Rule ID 18521 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPXORQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18521, GIR_Done, // Label 661: @20552 GIM_Reject, // Label 656: @20553 GIM_Reject, // Label 527: @20554 GIM_Try, /*On fail goto*//*Label 662*/ 20631, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_Try, /*On fail goto*//*Label 663*/ 20615, // Rule ID 20359 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src, immAllOnesV:{ *:[v32i16] }) => (VPTERNLOGQZrri:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src, VR512:{ *:[v32i16] }:$src, VR512:{ *:[v32i16] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20359, GIR_Done, // Label 663: @20615 GIM_Try, /*On fail goto*//*Label 664*/ 20630, // Rule ID 18538 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (xor:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPXORQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18538, GIR_Done, // Label 664: @20630 GIM_Reject, // Label 662: @20631 GIM_Reject, // Label 528: @20632 GIM_Try, /*On fail goto*//*Label 665*/ 20885, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_Try, /*On fail goto*//*Label 666*/ 20707, // Rule ID 21559 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v64i1] } (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] }), VK64:{ *:[v64i1] }:$src2) => (KXNORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21559, GIR_Done, // Label 666: @20707 GIM_Try, /*On fail goto*//*Label 667*/ 20768, // Rule ID 4065 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK64RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v64i1] } (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2), immAllOnesV:{ *:[v64i1] }) => (KXNORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4065, GIR_Done, // Label 667: @20768 GIM_Try, /*On fail goto*//*Label 668*/ 20829, // Rule ID 21560 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2] GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src2, (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, immAllOnesV:{ *:[v64i1] })) => (KXNORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KXNORQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21560, GIR_Done, // Label 668: @20829 GIM_Try, /*On fail goto*//*Label 669*/ 20865, // Rule ID 4053 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src, immAllOnesV:{ *:[v64i1] }) => (KNOTQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KNOTQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4053, GIR_Done, // Label 669: @20865 GIM_Try, /*On fail goto*//*Label 670*/ 20884, // Rule ID 4069 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KXORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4069, GIR_Done, // Label 670: @20884 GIM_Reject, // Label 665: @20885 GIM_Reject, // Label 529: @20886 GIM_Try, /*On fail goto*//*Label 671*/ 20963, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_Try, /*On fail goto*//*Label 672*/ 20947, // Rule ID 20358 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllOnes, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src, immAllOnesV:{ *:[v64i8] }) => (VPTERNLOGQZrri:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src, VR512:{ *:[v64i8] }:$src, VR512:{ *:[v64i8] }:$src, 15:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPTERNLOGQZrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/15, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20358, GIR_Done, // Label 672: @20947 GIM_Try, /*On fail goto*//*Label 673*/ 20962, // Rule ID 18537 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (xor:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPXORQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18537, GIR_Done, // Label 673: @20962 GIM_Reject, // Label 671: @20963 GIM_Reject, // Label 530: @20964 GIM_Reject, // Label 6: @20965 GIM_Try, /*On fail goto*//*Label 674*/ 21120, GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/16, 24, /*)*//*default:*//*Label 678*/ 21119, /*GILLT_v16s1*//*Label 675*/ 20984, 0, 0, 0, /*GILLT_v32s1*//*Label 676*/ 21029, 0, 0, /*GILLT_v64s1*//*Label 677*/ 21074, // Label 675: @20984 GIM_Try, /*On fail goto*//*Label 679*/ 21028, // Rule ID 17942 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, // (concat_vectors:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KUNPCKBWrr:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK8:{ *:[v8i1] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KUNPCKBWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17942, GIR_Done, // Label 679: @21028 GIM_Reject, // Label 676: @21029 GIM_Try, /*On fail goto*//*Label 680*/ 21073, // Rule ID 17943 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, // (concat_vectors:{ *:[v32i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KUNPCKWDrr:{ *:[v32i1] } VK16:{ *:[v16i1] }:$src2, VK16:{ *:[v16i1] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KUNPCKWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17943, GIR_Done, // Label 680: @21073 GIM_Reject, // Label 677: @21074 GIM_Try, /*On fail goto*//*Label 681*/ 21118, // Rule ID 17944 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, // (concat_vectors:{ *:[v64i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KUNPCKDQrr:{ *:[v64i1] } VK32:{ *:[v32i1] }:$src2, VK32:{ *:[v32i1] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KUNPCKDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17944, GIR_Done, // Label 681: @21118 GIM_Reject, // Label 678: @21119 GIM_Reject, // Label 674: @21120 GIM_Reject, // Label 7: @21121 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 24, /*)*//*default:*//*Label 690*/ 22666, /*GILLT_s8*//*Label 682*/ 21150, /*GILLT_s16*//*Label 683*/ 21204, /*GILLT_s32*//*Label 684*/ 21964, /*GILLT_s64*//*Label 685*/ 22172, 0, 0, 0, 0, 0, 0, 0, /*GILLT_v8s1*//*Label 686*/ 22380, 0, 0, 0, /*GILLT_v16s1*//*Label 687*/ 22458, 0, 0, 0, /*GILLT_v32s1*//*Label 688*/ 22536, 0, 0, /*GILLT_v64s1*//*Label 689*/ 22601, // Label 682: @21150 GIM_Try, /*On fail goto*//*Label 691*/ 21203, // Rule ID 17873 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, // (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } (COPY_TO_REGCLASS:{ *:[i32] } VK8:{ *:[v8i1] }:$src, GR32:{ *:[i32] }), sub_8bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_8bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR8RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 17873, GIR_Done, // Label 691: @21203 GIM_Reject, // Label 683: @21204 GIM_Try, /*On fail goto*//*Label 692*/ 21257, // Rule ID 17870 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, // (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] }), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_16bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 17870, GIR_Done, // Label 692: @21257 GIM_Try, /*On fail goto*//*Label 693*/ 21352, // Rule ID 20554 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (bitconvert:{ *:[f16] } GR16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (VMOVW2SHrr:{ *:[f128] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] })), FR16X:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::GR16RegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VMOVW2SHrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, // GIR_Coverage, 20554, GIR_Done, // Label 693: @21352 GIM_Try, /*On fail goto*//*Label 694*/ 21423, // Rule ID 20567 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, // (bitconvert:{ *:[i16] } FR16X:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (VMOVSH2Wrr:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[f128] } FR16X:{ *:[f16] }:$src, VR128X:{ *:[i32] })), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VMOVSH2Wrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_16bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 20567, GIR_Done, // Label 694: @21423 GIM_Try, /*On fail goto*//*Label 695*/ 21493, // Rule ID 16787 // GIM_CheckFeatures, GIFBS_HasAVX_NoBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[i16] } f16:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (VPEXTRWrr:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[v8i16] } FR16:{ *:[f16] }:$src, VR128:{ *:[i32] }), 0:{ *:[i8] }), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPEXTRWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_16bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 16787, GIR_Done, // Label 695: @21493 GIM_Try, /*On fail goto*//*Label 696*/ 21603, // Rule ID 16788 // GIM_CheckFeatures, GIFBS_HasAVX_NoBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16RegClassID, // (bitconvert:{ *:[f16] } i16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (VPINSRWrr:{ *:[f128] } (IMPLICIT_DEF:{ *:[v8i16] }), (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), 0:{ *:[i8] }), FR16:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/4, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/3, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/3, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, X86::GR16RegClassID, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPINSRWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16RegClassID, // GIR_Coverage, 16788, GIR_Done, // Label 696: @21603 GIM_Try, /*On fail goto*//*Label 697*/ 21673, // Rule ID 16784 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[i16] } f16:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (PEXTRWrr:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[v8i16] } FR16:{ *:[f16] }:$src, VR128:{ *:[i32] }), 0:{ *:[i8] }), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::PEXTRWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_16bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 16784, GIR_Done, // Label 697: @21673 GIM_Try, /*On fail goto*//*Label 698*/ 21783, // Rule ID 16785 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16RegClassID, // (bitconvert:{ *:[f16] } i16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (PINSRWrr:{ *:[f128] } (IMPLICIT_DEF:{ *:[v8i16] }), (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), 0:{ *:[i8] }), FR16:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/4, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/3, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/3, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, X86::GR16RegClassID, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::PINSRWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16RegClassID, // GIR_Coverage, 16785, GIR_Done, // Label 698: @21783 GIM_Try, /*On fail goto*//*Label 699*/ 21853, // Rule ID 20260 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[i16] } f16:{ *:[f16] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (VPEXTRWZrr:{ *:[i32] } (COPY_TO_REGCLASS:{ *:[v8i16] } FR16X:{ *:[f16] }:$src, VR128X:{ *:[i32] }), 0:{ *:[i8] }), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPEXTRWZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_16bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 20260, GIR_Done, // Label 699: @21853 GIM_Try, /*On fail goto*//*Label 700*/ 21963, // Rule ID 20261 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, // (bitconvert:{ *:[f16] } i16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[f16] } (VPINSRWZrr:{ *:[f128] } (IMPLICIT_DEF:{ *:[v8i16] }), (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), 0:{ *:[i8] }), FR16X:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/4, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/3, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/3, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/3, /*Op*/2, X86::GR16RegClassID, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPINSRWZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/1, /*Imm*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, // GIR_Coverage, 20261, GIR_Done, // Label 700: @21963 GIM_Reject, // Label 684: @21964 GIM_Try, /*On fail goto*//*Label 701*/ 21987, // Rule ID 2607 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVDI2SSrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2607, GIR_Done, // Label 701: @21987 GIM_Try, /*On fail goto*//*Label 702*/ 22010, // Rule ID 2608 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (MOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVDI2SSrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2608, GIR_Done, // Label 702: @22010 GIM_Try, /*On fail goto*//*Label 703*/ 22033, // Rule ID 2617 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VMOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSS2DIrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2617, GIR_Done, // Label 703: @22033 GIM_Try, /*On fail goto*//*Label 704*/ 22056, // Rule ID 2618 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (MOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSS2DIrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2618, GIR_Done, // Label 704: @22056 GIM_Try, /*On fail goto*//*Label 705*/ 22079, // Rule ID 4237 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVDI2SSZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4237, GIR_Done, // Label 705: @22079 GIM_Try, /*On fail goto*//*Label 706*/ 22102, // Rule ID 4242 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (bitconvert:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSS2DIZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4242, GIR_Done, // Label 706: @22102 GIM_Try, /*On fail goto*//*Label 707*/ 22125, // Rule ID 17881 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (bitconvert:{ *:[i32] } VK32:{ *:[v32i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i32] } VK32:{ *:[v32i1] }:$src, GR32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR32RegClassID, // GIR_Coverage, 17881, GIR_Done, // Label 707: @22125 GIM_Try, /*On fail goto*//*Label 708*/ 22171, // Rule ID 18361 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (bitconvert:{ *:[f32] } VK32:{ *:[v32i1] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } (KMOVDrk:{ *:[i32] } VK32:{ *:[v32i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KMOVDrk, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMOVDI2SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18361, GIR_Done, // Label 708: @22171 GIM_Reject, // Label 685: @22172 GIM_Try, /*On fail goto*//*Label 709*/ 22195, // Rule ID 2602 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOV64toSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2602, GIR_Done, // Label 709: @22195 GIM_Try, /*On fail goto*//*Label 710*/ 22218, // Rule ID 2606 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (MOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOV64toSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2606, GIR_Done, // Label 710: @22218 GIM_Try, /*On fail goto*//*Label 711*/ 22241, // Rule ID 2615 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VMOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSDto64rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2615, GIR_Done, // Label 711: @22241 GIM_Try, /*On fail goto*//*Label 712*/ 22264, // Rule ID 2616 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (MOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSDto64rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2616, GIR_Done, // Label 712: @22264 GIM_Try, /*On fail goto*//*Label 713*/ 22287, // Rule ID 4235 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDZrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOV64toSDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4235, GIR_Done, // Label 713: @22287 GIM_Try, /*On fail goto*//*Label 714*/ 22310, // Rule ID 4236 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (bitconvert:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSDto64Zrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4236, GIR_Done, // Label 714: @22310 GIM_Try, /*On fail goto*//*Label 715*/ 22333, // Rule ID 17883 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, // (bitconvert:{ *:[i64] } VK64:{ *:[v64i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i64] } VK64:{ *:[v64i1] }:$src, GR64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR64RegClassID, // GIR_Coverage, 17883, GIR_Done, // Label 715: @22333 GIM_Try, /*On fail goto*//*Label 716*/ 22379, // Rule ID 18363 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, // (bitconvert:{ *:[f64] } VK64:{ *:[v64i1] }:$src) => (VMOV64toSDZrr:{ *:[f64] } (KMOVQrk:{ *:[i64] } VK64:{ *:[v64i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KMOVQrk, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMOV64toSDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18363, GIR_Done, // Label 716: @22379 GIM_Reject, // Label 686: @22380 GIM_Try, /*On fail goto*//*Label 717*/ 22457, // Rule ID 17872 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (bitconvert:{ *:[v8i1] } GR8:{ *:[i8] }:$src) => (COPY_TO_REGCLASS:{ *:[v8i1] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src, sub_8bit:{ *:[i32] }), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 17872, GIR_Done, // Label 717: @22457 GIM_Reject, // Label 687: @22458 GIM_Try, /*On fail goto*//*Label 718*/ 22535, // Rule ID 17869 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (bitconvert:{ *:[v16i1] } GR16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[v16i1] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), VK16:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/1, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR16RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK16RegClassID, // GIR_Coverage, 17869, GIR_Done, // Label 718: @22535 GIM_Reject, // Label 688: @22536 GIM_Try, /*On fail goto*//*Label 719*/ 22600, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_Try, /*On fail goto*//*Label 720*/ 22561, // Rule ID 17880 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[v32i1] } GR32:{ *:[i32] }:$src) => (COPY_TO_REGCLASS:{ *:[v32i1] } GR32:{ *:[i32] }:$src, VK32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK32RegClassID, // GIR_Coverage, 17880, GIR_Done, // Label 720: @22561 GIM_Try, /*On fail goto*//*Label 721*/ 22599, // Rule ID 18360 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (bitconvert:{ *:[v32i1] } FR32X:{ *:[f32] }:$src) => (KMOVDkr:{ *:[v32i1] } (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VMOVSS2DIZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVDkr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18360, GIR_Done, // Label 721: @22599 GIM_Reject, // Label 719: @22600 GIM_Reject, // Label 689: @22601 GIM_Try, /*On fail goto*//*Label 722*/ 22665, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_Try, /*On fail goto*//*Label 723*/ 22626, // Rule ID 17882 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bitconvert:{ *:[v64i1] } GR64:{ *:[i64] }:$src) => (COPY_TO_REGCLASS:{ *:[v64i1] } GR64:{ *:[i64] }:$src, VK64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK64RegClassID, // GIR_Coverage, 17882, GIR_Done, // Label 723: @22626 GIM_Try, /*On fail goto*//*Label 724*/ 22664, // Rule ID 18362 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (bitconvert:{ *:[v64i1] } FR64X:{ *:[f64] }:$src) => (KMOVQkr:{ *:[v64i1] } (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VMOVSDto64Zrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVQkr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 18362, GIR_Done, // Label 724: @22664 GIM_Reject, // Label 722: @22665 GIM_Reject, // Label 690: @22666 GIM_Reject, // Label 8: @22667 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 5, /*)*//*default:*//*Label 727*/ 22989, /*GILLT_s32*//*Label 725*/ 22675, /*GILLT_s64*//*Label 726*/ 22832, // Label 725: @22675 GIM_Try, /*On fail goto*//*Label 728*/ 22701, // Rule ID 1487 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (lrint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VCVTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTSS2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1487, GIR_Done, // Label 728: @22701 GIM_Try, /*On fail goto*//*Label 729*/ 22727, // Rule ID 1491 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (lrint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (VCVTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTSD2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1491, GIR_Done, // Label 729: @22727 GIM_Try, /*On fail goto*//*Label 730*/ 22753, // Rule ID 1511 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (lrint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (CVTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSS2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1511, GIR_Done, // Label 730: @22753 GIM_Try, /*On fail goto*//*Label 731*/ 22779, // Rule ID 1515 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (lrint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (CVTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSD2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1515, GIR_Done, // Label 731: @22779 GIM_Try, /*On fail goto*//*Label 732*/ 22805, // Rule ID 9925 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (lrint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTSS2SIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9925, GIR_Done, // Label 732: @22805 GIM_Try, /*On fail goto*//*Label 733*/ 22831, // Rule ID 9929 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (lrint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTSD2SIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9929, GIR_Done, // Label 733: @22831 GIM_Reject, // Label 726: @22832 GIM_Try, /*On fail goto*//*Label 734*/ 22858, // Rule ID 16444 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (lrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTSS2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16444, GIR_Done, // Label 734: @22858 GIM_Try, /*On fail goto*//*Label 735*/ 22884, // Rule ID 16446 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (lrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTSD2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16446, GIR_Done, // Label 735: @22884 GIM_Try, /*On fail goto*//*Label 736*/ 22910, // Rule ID 16448 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (lrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSS2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16448, GIR_Done, // Label 736: @22910 GIM_Try, /*On fail goto*//*Label 737*/ 22936, // Rule ID 16450 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (lrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSD2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16450, GIR_Done, // Label 737: @22936 GIM_Try, /*On fail goto*//*Label 738*/ 22962, // Rule ID 19644 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (lrint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SI64Zrr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTSS2SI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19644, GIR_Done, // Label 738: @22962 GIM_Try, /*On fail goto*//*Label 739*/ 22988, // Rule ID 19646 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (lrint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTSD2SI64Zrr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTSD2SI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19646, GIR_Done, // Label 739: @22988 GIM_Reject, // Label 727: @22989 GIM_Reject, // Label 9: @22990 GIM_Try, /*On fail goto*//*Label 740*/ 24252, GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, GIM_Try, /*On fail goto*//*Label 741*/ 23035, // Rule ID 1261 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubwd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11287:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHSUBWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1261, GIR_Done, // Label 741: @23035 GIM_Try, /*On fail goto*//*Label 742*/ 23075, // Rule ID 1263 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubdq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11286:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHSUBDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1263, GIR_Done, // Label 742: @23075 GIM_Try, /*On fail goto*//*Label 743*/ 23115, // Rule ID 1265 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11285:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHSUBBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBBWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1265, GIR_Done, // Label 743: @23115 GIM_Try, /*On fail goto*//*Label 744*/ 23155, // Rule ID 1267 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11284:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1267, GIR_Done, // Label 744: @23155 GIM_Try, /*On fail goto*//*Label 745*/ 23195, // Rule ID 1269 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11283:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1269, GIR_Done, // Label 745: @23195 GIM_Try, /*On fail goto*//*Label 746*/ 23235, // Rule ID 1271 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11282:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1271, GIR_Done, // Label 746: @23235 GIM_Try, /*On fail goto*//*Label 747*/ 23275, // Rule ID 1273 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11281:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1273, GIR_Done, // Label 747: @23275 GIM_Try, /*On fail goto*//*Label 748*/ 23315, // Rule ID 1275 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddudq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11280:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDUDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1275, GIR_Done, // Label 748: @23315 GIM_Try, /*On fail goto*//*Label 749*/ 23355, // Rule ID 1277 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11279:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1277, GIR_Done, // Label 749: @23355 GIM_Try, /*On fail goto*//*Label 750*/ 23395, // Rule ID 1279 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11278:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1279, GIR_Done, // Label 750: @23395 GIM_Try, /*On fail goto*//*Label 751*/ 23435, // Rule ID 1281 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11277:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1281, GIR_Done, // Label 751: @23435 GIM_Try, /*On fail goto*//*Label 752*/ 23475, // Rule ID 1283 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadddq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11276:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1283, GIR_Done, // Label 752: @23475 GIM_Try, /*On fail goto*//*Label 753*/ 23515, // Rule ID 1285 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11275:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1285, GIR_Done, // Label 753: @23515 GIM_Try, /*On fail goto*//*Label 754*/ 23555, // Rule ID 1287 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11274:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1287, GIR_Done, // Label 754: @23555 GIM_Try, /*On fail goto*//*Label 755*/ 23595, // Rule ID 1289 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11273:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1289, GIR_Done, // Label 755: @23595 GIM_Try, /*On fail goto*//*Label 756*/ 23635, // Rule ID 1291 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 11268:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZSSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1291, GIR_Done, // Label 756: @23635 GIM_Try, /*On fail goto*//*Label 757*/ 23675, // Rule ID 1295 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 11265:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1295, GIR_Done, // Label 757: @23675 GIM_Try, /*On fail goto*//*Label 758*/ 23715, // Rule ID 1297 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v8f32] } 11266:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src) => (VFRCZPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1297, GIR_Done, // Label 758: @23715 GIM_Try, /*On fail goto*//*Label 759*/ 23755, // Rule ID 1299 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_sd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2f64] } 11267:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZSDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1299, GIR_Done, // Label 759: @23755 GIM_Try, /*On fail goto*//*Label 760*/ 23795, // Rule ID 1303 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2f64] } 11263:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1303, GIR_Done, // Label 760: @23795 GIM_Try, /*On fail goto*//*Label 761*/ 23835, // Rule ID 1305 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4f64] } 11264:{ *:[iPTR] }, VR256:{ *:[v4f64] }:$src) => (VFRCZPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1305, GIR_Done, // Label 761: @23835 GIM_Try, /*On fail goto*//*Label 762*/ 23875, // Rule ID 3047 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9957:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (VAESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESIMCrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3047, GIR_Done, // Label 762: @23875 GIM_Try, /*On fail goto*//*Label 763*/ 23915, // Rule ID 3049 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9957:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (AESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESIMCrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3049, GIR_Done, // Label 763: @23915 GIM_Try, /*On fail goto*//*Label 764*/ 23955, // Rule ID 3239 // GIM_CheckFeatures, GIFBS_HasAVXNECONVERT, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_vcvtneps2bf16128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8bf16] } 11235:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VCVTNEPS2BF16rr:{ *:[v8bf16] } VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTNEPS2BF16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3239, GIR_Done, // Label 764: @23955 GIM_Try, /*On fail goto*//*Label 765*/ 23995, // Rule ID 3241 // GIM_CheckFeatures, GIFBS_HasAVXNECONVERT, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_vcvtneps2bf16256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v8bf16] } 11236:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src) => (VCVTNEPS2BF16Yrr:{ *:[v8bf16] } VR256:{ *:[v8f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTNEPS2BF16Yrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3241, GIR_Done, // Label 765: @23995 GIM_Try, /*On fail goto*//*Label 766*/ 24039, // Rule ID 16713 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 11049:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RSQRTSSr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16713, GIR_Done, // Label 766: @24039 GIM_Try, /*On fail goto*//*Label 767*/ 24083, // Rule ID 16717 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 11049:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRSQRTSSr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16717, GIR_Done, // Label 767: @24083 GIM_Try, /*On fail goto*//*Label 768*/ 24127, // Rule ID 16733 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 11047:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RCPSSr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16733, GIR_Done, // Label 768: @24127 GIM_Try, /*On fail goto*//*Label 769*/ 24171, // Rule ID 16737 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 11047:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRCPSSr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16737, GIR_Done, // Label 769: @24171 GIM_Try, /*On fail goto*//*Label 770*/ 24211, // Rule ID 20550 // GIM_CheckFeatures, GIFBS_HasBF16_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_vcvtneps2bf16128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (intrinsic_wo_chain:{ *:[v8bf16] } 11235:{ *:[iPTR] }, VR128X:{ *:[v4f32] }:$src) => (VCVTNEPS2BF16Z128rr:{ *:[v8bf16] } VR128X:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTNEPS2BF16Z128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20550, GIR_Done, // Label 770: @24211 GIM_Try, /*On fail goto*//*Label 771*/ 24251, // Rule ID 20552 // GIM_CheckFeatures, GIFBS_HasBF16_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_vcvtneps2bf16256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (intrinsic_wo_chain:{ *:[v8bf16] } 11236:{ *:[iPTR] }, VR256X:{ *:[v8f32] }:$src) => (VCVTNEPS2BF16Z256rr:{ *:[v8bf16] } VR256X:{ *:[v8f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTNEPS2BF16Z256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20552, GIR_Done, // Label 771: @24251 GIM_Reject, // Label 740: @24252 GIM_Try, /*On fail goto*//*Label 772*/ 26952, GIM_CheckNumOperands, /*MI*/0, /*Expected*/4, GIM_Try, /*On fail goto*//*Label 773*/ 24304, // Rule ID 3051 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_wo_chain:{ *:[v2i64] } 9958:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) => (VAESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESKEYGENASSIST128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3051, GIR_Done, // Label 773: @24304 GIM_Try, /*On fail goto*//*Label 774*/ 24351, // Rule ID 3053 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_wo_chain:{ *:[v2i64] } 9958:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) => (AESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESKEYGENASSIST128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3053, GIR_Done, // Label 774: @24351 GIM_Try, /*On fail goto*//*Label 775*/ 24403, // Rule ID 2714 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v16i8] } 11187:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2714, GIR_Done, // Label 775: @24403 GIM_Try, /*On fail goto*//*Label 776*/ 24455, // Rule ID 2716 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11191:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2716, GIR_Done, // Label 776: @24455 GIM_Try, /*On fail goto*//*Label 777*/ 24507, // Rule ID 2718 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11189:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2718, GIR_Done, // Label 777: @24507 GIM_Try, /*On fail goto*//*Label 778*/ 24559, // Rule ID 2720 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11171:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2720, GIR_Done, // Label 778: @24559 GIM_Try, /*On fail goto*//*Label 779*/ 24611, // Rule ID 2722 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11177:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2722, GIR_Done, // Label 779: @24611 GIM_Try, /*On fail goto*//*Label 780*/ 24663, // Rule ID 2738 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_b, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v32i8] } 10076:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSIGNBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2738, GIR_Done, // Label 780: @24663 GIM_Try, /*On fail goto*//*Label 781*/ 24715, // Rule ID 2740 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_w, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v16i16] } 10078:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSIGNWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2740, GIR_Done, // Label 781: @24715 GIM_Try, /*On fail goto*//*Label 782*/ 24767, // Rule ID 2742 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_d, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v8i32] } 10077:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSIGNDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2742, GIR_Done, // Label 782: @24767 GIM_Try, /*On fail goto*//*Label 783*/ 24819, // Rule ID 2744 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phadd_sw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v16i16] } 10063:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHADDSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2744, GIR_Done, // Label 783: @24819 GIM_Try, /*On fail goto*//*Label 784*/ 24871, // Rule ID 2746 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phsub_sw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v16i16] } 10066:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHSUBSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2746, GIR_Done, // Label 784: @24871 GIM_Try, /*On fail goto*//*Label 785*/ 24923, // Rule ID 2756 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v16i8] } 11187:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2756, GIR_Done, // Label 785: @24923 GIM_Try, /*On fail goto*//*Label 786*/ 24975, // Rule ID 2758 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11191:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2758, GIR_Done, // Label 786: @24975 GIM_Try, /*On fail goto*//*Label 787*/ 25027, // Rule ID 2760 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11189:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2760, GIR_Done, // Label 787: @25027 GIM_Try, /*On fail goto*//*Label 788*/ 25079, // Rule ID 2764 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11171:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHADDSWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2764, GIR_Done, // Label 788: @25079 GIM_Try, /*On fail goto*//*Label 789*/ 25131, // Rule ID 2766 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11177:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHSUBSWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2766, GIR_Done, // Label 789: @25131 GIM_Try, /*On fail goto*//*Label 790*/ 25183, // Rule ID 3002 // GIM_CheckFeatures, GIFBS_HasCRC32, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_8, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR8RegClassID, // (intrinsic_wo_chain:{ *:[i32] } 11145:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (CRC32r32r8:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3002, GIR_Done, // Label 790: @25183 GIM_Try, /*On fail goto*//*Label 791*/ 25235, // Rule ID 3004 // GIM_CheckFeatures, GIFBS_HasCRC32, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_16, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR16RegClassID, // (intrinsic_wo_chain:{ *:[i32] } 11143:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) => (CRC32r32r16:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r16, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3004, GIR_Done, // Label 791: @25235 GIM_Try, /*On fail goto*//*Label 792*/ 25287, // Rule ID 3006 // GIM_CheckFeatures, GIFBS_HasCRC32, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID, // (intrinsic_wo_chain:{ *:[i32] } 11144:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (CRC32r32r32:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3006, GIR_Done, // Label 792: @25287 GIM_Try, /*On fail goto*//*Label 793*/ 25339, // Rule ID 3008 // GIM_CheckFeatures, GIFBS_HasCRC32, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_64_64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID, // (intrinsic_wo_chain:{ *:[i64] } 11146:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (CRC32r64r64:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r64r64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3008, GIR_Done, // Label 793: @25339 GIM_Try, /*On fail goto*//*Label 794*/ 25391, // Rule ID 3011 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1nexte, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11015:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1NEXTErr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1NEXTErr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3011, GIR_Done, // Label 794: @25391 GIM_Try, /*On fail goto*//*Label 795*/ 25443, // Rule ID 3013 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg1, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11013:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG1rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3013, GIR_Done, // Label 795: @25443 GIM_Try, /*On fail goto*//*Label 796*/ 25495, // Rule ID 3015 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg2, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11014:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG2rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3015, GIR_Done, // Label 796: @25495 GIM_Try, /*On fail goto*//*Label 797*/ 25547, // Rule ID 3019 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg1, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11017:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG1rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3019, GIR_Done, // Label 797: @25547 GIM_Try, /*On fail goto*//*Label 798*/ 25599, // Rule ID 3021 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg2, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11018:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG2rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3021, GIR_Done, // Label 798: @25599 GIM_Try, /*On fail goto*//*Label 799*/ 25651, // Rule ID 3023 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9951:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3023, GIR_Done, // Label 799: @25651 GIM_Try, /*On fail goto*//*Label 800*/ 25703, // Rule ID 3025 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9954:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3025, GIR_Done, // Label 800: @25703 GIM_Try, /*On fail goto*//*Label 801*/ 25755, // Rule ID 3027 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9945:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3027, GIR_Done, // Label 801: @25755 GIM_Try, /*On fail goto*//*Label 802*/ 25807, // Rule ID 3029 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9948:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3029, GIR_Done, // Label 802: @25807 GIM_Try, /*On fail goto*//*Label 803*/ 25859, // Rule ID 3031 // GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 9952:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3031, GIR_Done, // Label 803: @25859 GIM_Try, /*On fail goto*//*Label 804*/ 25911, // Rule ID 3033 // GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 9955:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3033, GIR_Done, // Label 804: @25911 GIM_Try, /*On fail goto*//*Label 805*/ 25963, // Rule ID 3035 // GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 9946:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3035, GIR_Done, // Label 805: @25963 GIM_Try, /*On fail goto*//*Label 806*/ 26015, // Rule ID 3037 // GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 9949:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3037, GIR_Done, // Label 806: @26015 GIM_Try, /*On fail goto*//*Label 807*/ 26067, // Rule ID 3039 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9951:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3039, GIR_Done, // Label 807: @26067 GIM_Try, /*On fail goto*//*Label 808*/ 26119, // Rule ID 3041 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9954:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCLASTrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3041, GIR_Done, // Label 808: @26119 GIM_Try, /*On fail goto*//*Label 809*/ 26171, // Rule ID 3043 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9945:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3043, GIR_Done, // Label 809: @26171 GIM_Try, /*On fail goto*//*Label 810*/ 26223, // Rule ID 3045 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9948:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECLASTrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3045, GIR_Done, // Label 810: @26223 GIM_Try, /*On fail goto*//*Label 811*/ 26275, // Rule ID 3062 // GIM_CheckFeatures, GIFBS_HasSSE4A, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_extrq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11161:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) => (EXTRQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::EXTRQ, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3062, GIR_Done, // Label 811: @26275 GIM_Try, /*On fail goto*//*Label 812*/ 26327, // Rule ID 3064 // GIM_CheckFeatures, GIFBS_HasSSE4A, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_insertq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11163:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) => (INSERTQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INSERTQ, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3064, GIR_Done, // Label 812: @26327 GIM_Try, /*On fail goto*//*Label 813*/ 26379, // Rule ID 13765 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9951:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13765, GIR_Done, // Label 813: @26379 GIM_Try, /*On fail goto*//*Label 814*/ 26431, // Rule ID 13767 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 9952:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13767, GIR_Done, // Label 814: @26431 GIM_Try, /*On fail goto*//*Label 815*/ 26483, // Rule ID 13769 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (intrinsic_wo_chain:{ *:[v8i64] } 9953:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13769, GIR_Done, // Label 815: @26483 GIM_Try, /*On fail goto*//*Label 816*/ 26535, // Rule ID 13771 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9954:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13771, GIR_Done, // Label 816: @26535 GIM_Try, /*On fail goto*//*Label 817*/ 26587, // Rule ID 13773 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 9955:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13773, GIR_Done, // Label 817: @26587 GIM_Try, /*On fail goto*//*Label 818*/ 26639, // Rule ID 13775 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (intrinsic_wo_chain:{ *:[v8i64] } 9956:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13775, GIR_Done, // Label 818: @26639 GIM_Try, /*On fail goto*//*Label 819*/ 26691, // Rule ID 13777 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9945:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13777, GIR_Done, // Label 819: @26691 GIM_Try, /*On fail goto*//*Label 820*/ 26743, // Rule ID 13779 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 9946:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13779, GIR_Done, // Label 820: @26743 GIM_Try, /*On fail goto*//*Label 821*/ 26795, // Rule ID 13781 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (intrinsic_wo_chain:{ *:[v8i64] } 9947:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13781, GIR_Done, // Label 821: @26795 GIM_Try, /*On fail goto*//*Label 822*/ 26847, // Rule ID 13783 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 9948:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13783, GIR_Done, // Label 822: @26847 GIM_Try, /*On fail goto*//*Label 823*/ 26899, // Rule ID 13785 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 9949:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13785, GIR_Done, // Label 823: @26899 GIM_Try, /*On fail goto*//*Label 824*/ 26951, // Rule ID 13787 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (intrinsic_wo_chain:{ *:[v8i64] } 9950:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13787, GIR_Done, // Label 824: @26951 GIM_Reject, // Label 772: @26952 GIM_Try, /*On fail goto*//*Label 825*/ 28682, GIM_CheckNumOperands, /*MI*/0, /*Expected*/5, GIM_Try, /*On fail goto*//*Label 826*/ 27016, // Rule ID 2943 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8i16] } 11132:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) => (VMPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2943, GIR_Done, // Label 826: @27016 GIM_Try, /*On fail goto*//*Label 827*/ 27075, // Rule ID 2945 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4f32] } 11130:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2945, GIR_Done, // Label 827: @27075 GIM_Try, /*On fail goto*//*Label 828*/ 27134, // Rule ID 2947 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2f64] } 11129:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPDrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2947, GIR_Done, // Label 828: @27134 GIM_Try, /*On fail goto*//*Label 829*/ 27193, // Rule ID 2949 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_dp_ps_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8f32] } 9983:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPSYrri:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSYrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2949, GIR_Done, // Label 829: @27193 GIM_Try, /*On fail goto*//*Label 830*/ 27252, // Rule ID 2951 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_mpsadbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v16i16] } 10052:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (timm:{ *:[i8] }):$src3) => (VMPSADBWYrri:{ *:[v16i16] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWYrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2951, GIR_Done, // Label 830: @27252 GIM_Try, /*On fail goto*//*Label 831*/ 27311, // Rule ID 2953 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8i16] } 11132:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) => (MPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MPSADBWrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2953, GIR_Done, // Label 831: @27311 GIM_Try, /*On fail goto*//*Label 832*/ 27370, // Rule ID 2955 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4f32] } 11130:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) => (DPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPSrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2955, GIR_Done, // Label 832: @27370 GIM_Try, /*On fail goto*//*Label 833*/ 27429, // Rule ID 2957 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2f64] } 11129:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) => (DPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPDrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2957, GIR_Done, // Label 833: @27429 GIM_Try, /*On fail goto*//*Label 834*/ 27488, // Rule ID 3009 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1rnds4, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4i32] } 11016:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (timm:{ *:[i8] }):$src3) => (SHA1RNDS4rri:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1RNDS4rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3009, GIR_Done, // Label 834: @27488 GIM_Try, /*On fail goto*//*Label 835*/ 27547, // Rule ID 3055 // GIM_CheckFeatures, GIFBS_HasPCLMUL_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2i64] } 10982:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (PCLMULQDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PCLMULQDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3055, GIR_Done, // Label 835: @27547 GIM_Try, /*On fail goto*//*Label 836*/ 27606, // Rule ID 3057 // GIM_CheckFeatures, GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2i64] } 10982:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3057, GIR_Done, // Label 836: @27606 GIM_Try, /*On fail goto*//*Label 837*/ 27665, // Rule ID 3059 // GIM_CheckFeatures, GIFBS_HasVPCLMULQDQ_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4i64] } 10983:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3059, GIR_Done, // Label 837: @27665 GIM_Try, /*On fail goto*//*Label 838*/ 27724, // Rule ID 13789 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVPCLMULQDQ, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8i64] } 10984:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13789, GIR_Done, // Label 838: @27724 GIM_Try, /*On fail goto*//*Label 839*/ 27783, // Rule ID 13791 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPCLMULQDQ, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2i64] } 10982:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13791, GIR_Done, // Label 839: @27783 GIM_Try, /*On fail goto*//*Label 840*/ 27842, // Rule ID 13793 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPCLMULQDQ, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4i64] } 10983:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13793, GIR_Done, // Label 840: @27842 GIM_Try, /*On fail goto*//*Label 841*/ 27906, // Rule ID 1351 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcswd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11299:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1351, GIR_Done, // Label 841: @27906 GIM_Try, /*On fail goto*//*Label 842*/ 27970, // Rule ID 1353 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcsswd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11298:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSSWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1353, GIR_Done, // Label 842: @27970 GIM_Try, /*On fail goto*//*Label 843*/ 28034, // Rule ID 1355 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsww, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11297:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1355, GIR_Done, // Label 843: @28034 GIM_Try, /*On fail goto*//*Label 844*/ 28098, // Rule ID 1357 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacswd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11296:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1357, GIR_Done, // Label 844: @28098 GIM_Try, /*On fail goto*//*Label 845*/ 28162, // Rule ID 1359 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssww, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 11295:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1359, GIR_Done, // Label 845: @28162 GIM_Try, /*On fail goto*//*Label 846*/ 28226, // Rule ID 1361 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsswd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11294:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1361, GIR_Done, // Label 846: @28226 GIM_Try, /*On fail goto*//*Label 847*/ 28290, // Rule ID 1363 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdql, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11293:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQLrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1363, GIR_Done, // Label 847: @28290 GIM_Try, /*On fail goto*//*Label 848*/ 28354, // Rule ID 1365 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdqh, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11292:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQHrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1365, GIR_Done, // Label 848: @28354 GIM_Try, /*On fail goto*//*Label 849*/ 28418, // Rule ID 1367 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11291:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1367, GIR_Done, // Label 849: @28418 GIM_Try, /*On fail goto*//*Label 850*/ 28482, // Rule ID 1369 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdql, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11290:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQLrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1369, GIR_Done, // Label 850: @28482 GIM_Try, /*On fail goto*//*Label 851*/ 28546, // Rule ID 1371 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdqh, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 11289:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQHrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1371, GIR_Done, // Label 851: @28546 GIM_Try, /*On fail goto*//*Label 852*/ 28610, // Rule ID 1373 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11288:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1373, GIR_Done, // Label 852: @28610 GIM_Try, /*On fail goto*//*Label 853*/ 28681, // Rule ID 3017 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256rnds2, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 11019:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, XMM0:{ *:[v4i32] }) => (SHA256RNDS2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::XMM0, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/4, // XMM0 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256RNDS2rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3017, GIR_Done, // Label 853: @28681 GIM_Reject, // Label 825: @28682 GIM_Reject, // Label 10: @28683 GIM_Try, /*On fail goto*//*Label 854*/ 29053, GIM_CheckNumOperands, /*MI*/0, /*Expected*/1, GIM_Try, /*On fail goto*//*Label 855*/ 28708, // Rule ID 120 // GIM_CheckFeatures, GIFBS_HasSERIALIZE, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_serialize, // (intrinsic_void 11011:{ *:[iPTR] }) => (SERIALIZE) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SERIALIZE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 120, GIR_Done, // Label 855: @28708 GIM_Try, /*On fail goto*//*Label 856*/ 28728, // Rule ID 121 // GIM_CheckFeatures, GIFBS_HasTSXLDTRK, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xsusldtrk, // (intrinsic_void 11323:{ *:[iPTR] }) => (XSUSLDTRK) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XSUSLDTRK, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 121, GIR_Done, // Label 856: @28728 GIM_Try, /*On fail goto*//*Label 857*/ 28748, // Rule ID 122 // GIM_CheckFeatures, GIFBS_HasTSXLDTRK, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xresldtrk, // (intrinsic_void 11309:{ *:[iPTR] }) => (XRESLDTRK) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XRESLDTRK, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 122, GIR_Done, // Label 857: @28748 GIM_Try, /*On fail goto*//*Label 858*/ 28768, // Rule ID 123 // GIM_CheckFeatures, GIFBS_HasUINTR_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_clui, // (intrinsic_void 10873:{ *:[iPTR] }) => (CLUI) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CLUI, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 123, GIR_Done, // Label 858: @28768 GIM_Try, /*On fail goto*//*Label 859*/ 28788, // Rule ID 124 // GIM_CheckFeatures, GIFBS_HasUINTR_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_stui, // (intrinsic_void 11193:{ *:[iPTR] }) => (STUI) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::STUI, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 124, GIR_Done, // Label 859: @28788 GIM_Try, /*On fail goto*//*Label 860*/ 28806, // Rule ID 2202 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_pause, // (intrinsic_void 11088:{ *:[iPTR] }) => (PAUSE) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PAUSE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2202, GIR_Done, // Label 860: @28806 GIM_Try, /*On fail goto*//*Label 861*/ 28826, // Rule ID 2203 // GIM_CheckFeatures, GIFBS_HasSSE1, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse_sfence, // (intrinsic_void 11050:{ *:[iPTR] }) => (SFENCE) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SFENCE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2203, GIR_Done, // Label 861: @28826 GIM_Try, /*On fail goto*//*Label 862*/ 28846, // Rule ID 2204 // GIM_CheckFeatures, GIFBS_HasSSE2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_lfence, // (intrinsic_void 11077:{ *:[iPTR] }) => (LFENCE) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LFENCE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2204, GIR_Done, // Label 862: @28846 GIM_Try, /*On fail goto*//*Label 863*/ 28866, // Rule ID 2205 // GIM_CheckFeatures, GIFBS_HasMFence, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_mfence, // (intrinsic_void 11081:{ *:[iPTR] }) => (MFENCE) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MFENCE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2205, GIR_Done, // Label 863: @28866 GIM_Try, /*On fail goto*//*Label 864*/ 28882, // Rule ID 3111 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_avx_vzeroall, // (intrinsic_void 10026:{ *:[iPTR] }) => (VZEROALL) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VZEROALL, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3111, GIR_Done, // Label 864: @28882 GIM_Try, /*On fail goto*//*Label 865*/ 28898, // Rule ID 3112 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_avx_vzeroupper, // (intrinsic_void 10027:{ *:[iPTR] }) => (VZEROUPPER) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VZEROUPPER, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3112, GIR_Done, // Label 865: @28898 GIM_Try, /*On fail goto*//*Label 866*/ 28918, // Rule ID 15174 // GIM_CheckFeatures, GIFBS_HasMMX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mmx_emms, // (intrinsic_void 10908:{ *:[iPTR] }) => (MMX_EMMS:{ *:[x86mmx] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MMX_EMMS, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15174, GIR_Done, // Label 866: @28918 GIM_Try, /*On fail goto*//*Label 867*/ 28938, // Rule ID 15393 // GIM_CheckFeatures, GIFBS_Has3DNow, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mmx_femms, // (intrinsic_void 10909:{ *:[iPTR] }) => (FEMMS:{ *:[x86mmx] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::FEMMS, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15393, GIR_Done, // Label 867: @28938 GIM_Try, /*On fail goto*//*Label 868*/ 28958, // Rule ID 15408 // GIM_CheckFeatures, GIFBS_HasRTM, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xend, // (intrinsic_void 11261:{ *:[iPTR] }) => (XEND) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XEND, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15408, GIR_Done, // Label 868: @28958 GIM_Try, /*On fail goto*//*Label 869*/ 28978, // Rule ID 15418 // GIM_CheckFeatures, GIFBS_HasAMXTILE_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_tilerelease, // (intrinsic_void 11215:{ *:[iPTR] }) => (TILERELEASE:{ *:[x86amx] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TILERELEASE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15418, GIR_Done, // Label 869: @28978 GIM_Try, /*On fail goto*//*Label 870*/ 28996, // Rule ID 15445 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wbinvd, // (intrinsic_void 11248:{ *:[iPTR] }) => (WBINVD) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WBINVD, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15445, GIR_Done, // Label 870: @28996 GIM_Try, /*On fail goto*//*Label 871*/ 29016, // Rule ID 15446 // GIM_CheckFeatures, GIFBS_HasWBNOINVD, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wbnoinvd, // (intrinsic_void 11249:{ *:[iPTR] }) => (WBNOINVD) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WBNOINVD, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15446, GIR_Done, // Label 871: @29016 GIM_Try, /*On fail goto*//*Label 872*/ 29034, // Rule ID 15451 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_saveprevssp, // (intrinsic_void 11006:{ *:[iPTR] }) => (SAVEPREVSSP) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAVEPREVSSP, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15451, GIR_Done, // Label 872: @29034 GIM_Try, /*On fail goto*//*Label 873*/ 29052, // Rule ID 15457 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_setssbsy, // (intrinsic_void 11012:{ *:[iPTR] }) => (SETSSBSY) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SETSSBSY, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15457, GIR_Done, // Label 873: @29052 GIM_Reject, // Label 854: @29053 GIM_Try, /*On fail goto*//*Label 874*/ 30039, GIM_CheckNumOperands, /*MI*/0, /*Expected*/2, GIM_Try, /*On fail goto*//*Label 875*/ 29080, // Rule ID 15442 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_int, // MIs[0] Operand 1 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 3, // (intrinsic_void 10898:{ *:[iPTR] }, 3:{ *:[i8] }) => (INT3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INT3, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15442, GIR_Done, // Label 875: @29080 GIM_Try, /*On fail goto*//*Label 876*/ 29107, // Rule ID 15410 // GIM_CheckFeatures, GIFBS_HasRTM, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xabort, // MIs[0] imm GIM_CheckIsImm, /*MI*/0, /*Op*/1, // (intrinsic_void 11259:{ *:[iPTR] }, (timm:{ *:[i8] }):$imm) => (XABORT (timm:{ *:[i8] }):$imm) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XABORT, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // imm GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15410, GIR_Done, // Label 876: @29107 GIM_Try, /*On fail goto*//*Label 877*/ 29134, // Rule ID 15420 // GIM_CheckFeatures, GIFBS_HasAMXTILE_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_tilezero, // MIs[0] src GIM_CheckIsImm, /*MI*/0, /*Op*/1, // (intrinsic_void 11218:{ *:[iPTR] }, (timm:{ *:[i8] }):$src) => (PTILEZERO (timm:{ *:[i8] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTILEZERO, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15420, GIR_Done, // Label 877: @29134 GIM_Try, /*On fail goto*//*Label 878*/ 29159, // Rule ID 15444 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_int, // MIs[0] trap GIM_CheckIsImm, /*MI*/0, /*Op*/1, // (intrinsic_void 10898:{ *:[iPTR] }, (timm:{ *:[i8] }):$trap) => (INT (timm:{ *:[i8] }):$trap) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INT, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // trap GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15444, GIR_Done, // Label 878: @29159 GIM_Try, /*On fail goto*//*Label 879*/ 29191, // Rule ID 1 // GIM_CheckFeatures, GIFBS_Not64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_flags_read_u32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 10884:{ *:[iPTR] }) => (RDFLAGS32:{ *:[i32] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFLAGS32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1, GIR_Done, // Label 879: @29191 GIM_Try, /*On fail goto*//*Label 880*/ 29223, // Rule ID 2 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_flags_read_u64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 10885:{ *:[iPTR] }) => (RDFLAGS64:{ *:[i64] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFLAGS64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2, GIR_Done, // Label 880: @29223 GIM_Try, /*On fail goto*//*Label 881*/ 29255, // Rule ID 94 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_slwpcb, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 11020:{ *:[iPTR] }) => (SLWPCB:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SLWPCB, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 94, GIR_Done, // Label 881: @29255 GIM_Try, /*On fail goto*//*Label 882*/ 29287, // Rule ID 96 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_slwpcb, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 11020:{ *:[iPTR] }) => (SLWPCB64:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SLWPCB64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 96, GIR_Done, // Label 882: @29287 GIM_Try, /*On fail goto*//*Label 883*/ 29319, // Rule ID 15407 // GIM_CheckFeatures, GIFBS_HasRTM, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xbegin, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 11260:{ *:[iPTR] }) => (XBEGIN:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XBEGIN, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15407, GIR_Done, // Label 883: @29319 GIM_Try, /*On fail goto*//*Label 884*/ 29351, // Rule ID 15474 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdfsbase_32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 10987:{ *:[iPTR] }) => (RDFSBASE:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFSBASE, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15474, GIR_Done, // Label 884: @29351 GIM_Try, /*On fail goto*//*Label 885*/ 29383, // Rule ID 15475 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdfsbase_64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 10988:{ *:[iPTR] }) => (RDFSBASE64:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFSBASE64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15475, GIR_Done, // Label 885: @29383 GIM_Try, /*On fail goto*//*Label 886*/ 29415, // Rule ID 15476 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdgsbase_32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 10989:{ *:[iPTR] }) => (RDGSBASE:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDGSBASE, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15476, GIR_Done, // Label 886: @29415 GIM_Try, /*On fail goto*//*Label 887*/ 29447, // Rule ID 15477 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdgsbase_64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 10990:{ *:[iPTR] }) => (RDGSBASE64:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDGSBASE64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15477, GIR_Done, // Label 887: @29447 GIM_Try, /*On fail goto*//*Label 888*/ 29479, // Rule ID 15483 // GIM_CheckFeatures, GIFBS_HasRDPID_Not64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdpid, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 10991:{ *:[iPTR] }) => (RDPID32:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDPID32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15483, GIR_Done, // Label 888: @29479 GIM_Try, /*On fail goto*//*Label 889*/ 29530, // Rule ID 20658 // GIM_CheckFeatures, GIFBS_HasRDPID_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdpid, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i32] } 10991:{ *:[iPTR] }) => (EXTRACT_SUBREG:{ *:[i32] } (RDPID64:{ *:[i64] }), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::RDPID64, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_32bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR32RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, // GIR_Coverage, 20658, GIR_Done, // Label 889: @29530 GIM_Try, /*On fail goto*//*Label 890*/ 29562, // Rule ID 3 // GIM_CheckFeatures, GIFBS_Not64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_flags_write_u32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 10886:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFLAGS32:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFLAGS32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3, GIR_Done, // Label 890: @29562 GIM_Try, /*On fail goto*//*Label 891*/ 29594, // Rule ID 4 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_flags_write_u64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 10887:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFLAGS64:{ *:[i64] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFLAGS64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4, GIR_Done, // Label 891: @29594 GIM_Try, /*On fail goto*//*Label 892*/ 29626, // Rule ID 125 // GIM_CheckFeatures, GIFBS_HasUINTR_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_senduipi, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 11010:{ *:[iPTR] }, GR64:{ *:[i64] }:$arg) => (SENDUIPI GR64:{ *:[i64] }:$arg) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SENDUIPI, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // arg GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 125, GIR_Done, // Label 892: @29626 GIM_Try, /*On fail goto*//*Label 893*/ 29656, // Rule ID 15447 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_incsspd, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 10896:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (INCSSPD GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INCSSPD, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15447, GIR_Done, // Label 893: @29656 GIM_Try, /*On fail goto*//*Label 894*/ 29686, // Rule ID 15448 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_incsspq, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 10897:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (INCSSPQ GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INCSSPQ, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15448, GIR_Done, // Label 894: @29686 GIM_Try, /*On fail goto*//*Label 895*/ 29718, // Rule ID 15478 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrfsbase_32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 11250:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFSBASE GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFSBASE, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15478, GIR_Done, // Label 895: @29718 GIM_Try, /*On fail goto*//*Label 896*/ 29750, // Rule ID 15479 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrfsbase_64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 11251:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFSBASE64 GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFSBASE64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15479, GIR_Done, // Label 896: @29750 GIM_Try, /*On fail goto*//*Label 897*/ 29782, // Rule ID 15480 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrgsbase_32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 11252:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRGSBASE GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRGSBASE, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15480, GIR_Done, // Label 897: @29782 GIM_Try, /*On fail goto*//*Label 898*/ 29814, // Rule ID 15481 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrgsbase_64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 11253:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRGSBASE64 GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRGSBASE64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15481, GIR_Done, // Label 898: @29814 GIM_Try, /*On fail goto*//*Label 899*/ 29846, // Rule ID 15486 // GIM_CheckFeatures, GIFBS_HasPTWRITE, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_ptwrite32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 10985:{ *:[iPTR] }, GR32:{ *:[i32] }:$dst) => (PTWRITEr GR32:{ *:[i32] }:$dst) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTWRITEr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15486, GIR_Done, // Label 899: @29846 GIM_Try, /*On fail goto*//*Label 900*/ 29878, // Rule ID 15487 // GIM_CheckFeatures, GIFBS_HasPTWRITE_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_ptwrite64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 10986:{ *:[iPTR] }, GR64:{ *:[i64] }:$dst) => (PTWRITE64r GR64:{ *:[i64] }:$dst) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTWRITE64r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15487, GIR_Done, // Label 900: @29878 GIM_Try, /*On fail goto*//*Label 901*/ 29910, // Rule ID 93 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_llwpcb, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 10902:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (LLWPCB GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LLWPCB, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 93, GIR_Done, // Label 901: @29910 GIM_Try, /*On fail goto*//*Label 902*/ 29942, // Rule ID 95 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_llwpcb, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 10902:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (LLWPCB64 GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LLWPCB64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 95, GIR_Done, // Label 902: @29942 GIM_Try, /*On fail goto*//*Label 903*/ 29974, // Rule ID 105 // GIM_CheckFeatures, GIFBS_HasWAITPKG_Not64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (intrinsic_void 11221:{ *:[iPTR] }, GR16:{ *:[i16] }:$src) => (UMONITOR16 GR16:{ *:[i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR16, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 105, GIR_Done, // Label 903: @29974 GIM_Try, /*On fail goto*//*Label 904*/ 30006, // Rule ID 106 // GIM_CheckFeatures, GIFBS_HasWAITPKG, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 11221:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (UMONITOR32 GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 106, GIR_Done, // Label 904: @30006 GIM_Try, /*On fail goto*//*Label 905*/ 30038, // Rule ID 107 // GIM_CheckFeatures, GIFBS_HasWAITPKG_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 11221:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (UMONITOR64 GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 107, GIR_Done, // Label 905: @30038 GIM_Reject, // Label 874: @30039 GIM_Try, /*On fail goto*//*Label 906*/ 30224, GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, GIM_Try, /*On fail goto*//*Label 907*/ 30081, // Rule ID 15507 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::asan_check_memaccess, // MIs[0] addr GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64PLTSafeRegClassID, // MIs[0] accessinfo GIM_CheckIsImm, /*MI*/0, /*Op*/2, // (intrinsic_void 6:{ *:[iPTR] }, GR64PLTSafe:{ *:[i64] }:$addr, (timm:{ *:[i32] }):$accessinfo) => (ASAN_CHECK_MEMACCESS:{ *:[i64] } GR64PLTSafe:{ *:[i64] }:$addr, (timm:{ *:[i32] }):$accessinfo) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ASAN_CHECK_MEMACCESS, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // addr GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // accessinfo GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15507, GIR_Done, // Label 907: @30081 GIM_Try, /*On fail goto*//*Label 908*/ 30123, // Rule ID 15449 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdsspd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 11001:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (RDSSPD:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDSSPD, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15449, GIR_Done, // Label 908: @30123 GIM_Try, /*On fail goto*//*Label 909*/ 30165, // Rule ID 15450 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdsspq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 11002:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (RDSSPQ:{ *:[i64] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDSSPQ, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15450, GIR_Done, // Label 909: @30165 GIM_Try, /*On fail goto*//*Label 910*/ 30223, // Rule ID 2778 // GIM_CheckFeatures, GIFBS_HasSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse3_mwait, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32_CB_and_GR32_DCRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32_ADRegClassID, // (intrinsic_void 11126:{ *:[iPTR] }, ECX:{ *:[i32] }, EAX:{ *:[i32] }) => (MWAITrr) GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/2, X86::EAX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/2, // EAX GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::ECX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // ECX GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MWAITrr, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2778, GIR_Done, // Label 910: @30223 GIM_Reject, // Label 906: @30224 GIM_Try, /*On fail goto*//*Label 911*/ 30961, GIM_CheckNumOperands, /*MI*/0, /*Expected*/4, GIM_Try, /*On fail goto*//*Label 912*/ 30270, // Rule ID 15425 // GIM_CheckFeatures, GIFBS_HasAMXINT8_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_tdpbssd, // MIs[0] src1 GIM_CheckIsImm, /*MI*/0, /*Op*/1, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/2, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 11200:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBSSD (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTDPBSSD, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15425, GIR_Done, // Label 912: @30270 GIM_Try, /*On fail goto*//*Label 913*/ 30311, // Rule ID 15426 // GIM_CheckFeatures, GIFBS_HasAMXINT8_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_tdpbsud, // MIs[0] src1 GIM_CheckIsImm, /*MI*/0, /*Op*/1, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/2, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 11202:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBSUD (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTDPBSUD, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15426, GIR_Done, // Label 913: @30311 GIM_Try, /*On fail goto*//*Label 914*/ 30352, // Rule ID 15427 // GIM_CheckFeatures, GIFBS_HasAMXINT8_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_tdpbusd, // MIs[0] src1 GIM_CheckIsImm, /*MI*/0, /*Op*/1, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/2, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 11204:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBUSD (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTDPBUSD, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15427, GIR_Done, // Label 914: @30352 GIM_Try, /*On fail goto*//*Label 915*/ 30393, // Rule ID 15428 // GIM_CheckFeatures, GIFBS_HasAMXINT8_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_tdpbuud, // MIs[0] src1 GIM_CheckIsImm, /*MI*/0, /*Op*/1, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/2, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 11206:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBUUD (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTDPBUUD, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15428, GIR_Done, // Label 915: @30393 GIM_Try, /*On fail goto*//*Label 916*/ 30434, // Rule ID 15430 // GIM_CheckFeatures, GIFBS_HasAMXBF16_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_tdpbf16ps, // MIs[0] src1 GIM_CheckIsImm, /*MI*/0, /*Op*/1, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/2, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 11198:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPBF16PS (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTDPBF16PS, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15430, GIR_Done, // Label 916: @30434 GIM_Try, /*On fail goto*//*Label 917*/ 30475, // Rule ID 15432 // GIM_CheckFeatures, GIFBS_HasAMXFP16_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_tdpfp16ps, // MIs[0] src1 GIM_CheckIsImm, /*MI*/0, /*Op*/1, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/2, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 11208:{ *:[iPTR] }, (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) => (PTDPFP16PS (timm:{ *:[i8] }):$src1, (timm:{ *:[i8] }):$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTDPFP16PS, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15432, GIR_Done, // Label 917: @30475 GIM_Try, /*On fail goto*//*Label 918*/ 30526, // Rule ID 101 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_lwpval32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // MIs[0] cntl GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 10906:{ *:[iPTR] }, GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) => (LWPVAL32rri GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LWPVAL32rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // cntl GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 101, GIR_Done, // Label 918: @30526 GIM_Try, /*On fail goto*//*Label 919*/ 30577, // Rule ID 103 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_lwpval64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // MIs[0] cntl GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 10907:{ *:[iPTR] }, GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) => (LWPVAL64rri GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LWPVAL64rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // cntl GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 103, GIR_Done, // Label 919: @30577 GIM_Try, /*On fail goto*//*Label 920*/ 30652, // Rule ID 15459 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xsetbv, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32_CB_and_GR32_DCRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32_AD_and_GR32_DCRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32_ADRegClassID, // (intrinsic_void 11322:{ *:[iPTR] }, ECX:{ *:[i32] }, EDX:{ *:[i32] }, EAX:{ *:[i32] }) => (XSETBV) GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/3, X86::EAX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/3, // EAX GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/2, X86::EDX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/2, // EDX GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::ECX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // ECX GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XSETBV, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15459, GIR_Done, // Label 920: @30652 GIM_Try, /*On fail goto*//*Label 921*/ 30708, // Rule ID 15646 // GIM_CheckFeatures, GIFBS_HasMWAITX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mwaitx, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID, // (intrinsic_void 10981:{ *:[iPTR] }, GR32:{ *:[i32] }:$ecx, GR32:{ *:[i32] }:$eax, GR32:{ *:[i32] }:$ebx) => (MWAITX GR32:{ *:[i32] }:$ecx, GR32:{ *:[i32] }:$eax, GR32:{ *:[i32] }:$ebx) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MWAITX, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // ecx GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // eax GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // ebx GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15646, GIR_Done, // Label 921: @30708 GIM_Try, /*On fail goto*//*Label 922*/ 30771, // Rule ID 2595 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_maskmov_dqu, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] Operand 3 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32_DIBP_and_GR32_SIDIRegClassID, // (intrinsic_void 11078:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, EDI:{ *:[i32] }) => (VMASKMOVDQU VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::EDI, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // EDI GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMASKMOVDQU, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // mask GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2595, GIR_Done, // Label 922: @30771 GIM_Try, /*On fail goto*//*Label 923*/ 30834, // Rule ID 2596 // GIM_CheckFeatures, GIFBS_HasAVX_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_maskmov_dqu, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] Operand 3 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64_with_sub_32bit_in_GR32_DIBP_and_GR32_SIDIRegClassID, // (intrinsic_void 11078:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, RDI:{ *:[i64] }) => (VMASKMOVDQU64 VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::RDI, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // RDI GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMASKMOVDQU64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // mask GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2596, GIR_Done, // Label 923: @30834 GIM_Try, /*On fail goto*//*Label 924*/ 30897, // Rule ID 2597 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_maskmov_dqu, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] Operand 3 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32_DIBP_and_GR32_SIDIRegClassID, // (intrinsic_void 11078:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, EDI:{ *:[i32] }) => (MASKMOVDQU VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::EDI, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // EDI GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MASKMOVDQU, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // mask GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2597, GIR_Done, // Label 924: @30897 GIM_Try, /*On fail goto*//*Label 925*/ 30960, // Rule ID 2598 // GIM_CheckFeatures, GIFBS_In64BitMode_UseSSE2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_maskmov_dqu, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] Operand 3 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64_with_sub_32bit_in_GR32_DIBP_and_GR32_SIDIRegClassID, // (intrinsic_void 11078:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, RDI:{ *:[i64] }) => (MASKMOVDQU64 VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::RDI, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // RDI GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MASKMOVDQU64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // mask GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2598, GIR_Done, // Label 925: @30960 GIM_Reject, // Label 911: @30961 GIM_Try, /*On fail goto*//*Label 926*/ 31046, // Rule ID 15411 // GIM_CheckFeatures, GIFBS_HasKL, GIM_CheckNumOperands, /*MI*/0, /*Expected*/5, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_loadiwkey, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::GR32_ADRegClassID, // (intrinsic_void 10903:{ *:[iPTR] }, XMM0:{ *:[v2i64] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, EAX:{ *:[i32] }) => (LOADIWKEY:{ *:[i32] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/2, X86::EAX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/4, // EAX GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::XMM0, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // XMM0 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LOADIWKEY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15411, GIR_Done, // Label 926: @31046 GIM_Reject, // Label 11: @31047 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 5, /*)*//*default:*//*Label 930*/ 31457, /*GILLT_s16*//*Label 927*/ 31056, /*GILLT_s32*//*Label 928*/ 31110, /*GILLT_s64*//*Label 929*/ 31281, // Label 927: @31056 GIM_Try, /*On fail goto*//*Label 931*/ 31109, // Rule ID 20847 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (anyext:{ *:[i16] } GR8:{ *:[i8] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr8, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_16bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 20847, GIR_Done, // Label 931: @31109 GIM_Reject, // Label 928: @31110 GIM_Try, /*On fail goto*//*Label 932*/ 31155, // Rule ID 17876 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (anyext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR32RegClassID, // GIR_Coverage, 17876, GIR_Done, // Label 932: @31155 GIM_Try, /*On fail goto*//*Label 933*/ 31200, // Rule ID 17879 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (anyext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK8:{ *:[v8i1] }:$src, GR32:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR32RegClassID, // GIR_Coverage, 17879, GIR_Done, // Label 933: @31200 GIM_Try, /*On fail goto*//*Label 934*/ 31221, // Rule ID 20848 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (anyext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20848, GIR_Done, // Label 934: @31221 GIM_Try, /*On fail goto*//*Label 935*/ 31280, // Rule ID 20849 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (anyext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/4, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, X86::GR16RegClassID, // GIR_Coverage, 20849, GIR_Done, // Label 935: @31280 GIM_Reject, // Label 929: @31281 GIM_Try, /*On fail goto*//*Label 936*/ 31339, // Rule ID 20850 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (anyext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr8, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR64RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, X86::GR32RegClassID, // GIR_Coverage, 20850, GIR_Done, // Label 936: @31339 GIM_Try, /*On fail goto*//*Label 937*/ 31397, // Rule ID 20851 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (anyext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr16, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR64RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, X86::GR32RegClassID, // GIR_Coverage, 20851, GIR_Done, // Label 937: @31397 GIM_Try, /*On fail goto*//*Label 938*/ 31456, // Rule ID 20852 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (anyext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR32:{ *:[i32] }:$src, sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR64RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR64RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, X86::GR32RegClassID, // GIR_Coverage, 20852, GIR_Done, // Label 938: @31456 GIM_Reject, // Label 930: @31457 GIM_Reject, // Label 12: @31458 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 22, /*)*//*default:*//*Label 947*/ 32315, /*GILLT_s8*//*Label 939*/ 31485, /*GILLT_s16*//*Label 940*/ 31740, 0, 0, 0, 0, 0, 0, 0, /*GILLT_v4s32*//*Label 941*/ 31778, 0, 0, /*GILLT_v8s16*//*Label 942*/ 31901, /*GILLT_v8s32*//*Label 943*/ 32048, 0, 0, /*GILLT_v16s8*//*Label 944*/ 32072, /*GILLT_v16s16*//*Label 945*/ 32267, 0, 0, /*GILLT_v32s8*//*Label 946*/ 32291, // Label 939: @31485 GIM_Try, /*On fail goto*//*Label 948*/ 31551, // Rule ID 17871 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (trunc:{ *:[i8] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (EXTRACT_SUBREG:{ *:[i8] } (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] }), sub_8bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_8bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR8RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 17871, GIR_Done, // Label 948: @31551 GIM_Try, /*On fail goto*//*Label 949*/ 31606, // Rule ID 20893 // GIM_CheckFeatures, GIFBS_Not64BitMode, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32_ABCDRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (trunc:{ *:[i8] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } (COPY_TO_REGCLASS:{ *:[i32] } GR32:{ *:[i32] }:$src, GR32_ABCD:{ *:[i32] }), sub_8bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_8bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR8_ABCD_LRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32_ABCDRegClassID, // GIR_Coverage, 20893, GIR_Done, // Label 949: @31606 GIM_Try, /*On fail goto*//*Label 950*/ 31661, // Rule ID 20894 // GIM_CheckFeatures, GIFBS_Not64BitMode, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16_ABCDRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (trunc:{ *:[i8] } GR16:{ *:[i16] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } (COPY_TO_REGCLASS:{ *:[i16] } GR16:{ *:[i16] }:$src, GR16_ABCD:{ *:[i32] }), sub_8bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_8bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR8_ABCD_LRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR16_ABCDRegClassID, // GIR_Coverage, 20894, GIR_Done, // Label 950: @31661 GIM_Try, /*On fail goto*//*Label 951*/ 31700, // Rule ID 20898 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (trunc:{ *:[i8] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src, sub_8bit:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR8RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 20898, GIR_Done, // Label 951: @31700 GIM_Try, /*On fail goto*//*Label 952*/ 31739, // Rule ID 20899 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (trunc:{ *:[i8] } GR16:{ *:[i16] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR16:{ *:[i16] }:$src, sub_8bit:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR8RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR16RegClassID, // GIR_Coverage, 20899, GIR_Done, // Label 952: @31739 GIM_Reject, // Label 940: @31740 GIM_Try, /*On fail goto*//*Label 953*/ 31777, // Rule ID 20892 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (trunc:{ *:[i16] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src, sub_16bit:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/4, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 20892, GIR_Done, // Label 953: @31777 GIM_Reject, // Label 941: @31778 GIM_Try, /*On fail goto*//*Label 954*/ 31900, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 955*/ 31803, // Rule ID 11967 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src) => (VPMOVQDZ256rr:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11967, GIR_Done, // Label 955: @31803 GIM_Try, /*On fail goto*//*Label 956*/ 31899, // Rule ID 20012 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPMOVQDZrr:{ *:[v8i32] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVQDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR256XRegClassID, // GIR_Coverage, 20012, GIR_Done, // Label 956: @31899 GIM_Reject, // Label 954: @31900 GIM_Reject, // Label 942: @31901 GIM_Try, /*On fail goto*//*Label 957*/ 31924, // Rule ID 11943 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src) => (VPMOVQWZrr:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11943, GIR_Done, // Label 957: @31924 GIM_Try, /*On fail goto*//*Label 958*/ 31947, // Rule ID 12021 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src) => (VPMOVDWZ256rr:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12021, GIR_Done, // Label 958: @31947 GIM_Try, /*On fail goto*//*Label 959*/ 32047, // Rule ID 20011 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src) => (EXTRACT_SUBREG:{ *:[v8i16] } (VPMOVDWZrr:{ *:[v16i16] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVDWZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR256XRegClassID, // GIR_Coverage, 20011, GIR_Done, // Label 959: @32047 GIM_Reject, // Label 943: @32048 GIM_Try, /*On fail goto*//*Label 960*/ 32071, // Rule ID 11970 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src) => (VPMOVQDZrr:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11970, GIR_Done, // Label 960: @32071 GIM_Reject, // Label 944: @32072 GIM_Try, /*On fail goto*//*Label 961*/ 32095, // Rule ID 11997 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11997, GIR_Done, // Label 961: @32095 GIM_Try, /*On fail goto*//*Label 962*/ 32118, // Rule ID 12048 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) => (VPMOVWBZ256rr:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVWBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12048, GIR_Done, // Label 962: @32118 GIM_Try, /*On fail goto*//*Label 963*/ 32218, // Rule ID 20013 // GIM_CheckFeatures, GIFBS_HasBWI_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) => (EXTRACT_SUBREG:{ *:[v16i8] } (VPMOVWBZrr:{ *:[v32i8] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVWBZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR256XRegClassID, // GIR_Coverage, 20013, GIR_Done, // Label 963: @32218 GIM_Try, /*On fail goto*//*Label 964*/ 32266, // Rule ID 20104 // GIM_CheckFeatures, GIFBS_HasAVX512_NoBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } (VPMOVZXWDZrr:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVZXWDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDBZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20104, GIR_Done, // Label 964: @32266 GIM_Reject, // Label 945: @32267 GIM_Try, /*On fail goto*//*Label 965*/ 32290, // Rule ID 12024 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src) => (VPMOVDWZrr:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12024, GIR_Done, // Label 965: @32290 GIM_Reject, // Label 946: @32291 GIM_Try, /*On fail goto*//*Label 966*/ 32314, // Rule ID 12051 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src) => (VPMOVWBZrr:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVWBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12051, GIR_Done, // Label 966: @32314 GIM_Reject, // Label 947: @32315 GIM_Reject, // Label 13: @32316 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 971*/ 32584, /*GILLT_s8*//*Label 967*/ 32326, /*GILLT_s16*//*Label 968*/ 32348, /*GILLT_s32*//*Label 969*/ 32370, /*GILLT_s64*//*Label 970*/ 32488, // Label 967: @32326 GIM_Try, /*On fail goto*//*Label 972*/ 32347, // Rule ID 19 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i8] }):$src => (MOV8ri:{ *:[i8] } (imm:{ *:[i8] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19, GIR_Done, // Label 972: @32347 GIM_Reject, // Label 968: @32348 GIM_Try, /*On fail goto*//*Label 973*/ 32369, // Rule ID 20 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i16] }):$src => (MOV16ri:{ *:[i16] } (imm:{ *:[i16] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20, GIR_Done, // Label 973: @32369 GIM_Reject, // Label 969: @32370 GIM_Try, /*On fail goto*//*Label 974*/ 32392, // Rule ID 15508 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // MIs[0] Operand 1 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 0, // 0:{ *:[i32] } => (MOV32r0:{ *:[i32] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15508, GIR_Done, // Label 974: @32392 GIM_Try, /*On fail goto*//*Label 975*/ 32416, // Rule ID 15509 // GIM_CheckFeatures, GIFBS_Not64BitMode_OptForSize, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // MIs[0] Operand 1 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 1, // 1:{ *:[i32] } => (MOV32r1:{ *:[i32] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15509, GIR_Done, // Label 975: @32416 GIM_Try, /*On fail goto*//*Label 976*/ 32440, // Rule ID 15510 // GIM_CheckFeatures, GIFBS_Not64BitMode_OptForSize, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // MIs[0] Operand 1 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, -1, // -1:{ *:[i32] } => (MOV32r_1:{ *:[i32] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r_1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15510, GIR_Done, // Label 976: @32440 GIM_Try, /*On fail goto*//*Label 977*/ 32466, // Rule ID 15511 // GIM_CheckFeatures, GIFBS_NotWin64WithoutFP_OptForMinSize, GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i32] })<>:$src => (MOV32ImmSExti8:{ *:[i32] } (imm:{ *:[i32] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32ImmSExti8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15511, GIR_Done, // Label 977: @32466 GIM_Try, /*On fail goto*//*Label 978*/ 32487, // Rule ID 21 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i32] }):$src => (MOV32ri:{ *:[i32] } (imm:{ *:[i32] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 21, GIR_Done, // Label 978: @32487 GIM_Reject, // Label 970: @32488 GIM_Try, /*On fail goto*//*Label 979*/ 32514, // Rule ID 15512 // GIM_CheckFeatures, GIFBS_NotWin64WithoutFP_OptForMinSize, GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i64] })<>:$src => (MOV64ImmSExti8:{ *:[i64] } (imm:{ *:[i64] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ImmSExti8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15512, GIR_Done, // Label 979: @32514 GIM_Try, /*On fail goto*//*Label 980*/ 32538, // Rule ID 15513 // GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i64immZExt32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i64] })<>:$src => (MOV32ri64:{ *:[i64] } (imm:{ *:[i64] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32ri64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15513, GIR_Done, // Label 980: @32538 GIM_Try, /*On fail goto*//*Label 981*/ 32562, // Rule ID 22 // GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i64] })<>:$src => (MOV64ri32:{ *:[i64] } (imm:{ *:[i64] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22, GIR_Done, // Label 981: @32562 GIM_Try, /*On fail goto*//*Label 982*/ 32583, // Rule ID 23 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i64] }):$src => (MOV64ri:{ *:[i64] } (imm:{ *:[i64] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 23, GIR_Done, // Label 982: @32583 GIM_Reject, // Label 971: @32584 GIM_Reject, // Label 14: @32585 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 986*/ 32735, /*GILLT_s32*//*Label 983*/ 32594, /*GILLT_s64*//*Label 984*/ 32641, /*GILLT_s80*//*Label 985*/ 32688, // Label 983: @32594 GIM_Try, /*On fail goto*//*Label 987*/ 32617, // Rule ID 848 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f32] })<> => (LD_Fp032:{ *:[f32] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp032, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 848, GIR_Done, // Label 987: @32617 GIM_Try, /*On fail goto*//*Label 988*/ 32640, // Rule ID 849 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f32] })<> => (LD_Fp132:{ *:[f32] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp132, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 849, GIR_Done, // Label 988: @32640 GIM_Reject, // Label 984: @32641 GIM_Try, /*On fail goto*//*Label 989*/ 32664, // Rule ID 850 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f64] })<> => (LD_Fp064:{ *:[f64] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp064, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 850, GIR_Done, // Label 989: @32664 GIM_Try, /*On fail goto*//*Label 990*/ 32687, // Rule ID 851 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f64] })<> => (LD_Fp164:{ *:[f64] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp164, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 851, GIR_Done, // Label 990: @32687 GIM_Reject, // Label 985: @32688 GIM_Try, /*On fail goto*//*Label 991*/ 32711, // Rule ID 852 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f80] })<> => (LD_Fp080:{ *:[f80] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp080, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 852, GIR_Done, // Label 991: @32711 GIM_Try, /*On fail goto*//*Label 992*/ 32734, // Rule ID 853 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f80] })<> => (LD_Fp180:{ *:[f80] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp180, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 853, GIR_Done, // Label 992: @32734 GIM_Reject, // Label 986: @32735 GIM_Reject, // Label 15: @32736 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 25, /*)*//*default:*//*Label 1008*/ 33595, /*GILLT_s16*//*Label 993*/ 32765, /*GILLT_s32*//*Label 994*/ 32819, /*GILLT_s64*//*Label 995*/ 32862, 0, 0, 0, /*GILLT_v2s64*//*Label 996*/ 32928, 0, /*GILLT_v4s32*//*Label 997*/ 32952, /*GILLT_v4s64*//*Label 998*/ 32976, 0, /*GILLT_v8s16*//*Label 999*/ 33046, /*GILLT_v8s32*//*Label 1000*/ 33109, /*GILLT_v8s64*//*Label 1001*/ 33179, 0, /*GILLT_v16s8*//*Label 1002*/ 33249, /*GILLT_v16s16*//*Label 1003*/ 33312, /*GILLT_v16s32*//*Label 1004*/ 33430, 0, /*GILLT_v32s8*//*Label 1005*/ 33500, /*GILLT_v32s16*//*Label 1006*/ 33524, 0, /*GILLT_v64s8*//*Label 1007*/ 33571, // Label 993: @32765 GIM_Try, /*On fail goto*//*Label 1009*/ 32818, // Rule ID 20888 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (sext:{ *:[i16] } GR8:{ *:[i8] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (MOVSX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVSX32rr8, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_16bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 20888, GIR_Done, // Label 1009: @32818 GIM_Reject, // Label 994: @32819 GIM_Try, /*On fail goto*//*Label 1010*/ 32840, // Rule ID 417 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (sext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVSX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX32rr8, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 417, GIR_Done, // Label 1010: @32840 GIM_Try, /*On fail goto*//*Label 1011*/ 32861, // Rule ID 419 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (sext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVSX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX32rr16, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 419, GIR_Done, // Label 1011: @32861 GIM_Reject, // Label 995: @32862 GIM_Try, /*On fail goto*//*Label 1012*/ 32883, // Rule ID 425 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (sext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (MOVSX64rr8:{ *:[i64] } GR8:{ *:[i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr8, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 425, GIR_Done, // Label 1012: @32883 GIM_Try, /*On fail goto*//*Label 1013*/ 32904, // Rule ID 427 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (sext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (MOVSX64rr16:{ *:[i64] } GR16:{ *:[i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr16, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 427, GIR_Done, // Label 1013: @32904 GIM_Try, /*On fail goto*//*Label 1014*/ 32927, // Rule ID 429 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (MOVSX64rr32:{ *:[i64] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr32, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 429, GIR_Done, // Label 1014: @32927 GIM_Reject, // Label 996: @32928 GIM_Try, /*On fail goto*//*Label 1015*/ 32951, // Rule ID 12299 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, // (sext:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) => (VPMOVM2QZ128rr:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12299, GIR_Done, // Label 1015: @32951 GIM_Reject, // Label 997: @32952 GIM_Try, /*On fail goto*//*Label 1016*/ 32975, // Rule ID 12296 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, // (sext:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2DZ128rr:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12296, GIR_Done, // Label 1016: @32975 GIM_Reject, // Label 998: @32976 GIM_Try, /*On fail goto*//*Label 1017*/ 32999, // Rule ID 12276 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) => (VPMOVSXDQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12276, GIR_Done, // Label 1017: @32999 GIM_Try, /*On fail goto*//*Label 1018*/ 33022, // Rule ID 12298 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, // (sext:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2QZ256rr:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12298, GIR_Done, // Label 1018: @33022 GIM_Try, /*On fail goto*//*Label 1019*/ 33045, // Rule ID 16825 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sext:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) => (VPMOVSXDQYrr:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXDQYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16825, GIR_Done, // Label 1019: @33045 GIM_Reject, // Label 999: @33046 GIM_Try, /*On fail goto*//*Label 1020*/ 33108, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_Try, /*On fail goto*//*Label 1021*/ 33071, // Rule ID 12293 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, // (sext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2WZ128rr:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12293, GIR_Done, // Label 1021: @33071 GIM_Try, /*On fail goto*//*Label 1022*/ 33107, // Rule ID 20116 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX_NoBWI, // (sext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVDWZ256rr:{ *:[v8i16] } (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZ256rr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDWZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20116, GIR_Done, // Label 1022: @33107 GIM_Reject, // Label 1020: @33108 GIM_Reject, // Label 1000: @33109 GIM_Try, /*On fail goto*//*Label 1023*/ 33132, // Rule ID 12240 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) => (VPMOVSXWDZ256rr:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXWDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12240, GIR_Done, // Label 1023: @33132 GIM_Try, /*On fail goto*//*Label 1024*/ 33155, // Rule ID 12295 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, // (sext:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12295, GIR_Done, // Label 1024: @33155 GIM_Try, /*On fail goto*//*Label 1025*/ 33178, // Rule ID 16823 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sext:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) => (VPMOVSXWDYrr:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXWDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16823, GIR_Done, // Label 1025: @33178 GIM_Reject, // Label 1001: @33179 GIM_Try, /*On fail goto*//*Label 1026*/ 33202, // Rule ID 12264 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) => (VPMOVSXWQZrr:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXWQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12264, GIR_Done, // Label 1026: @33202 GIM_Try, /*On fail goto*//*Label 1027*/ 33225, // Rule ID 12282 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sext:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) => (VPMOVSXDQZrr:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12282, GIR_Done, // Label 1027: @33225 GIM_Try, /*On fail goto*//*Label 1028*/ 33248, // Rule ID 12297 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, // (sext:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2QZrr:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12297, GIR_Done, // Label 1028: @33248 GIM_Reject, // Label 1002: @33249 GIM_Try, /*On fail goto*//*Label 1029*/ 33311, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_Try, /*On fail goto*//*Label 1030*/ 33274, // Rule ID 12290 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2BZ128rr:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12290, GIR_Done, // Label 1030: @33274 GIM_Try, /*On fail goto*//*Label 1031*/ 33310, // Rule ID 20114 // GIM_CheckFeatures, GIFBS_HasDQI_NoBWI, // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDBZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20114, GIR_Done, // Label 1031: @33310 GIM_Reject, // Label 1029: @33311 GIM_Reject, // Label 1003: @33312 GIM_Try, /*On fail goto*//*Label 1032*/ 33335, // Rule ID 12186 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) => (VPMOVSXBWZ256rr:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXBWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12186, GIR_Done, // Label 1032: @33335 GIM_Try, /*On fail goto*//*Label 1033*/ 33358, // Rule ID 12292 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2WZ256rr:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12292, GIR_Done, // Label 1033: @33358 GIM_Try, /*On fail goto*//*Label 1034*/ 33381, // Rule ID 16820 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sext:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) => (VPMOVSXBWYrr:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXBWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16820, GIR_Done, // Label 1034: @33381 GIM_Try, /*On fail goto*//*Label 1035*/ 33429, // Rule ID 20115 // GIM_CheckFeatures, GIFBS_HasDQI_NoBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVDWZrr:{ *:[v16i16] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDWZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20115, GIR_Done, // Label 1035: @33429 GIM_Reject, // Label 1004: @33430 GIM_Try, /*On fail goto*//*Label 1036*/ 33453, // Rule ID 12210 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) => (VPMOVSXBDZrr:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXBDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12210, GIR_Done, // Label 1036: @33453 GIM_Try, /*On fail goto*//*Label 1037*/ 33476, // Rule ID 12246 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sext:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) => (VPMOVSXWDZrr:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXWDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12246, GIR_Done, // Label 1037: @33476 GIM_Try, /*On fail goto*//*Label 1038*/ 33499, // Rule ID 12294 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, // (sext:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12294, GIR_Done, // Label 1038: @33499 GIM_Reject, // Label 1005: @33500 GIM_Try, /*On fail goto*//*Label 1039*/ 33523, // Rule ID 12289 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (sext:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2BZ256rr:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12289, GIR_Done, // Label 1039: @33523 GIM_Reject, // Label 1006: @33524 GIM_Try, /*On fail goto*//*Label 1040*/ 33547, // Rule ID 12192 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sext:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) => (VPMOVSXBWZrr:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXBWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12192, GIR_Done, // Label 1040: @33547 GIM_Try, /*On fail goto*//*Label 1041*/ 33570, // Rule ID 12291 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (sext:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2WZrr:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12291, GIR_Done, // Label 1041: @33570 GIM_Reject, // Label 1007: @33571 GIM_Try, /*On fail goto*//*Label 1042*/ 33594, // Rule ID 12288 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, // (sext:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) => (VPMOVM2BZrr:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12288, GIR_Done, // Label 1042: @33594 GIM_Reject, // Label 1008: @33595 GIM_Reject, // Label 16: @33596 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 1052*/ 34383, /*GILLT_s16*//*Label 1043*/ 33623, /*GILLT_s32*//*Label 1044*/ 33677, /*GILLT_s64*//*Label 1045*/ 33808, 0, 0, 0, 0, 0, 0, /*GILLT_v4s64*//*Label 1046*/ 34127, 0, 0, /*GILLT_v8s32*//*Label 1047*/ 34173, /*GILLT_v8s64*//*Label 1048*/ 34219, 0, 0, /*GILLT_v16s16*//*Label 1049*/ 34266, /*GILLT_v16s32*//*Label 1050*/ 34312, 0, 0, /*GILLT_v32s16*//*Label 1051*/ 34359, // Label 1043: @33623 GIM_Try, /*On fail goto*//*Label 1053*/ 33676, // Rule ID 20890 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (zext:{ *:[i16] } GR8:{ *:[i8] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr8, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_16bit, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR16RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::GR32RegClassID, // GIR_Coverage, 20890, GIR_Done, // Label 1053: @33676 GIM_Reject, // Label 1044: @33677 GIM_Try, /*On fail goto*//*Label 1054*/ 33720, // Rule ID 17874 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (zext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (KMOVWrk:{ *:[i32] } VK16:{ *:[v16i1] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVWrk, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17874, GIR_Done, // Label 1054: @33720 GIM_Try, /*On fail goto*//*Label 1055*/ 33765, // Rule ID 17877 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (zext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (KMOVBrk:{ *:[i32] } VK8:{ *:[v8i1] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVBrk, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17877, GIR_Done, // Label 1055: @33765 GIM_Try, /*On fail goto*//*Label 1056*/ 33786, // Rule ID 421 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (zext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 421, GIR_Done, // Label 1056: @33786 GIM_Try, /*On fail goto*//*Label 1057*/ 33807, // Rule ID 423 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (zext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr16, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 423, GIR_Done, // Label 1057: @33807 GIM_Reject, // Label 1045: @33808 GIM_Try, /*On fail goto*//*Label 1058*/ 33879, // Rule ID 17875 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (zext:{ *:[i64] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (KMOVWrk:{ *:[i32] } VK16:{ *:[v16i1] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KMOVWrk, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR64RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, X86::GR32RegClassID, // GIR_Coverage, 17875, GIR_Done, // Label 1058: @33879 GIM_Try, /*On fail goto*//*Label 1059*/ 33952, // Rule ID 17878 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (zext:{ *:[i64] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (KMOVBrk:{ *:[i32] } VK8:{ *:[v8i1] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KMOVBrk, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR64RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, X86::GR32RegClassID, // GIR_Coverage, 17878, GIR_Done, // Label 1059: @33952 GIM_Try, /*On fail goto*//*Label 1060*/ 34010, // Rule ID 16113 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (zext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr8, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR64RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, X86::GR32RegClassID, // GIR_Coverage, 16113, GIR_Done, // Label 1060: @34010 GIM_Try, /*On fail goto*//*Label 1061*/ 34068, // Rule ID 16115 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (zext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr16, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR64RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, X86::GR32RegClassID, // GIR_Coverage, 16115, GIR_Done, // Label 1061: @34068 GIM_Try, /*On fail goto*//*Label 1062*/ 34126, // Rule ID 16117 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (zext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOV32rr:{ *:[i32] } GR32:{ *:[i32] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOV32rr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::GR64RegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, X86::GR32RegClassID, // GIR_Coverage, 16117, GIR_Done, // Label 1062: @34126 GIM_Reject, // Label 1046: @34127 GIM_Try, /*On fail goto*//*Label 1063*/ 34172, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1064*/ 34152, // Rule ID 12168 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) => (VPMOVZXDQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12168, GIR_Done, // Label 1064: @34152 GIM_Try, /*On fail goto*//*Label 1065*/ 34171, // Rule ID 16848 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (zext:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) => (VPMOVZXDQYrr:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXDQYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16848, GIR_Done, // Label 1065: @34171 GIM_Reject, // Label 1063: @34172 GIM_Reject, // Label 1047: @34173 GIM_Try, /*On fail goto*//*Label 1066*/ 34218, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1067*/ 34198, // Rule ID 12132 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) => (VPMOVZXWDZ256rr:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXWDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12132, GIR_Done, // Label 1067: @34198 GIM_Try, /*On fail goto*//*Label 1068*/ 34217, // Rule ID 16846 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (zext:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) => (VPMOVZXWDYrr:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXWDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16846, GIR_Done, // Label 1068: @34217 GIM_Reject, // Label 1066: @34218 GIM_Reject, // Label 1048: @34219 GIM_Try, /*On fail goto*//*Label 1069*/ 34242, // Rule ID 12156 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) => (VPMOVZXWQZrr:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXWQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12156, GIR_Done, // Label 1069: @34242 GIM_Try, /*On fail goto*//*Label 1070*/ 34265, // Rule ID 12174 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (zext:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) => (VPMOVZXDQZrr:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12174, GIR_Done, // Label 1070: @34265 GIM_Reject, // Label 1049: @34266 GIM_Try, /*On fail goto*//*Label 1071*/ 34311, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1072*/ 34291, // Rule ID 12078 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) => (VPMOVZXBWZ256rr:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXBWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12078, GIR_Done, // Label 1072: @34291 GIM_Try, /*On fail goto*//*Label 1073*/ 34310, // Rule ID 16843 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (zext:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) => (VPMOVZXBWYrr:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXBWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16843, GIR_Done, // Label 1073: @34310 GIM_Reject, // Label 1071: @34311 GIM_Reject, // Label 1050: @34312 GIM_Try, /*On fail goto*//*Label 1074*/ 34335, // Rule ID 12102 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) => (VPMOVZXBDZrr:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXBDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12102, GIR_Done, // Label 1074: @34335 GIM_Try, /*On fail goto*//*Label 1075*/ 34358, // Rule ID 12138 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (zext:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) => (VPMOVZXWDZrr:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXWDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12138, GIR_Done, // Label 1075: @34358 GIM_Reject, // Label 1051: @34359 GIM_Try, /*On fail goto*//*Label 1076*/ 34382, // Rule ID 12084 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (zext:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) => (VPMOVZXBWZrr:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXBWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12084, GIR_Done, // Label 1076: @34382 GIM_Reject, // Label 1052: @34383 GIM_Reject, // Label 17: @34384 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 1081*/ 34976, /*GILLT_s8*//*Label 1077*/ 34394, /*GILLT_s16*//*Label 1078*/ 34503, /*GILLT_s32*//*Label 1079*/ 34612, /*GILLT_s64*//*Label 1080*/ 34794, // Label 1077: @34394 GIM_Try, /*On fail goto*//*Label 1082*/ 34502, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 1083*/ 34438, // Rule ID 20915 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20915, GIR_Done, // Label 1083: @34438 GIM_Try, /*On fail goto*//*Label 1084*/ 34468, // Rule ID 467 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 467, GIR_Done, // Label 1084: @34468 GIM_Try, /*On fail goto*//*Label 1085*/ 34501, // Rule ID 463 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SHL8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL8rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 463, GIR_Done, // Label 1085: @34501 GIM_Reject, // Label 1082: @34502 GIM_Reject, // Label 1078: @34503 GIM_Try, /*On fail goto*//*Label 1086*/ 34611, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 1087*/ 34547, // Rule ID 20916 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20916, GIR_Done, // Label 1087: @34547 GIM_Try, /*On fail goto*//*Label 1088*/ 34577, // Rule ID 468 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 468, GIR_Done, // Label 1088: @34577 GIM_Try, /*On fail goto*//*Label 1089*/ 34610, // Rule ID 464 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SHL16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL16rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 464, GIR_Done, // Label 1089: @34610 GIM_Reject, // Label 1086: @34611 GIM_Reject, // Label 1079: @34612 GIM_Try, /*On fail goto*//*Label 1090*/ 34793, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 1091*/ 34656, // Rule ID 20917 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20917, GIR_Done, // Label 1091: @34656 GIM_Try, /*On fail goto*//*Label 1092*/ 34686, // Rule ID 469 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 469, GIR_Done, // Label 1092: @34686 GIM_Try, /*On fail goto*//*Label 1093*/ 34759, // Rule ID 16147 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SHLX32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLX32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16147, GIR_Done, // Label 1093: @34759 GIM_Try, /*On fail goto*//*Label 1094*/ 34792, // Rule ID 465 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHL32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL32rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 465, GIR_Done, // Label 1094: @34792 GIM_Reject, // Label 1090: @34793 GIM_Reject, // Label 1080: @34794 GIM_Try, /*On fail goto*//*Label 1095*/ 34975, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 1096*/ 34838, // Rule ID 20918 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20918, GIR_Done, // Label 1096: @34838 GIM_Try, /*On fail goto*//*Label 1097*/ 34868, // Rule ID 470 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 470, GIR_Done, // Label 1097: @34868 GIM_Try, /*On fail goto*//*Label 1098*/ 34941, // Rule ID 16148 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SHLX64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLX64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16148, GIR_Done, // Label 1098: @34941 GIM_Try, /*On fail goto*//*Label 1099*/ 34974, // Rule ID 466 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHL64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL64rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 466, GIR_Done, // Label 1099: @34974 GIM_Reject, // Label 1095: @34975 GIM_Reject, // Label 1081: @34976 GIM_Reject, // Label 18: @34977 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 1104*/ 35553, /*GILLT_s8*//*Label 1100*/ 34987, /*GILLT_s16*//*Label 1101*/ 35092, /*GILLT_s32*//*Label 1102*/ 35197, /*GILLT_s64*//*Label 1103*/ 35375, // Label 1100: @34987 GIM_Try, /*On fail goto*//*Label 1105*/ 35091, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 1106*/ 35027, // Rule ID 491 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (SHR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 491, GIR_Done, // Label 1106: @35027 GIM_Try, /*On fail goto*//*Label 1107*/ 35057, // Rule ID 487 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 487, GIR_Done, // Label 1107: @35057 GIM_Try, /*On fail goto*//*Label 1108*/ 35090, // Rule ID 483 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SHR8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 483, GIR_Done, // Label 1108: @35090 GIM_Reject, // Label 1105: @35091 GIM_Reject, // Label 1101: @35092 GIM_Try, /*On fail goto*//*Label 1109*/ 35196, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 1110*/ 35132, // Rule ID 492 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (SHR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 492, GIR_Done, // Label 1110: @35132 GIM_Try, /*On fail goto*//*Label 1111*/ 35162, // Rule ID 488 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 488, GIR_Done, // Label 1111: @35162 GIM_Try, /*On fail goto*//*Label 1112*/ 35195, // Rule ID 484 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SHR16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 484, GIR_Done, // Label 1112: @35195 GIM_Reject, // Label 1109: @35196 GIM_Reject, // Label 1102: @35197 GIM_Try, /*On fail goto*//*Label 1113*/ 35374, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 1114*/ 35237, // Rule ID 493 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (SHR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 493, GIR_Done, // Label 1114: @35237 GIM_Try, /*On fail goto*//*Label 1115*/ 35267, // Rule ID 489 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 489, GIR_Done, // Label 1115: @35267 GIM_Try, /*On fail goto*//*Label 1116*/ 35340, // Rule ID 16145 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SHRX32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRX32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16145, GIR_Done, // Label 1116: @35340 GIM_Try, /*On fail goto*//*Label 1117*/ 35373, // Rule ID 485 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHR32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 485, GIR_Done, // Label 1117: @35373 GIM_Reject, // Label 1113: @35374 GIM_Reject, // Label 1103: @35375 GIM_Try, /*On fail goto*//*Label 1118*/ 35552, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 1119*/ 35415, // Rule ID 494 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (SHR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 494, GIR_Done, // Label 1119: @35415 GIM_Try, /*On fail goto*//*Label 1120*/ 35445, // Rule ID 490 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 490, GIR_Done, // Label 1120: @35445 GIM_Try, /*On fail goto*//*Label 1121*/ 35518, // Rule ID 16146 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SHRX64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRX64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16146, GIR_Done, // Label 1121: @35518 GIM_Try, /*On fail goto*//*Label 1122*/ 35551, // Rule ID 486 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHR64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 486, GIR_Done, // Label 1122: @35551 GIM_Reject, // Label 1118: @35552 GIM_Reject, // Label 1104: @35553 GIM_Reject, // Label 19: @35554 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 1127*/ 36130, /*GILLT_s8*//*Label 1123*/ 35564, /*GILLT_s16*//*Label 1124*/ 35669, /*GILLT_s32*//*Label 1125*/ 35774, /*GILLT_s64*//*Label 1126*/ 35952, // Label 1123: @35564 GIM_Try, /*On fail goto*//*Label 1128*/ 35668, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 1129*/ 35604, // Rule ID 515 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (SAR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 515, GIR_Done, // Label 1129: @35604 GIM_Try, /*On fail goto*//*Label 1130*/ 35634, // Rule ID 511 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 511, GIR_Done, // Label 1130: @35634 GIM_Try, /*On fail goto*//*Label 1131*/ 35667, // Rule ID 507 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SAR8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 507, GIR_Done, // Label 1131: @35667 GIM_Reject, // Label 1128: @35668 GIM_Reject, // Label 1124: @35669 GIM_Try, /*On fail goto*//*Label 1132*/ 35773, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 1133*/ 35709, // Rule ID 516 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (SAR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 516, GIR_Done, // Label 1133: @35709 GIM_Try, /*On fail goto*//*Label 1134*/ 35739, // Rule ID 512 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 512, GIR_Done, // Label 1134: @35739 GIM_Try, /*On fail goto*//*Label 1135*/ 35772, // Rule ID 508 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SAR16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 508, GIR_Done, // Label 1135: @35772 GIM_Reject, // Label 1132: @35773 GIM_Reject, // Label 1125: @35774 GIM_Try, /*On fail goto*//*Label 1136*/ 35951, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 1137*/ 35814, // Rule ID 517 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (SAR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 517, GIR_Done, // Label 1137: @35814 GIM_Try, /*On fail goto*//*Label 1138*/ 35844, // Rule ID 513 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 513, GIR_Done, // Label 1138: @35844 GIM_Try, /*On fail goto*//*Label 1139*/ 35917, // Rule ID 16143 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SARX32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SARX32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16143, GIR_Done, // Label 1139: @35917 GIM_Try, /*On fail goto*//*Label 1140*/ 35950, // Rule ID 509 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SAR32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 509, GIR_Done, // Label 1140: @35950 GIM_Reject, // Label 1136: @35951 GIM_Reject, // Label 1126: @35952 GIM_Try, /*On fail goto*//*Label 1141*/ 36129, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 1142*/ 35992, // Rule ID 518 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (SAR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 518, GIR_Done, // Label 1142: @35992 GIM_Try, /*On fail goto*//*Label 1143*/ 36022, // Rule ID 514 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 514, GIR_Done, // Label 1143: @36022 GIM_Try, /*On fail goto*//*Label 1144*/ 36095, // Rule ID 16144 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SARX64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, X86::GR64_with_sub_8bitRegClassID, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, X86::GR8RegClassID, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SARX64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16144, GIR_Done, // Label 1144: @36095 GIM_Try, /*On fail goto*//*Label 1145*/ 36128, // Rule ID 510 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SAR64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 510, GIR_Done, // Label 1145: @36128 GIM_Reject, // Label 1141: @36129 GIM_Reject, // Label 1127: @36130 GIM_Reject, // Label 20: @36131 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 5, /*)*//*default:*//*Label 1148*/ 36337, /*GILLT_s32*//*Label 1146*/ 36139, /*GILLT_s64*//*Label 1147*/ 36238, // Label 1146: @36139 GIM_Try, /*On fail goto*//*Label 1149*/ 36237, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 1150*/ 36199, // Rule ID 587 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (fshl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, (imm:{ *:[i8] }):$src3) => (SHLD32rri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, (imm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLD32rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 587, GIR_Done, // Label 1150: @36199 GIM_Try, /*On fail goto*//*Label 1151*/ 36236, // Rule ID 581 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR8_ABCD_LRegClassID, // (fshl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, CL:{ *:[i8] }) => (SHLD32rrCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLD32rrCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 581, GIR_Done, // Label 1151: @36236 GIM_Reject, // Label 1149: @36237 GIM_Reject, // Label 1147: @36238 GIM_Try, /*On fail goto*//*Label 1152*/ 36336, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 1153*/ 36298, // Rule ID 589 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (fshl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, (imm:{ *:[i8] }):$src3) => (SHLD64rri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, (imm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLD64rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 589, GIR_Done, // Label 1153: @36298 GIM_Try, /*On fail goto*//*Label 1154*/ 36335, // Rule ID 583 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR8_ABCD_LRegClassID, // (fshl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, CL:{ *:[i8] }) => (SHLD64rrCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLD64rrCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 583, GIR_Done, // Label 1154: @36335 GIM_Reject, // Label 1152: @36336 GIM_Reject, // Label 1148: @36337 GIM_Reject, // Label 21: @36338 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 5, /*)*//*default:*//*Label 1157*/ 36544, /*GILLT_s32*//*Label 1155*/ 36346, /*GILLT_s64*//*Label 1156*/ 36445, // Label 1155: @36346 GIM_Try, /*On fail goto*//*Label 1158*/ 36444, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 1159*/ 36406, // Rule ID 588 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (fshr:{ *:[i32] } GR32:{ *:[i32] }:$src2, GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src3) => (SHRD32rri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2, (imm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRD32rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 588, GIR_Done, // Label 1159: @36406 GIM_Try, /*On fail goto*//*Label 1160*/ 36443, // Rule ID 582 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR8_ABCD_LRegClassID, // (fshr:{ *:[i32] } GR32:{ *:[i32] }:$src2, GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHRD32rrCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRD32rrCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 582, GIR_Done, // Label 1160: @36443 GIM_Reject, // Label 1158: @36444 GIM_Reject, // Label 1156: @36445 GIM_Try, /*On fail goto*//*Label 1161*/ 36543, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 1162*/ 36505, // Rule ID 590 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (fshr:{ *:[i64] } GR64:{ *:[i64] }:$src2, GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src3) => (SHRD64rri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2, (imm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRD64rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 590, GIR_Done, // Label 1162: @36505 GIM_Try, /*On fail goto*//*Label 1163*/ 36542, // Rule ID 584 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR8_ABCD_LRegClassID, // (fshr:{ *:[i64] } GR64:{ *:[i64] }:$src2, GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHRD64rrCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRD64rrCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 584, GIR_Done, // Label 1163: @36542 GIM_Reject, // Label 1161: @36543 GIM_Reject, // Label 1157: @36544 GIM_Reject, // Label 22: @36545 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 20, /*)*//*default:*//*Label 1174*/ 38006, /*GILLT_s8*//*Label 1164*/ 36570, /*GILLT_s16*//*Label 1165*/ 36697, /*GILLT_s32*//*Label 1166*/ 36824, /*GILLT_s64*//*Label 1167*/ 37015, 0, 0, 0, /*GILLT_v2s64*//*Label 1168*/ 37206, 0, /*GILLT_v4s32*//*Label 1169*/ 37390, /*GILLT_v4s64*//*Label 1170*/ 37574, 0, 0, /*GILLT_v8s32*//*Label 1171*/ 37758, /*GILLT_v8s64*//*Label 1172*/ 37942, 0, 0, 0, /*GILLT_v16s32*//*Label 1173*/ 37974, // Label 1164: @36570 GIM_Try, /*On fail goto*//*Label 1175*/ 36696, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 1176*/ 36610, // Rule ID 563 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (ROR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR8r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 563, GIR_Done, // Label 1176: @36610 GIM_Try, /*On fail goto*//*Label 1177*/ 36632, // Rule ID 16123 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 7, // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, 7:{ *:[i8] }) => (ROL8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL8r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16123, GIR_Done, // Label 1177: @36632 GIM_Try, /*On fail goto*//*Label 1178*/ 36662, // Rule ID 559 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 559, GIR_Done, // Label 1178: @36662 GIM_Try, /*On fail goto*//*Label 1179*/ 36695, // Rule ID 555 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (rotr:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (ROR8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR8rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 555, GIR_Done, // Label 1179: @36695 GIM_Reject, // Label 1175: @36696 GIM_Reject, // Label 1165: @36697 GIM_Try, /*On fail goto*//*Label 1180*/ 36823, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 1181*/ 36737, // Rule ID 564 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (ROR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR16r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 564, GIR_Done, // Label 1181: @36737 GIM_Try, /*On fail goto*//*Label 1182*/ 36759, // Rule ID 16124 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 15, // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, 15:{ *:[i8] }) => (ROL16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL16r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16124, GIR_Done, // Label 1182: @36759 GIM_Try, /*On fail goto*//*Label 1183*/ 36789, // Rule ID 560 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 560, GIR_Done, // Label 1183: @36789 GIM_Try, /*On fail goto*//*Label 1184*/ 36822, // Rule ID 556 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (rotr:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (ROR16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR16rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 556, GIR_Done, // Label 1184: @36822 GIM_Reject, // Label 1180: @36823 GIM_Reject, // Label 1166: @36824 GIM_Try, /*On fail goto*//*Label 1185*/ 37014, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 1186*/ 36874, // Rule ID 16135 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src, (imm:{ *:[i8] }):$shamt) => (RORX32ri:{ *:[i32] } GR32:{ *:[i32] }:$src, (imm:{ *:[i8] }):$shamt) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RORX32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16135, GIR_Done, // Label 1186: @36874 GIM_Try, /*On fail goto*//*Label 1187*/ 36906, // Rule ID 605 // GIM_CheckFeatures, GIFBS_HasFastSHLDRotate, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$shamt) => (SHRDROT32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$shamt) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRDROT32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 605, GIR_Done, // Label 1187: @36906 GIM_Try, /*On fail goto*//*Label 1188*/ 36928, // Rule ID 565 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (ROR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 565, GIR_Done, // Label 1188: @36928 GIM_Try, /*On fail goto*//*Label 1189*/ 36950, // Rule ID 16125 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 31, // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, 31:{ *:[i8] }) => (ROL32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16125, GIR_Done, // Label 1189: @36950 GIM_Try, /*On fail goto*//*Label 1190*/ 36980, // Rule ID 561 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 561, GIR_Done, // Label 1190: @36980 GIM_Try, /*On fail goto*//*Label 1191*/ 37013, // Rule ID 557 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (rotr:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (ROR32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR32rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 557, GIR_Done, // Label 1191: @37013 GIM_Reject, // Label 1185: @37014 GIM_Reject, // Label 1167: @37015 GIM_Try, /*On fail goto*//*Label 1192*/ 37205, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 1193*/ 37065, // Rule ID 16136 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src, (imm:{ *:[i8] }):$shamt) => (RORX64ri:{ *:[i64] } GR64:{ *:[i64] }:$src, (imm:{ *:[i8] }):$shamt) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RORX64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16136, GIR_Done, // Label 1193: @37065 GIM_Try, /*On fail goto*//*Label 1194*/ 37097, // Rule ID 606 // GIM_CheckFeatures, GIFBS_HasFastSHLDRotate, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$shamt) => (SHRDROT64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$shamt) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRDROT64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 606, GIR_Done, // Label 1194: @37097 GIM_Try, /*On fail goto*//*Label 1195*/ 37119, // Rule ID 566 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (ROR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR64r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 566, GIR_Done, // Label 1195: @37119 GIM_Try, /*On fail goto*//*Label 1196*/ 37141, // Rule ID 16126 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 63, // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, 63:{ *:[i8] }) => (ROL64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL64r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16126, GIR_Done, // Label 1196: @37141 GIM_Try, /*On fail goto*//*Label 1197*/ 37171, // Rule ID 562 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (ROR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 562, GIR_Done, // Label 1197: @37171 GIM_Try, /*On fail goto*//*Label 1198*/ 37204, // Rule ID 558 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (rotr:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (ROR64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR64rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 558, GIR_Done, // Label 1198: @37204 GIM_Reject, // Label 1192: @37205 GIM_Reject, // Label 1168: @37206 GIM_Try, /*On fail goto*//*Label 1199*/ 37389, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1200*/ 37239, // Rule ID 7575 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (rotr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPRORVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPRORVQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7575, GIR_Done, // Label 1200: @37239 GIM_Try, /*On fail goto*//*Label 1201*/ 37388, // Rule ID 19289 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (rotr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPRORVQZrr:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPRORVQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 19289, GIR_Done, // Label 1201: @37388 GIM_Reject, // Label 1199: @37389 GIM_Reject, // Label 1169: @37390 GIM_Try, /*On fail goto*//*Label 1202*/ 37573, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1203*/ 37423, // Rule ID 7548 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (rotr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPRORVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPRORVDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7548, GIR_Done, // Label 1203: @37423 GIM_Try, /*On fail goto*//*Label 1204*/ 37572, // Rule ID 19291 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (rotr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPRORVDZrr:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPRORVDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 19291, GIR_Done, // Label 1204: @37572 GIM_Reject, // Label 1202: @37573 GIM_Reject, // Label 1170: @37574 GIM_Try, /*On fail goto*//*Label 1205*/ 37757, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1206*/ 37607, // Rule ID 7566 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (rotr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPRORVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPRORVQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7566, GIR_Done, // Label 1206: @37607 GIM_Try, /*On fail goto*//*Label 1207*/ 37756, // Rule ID 19290 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (rotr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPRORVQZrr:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPRORVQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 19290, GIR_Done, // Label 1207: @37756 GIM_Reject, // Label 1205: @37757 GIM_Reject, // Label 1171: @37758 GIM_Try, /*On fail goto*//*Label 1208*/ 37941, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1209*/ 37791, // Rule ID 7539 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (rotr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPRORVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPRORVDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7539, GIR_Done, // Label 1209: @37791 GIM_Try, /*On fail goto*//*Label 1210*/ 37940, // Rule ID 19292 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (rotr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPRORVDZrr:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPRORVDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 19292, GIR_Done, // Label 1210: @37940 GIM_Reject, // Label 1208: @37941 GIM_Reject, // Label 1172: @37942 GIM_Try, /*On fail goto*//*Label 1211*/ 37973, // Rule ID 7557 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (rotr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPRORVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPRORVQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7557, GIR_Done, // Label 1211: @37973 GIM_Reject, // Label 1173: @37974 GIM_Try, /*On fail goto*//*Label 1212*/ 38005, // Rule ID 7530 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (rotr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPRORVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPRORVDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7530, GIR_Done, // Label 1212: @38005 GIM_Reject, // Label 1174: @38006 GIM_Reject, // Label 23: @38007 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 20, /*)*//*default:*//*Label 1225*/ 39514, /*GILLT_s8*//*Label 1213*/ 38032, /*GILLT_s16*//*Label 1214*/ 38159, /*GILLT_s32*//*Label 1215*/ 38286, /*GILLT_s64*//*Label 1216*/ 38445, 0, 0, 0, /*GILLT_v2s64*//*Label 1217*/ 38604, 0, /*GILLT_v4s32*//*Label 1218*/ 38811, /*GILLT_v4s64*//*Label 1219*/ 39018, 0, /*GILLT_v8s16*//*Label 1220*/ 39202, /*GILLT_v8s32*//*Label 1221*/ 39234, /*GILLT_v8s64*//*Label 1222*/ 39418, 0, /*GILLT_v16s8*//*Label 1223*/ 39450, 0, /*GILLT_v16s32*//*Label 1224*/ 39482, // Label 1213: @38032 GIM_Try, /*On fail goto*//*Label 1226*/ 38158, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 1227*/ 38072, // Rule ID 539 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (ROL8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL8r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 539, GIR_Done, // Label 1227: @38072 GIM_Try, /*On fail goto*//*Label 1228*/ 38094, // Rule ID 16119 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 7, // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 7:{ *:[i8] }) => (ROR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR8r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16119, GIR_Done, // Label 1228: @38094 GIM_Try, /*On fail goto*//*Label 1229*/ 38124, // Rule ID 535 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 535, GIR_Done, // Label 1229: @38124 GIM_Try, /*On fail goto*//*Label 1230*/ 38157, // Rule ID 531 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (rotl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (ROL8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL8rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 531, GIR_Done, // Label 1230: @38157 GIM_Reject, // Label 1226: @38158 GIM_Reject, // Label 1214: @38159 GIM_Try, /*On fail goto*//*Label 1231*/ 38285, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 1232*/ 38199, // Rule ID 540 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (ROL16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL16r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 540, GIR_Done, // Label 1232: @38199 GIM_Try, /*On fail goto*//*Label 1233*/ 38221, // Rule ID 16120 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 15, // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 15:{ *:[i8] }) => (ROR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR16r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16120, GIR_Done, // Label 1233: @38221 GIM_Try, /*On fail goto*//*Label 1234*/ 38251, // Rule ID 536 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 536, GIR_Done, // Label 1234: @38251 GIM_Try, /*On fail goto*//*Label 1235*/ 38284, // Rule ID 532 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (rotl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (ROL16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL16rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 532, GIR_Done, // Label 1235: @38284 GIM_Reject, // Label 1231: @38285 GIM_Reject, // Label 1215: @38286 GIM_Try, /*On fail goto*//*Label 1236*/ 38444, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 1237*/ 38336, // Rule ID 603 // GIM_CheckFeatures, GIFBS_HasFastSHLDRotate, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$shamt) => (SHLDROT32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$shamt) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLDROT32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 603, GIR_Done, // Label 1237: @38336 GIM_Try, /*On fail goto*//*Label 1238*/ 38358, // Rule ID 541 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (ROL32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 541, GIR_Done, // Label 1238: @38358 GIM_Try, /*On fail goto*//*Label 1239*/ 38380, // Rule ID 16121 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 31, // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 31:{ *:[i8] }) => (ROR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16121, GIR_Done, // Label 1239: @38380 GIM_Try, /*On fail goto*//*Label 1240*/ 38410, // Rule ID 537 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 537, GIR_Done, // Label 1240: @38410 GIM_Try, /*On fail goto*//*Label 1241*/ 38443, // Rule ID 533 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (rotl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (ROL32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL32rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 533, GIR_Done, // Label 1241: @38443 GIM_Reject, // Label 1236: @38444 GIM_Reject, // Label 1216: @38445 GIM_Try, /*On fail goto*//*Label 1242*/ 38603, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 1243*/ 38495, // Rule ID 604 // GIM_CheckFeatures, GIFBS_HasFastSHLDRotate, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$shamt) => (SHLDROT64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$shamt) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLDROT64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // shamt GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 604, GIR_Done, // Label 1243: @38495 GIM_Try, /*On fail goto*//*Label 1244*/ 38517, // Rule ID 542 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (ROL64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL64r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 542, GIR_Done, // Label 1244: @38517 GIM_Try, /*On fail goto*//*Label 1245*/ 38539, // Rule ID 16122 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 63, // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 63:{ *:[i8] }) => (ROR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROR64r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16122, GIR_Done, // Label 1245: @38539 GIM_Try, /*On fail goto*//*Label 1246*/ 38569, // Rule ID 538 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (ROL64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 538, GIR_Done, // Label 1246: @38569 GIM_Try, /*On fail goto*//*Label 1247*/ 38602, // Rule ID 534 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (rotl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (ROL64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL64rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 534, GIR_Done, // Label 1247: @38602 GIM_Reject, // Label 1242: @38603 GIM_Reject, // Label 1217: @38604 GIM_Try, /*On fail goto*//*Label 1248*/ 38810, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1249*/ 38637, // Rule ID 1313 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (rotl:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPROTQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROTQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1313, GIR_Done, // Label 1249: @38637 GIM_Try, /*On fail goto*//*Label 1250*/ 38660, // Rule ID 7629 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (rotl:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPROLVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROLVQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7629, GIR_Done, // Label 1250: @38660 GIM_Try, /*On fail goto*//*Label 1251*/ 38809, // Rule ID 19281 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (rotl:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPROLVQZrr:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPROLVQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 19281, GIR_Done, // Label 1251: @38809 GIM_Reject, // Label 1248: @38810 GIM_Reject, // Label 1218: @38811 GIM_Try, /*On fail goto*//*Label 1252*/ 39017, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1253*/ 38844, // Rule ID 1310 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (rotl:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPROTDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROTDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1310, GIR_Done, // Label 1253: @38844 GIM_Try, /*On fail goto*//*Label 1254*/ 38867, // Rule ID 7602 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (rotl:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPROLVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROLVDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7602, GIR_Done, // Label 1254: @38867 GIM_Try, /*On fail goto*//*Label 1255*/ 39016, // Rule ID 19283 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (rotl:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPROLVDZrr:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPROLVDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 19283, GIR_Done, // Label 1255: @39016 GIM_Reject, // Label 1252: @39017 GIM_Reject, // Label 1219: @39018 GIM_Try, /*On fail goto*//*Label 1256*/ 39201, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1257*/ 39051, // Rule ID 7620 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (rotl:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPROLVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROLVQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7620, GIR_Done, // Label 1257: @39051 GIM_Try, /*On fail goto*//*Label 1258*/ 39200, // Rule ID 19282 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (rotl:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPROLVQZrr:{ *:[v8i64] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPROLVQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 19282, GIR_Done, // Label 1258: @39200 GIM_Reject, // Label 1256: @39201 GIM_Reject, // Label 1220: @39202 GIM_Try, /*On fail goto*//*Label 1259*/ 39233, // Rule ID 1316 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (rotl:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPROTWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROTWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1316, GIR_Done, // Label 1259: @39233 GIM_Reject, // Label 1221: @39234 GIM_Try, /*On fail goto*//*Label 1260*/ 39417, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1261*/ 39267, // Rule ID 7593 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (rotl:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPROLVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROLVDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7593, GIR_Done, // Label 1261: @39267 GIM_Try, /*On fail goto*//*Label 1262*/ 39416, // Rule ID 19284 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (rotl:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPROLVDZrr:{ *:[v16i32] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPROLVDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 19284, GIR_Done, // Label 1262: @39416 GIM_Reject, // Label 1260: @39417 GIM_Reject, // Label 1222: @39418 GIM_Try, /*On fail goto*//*Label 1263*/ 39449, // Rule ID 7611 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (rotl:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPROLVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROLVQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7611, GIR_Done, // Label 1263: @39449 GIM_Reject, // Label 1223: @39450 GIM_Try, /*On fail goto*//*Label 1264*/ 39481, // Rule ID 1307 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (rotl:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPROTBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROTBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1307, GIR_Done, // Label 1264: @39481 GIM_Reject, // Label 1224: @39482 GIM_Try, /*On fail goto*//*Label 1265*/ 39513, // Rule ID 7584 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (rotl:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPROLVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPROLVDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7584, GIR_Done, // Label 1265: @39513 GIM_Reject, // Label 1225: @39514 GIM_Reject, // Label 24: @39515 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/7, 24, /*)*//*default:*//*Label 1272*/ 41071, /*GILLT_v2s1*//*Label 1266*/ 39538, 0, /*GILLT_v4s1*//*Label 1267*/ 39689, 0, 0, /*GILLT_v8s1*//*Label 1268*/ 40024, 0, 0, 0, /*GILLT_v16s1*//*Label 1269*/ 40411, 0, 0, 0, /*GILLT_v32s1*//*Label 1270*/ 40798, 0, 0, /*GILLT_v64s1*//*Label 1271*/ 41018, // Label 1266: @39538 GIM_Try, /*On fail goto*//*Label 1273*/ 39688, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK2RegClassID, GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, GIM_Try, /*On fail goto*//*Label 1274*/ 39592, // Rule ID 12311 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v2i1] } immAllZerosV:{ *:[v2i64] }, VR128X:{ *:[v2i64] }:$src, SETGT:{ *:[Other] }) => (VPMOVQ2MZ128rr:{ *:[v2i1] } VR128X:{ *:[v2i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVQ2MZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12311, GIR_Done, // Label 1274: @39592 GIM_Try, /*On fail goto*//*Label 1275*/ 39687, // Rule ID 20113 // GIM_CheckFeatures, GIFBS_HasDQI_NoVLX, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v2i1] } immAllZerosV:{ *:[v2i64] }, VR128X:{ *:[v2i64] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v2i1] } (VPMOVQ2MZrr:{ *:[v8i1] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] })), VK2:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVQ2MZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK2RegClassID, // GIR_Coverage, 20113, GIR_Done, // Label 1275: @39687 GIM_Reject, // Label 1273: @39688 GIM_Reject, // Label 1267: @39689 GIM_Try, /*On fail goto*//*Label 1276*/ 39741, // Rule ID 12308 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK4RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v4i1] } immAllZerosV:{ *:[v4i32] }, VR128X:{ *:[v4i32] }:$src, SETGT:{ *:[Other] }) => (VPMOVD2MZ128rr:{ *:[v4i1] } VR128X:{ *:[v4i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVD2MZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12308, GIR_Done, // Label 1276: @39741 GIM_Try, /*On fail goto*//*Label 1277*/ 39793, // Rule ID 12310 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK4RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v4i1] } immAllZerosV:{ *:[v4i64] }, VR256X:{ *:[v4i64] }:$src, SETGT:{ *:[Other] }) => (VPMOVQ2MZ256rr:{ *:[v4i1] } VR256X:{ *:[v4i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVQ2MZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12310, GIR_Done, // Label 1277: @39793 GIM_Try, /*On fail goto*//*Label 1278*/ 39908, // Rule ID 20111 // GIM_CheckFeatures, GIFBS_HasDQI_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK4RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v4i1] } immAllZerosV:{ *:[v4i32] }, VR128X:{ *:[v4i32] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (VPMOVD2MZrr:{ *:[v16i1] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src, sub_xmm:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVD2MZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 20111, GIR_Done, // Label 1278: @39908 GIM_Try, /*On fail goto*//*Label 1279*/ 40023, // Rule ID 20112 // GIM_CheckFeatures, GIFBS_HasDQI_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK4RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v4i1] } immAllZerosV:{ *:[v4i64] }, VR256X:{ *:[v4i64] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v4i1] } (VPMOVQ2MZrr:{ *:[v8i1] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] })), VK4:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVQ2MZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK4RegClassID, // GIR_Coverage, 20112, GIR_Done, // Label 1279: @40023 GIM_Reject, // Label 1268: @40024 GIM_Try, /*On fail goto*//*Label 1280*/ 40076, // Rule ID 12305 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i16] }, VR128X:{ *:[v8i16] }:$src, SETGT:{ *:[Other] }) => (VPMOVW2MZ128rr:{ *:[v8i1] } VR128X:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVW2MZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12305, GIR_Done, // Label 1280: @40076 GIM_Try, /*On fail goto*//*Label 1281*/ 40128, // Rule ID 12307 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i32] }, VR256X:{ *:[v8i32] }:$src, SETGT:{ *:[Other] }) => (VPMOVD2MZ256rr:{ *:[v8i1] } VR256X:{ *:[v8i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVD2MZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12307, GIR_Done, // Label 1281: @40128 GIM_Try, /*On fail goto*//*Label 1282*/ 40180, // Rule ID 12309 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i64] }, VR512:{ *:[v8i64] }:$src, SETGT:{ *:[Other] }) => (VPMOVQ2MZrr:{ *:[v8i1] } VR512:{ *:[v8i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVQ2MZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12309, GIR_Done, // Label 1282: @40180 GIM_Try, /*On fail goto*//*Label 1283*/ 40295, // Rule ID 20109 // GIM_CheckFeatures, GIFBS_HasBWI_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i16] }, VR128X:{ *:[v8i16] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (VPMOVW2MZrr:{ *:[v32i1] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR128X:{ *:[v8i16] }:$src, sub_xmm:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVW2MZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 20109, GIR_Done, // Label 1283: @40295 GIM_Try, /*On fail goto*//*Label 1284*/ 40410, // Rule ID 20110 // GIM_CheckFeatures, GIFBS_HasDQI_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v8i1] } immAllZerosV:{ *:[v8i32] }, VR256X:{ *:[v8i32] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v8i1] } (VPMOVD2MZrr:{ *:[v16i1] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src, sub_ymm:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVD2MZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK8RegClassID, // GIR_Coverage, 20110, GIR_Done, // Label 1284: @40410 GIM_Reject, // Label 1269: @40411 GIM_Try, /*On fail goto*//*Label 1285*/ 40463, // Rule ID 12302 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i8] }, VR128X:{ *:[v16i8] }:$src, SETGT:{ *:[Other] }) => (VPMOVB2MZ128rr:{ *:[v16i1] } VR128X:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVB2MZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12302, GIR_Done, // Label 1285: @40463 GIM_Try, /*On fail goto*//*Label 1286*/ 40515, // Rule ID 12304 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i16] }, VR256X:{ *:[v16i16] }:$src, SETGT:{ *:[Other] }) => (VPMOVW2MZ256rr:{ *:[v16i1] } VR256X:{ *:[v16i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVW2MZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12304, GIR_Done, // Label 1286: @40515 GIM_Try, /*On fail goto*//*Label 1287*/ 40567, // Rule ID 12306 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i32] }, VR512:{ *:[v16i32] }:$src, SETGT:{ *:[Other] }) => (VPMOVD2MZrr:{ *:[v16i1] } VR512:{ *:[v16i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVD2MZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12306, GIR_Done, // Label 1287: @40567 GIM_Try, /*On fail goto*//*Label 1288*/ 40682, // Rule ID 20107 // GIM_CheckFeatures, GIFBS_HasBWI_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i8] }, VR128X:{ *:[v16i8] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v16i1] } (VPMOVB2MZrr:{ *:[v64i1] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR128X:{ *:[v16i8] }:$src, sub_xmm:{ *:[i32] })), VK16:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVB2MZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK16RegClassID, // GIR_Coverage, 20107, GIR_Done, // Label 1288: @40682 GIM_Try, /*On fail goto*//*Label 1289*/ 40797, // Rule ID 20108 // GIM_CheckFeatures, GIFBS_HasBWI_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v16i1] } immAllZerosV:{ *:[v16i16] }, VR256X:{ *:[v16i16] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v16i1] } (VPMOVW2MZrr:{ *:[v32i1] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR256X:{ *:[v16i16] }:$src, sub_ymm:{ *:[i32] })), VK16:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v32s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVW2MZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK16RegClassID, // GIR_Coverage, 20108, GIR_Done, // Label 1289: @40797 GIM_Reject, // Label 1270: @40798 GIM_Try, /*On fail goto*//*Label 1290*/ 40850, // Rule ID 12301 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v32i1] } immAllZerosV:{ *:[v32i8] }, VR256X:{ *:[v32i8] }:$src, SETGT:{ *:[Other] }) => (VPMOVB2MZ256rr:{ *:[v32i1] } VR256X:{ *:[v32i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVB2MZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12301, GIR_Done, // Label 1290: @40850 GIM_Try, /*On fail goto*//*Label 1291*/ 40902, // Rule ID 12303 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v32i1] } immAllZerosV:{ *:[v32i16] }, VR512:{ *:[v32i16] }:$src, SETGT:{ *:[Other] }) => (VPMOVW2MZrr:{ *:[v32i1] } VR512:{ *:[v32i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVW2MZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12303, GIR_Done, // Label 1291: @40902 GIM_Try, /*On fail goto*//*Label 1292*/ 41017, // Rule ID 20106 // GIM_CheckFeatures, GIFBS_HasBWI_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v32i1] } immAllZerosV:{ *:[v32i8] }, VR256X:{ *:[v32i8] }:$src, SETGT:{ *:[Other] }) => (COPY_TO_REGCLASS:{ *:[v32i1] } (VPMOVB2MZrr:{ *:[v64i1] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR256X:{ *:[v32i8] }:$src, sub_ymm:{ *:[i32] })), VK32:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVB2MZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VK32RegClassID, // GIR_Coverage, 20106, GIR_Done, // Label 1292: @41017 GIM_Reject, // Label 1271: @41018 GIM_Try, /*On fail goto*//*Label 1293*/ 41070, // Rule ID 12300 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, // MIs[0] Operand 1 GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/CmpInst::ICMP_SGT, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC, GIM_CheckIsBuildVectorAllZeros, /*MI*/1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (setcc:{ *:[v64i1] } immAllZerosV:{ *:[v64i8] }, VR512:{ *:[v64i8] }:$src, SETGT:{ *:[Other] }) => (VPMOVB2MZrr:{ *:[v64i1] } VR512:{ *:[v64i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVB2MZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12300, GIR_Done, // Label 1293: @41070 GIM_Reject, // Label 1272: @41071 GIM_Reject, // Label 25: @41072 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/13, 23, /*)*//*default:*//*Label 1297*/ 41259, /*GILLT_v8s16*//*Label 1294*/ 41088, 0, 0, 0, 0, /*GILLT_v16s16*//*Label 1295*/ 41169, 0, 0, 0, /*GILLT_v32s16*//*Label 1296*/ 41227, // Label 1294: @41088 GIM_Try, /*On fail goto*//*Label 1298*/ 41168, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1299*/ 41121, // Rule ID 2268 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mulhu:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULHUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2268, GIR_Done, // Label 1299: @41121 GIM_Try, /*On fail goto*//*Label 1300*/ 41144, // Rule ID 2270 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mulhu:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULHUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULHUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2270, GIR_Done, // Label 1300: @41144 GIM_Try, /*On fail goto*//*Label 1301*/ 41167, // Rule ID 4698 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mulhu:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULHUWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4698, GIR_Done, // Label 1301: @41167 GIM_Reject, // Label 1298: @41168 GIM_Reject, // Label 1295: @41169 GIM_Try, /*On fail goto*//*Label 1302*/ 41226, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1303*/ 41202, // Rule ID 2272 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (mulhu:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULHUWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2272, GIR_Done, // Label 1303: @41202 GIM_Try, /*On fail goto*//*Label 1304*/ 41225, // Rule ID 4692 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mulhu:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULHUWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4692, GIR_Done, // Label 1304: @41225 GIM_Reject, // Label 1302: @41226 GIM_Reject, // Label 1296: @41227 GIM_Try, /*On fail goto*//*Label 1305*/ 41258, // Rule ID 4686 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mulhu:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULHUWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4686, GIR_Done, // Label 1305: @41258 GIM_Reject, // Label 1297: @41259 GIM_Reject, // Label 26: @41260 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/13, 23, /*)*//*default:*//*Label 1309*/ 41447, /*GILLT_v8s16*//*Label 1306*/ 41276, 0, 0, 0, 0, /*GILLT_v16s16*//*Label 1307*/ 41357, 0, 0, 0, /*GILLT_v32s16*//*Label 1308*/ 41415, // Label 1306: @41276 GIM_Try, /*On fail goto*//*Label 1310*/ 41356, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1311*/ 41309, // Rule ID 2274 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mulhs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULHWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2274, GIR_Done, // Label 1311: @41309 GIM_Try, /*On fail goto*//*Label 1312*/ 41332, // Rule ID 2276 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mulhs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULHWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULHWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2276, GIR_Done, // Label 1312: @41332 GIM_Try, /*On fail goto*//*Label 1313*/ 41355, // Rule ID 4680 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mulhs:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULHWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4680, GIR_Done, // Label 1313: @41355 GIM_Reject, // Label 1310: @41356 GIM_Reject, // Label 1307: @41357 GIM_Try, /*On fail goto*//*Label 1314*/ 41414, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1315*/ 41390, // Rule ID 2278 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (mulhs:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULHWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2278, GIR_Done, // Label 1315: @41390 GIM_Try, /*On fail goto*//*Label 1316*/ 41413, // Rule ID 4674 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mulhs:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULHWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4674, GIR_Done, // Label 1316: @41413 GIM_Reject, // Label 1314: @41414 GIM_Reject, // Label 1308: @41415 GIM_Try, /*On fail goto*//*Label 1317*/ 41446, // Rule ID 4668 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mulhs:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULHWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4668, GIR_Done, // Label 1317: @41446 GIM_Reject, // Label 1309: @41447 GIM_Reject, // Label 27: @41448 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/13, 25, /*)*//*default:*//*Label 1324*/ 41808, /*GILLT_v8s16*//*Label 1318*/ 41466, 0, 0, 0, /*GILLT_v16s8*//*Label 1319*/ 41547, /*GILLT_v16s16*//*Label 1320*/ 41628, 0, 0, /*GILLT_v32s8*//*Label 1321*/ 41686, /*GILLT_v32s16*//*Label 1322*/ 41744, 0, /*GILLT_v64s8*//*Label 1323*/ 41776, // Label 1318: @41466 GIM_Try, /*On fail goto*//*Label 1325*/ 41546, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1326*/ 41499, // Rule ID 2256 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (uaddsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDUSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2256, GIR_Done, // Label 1326: @41499 GIM_Try, /*On fail goto*//*Label 1327*/ 41522, // Rule ID 2258 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (uaddsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDUSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDUSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2258, GIR_Done, // Label 1327: @41522 GIM_Try, /*On fail goto*//*Label 1328*/ 41545, // Rule ID 4536 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (uaddsat:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDUSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4536, GIR_Done, // Label 1328: @41545 GIM_Reject, // Label 1325: @41546 GIM_Reject, // Label 1319: @41547 GIM_Try, /*On fail goto*//*Label 1329*/ 41627, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1330*/ 41580, // Rule ID 2250 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (uaddsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDUSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2250, GIR_Done, // Label 1330: @41580 GIM_Try, /*On fail goto*//*Label 1331*/ 41603, // Rule ID 2252 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (uaddsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDUSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDUSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2252, GIR_Done, // Label 1331: @41603 GIM_Try, /*On fail goto*//*Label 1332*/ 41626, // Rule ID 4554 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (uaddsat:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDUSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4554, GIR_Done, // Label 1332: @41626 GIM_Reject, // Label 1329: @41627 GIM_Reject, // Label 1320: @41628 GIM_Try, /*On fail goto*//*Label 1333*/ 41685, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1334*/ 41661, // Rule ID 2260 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (uaddsat:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDUSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2260, GIR_Done, // Label 1334: @41661 GIM_Try, /*On fail goto*//*Label 1335*/ 41684, // Rule ID 4530 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (uaddsat:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDUSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4530, GIR_Done, // Label 1335: @41684 GIM_Reject, // Label 1333: @41685 GIM_Reject, // Label 1321: @41686 GIM_Try, /*On fail goto*//*Label 1336*/ 41743, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1337*/ 41719, // Rule ID 2254 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (uaddsat:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDUSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2254, GIR_Done, // Label 1337: @41719 GIM_Try, /*On fail goto*//*Label 1338*/ 41742, // Rule ID 4548 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (uaddsat:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDUSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4548, GIR_Done, // Label 1338: @41742 GIM_Reject, // Label 1336: @41743 GIM_Reject, // Label 1322: @41744 GIM_Try, /*On fail goto*//*Label 1339*/ 41775, // Rule ID 4524 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (uaddsat:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDUSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4524, GIR_Done, // Label 1339: @41775 GIM_Reject, // Label 1323: @41776 GIM_Try, /*On fail goto*//*Label 1340*/ 41807, // Rule ID 4542 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (uaddsat:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDUSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDUSBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4542, GIR_Done, // Label 1340: @41807 GIM_Reject, // Label 1324: @41808 GIM_Reject, // Label 28: @41809 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/13, 25, /*)*//*default:*//*Label 1347*/ 42169, /*GILLT_v8s16*//*Label 1341*/ 41827, 0, 0, 0, /*GILLT_v16s8*//*Label 1342*/ 41908, /*GILLT_v16s16*//*Label 1343*/ 41989, 0, 0, /*GILLT_v32s8*//*Label 1344*/ 42047, /*GILLT_v32s16*//*Label 1345*/ 42105, 0, /*GILLT_v64s8*//*Label 1346*/ 42137, // Label 1341: @41827 GIM_Try, /*On fail goto*//*Label 1348*/ 41907, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1349*/ 41860, // Rule ID 2244 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (saddsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2244, GIR_Done, // Label 1349: @41860 GIM_Try, /*On fail goto*//*Label 1350*/ 41883, // Rule ID 2246 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (saddsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2246, GIR_Done, // Label 1350: @41883 GIM_Try, /*On fail goto*//*Label 1351*/ 41906, // Rule ID 4464 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (saddsat:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4464, GIR_Done, // Label 1351: @41906 GIM_Reject, // Label 1348: @41907 GIM_Reject, // Label 1342: @41908 GIM_Try, /*On fail goto*//*Label 1352*/ 41988, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1353*/ 41941, // Rule ID 2238 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (saddsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2238, GIR_Done, // Label 1353: @41941 GIM_Try, /*On fail goto*//*Label 1354*/ 41964, // Rule ID 2240 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (saddsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2240, GIR_Done, // Label 1354: @41964 GIM_Try, /*On fail goto*//*Label 1355*/ 41987, // Rule ID 4482 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (saddsat:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4482, GIR_Done, // Label 1355: @41987 GIM_Reject, // Label 1352: @41988 GIM_Reject, // Label 1343: @41989 GIM_Try, /*On fail goto*//*Label 1356*/ 42046, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1357*/ 42022, // Rule ID 2248 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (saddsat:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2248, GIR_Done, // Label 1357: @42022 GIM_Try, /*On fail goto*//*Label 1358*/ 42045, // Rule ID 4458 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (saddsat:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4458, GIR_Done, // Label 1358: @42045 GIM_Reject, // Label 1356: @42046 GIM_Reject, // Label 1344: @42047 GIM_Try, /*On fail goto*//*Label 1359*/ 42104, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1360*/ 42080, // Rule ID 2242 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (saddsat:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2242, GIR_Done, // Label 1360: @42080 GIM_Try, /*On fail goto*//*Label 1361*/ 42103, // Rule ID 4476 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (saddsat:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4476, GIR_Done, // Label 1361: @42103 GIM_Reject, // Label 1359: @42104 GIM_Reject, // Label 1345: @42105 GIM_Try, /*On fail goto*//*Label 1362*/ 42136, // Rule ID 4452 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (saddsat:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4452, GIR_Done, // Label 1362: @42136 GIM_Reject, // Label 1346: @42137 GIM_Try, /*On fail goto*//*Label 1363*/ 42168, // Rule ID 4470 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (saddsat:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDSBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4470, GIR_Done, // Label 1363: @42168 GIM_Reject, // Label 1347: @42169 GIM_Reject, // Label 29: @42170 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/13, 25, /*)*//*default:*//*Label 1370*/ 42530, /*GILLT_v8s16*//*Label 1364*/ 42188, 0, 0, 0, /*GILLT_v16s8*//*Label 1365*/ 42269, /*GILLT_v16s16*//*Label 1366*/ 42350, 0, 0, /*GILLT_v32s8*//*Label 1367*/ 42408, /*GILLT_v32s16*//*Label 1368*/ 42466, 0, /*GILLT_v64s8*//*Label 1369*/ 42498, // Label 1364: @42188 GIM_Try, /*On fail goto*//*Label 1371*/ 42268, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1372*/ 42221, // Rule ID 2322 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (usubsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBUSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2322, GIR_Done, // Label 1372: @42221 GIM_Try, /*On fail goto*//*Label 1373*/ 42244, // Rule ID 2324 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (usubsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBUSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBUSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2324, GIR_Done, // Label 1373: @42244 GIM_Try, /*On fail goto*//*Label 1374*/ 42267, // Rule ID 4572 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (usubsat:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBUSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4572, GIR_Done, // Label 1374: @42267 GIM_Reject, // Label 1371: @42268 GIM_Reject, // Label 1365: @42269 GIM_Try, /*On fail goto*//*Label 1375*/ 42349, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1376*/ 42302, // Rule ID 2316 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (usubsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBUSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2316, GIR_Done, // Label 1376: @42302 GIM_Try, /*On fail goto*//*Label 1377*/ 42325, // Rule ID 2318 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (usubsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBUSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBUSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2318, GIR_Done, // Label 1377: @42325 GIM_Try, /*On fail goto*//*Label 1378*/ 42348, // Rule ID 4590 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (usubsat:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBUSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4590, GIR_Done, // Label 1378: @42348 GIM_Reject, // Label 1375: @42349 GIM_Reject, // Label 1366: @42350 GIM_Try, /*On fail goto*//*Label 1379*/ 42407, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1380*/ 42383, // Rule ID 2326 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (usubsat:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBUSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2326, GIR_Done, // Label 1380: @42383 GIM_Try, /*On fail goto*//*Label 1381*/ 42406, // Rule ID 4566 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (usubsat:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBUSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4566, GIR_Done, // Label 1381: @42406 GIM_Reject, // Label 1379: @42407 GIM_Reject, // Label 1367: @42408 GIM_Try, /*On fail goto*//*Label 1382*/ 42465, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1383*/ 42441, // Rule ID 2320 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (usubsat:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBUSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2320, GIR_Done, // Label 1383: @42441 GIM_Try, /*On fail goto*//*Label 1384*/ 42464, // Rule ID 4584 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (usubsat:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBUSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4584, GIR_Done, // Label 1384: @42464 GIM_Reject, // Label 1382: @42465 GIM_Reject, // Label 1368: @42466 GIM_Try, /*On fail goto*//*Label 1385*/ 42497, // Rule ID 4560 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (usubsat:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBUSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4560, GIR_Done, // Label 1385: @42497 GIM_Reject, // Label 1369: @42498 GIM_Try, /*On fail goto*//*Label 1386*/ 42529, // Rule ID 4578 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (usubsat:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBUSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBUSBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4578, GIR_Done, // Label 1386: @42529 GIM_Reject, // Label 1370: @42530 GIM_Reject, // Label 30: @42531 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/13, 25, /*)*//*default:*//*Label 1393*/ 42891, /*GILLT_v8s16*//*Label 1387*/ 42549, 0, 0, 0, /*GILLT_v16s8*//*Label 1388*/ 42630, /*GILLT_v16s16*//*Label 1389*/ 42711, 0, 0, /*GILLT_v32s8*//*Label 1390*/ 42769, /*GILLT_v32s16*//*Label 1391*/ 42827, 0, /*GILLT_v64s8*//*Label 1392*/ 42859, // Label 1387: @42549 GIM_Try, /*On fail goto*//*Label 1394*/ 42629, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1395*/ 42582, // Rule ID 2310 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (ssubsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2310, GIR_Done, // Label 1395: @42582 GIM_Try, /*On fail goto*//*Label 1396*/ 42605, // Rule ID 2312 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (ssubsat:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2312, GIR_Done, // Label 1396: @42605 GIM_Try, /*On fail goto*//*Label 1397*/ 42628, // Rule ID 4500 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (ssubsat:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4500, GIR_Done, // Label 1397: @42628 GIM_Reject, // Label 1394: @42629 GIM_Reject, // Label 1388: @42630 GIM_Try, /*On fail goto*//*Label 1398*/ 42710, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1399*/ 42663, // Rule ID 2304 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (ssubsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2304, GIR_Done, // Label 1399: @42663 GIM_Try, /*On fail goto*//*Label 1400*/ 42686, // Rule ID 2306 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (ssubsat:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2306, GIR_Done, // Label 1400: @42686 GIM_Try, /*On fail goto*//*Label 1401*/ 42709, // Rule ID 4518 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (ssubsat:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4518, GIR_Done, // Label 1401: @42709 GIM_Reject, // Label 1398: @42710 GIM_Reject, // Label 1389: @42711 GIM_Try, /*On fail goto*//*Label 1402*/ 42768, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1403*/ 42744, // Rule ID 2314 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (ssubsat:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2314, GIR_Done, // Label 1403: @42744 GIM_Try, /*On fail goto*//*Label 1404*/ 42767, // Rule ID 4494 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (ssubsat:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4494, GIR_Done, // Label 1404: @42767 GIM_Reject, // Label 1402: @42768 GIM_Reject, // Label 1390: @42769 GIM_Try, /*On fail goto*//*Label 1405*/ 42826, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1406*/ 42802, // Rule ID 2308 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (ssubsat:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2308, GIR_Done, // Label 1406: @42802 GIM_Try, /*On fail goto*//*Label 1407*/ 42825, // Rule ID 4512 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (ssubsat:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4512, GIR_Done, // Label 1407: @42825 GIM_Reject, // Label 1405: @42826 GIM_Reject, // Label 1391: @42827 GIM_Try, /*On fail goto*//*Label 1408*/ 42858, // Rule ID 4488 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (ssubsat:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4488, GIR_Done, // Label 1408: @42858 GIM_Reject, // Label 1392: @42859 GIM_Try, /*On fail goto*//*Label 1409*/ 42890, // Rule ID 4506 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (ssubsat:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBSBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4506, GIR_Done, // Label 1409: @42890 GIM_Reject, // Label 1393: @42891 GIM_Reject, // Label 31: @42892 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 1423*/ 43713, /*GILLT_s16*//*Label 1410*/ 42919, /*GILLT_s32*//*Label 1411*/ 42954, /*GILLT_s64*//*Label 1412*/ 43073, /*GILLT_s80*//*Label 1413*/ 43192, 0, 0, /*GILLT_v2s64*//*Label 1414*/ 43230, 0, /*GILLT_v4s32*//*Label 1415*/ 43320, /*GILLT_v4s64*//*Label 1416*/ 43410, 0, /*GILLT_v8s16*//*Label 1417*/ 43474, /*GILLT_v8s32*//*Label 1418*/ 43509, /*GILLT_v8s64*//*Label 1419*/ 43573, 0, 0, /*GILLT_v16s16*//*Label 1420*/ 43608, /*GILLT_v16s32*//*Label 1421*/ 43643, 0, 0, /*GILLT_v32s16*//*Label 1422*/ 43678, // Label 1410: @42919 GIM_Try, /*On fail goto*//*Label 1424*/ 42953, // Rule ID 5592 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, // (fadd:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VADDSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5592, GIR_Done, // Label 1424: @42953 GIM_Reject, // Label 1411: @42954 GIM_Try, /*On fail goto*//*Label 1425*/ 43072, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1426*/ 42993, // Rule ID 621 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (fadd:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (ADD_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 621, GIR_Done, // Label 1426: @42993 GIM_Try, /*On fail goto*//*Label 1427*/ 43019, // Rule ID 1891 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1891, GIR_Done, // Label 1427: @43019 GIM_Try, /*On fail goto*//*Label 1428*/ 43045, // Rule ID 1899 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (ADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1899, GIR_Done, // Label 1428: @43045 GIM_Try, /*On fail goto*//*Label 1429*/ 43071, // Rule ID 5554 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (fadd:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VADDSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5554, GIR_Done, // Label 1429: @43071 GIM_Reject, // Label 1425: @43072 GIM_Reject, // Label 1412: @43073 GIM_Try, /*On fail goto*//*Label 1430*/ 43191, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1431*/ 43112, // Rule ID 623 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (fadd:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (ADD_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 623, GIR_Done, // Label 1431: @43112 GIM_Try, /*On fail goto*//*Label 1432*/ 43138, // Rule ID 1895 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1895, GIR_Done, // Label 1432: @43138 GIM_Try, /*On fail goto*//*Label 1433*/ 43164, // Rule ID 1903 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (ADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1903, GIR_Done, // Label 1433: @43164 GIM_Try, /*On fail goto*//*Label 1434*/ 43190, // Rule ID 5573 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (fadd:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VADDSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5573, GIR_Done, // Label 1434: @43190 GIM_Reject, // Label 1430: @43191 GIM_Reject, // Label 1413: @43192 GIM_Try, /*On fail goto*//*Label 1435*/ 43229, // Rule ID 625 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (fadd:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (ADD_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 625, GIR_Done, // Label 1435: @43229 GIM_Reject, // Label 1414: @43230 GIM_Try, /*On fail goto*//*Label 1436*/ 43319, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1437*/ 43266, // Rule ID 1871 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1871, GIR_Done, // Label 1437: @43266 GIM_Try, /*On fail goto*//*Label 1438*/ 43292, // Rule ID 1887 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (ADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1887, GIR_Done, // Label 1438: @43292 GIM_Try, /*On fail goto*//*Label 1439*/ 43318, // Rule ID 5932 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fadd:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VADDPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5932, GIR_Done, // Label 1439: @43318 GIM_Reject, // Label 1436: @43319 GIM_Reject, // Label 1415: @43320 GIM_Try, /*On fail goto*//*Label 1440*/ 43409, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1441*/ 43356, // Rule ID 1867 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1867, GIR_Done, // Label 1441: @43356 GIM_Try, /*On fail goto*//*Label 1442*/ 43382, // Rule ID 1883 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (ADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1883, GIR_Done, // Label 1442: @43382 GIM_Try, /*On fail goto*//*Label 1443*/ 43408, // Rule ID 5908 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fadd:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VADDPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5908, GIR_Done, // Label 1443: @43408 GIM_Reject, // Label 1440: @43409 GIM_Reject, // Label 1416: @43410 GIM_Try, /*On fail goto*//*Label 1444*/ 43473, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1445*/ 43446, // Rule ID 1879 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fadd:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VADDPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1879, GIR_Done, // Label 1445: @43446 GIM_Try, /*On fail goto*//*Label 1446*/ 43472, // Rule ID 5944 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fadd:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VADDPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5944, GIR_Done, // Label 1446: @43472 GIM_Reject, // Label 1444: @43473 GIM_Reject, // Label 1417: @43474 GIM_Try, /*On fail goto*//*Label 1447*/ 43508, // Rule ID 5968 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fadd:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VADDPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5968, GIR_Done, // Label 1447: @43508 GIM_Reject, // Label 1418: @43509 GIM_Try, /*On fail goto*//*Label 1448*/ 43572, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1449*/ 43545, // Rule ID 1875 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fadd:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VADDPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1875, GIR_Done, // Label 1449: @43545 GIM_Try, /*On fail goto*//*Label 1450*/ 43571, // Rule ID 5920 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fadd:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VADDPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5920, GIR_Done, // Label 1450: @43571 GIM_Reject, // Label 1448: @43572 GIM_Reject, // Label 1419: @43573 GIM_Try, /*On fail goto*//*Label 1451*/ 43607, // Rule ID 5896 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fadd:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VADDPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5896, GIR_Done, // Label 1451: @43607 GIM_Reject, // Label 1420: @43608 GIM_Try, /*On fail goto*//*Label 1452*/ 43642, // Rule ID 5980 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fadd:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VADDPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5980, GIR_Done, // Label 1452: @43642 GIM_Reject, // Label 1421: @43643 GIM_Try, /*On fail goto*//*Label 1453*/ 43677, // Rule ID 5884 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fadd:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VADDPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5884, GIR_Done, // Label 1453: @43677 GIM_Reject, // Label 1422: @43678 GIM_Try, /*On fail goto*//*Label 1454*/ 43712, // Rule ID 5956 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fadd:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VADDPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5956, GIR_Done, // Label 1454: @43712 GIM_Reject, // Label 1423: @43713 GIM_Reject, // Label 32: @43714 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 1468*/ 44535, /*GILLT_s16*//*Label 1455*/ 43741, /*GILLT_s32*//*Label 1456*/ 43776, /*GILLT_s64*//*Label 1457*/ 43895, /*GILLT_s80*//*Label 1458*/ 44014, 0, 0, /*GILLT_v2s64*//*Label 1459*/ 44052, 0, /*GILLT_v4s32*//*Label 1460*/ 44142, /*GILLT_v4s64*//*Label 1461*/ 44232, 0, /*GILLT_v8s16*//*Label 1462*/ 44296, /*GILLT_v8s32*//*Label 1463*/ 44331, /*GILLT_v8s64*//*Label 1464*/ 44395, 0, 0, /*GILLT_v16s16*//*Label 1465*/ 44430, /*GILLT_v16s32*//*Label 1466*/ 44465, 0, 0, /*GILLT_v32s16*//*Label 1467*/ 44500, // Label 1455: @43741 GIM_Try, /*On fail goto*//*Label 1469*/ 43775, // Rule ID 5706 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, // (fsub:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VSUBSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5706, GIR_Done, // Label 1469: @43775 GIM_Reject, // Label 1456: @43776 GIM_Try, /*On fail goto*//*Label 1470*/ 43894, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1471*/ 43815, // Rule ID 627 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (fsub:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (SUB_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 627, GIR_Done, // Label 1471: @43815 GIM_Try, /*On fail goto*//*Label 1472*/ 43841, // Rule ID 1971 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VSUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1971, GIR_Done, // Label 1472: @43841 GIM_Try, /*On fail goto*//*Label 1473*/ 43867, // Rule ID 1979 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (SUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1979, GIR_Done, // Label 1473: @43867 GIM_Try, /*On fail goto*//*Label 1474*/ 43893, // Rule ID 5668 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (fsub:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VSUBSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5668, GIR_Done, // Label 1474: @43893 GIM_Reject, // Label 1470: @43894 GIM_Reject, // Label 1457: @43895 GIM_Try, /*On fail goto*//*Label 1475*/ 44013, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1476*/ 43934, // Rule ID 629 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (fsub:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (SUB_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 629, GIR_Done, // Label 1476: @43934 GIM_Try, /*On fail goto*//*Label 1477*/ 43960, // Rule ID 1975 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VSUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1975, GIR_Done, // Label 1477: @43960 GIM_Try, /*On fail goto*//*Label 1478*/ 43986, // Rule ID 1983 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (SUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1983, GIR_Done, // Label 1478: @43986 GIM_Try, /*On fail goto*//*Label 1479*/ 44012, // Rule ID 5687 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (fsub:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VSUBSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5687, GIR_Done, // Label 1479: @44012 GIM_Reject, // Label 1475: @44013 GIM_Reject, // Label 1458: @44014 GIM_Try, /*On fail goto*//*Label 1480*/ 44051, // Rule ID 631 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (fsub:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (SUB_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 631, GIR_Done, // Label 1480: @44051 GIM_Reject, // Label 1459: @44052 GIM_Try, /*On fail goto*//*Label 1481*/ 44141, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1482*/ 44088, // Rule ID 1951 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VSUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1951, GIR_Done, // Label 1482: @44088 GIM_Try, /*On fail goto*//*Label 1483*/ 44114, // Rule ID 1967 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (SUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1967, GIR_Done, // Label 1483: @44114 GIM_Try, /*On fail goto*//*Label 1484*/ 44140, // Rule ID 6166 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fsub:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VSUBPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6166, GIR_Done, // Label 1484: @44140 GIM_Reject, // Label 1481: @44141 GIM_Reject, // Label 1460: @44142 GIM_Try, /*On fail goto*//*Label 1485*/ 44231, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1486*/ 44178, // Rule ID 1947 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VSUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1947, GIR_Done, // Label 1486: @44178 GIM_Try, /*On fail goto*//*Label 1487*/ 44204, // Rule ID 1963 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (SUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1963, GIR_Done, // Label 1487: @44204 GIM_Try, /*On fail goto*//*Label 1488*/ 44230, // Rule ID 6142 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fsub:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VSUBPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6142, GIR_Done, // Label 1488: @44230 GIM_Reject, // Label 1485: @44231 GIM_Reject, // Label 1461: @44232 GIM_Try, /*On fail goto*//*Label 1489*/ 44295, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1490*/ 44268, // Rule ID 1959 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fsub:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VSUBPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1959, GIR_Done, // Label 1490: @44268 GIM_Try, /*On fail goto*//*Label 1491*/ 44294, // Rule ID 6178 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fsub:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VSUBPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6178, GIR_Done, // Label 1491: @44294 GIM_Reject, // Label 1489: @44295 GIM_Reject, // Label 1462: @44296 GIM_Try, /*On fail goto*//*Label 1492*/ 44330, // Rule ID 6202 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fsub:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VSUBPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6202, GIR_Done, // Label 1492: @44330 GIM_Reject, // Label 1463: @44331 GIM_Try, /*On fail goto*//*Label 1493*/ 44394, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1494*/ 44367, // Rule ID 1955 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fsub:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VSUBPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1955, GIR_Done, // Label 1494: @44367 GIM_Try, /*On fail goto*//*Label 1495*/ 44393, // Rule ID 6154 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fsub:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VSUBPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6154, GIR_Done, // Label 1495: @44393 GIM_Reject, // Label 1493: @44394 GIM_Reject, // Label 1464: @44395 GIM_Try, /*On fail goto*//*Label 1496*/ 44429, // Rule ID 6130 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fsub:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VSUBPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6130, GIR_Done, // Label 1496: @44429 GIM_Reject, // Label 1465: @44430 GIM_Try, /*On fail goto*//*Label 1497*/ 44464, // Rule ID 6214 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fsub:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VSUBPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6214, GIR_Done, // Label 1497: @44464 GIM_Reject, // Label 1466: @44465 GIM_Try, /*On fail goto*//*Label 1498*/ 44499, // Rule ID 6118 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fsub:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VSUBPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6118, GIR_Done, // Label 1498: @44499 GIM_Reject, // Label 1467: @44500 GIM_Try, /*On fail goto*//*Label 1499*/ 44534, // Rule ID 6190 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fsub:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VSUBPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6190, GIR_Done, // Label 1499: @44534 GIM_Reject, // Label 1468: @44535 GIM_Reject, // Label 33: @44536 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 1513*/ 45357, /*GILLT_s16*//*Label 1500*/ 44563, /*GILLT_s32*//*Label 1501*/ 44598, /*GILLT_s64*//*Label 1502*/ 44717, /*GILLT_s80*//*Label 1503*/ 44836, 0, 0, /*GILLT_v2s64*//*Label 1504*/ 44874, 0, /*GILLT_v4s32*//*Label 1505*/ 44964, /*GILLT_v4s64*//*Label 1506*/ 45054, 0, /*GILLT_v8s16*//*Label 1507*/ 45118, /*GILLT_v8s32*//*Label 1508*/ 45153, /*GILLT_v8s64*//*Label 1509*/ 45217, 0, 0, /*GILLT_v16s16*//*Label 1510*/ 45252, /*GILLT_v16s32*//*Label 1511*/ 45287, 0, 0, /*GILLT_v32s16*//*Label 1512*/ 45322, // Label 1500: @44563 GIM_Try, /*On fail goto*//*Label 1514*/ 44597, // Rule ID 5649 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, // (fmul:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VMULSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5649, GIR_Done, // Label 1514: @44597 GIM_Reject, // Label 1501: @44598 GIM_Try, /*On fail goto*//*Label 1515*/ 44716, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1516*/ 44637, // Rule ID 633 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (fmul:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (MUL_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 633, GIR_Done, // Label 1516: @44637 GIM_Try, /*On fail goto*//*Label 1517*/ 44663, // Rule ID 1931 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VMULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1931, GIR_Done, // Label 1517: @44663 GIM_Try, /*On fail goto*//*Label 1518*/ 44689, // Rule ID 1939 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (MULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1939, GIR_Done, // Label 1518: @44689 GIM_Try, /*On fail goto*//*Label 1519*/ 44715, // Rule ID 5611 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (fmul:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VMULSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5611, GIR_Done, // Label 1519: @44715 GIM_Reject, // Label 1515: @44716 GIM_Reject, // Label 1502: @44717 GIM_Try, /*On fail goto*//*Label 1520*/ 44835, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1521*/ 44756, // Rule ID 635 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (fmul:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (MUL_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 635, GIR_Done, // Label 1521: @44756 GIM_Try, /*On fail goto*//*Label 1522*/ 44782, // Rule ID 1935 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VMULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1935, GIR_Done, // Label 1522: @44782 GIM_Try, /*On fail goto*//*Label 1523*/ 44808, // Rule ID 1943 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (MULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1943, GIR_Done, // Label 1523: @44808 GIM_Try, /*On fail goto*//*Label 1524*/ 44834, // Rule ID 5630 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (fmul:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VMULSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5630, GIR_Done, // Label 1524: @44834 GIM_Reject, // Label 1520: @44835 GIM_Reject, // Label 1503: @44836 GIM_Try, /*On fail goto*//*Label 1525*/ 44873, // Rule ID 637 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (fmul:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (MUL_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 637, GIR_Done, // Label 1525: @44873 GIM_Reject, // Label 1504: @44874 GIM_Try, /*On fail goto*//*Label 1526*/ 44963, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1527*/ 44910, // Rule ID 1911 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VMULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1911, GIR_Done, // Label 1527: @44910 GIM_Try, /*On fail goto*//*Label 1528*/ 44936, // Rule ID 1927 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (MULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1927, GIR_Done, // Label 1528: @44936 GIM_Try, /*On fail goto*//*Label 1529*/ 44962, // Rule ID 6049 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fmul:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VMULPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6049, GIR_Done, // Label 1529: @44962 GIM_Reject, // Label 1526: @44963 GIM_Reject, // Label 1505: @44964 GIM_Try, /*On fail goto*//*Label 1530*/ 45053, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1531*/ 45000, // Rule ID 1907 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VMULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1907, GIR_Done, // Label 1531: @45000 GIM_Try, /*On fail goto*//*Label 1532*/ 45026, // Rule ID 1923 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (MULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1923, GIR_Done, // Label 1532: @45026 GIM_Try, /*On fail goto*//*Label 1533*/ 45052, // Rule ID 6025 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fmul:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VMULPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6025, GIR_Done, // Label 1533: @45052 GIM_Reject, // Label 1530: @45053 GIM_Reject, // Label 1506: @45054 GIM_Try, /*On fail goto*//*Label 1534*/ 45117, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1535*/ 45090, // Rule ID 1919 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fmul:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VMULPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1919, GIR_Done, // Label 1535: @45090 GIM_Try, /*On fail goto*//*Label 1536*/ 45116, // Rule ID 6061 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fmul:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VMULPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6061, GIR_Done, // Label 1536: @45116 GIM_Reject, // Label 1534: @45117 GIM_Reject, // Label 1507: @45118 GIM_Try, /*On fail goto*//*Label 1537*/ 45152, // Rule ID 6085 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fmul:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VMULPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6085, GIR_Done, // Label 1537: @45152 GIM_Reject, // Label 1508: @45153 GIM_Try, /*On fail goto*//*Label 1538*/ 45216, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1539*/ 45189, // Rule ID 1915 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fmul:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VMULPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1915, GIR_Done, // Label 1539: @45189 GIM_Try, /*On fail goto*//*Label 1540*/ 45215, // Rule ID 6037 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fmul:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VMULPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6037, GIR_Done, // Label 1540: @45215 GIM_Reject, // Label 1538: @45216 GIM_Reject, // Label 1509: @45217 GIM_Try, /*On fail goto*//*Label 1541*/ 45251, // Rule ID 6013 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fmul:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VMULPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6013, GIR_Done, // Label 1541: @45251 GIM_Reject, // Label 1510: @45252 GIM_Try, /*On fail goto*//*Label 1542*/ 45286, // Rule ID 6097 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fmul:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VMULPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6097, GIR_Done, // Label 1542: @45286 GIM_Reject, // Label 1511: @45287 GIM_Try, /*On fail goto*//*Label 1543*/ 45321, // Rule ID 6001 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fmul:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VMULPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6001, GIR_Done, // Label 1543: @45321 GIM_Reject, // Label 1512: @45322 GIM_Try, /*On fail goto*//*Label 1544*/ 45356, // Rule ID 6073 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fmul:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VMULPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6073, GIR_Done, // Label 1544: @45356 GIM_Reject, // Label 1513: @45357 GIM_Reject, // Label 34: @45358 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 1557*/ 46531, /*GILLT_s16*//*Label 1545*/ 45385, /*GILLT_s32*//*Label 1546*/ 45442, /*GILLT_s64*//*Label 1547*/ 45576, 0, 0, 0, /*GILLT_v2s64*//*Label 1548*/ 45710, 0, /*GILLT_v4s32*//*Label 1549*/ 45844, /*GILLT_v4s64*//*Label 1550*/ 45978, 0, /*GILLT_v8s16*//*Label 1551*/ 46112, /*GILLT_v8s32*//*Label 1552*/ 46169, /*GILLT_v8s64*//*Label 1553*/ 46303, 0, 0, /*GILLT_v16s16*//*Label 1554*/ 46360, /*GILLT_v16s32*//*Label 1555*/ 46417, 0, 0, /*GILLT_v32s16*//*Label 1556*/ 46474, // Label 1545: @45385 GIM_Try, /*On fail goto*//*Label 1558*/ 45441, // Rule ID 9724 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR16XRegClassID, // (fma:{ *:[f16] } FR16X:{ *:[f16] }:$src2, FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src3) => (VFMADD213SHZr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2, FR16X:{ *:[f16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SHZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9724, GIR_Done, // Label 1558: @45441 GIM_Reject, // Label 1546: @45442 GIM_Try, /*On fail goto*//*Label 1559*/ 45575, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1560*/ 45500, // Rule ID 1030 // GIM_CheckFeatures, GIFBS_HasFMA_NoAVX512_NoFMA4, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR32RegClassID, // (fma:{ *:[f32] } FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src3) => (VFMADD213SSr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SSr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1030, GIR_Done, // Label 1560: @45500 GIM_Try, /*On fail goto*//*Label 1561*/ 45530, // Rule ID 1094 // GIM_CheckFeatures, GIFBS_HasFMA4_NoAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR32RegClassID, // (fma:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3) => (VFMADDSS4rr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDSS4rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1094, GIR_Done, // Label 1561: @45530 GIM_Try, /*On fail goto*//*Label 1562*/ 45574, // Rule ID 9706 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR32XRegClassID, // (fma:{ *:[f32] } FR32X:{ *:[f32] }:$src2, FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src3) => (VFMADD213SSZr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2, FR32X:{ *:[f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SSZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9706, GIR_Done, // Label 1562: @45574 GIM_Reject, // Label 1559: @45575 GIM_Reject, // Label 1547: @45576 GIM_Try, /*On fail goto*//*Label 1563*/ 45709, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1564*/ 45634, // Rule ID 1038 // GIM_CheckFeatures, GIFBS_HasFMA_NoAVX512_NoFMA4, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR64RegClassID, // (fma:{ *:[f64] } FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src3) => (VFMADD213SDr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SDr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1038, GIR_Done, // Label 1564: @45634 GIM_Try, /*On fail goto*//*Label 1565*/ 45664, // Rule ID 1178 // GIM_CheckFeatures, GIFBS_HasFMA4_NoAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR64RegClassID, // (fma:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3) => (VFMADDSD4rr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDSD4rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1178, GIR_Done, // Label 1565: @45664 GIM_Try, /*On fail goto*//*Label 1566*/ 45708, // Rule ID 9715 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR64XRegClassID, // (fma:{ *:[f64] } FR64X:{ *:[f64] }:$src2, FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src3) => (VFMADD213SDZr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2, FR64X:{ *:[f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SDZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9715, GIR_Done, // Label 1566: @45708 GIM_Reject, // Label 1563: @45709 GIM_Reject, // Label 1548: @45710 GIM_Try, /*On fail goto*//*Label 1567*/ 45843, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1568*/ 45768, // Rule ID 918 // GIM_CheckFeatures, GIFBS_HasFMA_NoFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (fma:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src3) => (VFMADD213PDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 918, GIR_Done, // Label 1568: @45768 GIM_Try, /*On fail goto*//*Label 1569*/ 45798, // Rule ID 1202 // GIM_CheckFeatures, GIFBS_HasFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (fma:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) => (VFMADDPD4rr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDPD4rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1202, GIR_Done, // Label 1569: @45798 GIM_Try, /*On fail goto*//*Label 1570*/ 45842, // Rule ID 8083 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (fma:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src2, VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src3) => (VFMADD213PDZ128r:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2, VR128X:{ *:[v2f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDZ128r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8083, GIR_Done, // Label 1570: @45842 GIM_Reject, // Label 1567: @45843 GIM_Reject, // Label 1549: @45844 GIM_Try, /*On fail goto*//*Label 1571*/ 45977, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1572*/ 45902, // Rule ID 870 // GIM_CheckFeatures, GIFBS_HasFMA_NoFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (fma:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src3) => (VFMADD213PSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 870, GIR_Done, // Label 1572: @45902 GIM_Try, /*On fail goto*//*Label 1573*/ 45932, // Rule ID 1118 // GIM_CheckFeatures, GIFBS_HasFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (fma:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) => (VFMADDPS4rr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDPS4rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1118, GIR_Done, // Label 1573: @45932 GIM_Try, /*On fail goto*//*Label 1574*/ 45976, // Rule ID 8044 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (fma:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src2, VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src3) => (VFMADD213PSZ128r:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2, VR128X:{ *:[v4f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSZ128r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8044, GIR_Done, // Label 1574: @45976 GIM_Reject, // Label 1571: @45977 GIM_Reject, // Label 1550: @45978 GIM_Try, /*On fail goto*//*Label 1575*/ 46111, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1576*/ 46036, // Rule ID 926 // GIM_CheckFeatures, GIFBS_HasFMA_NoFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (fma:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src3) => (VFMADD213PDYr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDYr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 926, GIR_Done, // Label 1576: @46036 GIM_Try, /*On fail goto*//*Label 1577*/ 46066, // Rule ID 1208 // GIM_CheckFeatures, GIFBS_HasFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (fma:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) => (VFMADDPD4Yrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDPD4Yrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1208, GIR_Done, // Label 1577: @46066 GIM_Try, /*On fail goto*//*Label 1578*/ 46110, // Rule ID 8071 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (fma:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src2, VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src3) => (VFMADD213PDZ256r:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2, VR256X:{ *:[v4f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDZ256r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8071, GIR_Done, // Label 1578: @46110 GIM_Reject, // Label 1575: @46111 GIM_Reject, // Label 1551: @46112 GIM_Try, /*On fail goto*//*Label 1579*/ 46168, // Rule ID 8005 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (fma:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src2, VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src3) => (VFMADD213PHZ128r:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2, VR128X:{ *:[v8f16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PHZ128r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8005, GIR_Done, // Label 1579: @46168 GIM_Reject, // Label 1552: @46169 GIM_Try, /*On fail goto*//*Label 1580*/ 46302, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1581*/ 46227, // Rule ID 878 // GIM_CheckFeatures, GIFBS_HasFMA_NoFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (fma:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src3) => (VFMADD213PSYr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSYr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 878, GIR_Done, // Label 1581: @46227 GIM_Try, /*On fail goto*//*Label 1582*/ 46257, // Rule ID 1124 // GIM_CheckFeatures, GIFBS_HasFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (fma:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) => (VFMADDPS4Yrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDPS4Yrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1124, GIR_Done, // Label 1582: @46257 GIM_Try, /*On fail goto*//*Label 1583*/ 46301, // Rule ID 8032 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (fma:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src2, VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src3) => (VFMADD213PSZ256r:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2, VR256X:{ *:[v8f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSZ256r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8032, GIR_Done, // Label 1583: @46301 GIM_Reject, // Label 1580: @46302 GIM_Reject, // Label 1553: @46303 GIM_Try, /*On fail goto*//*Label 1584*/ 46359, // Rule ID 8056 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (fma:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src2, VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src3) => (VFMADD213PDZr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2, VR512:{ *:[v8f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8056, GIR_Done, // Label 1584: @46359 GIM_Reject, // Label 1554: @46360 GIM_Try, /*On fail goto*//*Label 1585*/ 46416, // Rule ID 7993 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (fma:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src2, VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src3) => (VFMADD213PHZ256r:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2, VR256X:{ *:[v16f16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PHZ256r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7993, GIR_Done, // Label 1585: @46416 GIM_Reject, // Label 1555: @46417 GIM_Try, /*On fail goto*//*Label 1586*/ 46473, // Rule ID 8017 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (fma:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src2, VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src3) => (VFMADD213PSZr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2, VR512:{ *:[v16f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8017, GIR_Done, // Label 1586: @46473 GIM_Reject, // Label 1556: @46474 GIM_Try, /*On fail goto*//*Label 1587*/ 46530, // Rule ID 7978 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (fma:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src2, VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src3) => (VFMADD213PHZr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2, VR512:{ *:[v32f16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PHZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7978, GIR_Done, // Label 1587: @46530 GIM_Reject, // Label 1557: @46531 GIM_Reject, // Label 35: @46532 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 1601*/ 47353, /*GILLT_s16*//*Label 1588*/ 46559, /*GILLT_s32*//*Label 1589*/ 46594, /*GILLT_s64*//*Label 1590*/ 46713, /*GILLT_s80*//*Label 1591*/ 46832, 0, 0, /*GILLT_v2s64*//*Label 1592*/ 46870, 0, /*GILLT_v4s32*//*Label 1593*/ 46960, /*GILLT_v4s64*//*Label 1594*/ 47050, 0, /*GILLT_v8s16*//*Label 1595*/ 47114, /*GILLT_v8s32*//*Label 1596*/ 47149, /*GILLT_v8s64*//*Label 1597*/ 47213, 0, 0, /*GILLT_v16s16*//*Label 1598*/ 47248, /*GILLT_v16s32*//*Label 1599*/ 47283, 0, 0, /*GILLT_v32s16*//*Label 1600*/ 47318, // Label 1588: @46559 GIM_Try, /*On fail goto*//*Label 1602*/ 46593, // Rule ID 5763 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, // (fdiv:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VDIVSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5763, GIR_Done, // Label 1602: @46593 GIM_Reject, // Label 1589: @46594 GIM_Try, /*On fail goto*//*Label 1603*/ 46712, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1604*/ 46633, // Rule ID 639 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (fdiv:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (DIV_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 639, GIR_Done, // Label 1604: @46633 GIM_Try, /*On fail goto*//*Label 1605*/ 46659, // Rule ID 2011 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VDIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2011, GIR_Done, // Label 1605: @46659 GIM_Try, /*On fail goto*//*Label 1606*/ 46685, // Rule ID 2019 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (DIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2019, GIR_Done, // Label 1606: @46685 GIM_Try, /*On fail goto*//*Label 1607*/ 46711, // Rule ID 5725 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (fdiv:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VDIVSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5725, GIR_Done, // Label 1607: @46711 GIM_Reject, // Label 1603: @46712 GIM_Reject, // Label 1590: @46713 GIM_Try, /*On fail goto*//*Label 1608*/ 46831, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1609*/ 46752, // Rule ID 641 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (fdiv:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (DIV_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 641, GIR_Done, // Label 1609: @46752 GIM_Try, /*On fail goto*//*Label 1610*/ 46778, // Rule ID 2015 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VDIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2015, GIR_Done, // Label 1610: @46778 GIM_Try, /*On fail goto*//*Label 1611*/ 46804, // Rule ID 2023 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (DIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2023, GIR_Done, // Label 1611: @46804 GIM_Try, /*On fail goto*//*Label 1612*/ 46830, // Rule ID 5744 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (fdiv:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VDIVSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5744, GIR_Done, // Label 1612: @46830 GIM_Reject, // Label 1608: @46831 GIM_Reject, // Label 1591: @46832 GIM_Try, /*On fail goto*//*Label 1613*/ 46869, // Rule ID 643 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (fdiv:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (DIV_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 643, GIR_Done, // Label 1613: @46869 GIM_Reject, // Label 1592: @46870 GIM_Try, /*On fail goto*//*Label 1614*/ 46959, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1615*/ 46906, // Rule ID 1991 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VDIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1991, GIR_Done, // Label 1615: @46906 GIM_Try, /*On fail goto*//*Label 1616*/ 46932, // Rule ID 2007 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (DIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2007, GIR_Done, // Label 1616: @46932 GIM_Try, /*On fail goto*//*Label 1617*/ 46958, // Rule ID 6283 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fdiv:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VDIVPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6283, GIR_Done, // Label 1617: @46958 GIM_Reject, // Label 1614: @46959 GIM_Reject, // Label 1593: @46960 GIM_Try, /*On fail goto*//*Label 1618*/ 47049, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1619*/ 46996, // Rule ID 1987 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VDIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1987, GIR_Done, // Label 1619: @46996 GIM_Try, /*On fail goto*//*Label 1620*/ 47022, // Rule ID 2003 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (DIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2003, GIR_Done, // Label 1620: @47022 GIM_Try, /*On fail goto*//*Label 1621*/ 47048, // Rule ID 6259 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fdiv:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VDIVPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6259, GIR_Done, // Label 1621: @47048 GIM_Reject, // Label 1618: @47049 GIM_Reject, // Label 1594: @47050 GIM_Try, /*On fail goto*//*Label 1622*/ 47113, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1623*/ 47086, // Rule ID 1999 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fdiv:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VDIVPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1999, GIR_Done, // Label 1623: @47086 GIM_Try, /*On fail goto*//*Label 1624*/ 47112, // Rule ID 6295 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fdiv:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VDIVPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6295, GIR_Done, // Label 1624: @47112 GIM_Reject, // Label 1622: @47113 GIM_Reject, // Label 1595: @47114 GIM_Try, /*On fail goto*//*Label 1625*/ 47148, // Rule ID 6319 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fdiv:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VDIVPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6319, GIR_Done, // Label 1625: @47148 GIM_Reject, // Label 1596: @47149 GIM_Try, /*On fail goto*//*Label 1626*/ 47212, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1627*/ 47185, // Rule ID 1995 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fdiv:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VDIVPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1995, GIR_Done, // Label 1627: @47185 GIM_Try, /*On fail goto*//*Label 1628*/ 47211, // Rule ID 6271 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fdiv:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VDIVPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6271, GIR_Done, // Label 1628: @47211 GIM_Reject, // Label 1626: @47212 GIM_Reject, // Label 1597: @47213 GIM_Try, /*On fail goto*//*Label 1629*/ 47247, // Rule ID 6247 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fdiv:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VDIVPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6247, GIR_Done, // Label 1629: @47247 GIM_Reject, // Label 1598: @47248 GIM_Try, /*On fail goto*//*Label 1630*/ 47282, // Rule ID 6331 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fdiv:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VDIVPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6331, GIR_Done, // Label 1630: @47282 GIM_Reject, // Label 1599: @47283 GIM_Try, /*On fail goto*//*Label 1631*/ 47317, // Rule ID 6235 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fdiv:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VDIVPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6235, GIR_Done, // Label 1631: @47317 GIM_Reject, // Label 1600: @47318 GIM_Try, /*On fail goto*//*Label 1632*/ 47352, // Rule ID 6307 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fdiv:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VDIVPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6307, GIR_Done, // Label 1632: @47352 GIM_Reject, // Label 1601: @47353 GIM_Reject, // Label 36: @47354 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 1636*/ 47444, /*GILLT_s32*//*Label 1633*/ 47363, /*GILLT_s64*//*Label 1634*/ 47390, /*GILLT_s80*//*Label 1635*/ 47417, // Label 1633: @47363 GIM_Try, /*On fail goto*//*Label 1637*/ 47389, // Rule ID 776 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fneg:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (CHS_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 776, GIR_Done, // Label 1637: @47389 GIM_Reject, // Label 1634: @47390 GIM_Try, /*On fail goto*//*Label 1638*/ 47416, // Rule ID 777 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fneg:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (CHS_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 777, GIR_Done, // Label 1638: @47416 GIM_Reject, // Label 1635: @47417 GIM_Try, /*On fail goto*//*Label 1639*/ 47443, // Rule ID 778 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fneg:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (CHS_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 778, GIR_Done, // Label 1639: @47443 GIM_Reject, // Label 1636: @47444 GIM_Reject, // Label 37: @47445 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1647*/ 47923, /*GILLT_s32*//*Label 1640*/ 47468, /*GILLT_s64*//*Label 1641*/ 47517, /*GILLT_s80*//*Label 1642*/ 47713, 0, 0, 0, 0, 0, /*GILLT_v4s64*//*Label 1643*/ 47764, 0, 0, /*GILLT_v8s32*//*Label 1644*/ 47816, /*GILLT_v8s64*//*Label 1645*/ 47843, 0, 0, 0, /*GILLT_v16s32*//*Label 1646*/ 47896, // Label 1640: @47468 GIM_Try, /*On fail goto*//*Label 1648*/ 47516, // Rule ID 19687 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, // (fpextend:{ *:[f32] } FR16X:{ *:[f16] }:$src) => (VCVTSH2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR16X:{ *:[f16] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSH2SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19687, GIR_Done, // Label 1648: @47516 GIM_Reject, // Label 1641: @47517 GIM_Try, /*On fail goto*//*Label 1649*/ 47543, // Rule ID 1624 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (CVTSS2SDrr:{ *:[f64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSS2SDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1624, GIR_Done, // Label 1649: @47543 GIM_Try, /*On fail goto*//*Label 1650*/ 47568, // Rule ID 16182 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fpextend:{ *:[f64] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP32:{ *:[f32] }:$src, RFP64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::RFP64RegClassID, // GIR_Coverage, 16182, GIR_Done, // Label 1650: @47568 GIM_Try, /*On fail goto*//*Label 1651*/ 47616, // Rule ID 16455 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16455, GIR_Done, // Label 1651: @47616 GIM_Try, /*On fail goto*//*Label 1652*/ 47664, // Rule ID 19681 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fpextend:{ *:[f64] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32X:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19681, GIR_Done, // Label 1652: @47664 GIM_Try, /*On fail goto*//*Label 1653*/ 47712, // Rule ID 19691 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, // (fpextend:{ *:[f64] } FR16X:{ *:[f16] }:$src) => (VCVTSH2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR16X:{ *:[f16] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSH2SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19691, GIR_Done, // Label 1653: @47712 GIM_Reject, // Label 1642: @47713 GIM_Try, /*On fail goto*//*Label 1654*/ 47738, // Rule ID 16184 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fpextend:{ *:[f80] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP32:{ *:[f32] }:$src, RFP80:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::RFP80RegClassID, // GIR_Coverage, 16184, GIR_Done, // Label 1654: @47738 GIM_Try, /*On fail goto*//*Label 1655*/ 47763, // Rule ID 16186 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fpextend:{ *:[f80] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP64:{ *:[f64] }:$src, RFP80:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::RFP80RegClassID, // GIR_Coverage, 16186, GIR_Done, // Label 1655: @47763 GIM_Reject, // Label 1643: @47764 GIM_Try, /*On fail goto*//*Label 1656*/ 47815, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1657*/ 47792, // Rule ID 1667 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fpextend:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src) => (VCVTPS2PDYrr:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1667, GIR_Done, // Label 1657: @47792 GIM_Try, /*On fail goto*//*Label 1658*/ 47814, // Rule ID 10148 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (fpextend:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10148, GIR_Done, // Label 1658: @47814 GIM_Reject, // Label 1656: @47815 GIM_Reject, // Label 1644: @47816 GIM_Try, /*On fail goto*//*Label 1659*/ 47842, // Rule ID 10211 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (fpextend:{ *:[v8f32] } VR128X:{ *:[v8f16] }:$src) => (VCVTPH2PSXZ256rr:{ *:[v8f32] } VR128X:{ *:[v8f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPH2PSXZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10211, GIR_Done, // Label 1659: @47842 GIM_Reject, // Label 1645: @47843 GIM_Try, /*On fail goto*//*Label 1660*/ 47869, // Rule ID 10123 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (fpextend:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10123, GIR_Done, // Label 1660: @47869 GIM_Try, /*On fail goto*//*Label 1661*/ 47895, // Rule ID 10237 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (fpextend:{ *:[v8f64] } VR128X:{ *:[v8f16] }:$src) => (VCVTPH2PDZrr:{ *:[v8f64] } VR128X:{ *:[v8f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPH2PDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10237, GIR_Done, // Label 1661: @47895 GIM_Reject, // Label 1646: @47896 GIM_Try, /*On fail goto*//*Label 1662*/ 47922, // Rule ID 10186 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (fpextend:{ *:[v16f32] } VR256X:{ *:[v16f16] }:$src) => (VCVTPH2PSXZrr:{ *:[v16f32] } VR256X:{ *:[v16f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPH2PSXZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10186, GIR_Done, // Label 1662: @47922 GIM_Reject, // Label 1647: @47923 GIM_Reject, // Label 38: @47924 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 5, /*)*//*default:*//*Label 1666*/ 48229, /*GILLT_s16*//*Label 1663*/ 47933, /*GILLT_s32*//*Label 1664*/ 48030, /*GILLT_s64*//*Label 1665*/ 48203, // Label 1663: @47933 GIM_Try, /*On fail goto*//*Label 1667*/ 47981, // Rule ID 19695 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fpround:{ *:[f16] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), FR32X:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SHZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19695, GIR_Done, // Label 1667: @47981 GIM_Try, /*On fail goto*//*Label 1668*/ 48029, // Rule ID 19697 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fpround:{ *:[f16] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), FR64X:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SHZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19697, GIR_Done, // Label 1668: @48029 GIM_Reject, // Label 1664: @48030 GIM_Try, /*On fail goto*//*Label 1669*/ 48056, // Rule ID 1612 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (CVTSD2SSrr:{ *:[f32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSD2SSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1612, GIR_Done, // Label 1669: @48056 GIM_Try, /*On fail goto*//*Label 1670*/ 48081, // Rule ID 16188 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fpround:{ *:[f32] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP64:{ *:[f64] }:$src, RFP32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::RFP32RegClassID, // GIR_Coverage, 16188, GIR_Done, // Label 1670: @48081 GIM_Try, /*On fail goto*//*Label 1671*/ 48106, // Rule ID 16190 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fpround:{ *:[f32] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP80:{ *:[f80] }:$src, RFP32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::RFP32RegClassID, // GIR_Coverage, 16190, GIR_Done, // Label 1671: @48106 GIM_Try, /*On fail goto*//*Label 1672*/ 48154, // Rule ID 16453 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (VCVTSD2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16453, GIR_Done, // Label 1672: @48154 GIM_Try, /*On fail goto*//*Label 1673*/ 48202, // Rule ID 19685 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fpround:{ *:[f32] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64X:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19685, GIR_Done, // Label 1673: @48202 GIM_Reject, // Label 1665: @48203 GIM_Try, /*On fail goto*//*Label 1674*/ 48228, // Rule ID 16192 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fpround:{ *:[f64] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP80:{ *:[f80] }:$src, RFP64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::RFP64RegClassID, // GIR_Coverage, 16192, GIR_Done, // Label 1674: @48228 GIM_Reject, // Label 1666: @48229 GIM_Reject, // Label 39: @48230 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 11, /*)*//*default:*//*Label 1678*/ 48637, /*GILLT_s32*//*Label 1675*/ 48244, /*GILLT_s64*//*Label 1676*/ 48427, 0, 0, 0, 0, 0, /*GILLT_v4s32*//*Label 1677*/ 48610, // Label 1675: @48244 GIM_Try, /*On fail goto*//*Label 1679*/ 48270, // Rule ID 1472 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1472, GIR_Done, // Label 1679: @48270 GIM_Try, /*On fail goto*//*Label 1680*/ 48296, // Rule ID 1480 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1480, GIR_Done, // Label 1680: @48296 GIM_Try, /*On fail goto*//*Label 1681*/ 48322, // Rule ID 1496 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (CVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSS2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1496, GIR_Done, // Label 1681: @48322 GIM_Try, /*On fail goto*//*Label 1682*/ 48348, // Rule ID 1504 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (CVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSD2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1504, GIR_Done, // Label 1682: @48348 GIM_Try, /*On fail goto*//*Label 1683*/ 48374, // Rule ID 9934 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fp_to_sint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9934, GIR_Done, // Label 1683: @48374 GIM_Try, /*On fail goto*//*Label 1684*/ 48400, // Rule ID 9952 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fp_to_sint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9952, GIR_Done, // Label 1684: @48400 GIM_Try, /*On fail goto*//*Label 1685*/ 48426, // Rule ID 14946 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, // (fp_to_sint:{ *:[i32] } FR16X:{ *:[f16] }:$src) => (VCVTTSH2SIZrr:{ *:[i32] } FR16X:{ *:[f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSH2SIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14946, GIR_Done, // Label 1685: @48426 GIM_Reject, // Label 1676: @48427 GIM_Try, /*On fail goto*//*Label 1686*/ 48453, // Rule ID 1476 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1476, GIR_Done, // Label 1686: @48453 GIM_Try, /*On fail goto*//*Label 1687*/ 48479, // Rule ID 1484 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1484, GIR_Done, // Label 1687: @48479 GIM_Try, /*On fail goto*//*Label 1688*/ 48505, // Rule ID 1500 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSS2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1500, GIR_Done, // Label 1688: @48505 GIM_Try, /*On fail goto*//*Label 1689*/ 48531, // Rule ID 1508 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSD2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1508, GIR_Done, // Label 1689: @48531 GIM_Try, /*On fail goto*//*Label 1690*/ 48557, // Rule ID 9943 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fp_to_sint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9943, GIR_Done, // Label 1690: @48557 GIM_Try, /*On fail goto*//*Label 1691*/ 48583, // Rule ID 9961 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fp_to_sint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9961, GIR_Done, // Label 1691: @48583 GIM_Try, /*On fail goto*//*Label 1692*/ 48609, // Rule ID 14955 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, // (fp_to_sint:{ *:[i64] } FR16X:{ *:[f16] }:$src) => (VCVTTSH2SI64Zrr:{ *:[i64] } FR16X:{ *:[f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSH2SI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14955, GIR_Done, // Label 1692: @48609 GIM_Reject, // Label 1677: @48610 GIM_Try, /*On fail goto*//*Label 1693*/ 48636, // Rule ID 16499 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (fp_to_sint:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) => (VCVTTPD2DQYrr:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2DQYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16499, GIR_Done, // Label 1693: @48636 GIM_Reject, // Label 1678: @48637 GIM_Reject, // Label 40: @48638 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 5, /*)*//*default:*//*Label 1696*/ 48804, /*GILLT_s32*//*Label 1694*/ 48646, /*GILLT_s64*//*Label 1695*/ 48725, // Label 1694: @48646 GIM_Try, /*On fail goto*//*Label 1697*/ 48672, // Rule ID 9970 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fp_to_uint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2USIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9970, GIR_Done, // Label 1697: @48672 GIM_Try, /*On fail goto*//*Label 1698*/ 48698, // Rule ID 9988 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fp_to_uint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2USIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9988, GIR_Done, // Label 1698: @48698 GIM_Try, /*On fail goto*//*Label 1699*/ 48724, // Rule ID 14964 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, // (fp_to_uint:{ *:[i32] } FR16X:{ *:[f16] }:$src) => (VCVTTSH2USIZrr:{ *:[i32] } FR16X:{ *:[f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSH2USIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14964, GIR_Done, // Label 1699: @48724 GIM_Reject, // Label 1695: @48725 GIM_Try, /*On fail goto*//*Label 1700*/ 48751, // Rule ID 9979 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fp_to_uint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2USI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9979, GIR_Done, // Label 1700: @48751 GIM_Try, /*On fail goto*//*Label 1701*/ 48777, // Rule ID 9997 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fp_to_uint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2USI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9997, GIR_Done, // Label 1701: @48777 GIM_Try, /*On fail goto*//*Label 1702*/ 48803, // Rule ID 14973 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, // (fp_to_uint:{ *:[i64] } FR16X:{ *:[f16] }:$src) => (VCVTTSH2USI64Zrr:{ *:[i64] } FR16X:{ *:[f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSH2USI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14973, GIR_Done, // Label 1702: @48803 GIM_Reject, // Label 1696: @48804 GIM_Reject, // Label 41: @48805 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 1715*/ 49936, /*GILLT_s16*//*Label 1703*/ 48832, /*GILLT_s32*//*Label 1704*/ 48929, /*GILLT_s64*//*Label 1705*/ 49174, 0, 0, 0, /*GILLT_v2s64*//*Label 1706*/ 49416, 0, /*GILLT_v4s32*//*Label 1707*/ 49443, /*GILLT_v4s64*//*Label 1708*/ 49548, 0, /*GILLT_v8s16*//*Label 1709*/ 49621, /*GILLT_v8s32*//*Label 1710*/ 49700, /*GILLT_v8s64*//*Label 1711*/ 49779, 0, 0, /*GILLT_v16s16*//*Label 1712*/ 49829, /*GILLT_v16s32*//*Label 1713*/ 49882, 0, 0, /*GILLT_v32s16*//*Label 1714*/ 49909, // Label 1703: @48832 GIM_Try, /*On fail goto*//*Label 1716*/ 48880, // Rule ID 20574 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f16] } GR32:{ *:[i32] }:$src) => (VCVTSI2SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SHZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20574, GIR_Done, // Label 1716: @48880 GIM_Try, /*On fail goto*//*Label 1717*/ 48928, // Rule ID 20576 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f16] } GR64:{ *:[i64] }:$src) => (VCVTSI642SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SHZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20576, GIR_Done, // Label 1717: @48928 GIM_Reject, // Label 1704: @48929 GIM_Try, /*On fail goto*//*Label 1718*/ 48955, // Rule ID 1520 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (CVTSI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI2SSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1520, GIR_Done, // Label 1718: @48955 GIM_Try, /*On fail goto*//*Label 1719*/ 48981, // Rule ID 1524 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (CVTSI642SSrr:{ *:[f32] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI642SSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1524, GIR_Done, // Label 1719: @48981 GIM_Try, /*On fail goto*//*Label 1720*/ 49029, // Rule ID 16437 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16437, GIR_Done, // Label 1720: @49029 GIM_Try, /*On fail goto*//*Label 1721*/ 49077, // Rule ID 16439 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16439, GIR_Done, // Label 1721: @49077 GIM_Try, /*On fail goto*//*Label 1722*/ 49125, // Rule ID 19621 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19621, GIR_Done, // Label 1722: @49125 GIM_Try, /*On fail goto*//*Label 1723*/ 49173, // Rule ID 19623 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19623, GIR_Done, // Label 1723: @49173 GIM_Reject, // Label 1705: @49174 GIM_Try, /*On fail goto*//*Label 1724*/ 49197, // Rule ID 1528 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (CVTSI2SDrr:{ *:[f64] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI2SDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1528, GIR_Done, // Label 1724: @49197 GIM_Try, /*On fail goto*//*Label 1725*/ 49223, // Rule ID 1532 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (CVTSI642SDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI642SDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1532, GIR_Done, // Label 1725: @49223 GIM_Try, /*On fail goto*//*Label 1726*/ 49271, // Rule ID 16441 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16441, GIR_Done, // Label 1726: @49271 GIM_Try, /*On fail goto*//*Label 1727*/ 49319, // Rule ID 16443 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16443, GIR_Done, // Label 1727: @49319 GIM_Try, /*On fail goto*//*Label 1728*/ 49367, // Rule ID 19625 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19625, GIR_Done, // Label 1728: @49367 GIM_Try, /*On fail goto*//*Label 1729*/ 49415, // Rule ID 19627 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19627, GIR_Done, // Label 1729: @49415 GIM_Reject, // Label 1706: @49416 GIM_Try, /*On fail goto*//*Label 1730*/ 49442, // Rule ID 10948 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10948, GIR_Done, // Label 1730: @49442 GIM_Reject, // Label 1707: @49443 GIM_Try, /*On fail goto*//*Label 1731*/ 49469, // Rule ID 1600 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1600, GIR_Done, // Label 1731: @49469 GIM_Try, /*On fail goto*//*Label 1732*/ 49495, // Rule ID 1608 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (CVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTDQ2PSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1608, GIR_Done, // Label 1732: @49495 GIM_Try, /*On fail goto*//*Label 1733*/ 49521, // Rule ID 10324 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10324, GIR_Done, // Label 1733: @49521 GIM_Try, /*On fail goto*//*Label 1734*/ 49547, // Rule ID 11080 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11080, GIR_Done, // Label 1734: @49547 GIM_Reject, // Label 1708: @49548 GIM_Try, /*On fail goto*//*Label 1735*/ 49571, // Rule ID 1679 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sint_to_fp:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PDYrr:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1679, GIR_Done, // Label 1735: @49571 GIM_Try, /*On fail goto*//*Label 1736*/ 49594, // Rule ID 10297 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10297, GIR_Done, // Label 1736: @49594 GIM_Try, /*On fail goto*//*Label 1737*/ 49620, // Rule ID 10960 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10960, GIR_Done, // Label 1737: @49620 GIM_Reject, // Label 1709: @49621 GIM_Try, /*On fail goto*//*Label 1738*/ 49647, // Rule ID 11026 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v8f16] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PHZ256rr:{ *:[v8f16] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11026, GIR_Done, // Label 1738: @49647 GIM_Try, /*On fail goto*//*Label 1739*/ 49673, // Rule ID 14596 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sint_to_fp:{ *:[v8f16] } VR128X:{ *:[v8i16] }:$src) => (VCVTW2PHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTW2PHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14596, GIR_Done, // Label 1739: @49673 GIM_Try, /*On fail goto*//*Label 1740*/ 49699, // Rule ID 14896 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (sint_to_fp:{ *:[v8f16] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PHZrr:{ *:[v8f16] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14896, GIR_Done, // Label 1740: @49699 GIM_Reject, // Label 1710: @49700 GIM_Try, /*On fail goto*//*Label 1741*/ 49726, // Rule ID 1604 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (sint_to_fp:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src) => (VCVTDQ2PSYrr:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1604, GIR_Done, // Label 1741: @49726 GIM_Try, /*On fail goto*//*Label 1742*/ 49752, // Rule ID 10336 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10336, GIR_Done, // Label 1742: @49752 GIM_Try, /*On fail goto*//*Label 1743*/ 49778, // Rule ID 11065 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (sint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11065, GIR_Done, // Label 1743: @49778 GIM_Reject, // Label 1711: @49779 GIM_Try, /*On fail goto*//*Label 1744*/ 49802, // Rule ID 10273 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10273, GIR_Done, // Label 1744: @49802 GIM_Try, /*On fail goto*//*Label 1745*/ 49828, // Rule ID 10933 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (sint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10933, GIR_Done, // Label 1745: @49828 GIM_Reject, // Label 1712: @49829 GIM_Try, /*On fail goto*//*Label 1746*/ 49855, // Rule ID 11011 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (sint_to_fp:{ *:[v16f16] } VR512:{ *:[v16i32] }:$src) => (VCVTDQ2PHZrr:{ *:[v16f16] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11011, GIR_Done, // Label 1746: @49855 GIM_Try, /*On fail goto*//*Label 1747*/ 49881, // Rule ID 14608 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v16f16] } VR256X:{ *:[v16i16] }:$src) => (VCVTW2PHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTW2PHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14608, GIR_Done, // Label 1747: @49881 GIM_Reject, // Label 1713: @49882 GIM_Try, /*On fail goto*//*Label 1748*/ 49908, // Rule ID 10309 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (sint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10309, GIR_Done, // Label 1748: @49908 GIM_Reject, // Label 1714: @49909 GIM_Try, /*On fail goto*//*Label 1749*/ 49935, // Rule ID 14581 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (sint_to_fp:{ *:[v32f16] } VR512:{ *:[v32i16] }:$src) => (VCVTW2PHZrr:{ *:[v32f16] } VR512:{ *:[v32i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTW2PHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14581, GIR_Done, // Label 1749: @49935 GIM_Reject, // Label 1715: @49936 GIM_Reject, // Label 42: @49937 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 1762*/ 50674, /*GILLT_s16*//*Label 1750*/ 49964, /*GILLT_s32*//*Label 1751*/ 50061, /*GILLT_s64*//*Label 1752*/ 50158, 0, 0, 0, /*GILLT_v2s64*//*Label 1753*/ 50255, 0, /*GILLT_v4s32*//*Label 1754*/ 50282, /*GILLT_v4s64*//*Label 1755*/ 50335, 0, /*GILLT_v8s16*//*Label 1756*/ 50385, /*GILLT_v8s32*//*Label 1757*/ 50464, /*GILLT_v8s64*//*Label 1758*/ 50517, 0, 0, /*GILLT_v16s16*//*Label 1759*/ 50567, /*GILLT_v16s32*//*Label 1760*/ 50620, 0, 0, /*GILLT_v32s16*//*Label 1761*/ 50647, // Label 1750: @49964 GIM_Try, /*On fail goto*//*Label 1763*/ 50012, // Rule ID 20582 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (uint_to_fp:{ *:[f16] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SHZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20582, GIR_Done, // Label 1763: @50012 GIM_Try, /*On fail goto*//*Label 1764*/ 50060, // Rule ID 20584 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (uint_to_fp:{ *:[f16] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SHZrr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI642SHZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20584, GIR_Done, // Label 1764: @50060 GIM_Reject, // Label 1751: @50061 GIM_Try, /*On fail goto*//*Label 1765*/ 50109, // Rule ID 19637 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (uint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19637, GIR_Done, // Label 1765: @50109 GIM_Try, /*On fail goto*//*Label 1766*/ 50157, // Rule ID 19639 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (uint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI642SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19639, GIR_Done, // Label 1766: @50157 GIM_Reject, // Label 1752: @50158 GIM_Try, /*On fail goto*//*Label 1767*/ 50206, // Rule ID 19641 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (uint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19641, GIR_Done, // Label 1767: @50206 GIM_Try, /*On fail goto*//*Label 1768*/ 50254, // Rule ID 19643 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (uint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI642SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19643, GIR_Done, // Label 1768: @50254 GIM_Reject, // Label 1753: @50255 GIM_Try, /*On fail goto*//*Label 1769*/ 50281, // Rule ID 10987 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (uint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTUQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10987, GIR_Done, // Label 1769: @50281 GIM_Reject, // Label 1754: @50282 GIM_Try, /*On fail goto*//*Label 1770*/ 50308, // Rule ID 10531 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (uint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10531, GIR_Done, // Label 1770: @50308 GIM_Try, /*On fail goto*//*Label 1771*/ 50334, // Rule ID 11107 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11107, GIR_Done, // Label 1771: @50334 GIM_Reject, // Label 1755: @50335 GIM_Try, /*On fail goto*//*Label 1772*/ 50358, // Rule ID 10504 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (uint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10504, GIR_Done, // Label 1772: @50358 GIM_Try, /*On fail goto*//*Label 1773*/ 50384, // Rule ID 10999 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10999, GIR_Done, // Label 1773: @50384 GIM_Reject, // Label 1756: @50385 GIM_Try, /*On fail goto*//*Label 1774*/ 50411, // Rule ID 11053 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v8f16] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PHZ256rr:{ *:[v8f16] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11053, GIR_Done, // Label 1774: @50411 GIM_Try, /*On fail goto*//*Label 1775*/ 50437, // Rule ID 14449 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (uint_to_fp:{ *:[v8f16] } VR128X:{ *:[v8i16] }:$src) => (VCVTUW2PHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUW2PHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14449, GIR_Done, // Label 1775: @50437 GIM_Try, /*On fail goto*//*Label 1776*/ 50463, // Rule ID 14911 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (uint_to_fp:{ *:[v8f16] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PHZrr:{ *:[v8f16] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14911, GIR_Done, // Label 1776: @50463 GIM_Reject, // Label 1757: @50464 GIM_Try, /*On fail goto*//*Label 1777*/ 50490, // Rule ID 10543 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10543, GIR_Done, // Label 1777: @50490 GIM_Try, /*On fail goto*//*Label 1778*/ 50516, // Rule ID 11092 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (uint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11092, GIR_Done, // Label 1778: @50516 GIM_Reject, // Label 1758: @50517 GIM_Try, /*On fail goto*//*Label 1779*/ 50540, // Rule ID 10480 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10480, GIR_Done, // Label 1779: @50540 GIM_Try, /*On fail goto*//*Label 1780*/ 50566, // Rule ID 10972 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (uint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10972, GIR_Done, // Label 1780: @50566 GIM_Reject, // Label 1759: @50567 GIM_Try, /*On fail goto*//*Label 1781*/ 50593, // Rule ID 11038 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (uint_to_fp:{ *:[v16f16] } VR512:{ *:[v16i32] }:$src) => (VCVTUDQ2PHZrr:{ *:[v16f16] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11038, GIR_Done, // Label 1781: @50593 GIM_Try, /*On fail goto*//*Label 1782*/ 50619, // Rule ID 14461 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v16f16] } VR256X:{ *:[v16i16] }:$src) => (VCVTUW2PHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUW2PHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14461, GIR_Done, // Label 1782: @50619 GIM_Reject, // Label 1760: @50620 GIM_Try, /*On fail goto*//*Label 1783*/ 50646, // Rule ID 10516 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (uint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTUDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10516, GIR_Done, // Label 1783: @50646 GIM_Reject, // Label 1761: @50647 GIM_Try, /*On fail goto*//*Label 1784*/ 50673, // Rule ID 14434 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (uint_to_fp:{ *:[v32f16] } VR512:{ *:[v32i16] }:$src) => (VCVTUW2PHZrr:{ *:[v32f16] } VR512:{ *:[v32i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUW2PHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14434, GIR_Done, // Label 1784: @50673 GIM_Reject, // Label 1762: @50674 GIM_Reject, // Label 43: @50675 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 1788*/ 50765, /*GILLT_s32*//*Label 1785*/ 50684, /*GILLT_s64*//*Label 1786*/ 50711, /*GILLT_s80*//*Label 1787*/ 50738, // Label 1785: @50684 GIM_Try, /*On fail goto*//*Label 1789*/ 50710, // Rule ID 779 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fabs:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (ABS_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ABS_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 779, GIR_Done, // Label 1789: @50710 GIM_Reject, // Label 1786: @50711 GIM_Try, /*On fail goto*//*Label 1790*/ 50737, // Rule ID 780 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fabs:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (ABS_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ABS_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 780, GIR_Done, // Label 1790: @50737 GIM_Reject, // Label 1787: @50738 GIM_Try, /*On fail goto*//*Label 1791*/ 50764, // Rule ID 781 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fabs:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (ABS_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ABS_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 781, GIR_Done, // Label 1791: @50764 GIM_Reject, // Label 1788: @50765 GIM_Reject, // Label 44: @50766 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1804*/ 51702, /*GILLT_v2s64*//*Label 1792*/ 50789, 0, /*GILLT_v4s32*//*Label 1793*/ 50973, /*GILLT_v4s64*//*Label 1794*/ 51054, 0, /*GILLT_v8s16*//*Label 1795*/ 51238, /*GILLT_v8s32*//*Label 1796*/ 51319, /*GILLT_v8s64*//*Label 1797*/ 51377, 0, /*GILLT_v16s8*//*Label 1798*/ 51409, /*GILLT_v16s16*//*Label 1799*/ 51490, /*GILLT_v16s32*//*Label 1800*/ 51548, 0, /*GILLT_v32s8*//*Label 1801*/ 51580, /*GILLT_v32s16*//*Label 1802*/ 51638, 0, /*GILLT_v64s8*//*Label 1803*/ 51670, // Label 1792: @50789 GIM_Try, /*On fail goto*//*Label 1805*/ 50972, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1806*/ 50822, // Rule ID 5226 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMINSQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5226, GIR_Done, // Label 1806: @50822 GIM_Try, /*On fail goto*//*Label 1807*/ 50971, // Rule ID 18499 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMINSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMINSQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18499, GIR_Done, // Label 1807: @50971 GIM_Reject, // Label 1805: @50972 GIM_Reject, // Label 1793: @50973 GIM_Try, /*On fail goto*//*Label 1808*/ 51053, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1809*/ 51006, // Rule ID 2877 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMINSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2877, GIR_Done, // Label 1809: @51006 GIM_Try, /*On fail goto*//*Label 1810*/ 51029, // Rule ID 2915 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMINSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2915, GIR_Done, // Label 1810: @51029 GIM_Try, /*On fail goto*//*Label 1811*/ 51052, // Rule ID 5199 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smin:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMINSDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5199, GIR_Done, // Label 1811: @51052 GIM_Reject, // Label 1808: @51053 GIM_Reject, // Label 1794: @51054 GIM_Try, /*On fail goto*//*Label 1812*/ 51237, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1813*/ 51087, // Rule ID 5217 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMINSQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5217, GIR_Done, // Label 1813: @51087 GIM_Try, /*On fail goto*//*Label 1814*/ 51236, // Rule ID 18497 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMINSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMINSQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18497, GIR_Done, // Label 1814: @51236 GIM_Reject, // Label 1812: @51237 GIM_Reject, // Label 1795: @51238 GIM_Try, /*On fail goto*//*Label 1815*/ 51318, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1816*/ 51271, // Rule ID 2334 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMINSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2334, GIR_Done, // Label 1816: @51271 GIM_Try, /*On fail goto*//*Label 1817*/ 51294, // Rule ID 2336 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMINSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2336, GIR_Done, // Label 1817: @51294 GIM_Try, /*On fail goto*//*Label 1818*/ 51317, // Rule ID 5175 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smin:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMINSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5175, GIR_Done, // Label 1818: @51317 GIM_Reject, // Label 1815: @51318 GIM_Reject, // Label 1796: @51319 GIM_Try, /*On fail goto*//*Label 1819*/ 51376, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1820*/ 51352, // Rule ID 2895 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smin:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMINSDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2895, GIR_Done, // Label 1820: @51352 GIM_Try, /*On fail goto*//*Label 1821*/ 51375, // Rule ID 5190 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smin:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMINSDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5190, GIR_Done, // Label 1821: @51375 GIM_Reject, // Label 1819: @51376 GIM_Reject, // Label 1797: @51377 GIM_Try, /*On fail goto*//*Label 1822*/ 51408, // Rule ID 5208 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smin:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMINSQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5208, GIR_Done, // Label 1822: @51408 GIM_Reject, // Label 1798: @51409 GIM_Try, /*On fail goto*//*Label 1823*/ 51489, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1824*/ 51442, // Rule ID 2887 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMINSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2887, GIR_Done, // Label 1824: @51442 GIM_Try, /*On fail goto*//*Label 1825*/ 51465, // Rule ID 2913 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMINSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2913, GIR_Done, // Label 1825: @51465 GIM_Try, /*On fail goto*//*Label 1826*/ 51488, // Rule ID 5157 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smin:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMINSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5157, GIR_Done, // Label 1826: @51488 GIM_Reject, // Label 1823: @51489 GIM_Reject, // Label 1799: @51490 GIM_Try, /*On fail goto*//*Label 1827*/ 51547, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1828*/ 51523, // Rule ID 2338 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smin:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMINSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2338, GIR_Done, // Label 1828: @51523 GIM_Try, /*On fail goto*//*Label 1829*/ 51546, // Rule ID 5169 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smin:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMINSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5169, GIR_Done, // Label 1829: @51546 GIM_Reject, // Label 1827: @51547 GIM_Reject, // Label 1800: @51548 GIM_Try, /*On fail goto*//*Label 1830*/ 51579, // Rule ID 5181 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smin:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMINSDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5181, GIR_Done, // Label 1830: @51579 GIM_Reject, // Label 1801: @51580 GIM_Try, /*On fail goto*//*Label 1831*/ 51637, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1832*/ 51613, // Rule ID 2905 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smin:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMINSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2905, GIR_Done, // Label 1832: @51613 GIM_Try, /*On fail goto*//*Label 1833*/ 51636, // Rule ID 5151 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smin:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMINSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5151, GIR_Done, // Label 1833: @51636 GIM_Reject, // Label 1831: @51637 GIM_Reject, // Label 1802: @51638 GIM_Try, /*On fail goto*//*Label 1834*/ 51669, // Rule ID 5163 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smin:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMINSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5163, GIR_Done, // Label 1834: @51669 GIM_Reject, // Label 1803: @51670 GIM_Try, /*On fail goto*//*Label 1835*/ 51701, // Rule ID 5145 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smin:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMINSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5145, GIR_Done, // Label 1835: @51701 GIM_Reject, // Label 1804: @51702 GIM_Reject, // Label 45: @51703 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1848*/ 52639, /*GILLT_v2s64*//*Label 1836*/ 51726, 0, /*GILLT_v4s32*//*Label 1837*/ 51910, /*GILLT_v4s64*//*Label 1838*/ 51991, 0, /*GILLT_v8s16*//*Label 1839*/ 52175, /*GILLT_v8s32*//*Label 1840*/ 52256, /*GILLT_v8s64*//*Label 1841*/ 52314, 0, /*GILLT_v16s8*//*Label 1842*/ 52346, /*GILLT_v16s16*//*Label 1843*/ 52427, /*GILLT_v16s32*//*Label 1844*/ 52485, 0, /*GILLT_v32s8*//*Label 1845*/ 52517, /*GILLT_v32s16*//*Label 1846*/ 52575, 0, /*GILLT_v64s8*//*Label 1847*/ 52607, // Label 1836: @51726 GIM_Try, /*On fail goto*//*Label 1849*/ 51909, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1850*/ 51759, // Rule ID 5046 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMAXSQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5046, GIR_Done, // Label 1850: @51759 GIM_Try, /*On fail goto*//*Label 1851*/ 51908, // Rule ID 18495 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMAXSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMAXSQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18495, GIR_Done, // Label 1851: @51908 GIM_Reject, // Label 1849: @51909 GIM_Reject, // Label 1837: @51910 GIM_Try, /*On fail goto*//*Label 1852*/ 51990, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1853*/ 51943, // Rule ID 2881 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMAXSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2881, GIR_Done, // Label 1853: @51943 GIM_Try, /*On fail goto*//*Label 1854*/ 51966, // Rule ID 2923 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMAXSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2923, GIR_Done, // Label 1854: @51966 GIM_Try, /*On fail goto*//*Label 1855*/ 51989, // Rule ID 5019 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smax:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMAXSDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5019, GIR_Done, // Label 1855: @51989 GIM_Reject, // Label 1852: @51990 GIM_Reject, // Label 1838: @51991 GIM_Try, /*On fail goto*//*Label 1856*/ 52174, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1857*/ 52024, // Rule ID 5037 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMAXSQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5037, GIR_Done, // Label 1857: @52024 GIM_Try, /*On fail goto*//*Label 1858*/ 52173, // Rule ID 18493 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMAXSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMAXSQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18493, GIR_Done, // Label 1858: @52173 GIM_Reject, // Label 1856: @52174 GIM_Reject, // Label 1839: @52175 GIM_Try, /*On fail goto*//*Label 1859*/ 52255, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1860*/ 52208, // Rule ID 2346 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMAXSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2346, GIR_Done, // Label 1860: @52208 GIM_Try, /*On fail goto*//*Label 1861*/ 52231, // Rule ID 2348 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMAXSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2348, GIR_Done, // Label 1861: @52231 GIM_Try, /*On fail goto*//*Label 1862*/ 52254, // Rule ID 4995 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smax:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMAXSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4995, GIR_Done, // Label 1862: @52254 GIM_Reject, // Label 1859: @52255 GIM_Reject, // Label 1840: @52256 GIM_Try, /*On fail goto*//*Label 1863*/ 52313, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1864*/ 52289, // Rule ID 2899 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smax:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMAXSDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2899, GIR_Done, // Label 1864: @52289 GIM_Try, /*On fail goto*//*Label 1865*/ 52312, // Rule ID 5010 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smax:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMAXSDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5010, GIR_Done, // Label 1865: @52312 GIM_Reject, // Label 1863: @52313 GIM_Reject, // Label 1841: @52314 GIM_Try, /*On fail goto*//*Label 1866*/ 52345, // Rule ID 5028 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smax:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMAXSQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5028, GIR_Done, // Label 1866: @52345 GIM_Reject, // Label 1842: @52346 GIM_Try, /*On fail goto*//*Label 1867*/ 52426, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1868*/ 52379, // Rule ID 2891 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMAXSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2891, GIR_Done, // Label 1868: @52379 GIM_Try, /*On fail goto*//*Label 1869*/ 52402, // Rule ID 2921 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMAXSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2921, GIR_Done, // Label 1869: @52402 GIM_Try, /*On fail goto*//*Label 1870*/ 52425, // Rule ID 4977 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smax:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMAXSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4977, GIR_Done, // Label 1870: @52425 GIM_Reject, // Label 1867: @52426 GIM_Reject, // Label 1843: @52427 GIM_Try, /*On fail goto*//*Label 1871*/ 52484, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1872*/ 52460, // Rule ID 2350 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smax:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMAXSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2350, GIR_Done, // Label 1872: @52460 GIM_Try, /*On fail goto*//*Label 1873*/ 52483, // Rule ID 4989 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smax:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMAXSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4989, GIR_Done, // Label 1873: @52483 GIM_Reject, // Label 1871: @52484 GIM_Reject, // Label 1844: @52485 GIM_Try, /*On fail goto*//*Label 1874*/ 52516, // Rule ID 5001 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smax:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMAXSDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5001, GIR_Done, // Label 1874: @52516 GIM_Reject, // Label 1845: @52517 GIM_Try, /*On fail goto*//*Label 1875*/ 52574, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1876*/ 52550, // Rule ID 2909 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smax:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMAXSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2909, GIR_Done, // Label 1876: @52550 GIM_Try, /*On fail goto*//*Label 1877*/ 52573, // Rule ID 4971 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smax:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMAXSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4971, GIR_Done, // Label 1877: @52573 GIM_Reject, // Label 1875: @52574 GIM_Reject, // Label 1846: @52575 GIM_Try, /*On fail goto*//*Label 1878*/ 52606, // Rule ID 4983 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smax:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMAXSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4983, GIR_Done, // Label 1878: @52606 GIM_Reject, // Label 1847: @52607 GIM_Try, /*On fail goto*//*Label 1879*/ 52638, // Rule ID 4965 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smax:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMAXSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4965, GIR_Done, // Label 1879: @52638 GIM_Reject, // Label 1848: @52639 GIM_Reject, // Label 46: @52640 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1892*/ 53576, /*GILLT_v2s64*//*Label 1880*/ 52663, 0, /*GILLT_v4s32*//*Label 1881*/ 52847, /*GILLT_v4s64*//*Label 1882*/ 52928, 0, /*GILLT_v8s16*//*Label 1883*/ 53112, /*GILLT_v8s32*//*Label 1884*/ 53193, /*GILLT_v8s64*//*Label 1885*/ 53251, 0, /*GILLT_v16s8*//*Label 1886*/ 53283, /*GILLT_v16s16*//*Label 1887*/ 53364, /*GILLT_v16s32*//*Label 1888*/ 53422, 0, /*GILLT_v32s8*//*Label 1889*/ 53454, /*GILLT_v32s16*//*Label 1890*/ 53512, 0, /*GILLT_v64s8*//*Label 1891*/ 53544, // Label 1880: @52663 GIM_Try, /*On fail goto*//*Label 1893*/ 52846, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1894*/ 52696, // Rule ID 5316 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMINUQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5316, GIR_Done, // Label 1894: @52696 GIM_Try, /*On fail goto*//*Label 1895*/ 52845, // Rule ID 18491 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMINUQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMINUQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18491, GIR_Done, // Label 1895: @52845 GIM_Reject, // Label 1893: @52846 GIM_Reject, // Label 1881: @52847 GIM_Try, /*On fail goto*//*Label 1896*/ 52927, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1897*/ 52880, // Rule ID 2879 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMINUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2879, GIR_Done, // Label 1897: @52880 GIM_Try, /*On fail goto*//*Label 1898*/ 52903, // Rule ID 2917 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMINUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINUDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2917, GIR_Done, // Label 1898: @52903 GIM_Try, /*On fail goto*//*Label 1899*/ 52926, // Rule ID 5289 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umin:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMINUDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5289, GIR_Done, // Label 1899: @52926 GIM_Reject, // Label 1896: @52927 GIM_Reject, // Label 1882: @52928 GIM_Try, /*On fail goto*//*Label 1900*/ 53111, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1901*/ 52961, // Rule ID 5307 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMINUQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5307, GIR_Done, // Label 1901: @52961 GIM_Try, /*On fail goto*//*Label 1902*/ 53110, // Rule ID 18489 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMINUQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMINUQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18489, GIR_Done, // Label 1902: @53110 GIM_Reject, // Label 1900: @53111 GIM_Reject, // Label 1883: @53112 GIM_Try, /*On fail goto*//*Label 1903*/ 53192, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1904*/ 53145, // Rule ID 2889 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMINUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2889, GIR_Done, // Label 1904: @53145 GIM_Try, /*On fail goto*//*Label 1905*/ 53168, // Rule ID 2919 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMINUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2919, GIR_Done, // Label 1905: @53168 GIM_Try, /*On fail goto*//*Label 1906*/ 53191, // Rule ID 5265 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umin:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMINUWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5265, GIR_Done, // Label 1906: @53191 GIM_Reject, // Label 1903: @53192 GIM_Reject, // Label 1884: @53193 GIM_Try, /*On fail goto*//*Label 1907*/ 53250, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1908*/ 53226, // Rule ID 2897 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umin:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMINUDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2897, GIR_Done, // Label 1908: @53226 GIM_Try, /*On fail goto*//*Label 1909*/ 53249, // Rule ID 5280 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umin:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMINUDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5280, GIR_Done, // Label 1909: @53249 GIM_Reject, // Label 1907: @53250 GIM_Reject, // Label 1885: @53251 GIM_Try, /*On fail goto*//*Label 1910*/ 53282, // Rule ID 5298 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umin:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMINUQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5298, GIR_Done, // Label 1910: @53282 GIM_Reject, // Label 1886: @53283 GIM_Try, /*On fail goto*//*Label 1911*/ 53363, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1912*/ 53316, // Rule ID 2328 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMINUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2328, GIR_Done, // Label 1912: @53316 GIM_Try, /*On fail goto*//*Label 1913*/ 53339, // Rule ID 2330 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMINUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINUBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2330, GIR_Done, // Label 1913: @53339 GIM_Try, /*On fail goto*//*Label 1914*/ 53362, // Rule ID 5247 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umin:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMINUBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5247, GIR_Done, // Label 1914: @53362 GIM_Reject, // Label 1911: @53363 GIM_Reject, // Label 1887: @53364 GIM_Try, /*On fail goto*//*Label 1915*/ 53421, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1916*/ 53397, // Rule ID 2907 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umin:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMINUWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2907, GIR_Done, // Label 1916: @53397 GIM_Try, /*On fail goto*//*Label 1917*/ 53420, // Rule ID 5259 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umin:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMINUWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5259, GIR_Done, // Label 1917: @53420 GIM_Reject, // Label 1915: @53421 GIM_Reject, // Label 1888: @53422 GIM_Try, /*On fail goto*//*Label 1918*/ 53453, // Rule ID 5271 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umin:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMINUDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5271, GIR_Done, // Label 1918: @53453 GIM_Reject, // Label 1889: @53454 GIM_Try, /*On fail goto*//*Label 1919*/ 53511, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1920*/ 53487, // Rule ID 2332 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umin:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMINUBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2332, GIR_Done, // Label 1920: @53487 GIM_Try, /*On fail goto*//*Label 1921*/ 53510, // Rule ID 5241 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umin:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMINUBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5241, GIR_Done, // Label 1921: @53510 GIM_Reject, // Label 1919: @53511 GIM_Reject, // Label 1890: @53512 GIM_Try, /*On fail goto*//*Label 1922*/ 53543, // Rule ID 5253 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umin:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMINUWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5253, GIR_Done, // Label 1922: @53543 GIM_Reject, // Label 1891: @53544 GIM_Try, /*On fail goto*//*Label 1923*/ 53575, // Rule ID 5235 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umin:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMINUBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5235, GIR_Done, // Label 1923: @53575 GIM_Reject, // Label 1892: @53576 GIM_Reject, // Label 47: @53577 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1936*/ 54513, /*GILLT_v2s64*//*Label 1924*/ 53600, 0, /*GILLT_v4s32*//*Label 1925*/ 53784, /*GILLT_v4s64*//*Label 1926*/ 53865, 0, /*GILLT_v8s16*//*Label 1927*/ 54049, /*GILLT_v8s32*//*Label 1928*/ 54130, /*GILLT_v8s64*//*Label 1929*/ 54188, 0, /*GILLT_v16s8*//*Label 1930*/ 54220, /*GILLT_v16s16*//*Label 1931*/ 54301, /*GILLT_v16s32*//*Label 1932*/ 54359, 0, /*GILLT_v32s8*//*Label 1933*/ 54391, /*GILLT_v32s16*//*Label 1934*/ 54449, 0, /*GILLT_v64s8*//*Label 1935*/ 54481, // Label 1924: @53600 GIM_Try, /*On fail goto*//*Label 1937*/ 53783, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1938*/ 53633, // Rule ID 5136 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMAXUQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5136, GIR_Done, // Label 1938: @53633 GIM_Try, /*On fail goto*//*Label 1939*/ 53782, // Rule ID 18487 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPMAXUQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src2, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMAXUQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18487, GIR_Done, // Label 1939: @53782 GIM_Reject, // Label 1937: @53783 GIM_Reject, // Label 1925: @53784 GIM_Try, /*On fail goto*//*Label 1940*/ 53864, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1941*/ 53817, // Rule ID 2883 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMAXUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2883, GIR_Done, // Label 1941: @53817 GIM_Try, /*On fail goto*//*Label 1942*/ 53840, // Rule ID 2925 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMAXUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXUDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2925, GIR_Done, // Label 1942: @53840 GIM_Try, /*On fail goto*//*Label 1943*/ 53863, // Rule ID 5109 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umax:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMAXUDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5109, GIR_Done, // Label 1943: @53863 GIM_Reject, // Label 1940: @53864 GIM_Reject, // Label 1926: @53865 GIM_Try, /*On fail goto*//*Label 1944*/ 54048, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1945*/ 53898, // Rule ID 5127 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMAXUQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5127, GIR_Done, // Label 1945: @53898 GIM_Try, /*On fail goto*//*Label 1946*/ 54047, // Rule ID 18485 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPMAXUQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] }), (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src2, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/4, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/5, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/5, /*TempRegID*/4, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/5, GIR_BuildMI, /*InsnID*/4, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/4, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/4, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/4, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/4, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMAXUQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/3, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 18485, GIR_Done, // Label 1946: @54047 GIM_Reject, // Label 1944: @54048 GIM_Reject, // Label 1927: @54049 GIM_Try, /*On fail goto*//*Label 1947*/ 54129, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1948*/ 54082, // Rule ID 2893 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMAXUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2893, GIR_Done, // Label 1948: @54082 GIM_Try, /*On fail goto*//*Label 1949*/ 54105, // Rule ID 2927 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMAXUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2927, GIR_Done, // Label 1949: @54105 GIM_Try, /*On fail goto*//*Label 1950*/ 54128, // Rule ID 5085 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umax:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMAXUWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5085, GIR_Done, // Label 1950: @54128 GIM_Reject, // Label 1947: @54129 GIM_Reject, // Label 1928: @54130 GIM_Try, /*On fail goto*//*Label 1951*/ 54187, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1952*/ 54163, // Rule ID 2901 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umax:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMAXUDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2901, GIR_Done, // Label 1952: @54163 GIM_Try, /*On fail goto*//*Label 1953*/ 54186, // Rule ID 5100 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umax:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMAXUDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5100, GIR_Done, // Label 1953: @54186 GIM_Reject, // Label 1951: @54187 GIM_Reject, // Label 1929: @54188 GIM_Try, /*On fail goto*//*Label 1954*/ 54219, // Rule ID 5118 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umax:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMAXUQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5118, GIR_Done, // Label 1954: @54219 GIM_Reject, // Label 1930: @54220 GIM_Try, /*On fail goto*//*Label 1955*/ 54300, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1956*/ 54253, // Rule ID 2340 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMAXUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2340, GIR_Done, // Label 1956: @54253 GIM_Try, /*On fail goto*//*Label 1957*/ 54276, // Rule ID 2342 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMAXUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXUBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2342, GIR_Done, // Label 1957: @54276 GIM_Try, /*On fail goto*//*Label 1958*/ 54299, // Rule ID 5067 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umax:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMAXUBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5067, GIR_Done, // Label 1958: @54299 GIM_Reject, // Label 1955: @54300 GIM_Reject, // Label 1931: @54301 GIM_Try, /*On fail goto*//*Label 1959*/ 54358, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1960*/ 54334, // Rule ID 2911 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umax:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMAXUWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2911, GIR_Done, // Label 1960: @54334 GIM_Try, /*On fail goto*//*Label 1961*/ 54357, // Rule ID 5079 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umax:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMAXUWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5079, GIR_Done, // Label 1961: @54357 GIM_Reject, // Label 1959: @54358 GIM_Reject, // Label 1932: @54359 GIM_Try, /*On fail goto*//*Label 1962*/ 54390, // Rule ID 5091 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umax:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMAXUDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5091, GIR_Done, // Label 1962: @54390 GIM_Reject, // Label 1933: @54391 GIM_Try, /*On fail goto*//*Label 1963*/ 54448, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1964*/ 54424, // Rule ID 2344 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umax:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMAXUBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2344, GIR_Done, // Label 1964: @54424 GIM_Try, /*On fail goto*//*Label 1965*/ 54447, // Rule ID 5061 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umax:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMAXUBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5061, GIR_Done, // Label 1965: @54447 GIM_Reject, // Label 1963: @54448 GIM_Reject, // Label 1934: @54449 GIM_Try, /*On fail goto*//*Label 1966*/ 54480, // Rule ID 5073 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umax:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMAXUWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5073, GIR_Done, // Label 1966: @54480 GIM_Reject, // Label 1935: @54481 GIM_Try, /*On fail goto*//*Label 1967*/ 54512, // Rule ID 5055 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umax:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMAXUBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5055, GIR_Done, // Label 1967: @54512 GIM_Reject, // Label 1936: @54513 GIM_Reject, // Label 48: @54514 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1980*/ 55212, /*GILLT_v2s64*//*Label 1968*/ 54537, 0, /*GILLT_v4s32*//*Label 1969*/ 54660, /*GILLT_v4s64*//*Label 1970*/ 54725, 0, /*GILLT_v8s16*//*Label 1971*/ 54848, /*GILLT_v8s32*//*Label 1972*/ 54913, /*GILLT_v8s64*//*Label 1973*/ 54959, 0, /*GILLT_v16s8*//*Label 1974*/ 54983, /*GILLT_v16s16*//*Label 1975*/ 55048, /*GILLT_v16s32*//*Label 1976*/ 55094, 0, /*GILLT_v32s8*//*Label 1977*/ 55118, /*GILLT_v32s16*//*Label 1978*/ 55164, 0, /*GILLT_v64s8*//*Label 1979*/ 55188, // Label 1968: @54537 GIM_Try, /*On fail goto*//*Label 1981*/ 54659, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1982*/ 54562, // Rule ID 12969 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (abs:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPABSQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12969, GIR_Done, // Label 1982: @54562 GIM_Try, /*On fail goto*//*Label 1983*/ 54658, // Rule ID 20243 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (abs:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPABSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPABSQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20243, GIR_Done, // Label 1983: @54658 GIM_Reject, // Label 1981: @54659 GIM_Reject, // Label 1969: @54660 GIM_Try, /*On fail goto*//*Label 1984*/ 54724, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1985*/ 54685, // Rule ID 2686 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (abs:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src) => (VPABSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2686, GIR_Done, // Label 1985: @54685 GIM_Try, /*On fail goto*//*Label 1986*/ 54704, // Rule ID 2698 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (abs:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src) => (PABSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PABSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2698, GIR_Done, // Label 1986: @54704 GIM_Try, /*On fail goto*//*Label 1987*/ 54723, // Rule ID 12996 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (abs:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPABSDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12996, GIR_Done, // Label 1987: @54723 GIM_Reject, // Label 1984: @54724 GIM_Reject, // Label 1970: @54725 GIM_Try, /*On fail goto*//*Label 1988*/ 54847, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1989*/ 54750, // Rule ID 12960 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (abs:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPABSQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12960, GIR_Done, // Label 1989: @54750 GIM_Try, /*On fail goto*//*Label 1990*/ 54846, // Rule ID 20242 // GIM_CheckFeatures, GIFBS_HasAVX512_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (abs:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPABSQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPABSQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20242, GIR_Done, // Label 1990: @54846 GIM_Reject, // Label 1988: @54847 GIM_Reject, // Label 1971: @54848 GIM_Try, /*On fail goto*//*Label 1991*/ 54912, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1992*/ 54873, // Rule ID 2684 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (abs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src) => (VPABSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2684, GIR_Done, // Label 1992: @54873 GIM_Try, /*On fail goto*//*Label 1993*/ 54892, // Rule ID 2696 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (abs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src) => (PABSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PABSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2696, GIR_Done, // Label 1993: @54892 GIM_Try, /*On fail goto*//*Label 1994*/ 54911, // Rule ID 13017 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (abs:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) => (VPABSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13017, GIR_Done, // Label 1994: @54911 GIM_Reject, // Label 1991: @54912 GIM_Reject, // Label 1972: @54913 GIM_Try, /*On fail goto*//*Label 1995*/ 54958, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1996*/ 54938, // Rule ID 2692 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (abs:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src) => (VPABSDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2692, GIR_Done, // Label 1996: @54938 GIM_Try, /*On fail goto*//*Label 1997*/ 54957, // Rule ID 12987 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (abs:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPABSDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12987, GIR_Done, // Label 1997: @54957 GIM_Reject, // Label 1995: @54958 GIM_Reject, // Label 1973: @54959 GIM_Try, /*On fail goto*//*Label 1998*/ 54982, // Rule ID 12951 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (abs:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPABSQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12951, GIR_Done, // Label 1998: @54982 GIM_Reject, // Label 1974: @54983 GIM_Try, /*On fail goto*//*Label 1999*/ 55047, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 2000*/ 55008, // Rule ID 2682 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (abs:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src) => (VPABSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2682, GIR_Done, // Label 2000: @55008 GIM_Try, /*On fail goto*//*Label 2001*/ 55027, // Rule ID 2694 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (abs:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src) => (PABSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PABSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2694, GIR_Done, // Label 2001: @55027 GIM_Try, /*On fail goto*//*Label 2002*/ 55046, // Rule ID 13035 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (abs:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) => (VPABSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13035, GIR_Done, // Label 2002: @55046 GIM_Reject, // Label 1999: @55047 GIM_Reject, // Label 1975: @55048 GIM_Try, /*On fail goto*//*Label 2003*/ 55093, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 2004*/ 55073, // Rule ID 2690 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (abs:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src) => (VPABSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2690, GIR_Done, // Label 2004: @55073 GIM_Try, /*On fail goto*//*Label 2005*/ 55092, // Rule ID 13011 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (abs:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) => (VPABSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13011, GIR_Done, // Label 2005: @55092 GIM_Reject, // Label 2003: @55093 GIM_Reject, // Label 1976: @55094 GIM_Try, /*On fail goto*//*Label 2006*/ 55117, // Rule ID 12978 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (abs:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPABSDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12978, GIR_Done, // Label 2006: @55117 GIM_Reject, // Label 1977: @55118 GIM_Try, /*On fail goto*//*Label 2007*/ 55163, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 2008*/ 55143, // Rule ID 2688 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (abs:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src) => (VPABSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2688, GIR_Done, // Label 2008: @55143 GIM_Try, /*On fail goto*//*Label 2009*/ 55162, // Rule ID 13029 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (abs:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) => (VPABSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13029, GIR_Done, // Label 2009: @55162 GIM_Reject, // Label 2007: @55163 GIM_Reject, // Label 1978: @55164 GIM_Try, /*On fail goto*//*Label 2010*/ 55187, // Rule ID 13005 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (abs:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1) => (VPABSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13005, GIR_Done, // Label 2010: @55187 GIM_Reject, // Label 1979: @55188 GIM_Try, /*On fail goto*//*Label 2011*/ 55211, // Rule ID 13023 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (abs:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1) => (VPABSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPABSBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13023, GIR_Done, // Label 2011: @55211 GIM_Reject, // Label 1980: @55212 GIM_Reject, // Label 49: @55213 GIM_Try, /*On fail goto*//*Label 2012*/ 55225, // Rule ID 433 // // MIs[0] dst GIM_CheckIsMBB, /*MI*/0, /*Op*/0, // (br (bb:{ *:[Other] }):$dst) => (JMP_1 (bb:{ *:[Other] }):$dst) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::JMP_1, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 433, GIR_Done, // Label 2012: @55225 GIM_Reject, // Label 50: @55226 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 5, /*)*//*default:*//*Label 2016*/ 55310, /*GILLT_s16*//*Label 2013*/ 55235, /*GILLT_s32*//*Label 2014*/ 55260, /*GILLT_s64*//*Label 2015*/ 55285, // Label 2013: @55235 GIM_Try, /*On fail goto*//*Label 2017*/ 55259, // Rule ID 15710 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (cttz_zero_undef:{ *:[i16] } GR16:{ *:[i16] }:$src) => (BSF16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSF16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15710, GIR_Done, // Label 2017: @55259 GIM_Reject, // Label 2014: @55260 GIM_Try, /*On fail goto*//*Label 2018*/ 55284, // Rule ID 15711 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (cttz_zero_undef:{ *:[i32] } GR32:{ *:[i32] }:$src) => (BSF32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSF32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15711, GIR_Done, // Label 2018: @55284 GIM_Reject, // Label 2015: @55285 GIM_Try, /*On fail goto*//*Label 2019*/ 55309, // Rule ID 15712 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (cttz_zero_undef:{ *:[i64] } GR64:{ *:[i64] }:$src) => (BSF64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSF64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15712, GIR_Done, // Label 2019: @55309 GIM_Reject, // Label 2016: @55310 GIM_Reject, // Label 51: @55311 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 20, /*)*//*default:*//*Label 2026*/ 55869, /*GILLT_v2s64*//*Label 2020*/ 55329, 0, /*GILLT_v4s32*//*Label 2021*/ 55452, /*GILLT_v4s64*//*Label 2022*/ 55575, 0, 0, /*GILLT_v8s32*//*Label 2023*/ 55698, /*GILLT_v8s64*//*Label 2024*/ 55821, 0, 0, 0, /*GILLT_v16s32*//*Label 2025*/ 55845, // Label 2020: @55329 GIM_Try, /*On fail goto*//*Label 2027*/ 55451, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 2028*/ 55354, // Rule ID 13059 // GIM_CheckFeatures, GIFBS_HasCDI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctlz:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPLZCNTQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13059, GIR_Done, // Label 2028: @55354 GIM_Try, /*On fail goto*//*Label 2029*/ 55450, // Rule ID 20245 // GIM_CheckFeatures, GIFBS_HasCDI_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctlz:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPLZCNTQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPLZCNTQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20245, GIR_Done, // Label 2029: @55450 GIM_Reject, // Label 2027: @55451 GIM_Reject, // Label 2021: @55452 GIM_Try, /*On fail goto*//*Label 2030*/ 55574, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 2031*/ 55477, // Rule ID 13086 // GIM_CheckFeatures, GIFBS_HasCDI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctlz:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPLZCNTDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13086, GIR_Done, // Label 2031: @55477 GIM_Try, /*On fail goto*//*Label 2032*/ 55573, // Rule ID 20247 // GIM_CheckFeatures, GIFBS_HasCDI_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctlz:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPLZCNTDZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPLZCNTDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20247, GIR_Done, // Label 2032: @55573 GIM_Reject, // Label 2030: @55574 GIM_Reject, // Label 2022: @55575 GIM_Try, /*On fail goto*//*Label 2033*/ 55697, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 2034*/ 55600, // Rule ID 13050 // GIM_CheckFeatures, GIFBS_HasCDI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctlz:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPLZCNTQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13050, GIR_Done, // Label 2034: @55600 GIM_Try, /*On fail goto*//*Label 2035*/ 55696, // Rule ID 20244 // GIM_CheckFeatures, GIFBS_HasCDI_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctlz:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPLZCNTQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPLZCNTQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20244, GIR_Done, // Label 2035: @55696 GIM_Reject, // Label 2033: @55697 GIM_Reject, // Label 2023: @55698 GIM_Try, /*On fail goto*//*Label 2036*/ 55820, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 2037*/ 55723, // Rule ID 13077 // GIM_CheckFeatures, GIFBS_HasCDI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctlz:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPLZCNTDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13077, GIR_Done, // Label 2037: @55723 GIM_Try, /*On fail goto*//*Label 2038*/ 55819, // Rule ID 20246 // GIM_CheckFeatures, GIFBS_HasCDI_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctlz:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPLZCNTDZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPLZCNTDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20246, GIR_Done, // Label 2038: @55819 GIM_Reject, // Label 2036: @55820 GIM_Reject, // Label 2024: @55821 GIM_Try, /*On fail goto*//*Label 2039*/ 55844, // Rule ID 13041 // GIM_CheckFeatures, GIFBS_HasCDI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctlz:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPLZCNTQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13041, GIR_Done, // Label 2039: @55844 GIM_Reject, // Label 2025: @55845 GIM_Try, /*On fail goto*//*Label 2040*/ 55868, // Rule ID 13068 // GIM_CheckFeatures, GIFBS_HasCDI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctlz:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPLZCNTDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13068, GIR_Done, // Label 2040: @55868 GIM_Reject, // Label 2026: @55869 GIM_Reject, // Label 52: @55870 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 2053*/ 56973, /*GILLT_v2s64*//*Label 2041*/ 55893, 0, /*GILLT_v4s32*//*Label 2042*/ 56016, /*GILLT_v4s64*//*Label 2043*/ 56139, 0, /*GILLT_v8s16*//*Label 2044*/ 56262, /*GILLT_v8s32*//*Label 2045*/ 56385, /*GILLT_v8s64*//*Label 2046*/ 56508, 0, /*GILLT_v16s8*//*Label 2047*/ 56532, /*GILLT_v16s16*//*Label 2048*/ 56655, /*GILLT_v16s32*//*Label 2049*/ 56778, 0, /*GILLT_v32s8*//*Label 2050*/ 56802, /*GILLT_v32s16*//*Label 2051*/ 56925, 0, /*GILLT_v64s8*//*Label 2052*/ 56949, // Label 2041: @55893 GIM_Try, /*On fail goto*//*Label 2054*/ 56015, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 2055*/ 55918, // Rule ID 13167 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPOPCNTQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13167, GIR_Done, // Label 2055: @55918 GIM_Try, /*On fail goto*//*Label 2056*/ 56014, // Rule ID 20249 // GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (EXTRACT_SUBREG:{ *:[v2i64] } (VPOPCNTQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR128X:{ *:[v2i64] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPOPCNTQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20249, GIR_Done, // Label 2056: @56014 GIM_Reject, // Label 2054: @56015 GIM_Reject, // Label 2042: @56016 GIM_Try, /*On fail goto*//*Label 2057*/ 56138, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 2058*/ 56041, // Rule ID 13194 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPOPCNTDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13194, GIR_Done, // Label 2058: @56041 GIM_Try, /*On fail goto*//*Label 2059*/ 56137, // Rule ID 20251 // GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (EXTRACT_SUBREG:{ *:[v4i32] } (VPOPCNTDZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR128X:{ *:[v4i32] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPOPCNTDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20251, GIR_Done, // Label 2059: @56137 GIM_Reject, // Label 2057: @56138 GIM_Reject, // Label 2043: @56139 GIM_Try, /*On fail goto*//*Label 2060*/ 56261, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 2061*/ 56164, // Rule ID 13158 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPOPCNTQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13158, GIR_Done, // Label 2061: @56164 GIM_Try, /*On fail goto*//*Label 2062*/ 56260, // Rule ID 20248 // GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (EXTRACT_SUBREG:{ *:[v4i64] } (VPOPCNTQZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v8i64] } (IMPLICIT_DEF:{ *:[v8i64] }), VR256X:{ *:[v4i64] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v8s64, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v8s64, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPOPCNTQZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20248, GIR_Done, // Label 2062: @56260 GIM_Reject, // Label 2060: @56261 GIM_Reject, // Label 2044: @56262 GIM_Try, /*On fail goto*//*Label 2063*/ 56384, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 2064*/ 56287, // Rule ID 14221 // GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) => (VPOPCNTWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14221, GIR_Done, // Label 2064: @56287 GIM_Try, /*On fail goto*//*Label 2065*/ 56383, // Rule ID 20540 // GIM_CheckFeatures, GIFBS_HasBITALG_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) => (EXTRACT_SUBREG:{ *:[v8i16] } (VPOPCNTWZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR128X:{ *:[v8i16] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPOPCNTWZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20540, GIR_Done, // Label 2065: @56383 GIM_Reject, // Label 2063: @56384 GIM_Reject, // Label 2045: @56385 GIM_Try, /*On fail goto*//*Label 2066*/ 56507, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 2067*/ 56410, // Rule ID 13185 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPOPCNTDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13185, GIR_Done, // Label 2067: @56410 GIM_Try, /*On fail goto*//*Label 2068*/ 56506, // Rule ID 20250 // GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (EXTRACT_SUBREG:{ *:[v8i32] } (VPOPCNTDZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v16i32] } (IMPLICIT_DEF:{ *:[v16i32] }), VR256X:{ *:[v8i32] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s32, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPOPCNTDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20250, GIR_Done, // Label 2068: @56506 GIM_Reject, // Label 2066: @56507 GIM_Reject, // Label 2046: @56508 GIM_Try, /*On fail goto*//*Label 2069*/ 56531, // Rule ID 13149 // GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctpop:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPOPCNTQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13149, GIR_Done, // Label 2069: @56531 GIM_Reject, // Label 2047: @56532 GIM_Try, /*On fail goto*//*Label 2070*/ 56654, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 2071*/ 56557, // Rule ID 14203 // GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) => (VPOPCNTBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14203, GIR_Done, // Label 2071: @56557 GIM_Try, /*On fail goto*//*Label 2072*/ 56653, // Rule ID 20538 // GIM_CheckFeatures, GIFBS_HasBITALG_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) => (EXTRACT_SUBREG:{ *:[v16i8] } (VPOPCNTBZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR128X:{ *:[v16i8] }:$src1, sub_xmm:{ *:[i32] })), sub_xmm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/9, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR128XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPOPCNTBZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_xmm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::FR16XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20538, GIR_Done, // Label 2072: @56653 GIM_Reject, // Label 2070: @56654 GIM_Reject, // Label 2048: @56655 GIM_Try, /*On fail goto*//*Label 2073*/ 56777, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 2074*/ 56680, // Rule ID 14215 // GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) => (VPOPCNTWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14215, GIR_Done, // Label 2074: @56680 GIM_Try, /*On fail goto*//*Label 2075*/ 56776, // Rule ID 20539 // GIM_CheckFeatures, GIFBS_HasBITALG_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) => (EXTRACT_SUBREG:{ *:[v16i16] } (VPOPCNTWZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v32i16] } (IMPLICIT_DEF:{ *:[v32i16] }), VR256X:{ *:[v16i16] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v32s16, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v32s16, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPOPCNTWZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20539, GIR_Done, // Label 2075: @56776 GIM_Reject, // Label 2073: @56777 GIM_Reject, // Label 2049: @56778 GIM_Try, /*On fail goto*//*Label 2076*/ 56801, // Rule ID 13176 // GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctpop:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPOPCNTDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13176, GIR_Done, // Label 2076: @56801 GIM_Reject, // Label 2050: @56802 GIM_Try, /*On fail goto*//*Label 2077*/ 56924, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 2078*/ 56827, // Rule ID 14197 // GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) => (VPOPCNTBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14197, GIR_Done, // Label 2078: @56827 GIM_Try, /*On fail goto*//*Label 2079*/ 56923, // Rule ID 20537 // GIM_CheckFeatures, GIFBS_HasBITALG_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) => (EXTRACT_SUBREG:{ *:[v32i8] } (VPOPCNTBZrr:{ *:[v64i8] } (INSERT_SUBREG:{ *:[v64i8] } (IMPLICIT_DEF:{ *:[v64i8] }), VR256X:{ *:[v32i8] }:$src1, sub_ymm:{ *:[i32] })), sub_ymm:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v64s8, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v64s8, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/2, /*Imm*/10, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/0, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/1, X86::VR512RegClassID, GIR_ConstrainOperandRC, /*InsnID*/2, /*Op*/2, X86::VR256XRegClassID, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPOPCNTBZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, X86::sub_ymm, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, X86::VR256XRegClassID, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, X86::VR512RegClassID, // GIR_Coverage, 20537, GIR_Done, // Label 2079: @56923 GIM_Reject, // Label 2077: @56924 GIM_Reject, // Label 2051: @56925 GIM_Try, /*On fail goto*//*Label 2080*/ 56948, // Rule ID 14209 // GIM_CheckFeatures, GIFBS_HasBITALG, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctpop:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1) => (VPOPCNTWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14209, GIR_Done, // Label 2080: @56948 GIM_Reject, // Label 2052: @56949 GIM_Try, /*On fail goto*//*Label 2081*/ 56972, // Rule ID 14191 // GIM_CheckFeatures, GIFBS_HasBITALG, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctpop:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1) => (VPOPCNTBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14191, GIR_Done, // Label 2081: @56972 GIM_Reject, // Label 2053: @56973 GIM_Reject, // Label 53: @56974 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 5, /*)*//*default:*//*Label 2085*/ 57063, /*GILLT_s16*//*Label 2082*/ 56983, /*GILLT_s32*//*Label 2083*/ 57019, /*GILLT_s64*//*Label 2084*/ 57041, // Label 2082: @56983 GIM_Try, /*On fail goto*//*Label 2086*/ 57018, // Rule ID 15716 // GIM_CheckFeatures, GIFBS_HasMOVBE, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (bswap:{ *:[i16] } GR16:{ *:[i16] }:$src) => (ROL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src, 8:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/8, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15716, GIR_Done, // Label 2086: @57018 GIM_Reject, // Label 2083: @57019 GIM_Try, /*On fail goto*//*Label 2087*/ 57040, // Rule ID 5 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bswap:{ *:[i32] } GR32:{ *:[i32] }:$src) => (BSWAP32r:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSWAP32r, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5, GIR_Done, // Label 2087: @57040 GIM_Reject, // Label 2084: @57041 GIM_Try, /*On fail goto*//*Label 2088*/ 57062, // Rule ID 6 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bswap:{ *:[i64] } GR64:{ *:[i64] }:$src) => (BSWAP64r:{ *:[i64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSWAP64r, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6, GIR_Done, // Label 2088: @57062 GIM_Reject, // Label 2085: @57063 GIM_Reject, // Label 54: @57064 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 2102*/ 57843, /*GILLT_s16*//*Label 2089*/ 57091, /*GILLT_s32*//*Label 2090*/ 57140, /*GILLT_s64*//*Label 2091*/ 57283, /*GILLT_s80*//*Label 2092*/ 57426, 0, 0, /*GILLT_v2s64*//*Label 2093*/ 57456, 0, /*GILLT_v4s32*//*Label 2094*/ 57530, /*GILLT_v4s64*//*Label 2095*/ 57604, 0, /*GILLT_v8s16*//*Label 2096*/ 57656, /*GILLT_v8s32*//*Label 2097*/ 57683, /*GILLT_v8s64*//*Label 2098*/ 57735, 0, 0, /*GILLT_v16s16*//*Label 2099*/ 57762, /*GILLT_v16s32*//*Label 2100*/ 57789, 0, 0, /*GILLT_v32s16*//*Label 2101*/ 57816, // Label 2089: @57091 GIM_Try, /*On fail goto*//*Label 2103*/ 57139, // Rule ID 19874 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, // (fsqrt:{ *:[f16] } FR16X:{ *:[f16] }:$src) => (VSQRTSHZr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), FR16X:{ *:[f16] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSHZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19874, GIR_Done, // Label 2103: @57139 GIM_Reject, // Label 2090: @57140 GIM_Try, /*On fail goto*//*Label 2104*/ 57282, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 2105*/ 57171, // Rule ID 783 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fsqrt:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (SQRT_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRT_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 783, GIR_Done, // Label 2105: @57171 GIM_Try, /*On fail goto*//*Label 2106*/ 57193, // Rule ID 2139 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src1) => (SQRTSSr:{ *:[f32] } FR32:{ *:[f32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTSSr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2139, GIR_Done, // Label 2106: @57193 GIM_Try, /*On fail goto*//*Label 2107*/ 57237, // Rule ID 16722 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src) => (VSQRTSSr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSSr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16722, GIR_Done, // Label 2107: @57237 GIM_Try, /*On fail goto*//*Label 2108*/ 57281, // Rule ID 19878 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fsqrt:{ *:[f32] } FR32X:{ *:[f32] }:$src) => (VSQRTSSZr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32X:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSSZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19878, GIR_Done, // Label 2108: @57281 GIM_Reject, // Label 2104: @57282 GIM_Reject, // Label 2091: @57283 GIM_Try, /*On fail goto*//*Label 2109*/ 57425, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 2110*/ 57314, // Rule ID 785 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fsqrt:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (SQRT_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRT_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 785, GIR_Done, // Label 2110: @57314 GIM_Try, /*On fail goto*//*Label 2111*/ 57336, // Rule ID 2155 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src1) => (SQRTSDr:{ *:[f64] } FR64:{ *:[f64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTSDr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2155, GIR_Done, // Label 2111: @57336 GIM_Try, /*On fail goto*//*Label 2112*/ 57380, // Rule ID 16726 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src) => (VSQRTSDr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSDr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16726, GIR_Done, // Label 2112: @57380 GIM_Try, /*On fail goto*//*Label 2113*/ 57424, // Rule ID 19882 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fsqrt:{ *:[f64] } FR64X:{ *:[f64] }:$src) => (VSQRTSDZr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64X:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSDZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19882, GIR_Done, // Label 2113: @57424 GIM_Reject, // Label 2109: @57425 GIM_Reject, // Label 2092: @57426 GIM_Try, /*On fail goto*//*Label 2114*/ 57455, // Rule ID 787 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fsqrt:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (SQRT_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRT_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 787, GIR_Done, // Label 2114: @57455 GIM_Reject, // Label 2093: @57456 GIM_Try, /*On fail goto*//*Label 2115*/ 57529, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 2116*/ 57484, // Rule ID 2159 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (VSQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2159, GIR_Done, // Label 2116: @57484 GIM_Try, /*On fail goto*//*Label 2117*/ 57506, // Rule ID 2167 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (SQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTPDr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2167, GIR_Done, // Label 2117: @57506 GIM_Try, /*On fail goto*//*Label 2118*/ 57528, // Rule ID 11788 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (fsqrt:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src) => (VSQRTPDZ128r:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDZ128r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11788, GIR_Done, // Label 2118: @57528 GIM_Reject, // Label 2115: @57529 GIM_Reject, // Label 2094: @57530 GIM_Try, /*On fail goto*//*Label 2119*/ 57603, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 2120*/ 57558, // Rule ID 2143 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (VSQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2143, GIR_Done, // Label 2120: @57558 GIM_Try, /*On fail goto*//*Label 2121*/ 57580, // Rule ID 2151 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (SQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTPSr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2151, GIR_Done, // Label 2121: @57580 GIM_Try, /*On fail goto*//*Label 2122*/ 57602, // Rule ID 11764 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (fsqrt:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src) => (VSQRTPSZ128r:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSZ128r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11764, GIR_Done, // Label 2122: @57602 GIM_Reject, // Label 2119: @57603 GIM_Reject, // Label 2095: @57604 GIM_Try, /*On fail goto*//*Label 2123*/ 57655, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 2124*/ 57632, // Rule ID 2163 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (fsqrt:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) => (VSQRTPDYr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDYr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2163, GIR_Done, // Label 2124: @57632 GIM_Try, /*On fail goto*//*Label 2125*/ 57654, // Rule ID 11800 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (fsqrt:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src) => (VSQRTPDZ256r:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDZ256r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11800, GIR_Done, // Label 2125: @57654 GIM_Reject, // Label 2123: @57655 GIM_Reject, // Label 2096: @57656 GIM_Try, /*On fail goto*//*Label 2126*/ 57682, // Rule ID 11716 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (fsqrt:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src) => (VSQRTPHZ128r:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPHZ128r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11716, GIR_Done, // Label 2126: @57682 GIM_Reject, // Label 2097: @57683 GIM_Try, /*On fail goto*//*Label 2127*/ 57734, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 2128*/ 57711, // Rule ID 2147 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (fsqrt:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) => (VSQRTPSYr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSYr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2147, GIR_Done, // Label 2128: @57711 GIM_Try, /*On fail goto*//*Label 2129*/ 57733, // Rule ID 11776 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (fsqrt:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src) => (VSQRTPSZ256r:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSZ256r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11776, GIR_Done, // Label 2129: @57733 GIM_Reject, // Label 2127: @57734 GIM_Reject, // Label 2098: @57735 GIM_Try, /*On fail goto*//*Label 2130*/ 57761, // Rule ID 11752 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (fsqrt:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src) => (VSQRTPDZr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDZr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11752, GIR_Done, // Label 2130: @57761 GIM_Reject, // Label 2099: @57762 GIM_Try, /*On fail goto*//*Label 2131*/ 57788, // Rule ID 11728 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (fsqrt:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src) => (VSQRTPHZ256r:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPHZ256r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11728, GIR_Done, // Label 2131: @57788 GIM_Reject, // Label 2100: @57789 GIM_Try, /*On fail goto*//*Label 2132*/ 57815, // Rule ID 11740 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (fsqrt:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src) => (VSQRTPSZr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSZr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11740, GIR_Done, // Label 2132: @57815 GIM_Reject, // Label 2101: @57816 GIM_Try, /*On fail goto*//*Label 2133*/ 57842, // Rule ID 11704 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (fsqrt:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src) => (VSQRTPHZr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPHZr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11704, GIR_Done, // Label 2133: @57842 GIM_Reject, // Label 2102: @57843 GIM_Reject, // Label 55: @57844 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 2147*/ 58665, /*GILLT_s16*//*Label 2134*/ 57871, /*GILLT_s32*//*Label 2135*/ 57906, /*GILLT_s64*//*Label 2136*/ 58025, /*GILLT_s80*//*Label 2137*/ 58144, 0, 0, /*GILLT_v2s64*//*Label 2138*/ 58182, 0, /*GILLT_v4s32*//*Label 2139*/ 58272, /*GILLT_v4s64*//*Label 2140*/ 58362, 0, /*GILLT_v8s16*//*Label 2141*/ 58426, /*GILLT_v8s32*//*Label 2142*/ 58461, /*GILLT_v8s64*//*Label 2143*/ 58525, 0, 0, /*GILLT_v16s16*//*Label 2144*/ 58560, /*GILLT_v16s32*//*Label 2145*/ 58595, 0, 0, /*GILLT_v32s16*//*Label 2146*/ 58630, // Label 2134: @57871 GIM_Try, /*On fail goto*//*Label 2148*/ 57905, // Rule ID 5591 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, // (strict_fadd:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VADDSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5591, GIR_Done, // Label 2148: @57905 GIM_Reject, // Label 2135: @57906 GIM_Try, /*On fail goto*//*Label 2149*/ 58024, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 2150*/ 57945, // Rule ID 620 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (strict_fadd:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (ADD_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 620, GIR_Done, // Label 2150: @57945 GIM_Try, /*On fail goto*//*Label 2151*/ 57971, // Rule ID 1890 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (strict_fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1890, GIR_Done, // Label 2151: @57971 GIM_Try, /*On fail goto*//*Label 2152*/ 57997, // Rule ID 1898 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (strict_fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (ADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1898, GIR_Done, // Label 2152: @57997 GIM_Try, /*On fail goto*//*Label 2153*/ 58023, // Rule ID 5553 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (strict_fadd:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VADDSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5553, GIR_Done, // Label 2153: @58023 GIM_Reject, // Label 2149: @58024 GIM_Reject, // Label 2136: @58025 GIM_Try, /*On fail goto*//*Label 2154*/ 58143, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 2155*/ 58064, // Rule ID 622 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (strict_fadd:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (ADD_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 622, GIR_Done, // Label 2155: @58064 GIM_Try, /*On fail goto*//*Label 2156*/ 58090, // Rule ID 1894 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (strict_fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1894, GIR_Done, // Label 2156: @58090 GIM_Try, /*On fail goto*//*Label 2157*/ 58116, // Rule ID 1902 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (strict_fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (ADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1902, GIR_Done, // Label 2157: @58116 GIM_Try, /*On fail goto*//*Label 2158*/ 58142, // Rule ID 5572 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (strict_fadd:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VADDSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5572, GIR_Done, // Label 2158: @58142 GIM_Reject, // Label 2154: @58143 GIM_Reject, // Label 2137: @58144 GIM_Try, /*On fail goto*//*Label 2159*/ 58181, // Rule ID 624 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (strict_fadd:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (ADD_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 624, GIR_Done, // Label 2159: @58181 GIM_Reject, // Label 2138: @58182 GIM_Try, /*On fail goto*//*Label 2160*/ 58271, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 2161*/ 58218, // Rule ID 1870 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1870, GIR_Done, // Label 2161: @58218 GIM_Try, /*On fail goto*//*Label 2162*/ 58244, // Rule ID 1886 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (ADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1886, GIR_Done, // Label 2162: @58244 GIM_Try, /*On fail goto*//*Label 2163*/ 58270, // Rule ID 5931 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fadd:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VADDPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5931, GIR_Done, // Label 2163: @58270 GIM_Reject, // Label 2160: @58271 GIM_Reject, // Label 2139: @58272 GIM_Try, /*On fail goto*//*Label 2164*/ 58361, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 2165*/ 58308, // Rule ID 1866 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1866, GIR_Done, // Label 2165: @58308 GIM_Try, /*On fail goto*//*Label 2166*/ 58334, // Rule ID 1882 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (ADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1882, GIR_Done, // Label 2166: @58334 GIM_Try, /*On fail goto*//*Label 2167*/ 58360, // Rule ID 5907 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fadd:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VADDPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5907, GIR_Done, // Label 2167: @58360 GIM_Reject, // Label 2164: @58361 GIM_Reject, // Label 2140: @58362 GIM_Try, /*On fail goto*//*Label 2168*/ 58425, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 2169*/ 58398, // Rule ID 1878 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (strict_fadd:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VADDPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1878, GIR_Done, // Label 2169: @58398 GIM_Try, /*On fail goto*//*Label 2170*/ 58424, // Rule ID 5943 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fadd:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VADDPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5943, GIR_Done, // Label 2170: @58424 GIM_Reject, // Label 2168: @58425 GIM_Reject, // Label 2141: @58426 GIM_Try, /*On fail goto*//*Label 2171*/ 58460, // Rule ID 5967 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fadd:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VADDPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5967, GIR_Done, // Label 2171: @58460 GIM_Reject, // Label 2142: @58461 GIM_Try, /*On fail goto*//*Label 2172*/ 58524, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 2173*/ 58497, // Rule ID 1874 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (strict_fadd:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VADDPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1874, GIR_Done, // Label 2173: @58497 GIM_Try, /*On fail goto*//*Label 2174*/ 58523, // Rule ID 5919 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fadd:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VADDPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5919, GIR_Done, // Label 2174: @58523 GIM_Reject, // Label 2172: @58524 GIM_Reject, // Label 2143: @58525 GIM_Try, /*On fail goto*//*Label 2175*/ 58559, // Rule ID 5895 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fadd:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VADDPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5895, GIR_Done, // Label 2175: @58559 GIM_Reject, // Label 2144: @58560 GIM_Try, /*On fail goto*//*Label 2176*/ 58594, // Rule ID 5979 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fadd:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VADDPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5979, GIR_Done, // Label 2176: @58594 GIM_Reject, // Label 2145: @58595 GIM_Try, /*On fail goto*//*Label 2177*/ 58629, // Rule ID 5883 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fadd:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VADDPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5883, GIR_Done, // Label 2177: @58629 GIM_Reject, // Label 2146: @58630 GIM_Try, /*On fail goto*//*Label 2178*/ 58664, // Rule ID 5955 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fadd:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VADDPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5955, GIR_Done, // Label 2178: @58664 GIM_Reject, // Label 2147: @58665 GIM_Reject, // Label 56: @58666 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 2192*/ 59487, /*GILLT_s16*//*Label 2179*/ 58693, /*GILLT_s32*//*Label 2180*/ 58728, /*GILLT_s64*//*Label 2181*/ 58847, /*GILLT_s80*//*Label 2182*/ 58966, 0, 0, /*GILLT_v2s64*//*Label 2183*/ 59004, 0, /*GILLT_v4s32*//*Label 2184*/ 59094, /*GILLT_v4s64*//*Label 2185*/ 59184, 0, /*GILLT_v8s16*//*Label 2186*/ 59248, /*GILLT_v8s32*//*Label 2187*/ 59283, /*GILLT_v8s64*//*Label 2188*/ 59347, 0, 0, /*GILLT_v16s16*//*Label 2189*/ 59382, /*GILLT_v16s32*//*Label 2190*/ 59417, 0, 0, /*GILLT_v32s16*//*Label 2191*/ 59452, // Label 2179: @58693 GIM_Try, /*On fail goto*//*Label 2193*/ 58727, // Rule ID 5705 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, // (strict_fsub:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VSUBSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5705, GIR_Done, // Label 2193: @58727 GIM_Reject, // Label 2180: @58728 GIM_Try, /*On fail goto*//*Label 2194*/ 58846, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 2195*/ 58767, // Rule ID 626 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (strict_fsub:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (SUB_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 626, GIR_Done, // Label 2195: @58767 GIM_Try, /*On fail goto*//*Label 2196*/ 58793, // Rule ID 1970 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (strict_fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VSUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1970, GIR_Done, // Label 2196: @58793 GIM_Try, /*On fail goto*//*Label 2197*/ 58819, // Rule ID 1978 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (strict_fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (SUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1978, GIR_Done, // Label 2197: @58819 GIM_Try, /*On fail goto*//*Label 2198*/ 58845, // Rule ID 5667 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (strict_fsub:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VSUBSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5667, GIR_Done, // Label 2198: @58845 GIM_Reject, // Label 2194: @58846 GIM_Reject, // Label 2181: @58847 GIM_Try, /*On fail goto*//*Label 2199*/ 58965, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 2200*/ 58886, // Rule ID 628 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (strict_fsub:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (SUB_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 628, GIR_Done, // Label 2200: @58886 GIM_Try, /*On fail goto*//*Label 2201*/ 58912, // Rule ID 1974 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (strict_fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VSUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1974, GIR_Done, // Label 2201: @58912 GIM_Try, /*On fail goto*//*Label 2202*/ 58938, // Rule ID 1982 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (strict_fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (SUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1982, GIR_Done, // Label 2202: @58938 GIM_Try, /*On fail goto*//*Label 2203*/ 58964, // Rule ID 5686 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (strict_fsub:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VSUBSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5686, GIR_Done, // Label 2203: @58964 GIM_Reject, // Label 2199: @58965 GIM_Reject, // Label 2182: @58966 GIM_Try, /*On fail goto*//*Label 2204*/ 59003, // Rule ID 630 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (strict_fsub:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (SUB_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 630, GIR_Done, // Label 2204: @59003 GIM_Reject, // Label 2183: @59004 GIM_Try, /*On fail goto*//*Label 2205*/ 59093, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 2206*/ 59040, // Rule ID 1950 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VSUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1950, GIR_Done, // Label 2206: @59040 GIM_Try, /*On fail goto*//*Label 2207*/ 59066, // Rule ID 1966 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (SUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1966, GIR_Done, // Label 2207: @59066 GIM_Try, /*On fail goto*//*Label 2208*/ 59092, // Rule ID 6165 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fsub:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VSUBPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6165, GIR_Done, // Label 2208: @59092 GIM_Reject, // Label 2205: @59093 GIM_Reject, // Label 2184: @59094 GIM_Try, /*On fail goto*//*Label 2209*/ 59183, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 2210*/ 59130, // Rule ID 1946 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VSUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1946, GIR_Done, // Label 2210: @59130 GIM_Try, /*On fail goto*//*Label 2211*/ 59156, // Rule ID 1962 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (SUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1962, GIR_Done, // Label 2211: @59156 GIM_Try, /*On fail goto*//*Label 2212*/ 59182, // Rule ID 6141 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fsub:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VSUBPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6141, GIR_Done, // Label 2212: @59182 GIM_Reject, // Label 2209: @59183 GIM_Reject, // Label 2185: @59184 GIM_Try, /*On fail goto*//*Label 2213*/ 59247, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 2214*/ 59220, // Rule ID 1958 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (strict_fsub:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VSUBPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1958, GIR_Done, // Label 2214: @59220 GIM_Try, /*On fail goto*//*Label 2215*/ 59246, // Rule ID 6177 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fsub:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VSUBPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6177, GIR_Done, // Label 2215: @59246 GIM_Reject, // Label 2213: @59247 GIM_Reject, // Label 2186: @59248 GIM_Try, /*On fail goto*//*Label 2216*/ 59282, // Rule ID 6201 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fsub:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VSUBPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6201, GIR_Done, // Label 2216: @59282 GIM_Reject, // Label 2187: @59283 GIM_Try, /*On fail goto*//*Label 2217*/ 59346, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 2218*/ 59319, // Rule ID 1954 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (strict_fsub:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VSUBPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1954, GIR_Done, // Label 2218: @59319 GIM_Try, /*On fail goto*//*Label 2219*/ 59345, // Rule ID 6153 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fsub:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VSUBPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6153, GIR_Done, // Label 2219: @59345 GIM_Reject, // Label 2217: @59346 GIM_Reject, // Label 2188: @59347 GIM_Try, /*On fail goto*//*Label 2220*/ 59381, // Rule ID 6129 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fsub:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VSUBPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6129, GIR_Done, // Label 2220: @59381 GIM_Reject, // Label 2189: @59382 GIM_Try, /*On fail goto*//*Label 2221*/ 59416, // Rule ID 6213 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fsub:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VSUBPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6213, GIR_Done, // Label 2221: @59416 GIM_Reject, // Label 2190: @59417 GIM_Try, /*On fail goto*//*Label 2222*/ 59451, // Rule ID 6117 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fsub:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VSUBPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6117, GIR_Done, // Label 2222: @59451 GIM_Reject, // Label 2191: @59452 GIM_Try, /*On fail goto*//*Label 2223*/ 59486, // Rule ID 6189 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fsub:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VSUBPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6189, GIR_Done, // Label 2223: @59486 GIM_Reject, // Label 2192: @59487 GIM_Reject, // Label 57: @59488 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 2237*/ 60309, /*GILLT_s16*//*Label 2224*/ 59515, /*GILLT_s32*//*Label 2225*/ 59550, /*GILLT_s64*//*Label 2226*/ 59669, /*GILLT_s80*//*Label 2227*/ 59788, 0, 0, /*GILLT_v2s64*//*Label 2228*/ 59826, 0, /*GILLT_v4s32*//*Label 2229*/ 59916, /*GILLT_v4s64*//*Label 2230*/ 60006, 0, /*GILLT_v8s16*//*Label 2231*/ 60070, /*GILLT_v8s32*//*Label 2232*/ 60105, /*GILLT_v8s64*//*Label 2233*/ 60169, 0, 0, /*GILLT_v16s16*//*Label 2234*/ 60204, /*GILLT_v16s32*//*Label 2235*/ 60239, 0, 0, /*GILLT_v32s16*//*Label 2236*/ 60274, // Label 2224: @59515 GIM_Try, /*On fail goto*//*Label 2238*/ 59549, // Rule ID 5648 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, // (strict_fmul:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VMULSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5648, GIR_Done, // Label 2238: @59549 GIM_Reject, // Label 2225: @59550 GIM_Try, /*On fail goto*//*Label 2239*/ 59668, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 2240*/ 59589, // Rule ID 632 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (strict_fmul:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (MUL_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 632, GIR_Done, // Label 2240: @59589 GIM_Try, /*On fail goto*//*Label 2241*/ 59615, // Rule ID 1930 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (strict_fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VMULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1930, GIR_Done, // Label 2241: @59615 GIM_Try, /*On fail goto*//*Label 2242*/ 59641, // Rule ID 1938 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (strict_fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (MULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1938, GIR_Done, // Label 2242: @59641 GIM_Try, /*On fail goto*//*Label 2243*/ 59667, // Rule ID 5610 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (strict_fmul:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VMULSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5610, GIR_Done, // Label 2243: @59667 GIM_Reject, // Label 2239: @59668 GIM_Reject, // Label 2226: @59669 GIM_Try, /*On fail goto*//*Label 2244*/ 59787, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 2245*/ 59708, // Rule ID 634 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (strict_fmul:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (MUL_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 634, GIR_Done, // Label 2245: @59708 GIM_Try, /*On fail goto*//*Label 2246*/ 59734, // Rule ID 1934 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (strict_fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VMULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1934, GIR_Done, // Label 2246: @59734 GIM_Try, /*On fail goto*//*Label 2247*/ 59760, // Rule ID 1942 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (strict_fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (MULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1942, GIR_Done, // Label 2247: @59760 GIM_Try, /*On fail goto*//*Label 2248*/ 59786, // Rule ID 5629 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (strict_fmul:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VMULSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5629, GIR_Done, // Label 2248: @59786 GIM_Reject, // Label 2244: @59787 GIM_Reject, // Label 2227: @59788 GIM_Try, /*On fail goto*//*Label 2249*/ 59825, // Rule ID 636 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (strict_fmul:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (MUL_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 636, GIR_Done, // Label 2249: @59825 GIM_Reject, // Label 2228: @59826 GIM_Try, /*On fail goto*//*Label 2250*/ 59915, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 2251*/ 59862, // Rule ID 1910 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VMULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1910, GIR_Done, // Label 2251: @59862 GIM_Try, /*On fail goto*//*Label 2252*/ 59888, // Rule ID 1926 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (MULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1926, GIR_Done, // Label 2252: @59888 GIM_Try, /*On fail goto*//*Label 2253*/ 59914, // Rule ID 6048 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fmul:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VMULPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6048, GIR_Done, // Label 2253: @59914 GIM_Reject, // Label 2250: @59915 GIM_Reject, // Label 2229: @59916 GIM_Try, /*On fail goto*//*Label 2254*/ 60005, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 2255*/ 59952, // Rule ID 1906 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VMULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1906, GIR_Done, // Label 2255: @59952 GIM_Try, /*On fail goto*//*Label 2256*/ 59978, // Rule ID 1922 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (MULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1922, GIR_Done, // Label 2256: @59978 GIM_Try, /*On fail goto*//*Label 2257*/ 60004, // Rule ID 6024 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fmul:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VMULPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6024, GIR_Done, // Label 2257: @60004 GIM_Reject, // Label 2254: @60005 GIM_Reject, // Label 2230: @60006 GIM_Try, /*On fail goto*//*Label 2258*/ 60069, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 2259*/ 60042, // Rule ID 1918 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (strict_fmul:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VMULPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1918, GIR_Done, // Label 2259: @60042 GIM_Try, /*On fail goto*//*Label 2260*/ 60068, // Rule ID 6060 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fmul:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VMULPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6060, GIR_Done, // Label 2260: @60068 GIM_Reject, // Label 2258: @60069 GIM_Reject, // Label 2231: @60070 GIM_Try, /*On fail goto*//*Label 2261*/ 60104, // Rule ID 6084 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fmul:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VMULPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6084, GIR_Done, // Label 2261: @60104 GIM_Reject, // Label 2232: @60105 GIM_Try, /*On fail goto*//*Label 2262*/ 60168, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 2263*/ 60141, // Rule ID 1914 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (strict_fmul:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VMULPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1914, GIR_Done, // Label 2263: @60141 GIM_Try, /*On fail goto*//*Label 2264*/ 60167, // Rule ID 6036 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fmul:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VMULPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6036, GIR_Done, // Label 2264: @60167 GIM_Reject, // Label 2262: @60168 GIM_Reject, // Label 2233: @60169 GIM_Try, /*On fail goto*//*Label 2265*/ 60203, // Rule ID 6012 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fmul:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VMULPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6012, GIR_Done, // Label 2265: @60203 GIM_Reject, // Label 2234: @60204 GIM_Try, /*On fail goto*//*Label 2266*/ 60238, // Rule ID 6096 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fmul:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VMULPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6096, GIR_Done, // Label 2266: @60238 GIM_Reject, // Label 2235: @60239 GIM_Try, /*On fail goto*//*Label 2267*/ 60273, // Rule ID 6000 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fmul:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VMULPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6000, GIR_Done, // Label 2267: @60273 GIM_Reject, // Label 2236: @60274 GIM_Try, /*On fail goto*//*Label 2268*/ 60308, // Rule ID 6072 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fmul:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VMULPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6072, GIR_Done, // Label 2268: @60308 GIM_Reject, // Label 2237: @60309 GIM_Reject, // Label 58: @60310 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 2282*/ 61131, /*GILLT_s16*//*Label 2269*/ 60337, /*GILLT_s32*//*Label 2270*/ 60372, /*GILLT_s64*//*Label 2271*/ 60491, /*GILLT_s80*//*Label 2272*/ 60610, 0, 0, /*GILLT_v2s64*//*Label 2273*/ 60648, 0, /*GILLT_v4s32*//*Label 2274*/ 60738, /*GILLT_v4s64*//*Label 2275*/ 60828, 0, /*GILLT_v8s16*//*Label 2276*/ 60892, /*GILLT_v8s32*//*Label 2277*/ 60927, /*GILLT_v8s64*//*Label 2278*/ 60991, 0, 0, /*GILLT_v16s16*//*Label 2279*/ 61026, /*GILLT_v16s32*//*Label 2280*/ 61061, 0, 0, /*GILLT_v32s16*//*Label 2281*/ 61096, // Label 2269: @60337 GIM_Try, /*On fail goto*//*Label 2283*/ 60371, // Rule ID 5762 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, // (strict_fdiv:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) => (VDIVSHZrr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5762, GIR_Done, // Label 2283: @60371 GIM_Reject, // Label 2270: @60372 GIM_Try, /*On fail goto*//*Label 2284*/ 60490, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 2285*/ 60411, // Rule ID 638 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (strict_fdiv:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (DIV_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 638, GIR_Done, // Label 2285: @60411 GIM_Try, /*On fail goto*//*Label 2286*/ 60437, // Rule ID 2010 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (strict_fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VDIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2010, GIR_Done, // Label 2286: @60437 GIM_Try, /*On fail goto*//*Label 2287*/ 60463, // Rule ID 2018 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (strict_fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (DIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2018, GIR_Done, // Label 2287: @60463 GIM_Try, /*On fail goto*//*Label 2288*/ 60489, // Rule ID 5724 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (strict_fdiv:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VDIVSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5724, GIR_Done, // Label 2288: @60489 GIM_Reject, // Label 2284: @60490 GIM_Reject, // Label 2271: @60491 GIM_Try, /*On fail goto*//*Label 2289*/ 60609, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 2290*/ 60530, // Rule ID 640 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (strict_fdiv:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (DIV_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 640, GIR_Done, // Label 2290: @60530 GIM_Try, /*On fail goto*//*Label 2291*/ 60556, // Rule ID 2014 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (strict_fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VDIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2014, GIR_Done, // Label 2291: @60556 GIM_Try, /*On fail goto*//*Label 2292*/ 60582, // Rule ID 2022 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (strict_fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (DIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2022, GIR_Done, // Label 2292: @60582 GIM_Try, /*On fail goto*//*Label 2293*/ 60608, // Rule ID 5743 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (strict_fdiv:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VDIVSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5743, GIR_Done, // Label 2293: @60608 GIM_Reject, // Label 2289: @60609 GIM_Reject, // Label 2272: @60610 GIM_Try, /*On fail goto*//*Label 2294*/ 60647, // Rule ID 642 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (strict_fdiv:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (DIV_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 642, GIR_Done, // Label 2294: @60647 GIM_Reject, // Label 2273: @60648 GIM_Try, /*On fail goto*//*Label 2295*/ 60737, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 2296*/ 60684, // Rule ID 1990 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VDIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1990, GIR_Done, // Label 2296: @60684 GIM_Try, /*On fail goto*//*Label 2297*/ 60710, // Rule ID 2006 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (DIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2006, GIR_Done, // Label 2297: @60710 GIM_Try, /*On fail goto*//*Label 2298*/ 60736, // Rule ID 6282 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fdiv:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VDIVPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6282, GIR_Done, // Label 2298: @60736 GIM_Reject, // Label 2295: @60737 GIM_Reject, // Label 2274: @60738 GIM_Try, /*On fail goto*//*Label 2299*/ 60827, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 2300*/ 60774, // Rule ID 1986 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VDIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1986, GIR_Done, // Label 2300: @60774 GIM_Try, /*On fail goto*//*Label 2301*/ 60800, // Rule ID 2002 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (strict_fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (DIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2002, GIR_Done, // Label 2301: @60800 GIM_Try, /*On fail goto*//*Label 2302*/ 60826, // Rule ID 6258 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fdiv:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VDIVPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6258, GIR_Done, // Label 2302: @60826 GIM_Reject, // Label 2299: @60827 GIM_Reject, // Label 2275: @60828 GIM_Try, /*On fail goto*//*Label 2303*/ 60891, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 2304*/ 60864, // Rule ID 1998 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (strict_fdiv:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VDIVPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1998, GIR_Done, // Label 2304: @60864 GIM_Try, /*On fail goto*//*Label 2305*/ 60890, // Rule ID 6294 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fdiv:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VDIVPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6294, GIR_Done, // Label 2305: @60890 GIM_Reject, // Label 2303: @60891 GIM_Reject, // Label 2276: @60892 GIM_Try, /*On fail goto*//*Label 2306*/ 60926, // Rule ID 6318 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (strict_fdiv:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) => (VDIVPHZ128rr:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPHZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6318, GIR_Done, // Label 2306: @60926 GIM_Reject, // Label 2277: @60927 GIM_Try, /*On fail goto*//*Label 2307*/ 60990, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 2308*/ 60963, // Rule ID 1994 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (strict_fdiv:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VDIVPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1994, GIR_Done, // Label 2308: @60963 GIM_Try, /*On fail goto*//*Label 2309*/ 60989, // Rule ID 6270 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fdiv:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VDIVPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6270, GIR_Done, // Label 2309: @60989 GIM_Reject, // Label 2307: @60990 GIM_Reject, // Label 2278: @60991 GIM_Try, /*On fail goto*//*Label 2310*/ 61025, // Rule ID 6246 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fdiv:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VDIVPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6246, GIR_Done, // Label 2310: @61025 GIM_Reject, // Label 2279: @61026 GIM_Try, /*On fail goto*//*Label 2311*/ 61060, // Rule ID 6330 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (strict_fdiv:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) => (VDIVPHZ256rr:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPHZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6330, GIR_Done, // Label 2311: @61060 GIM_Reject, // Label 2280: @61061 GIM_Try, /*On fail goto*//*Label 2312*/ 61095, // Rule ID 6234 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fdiv:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VDIVPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6234, GIR_Done, // Label 2312: @61095 GIM_Reject, // Label 2281: @61096 GIM_Try, /*On fail goto*//*Label 2313*/ 61130, // Rule ID 6306 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (strict_fdiv:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) => (VDIVPHZrr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPHZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6306, GIR_Done, // Label 2313: @61130 GIM_Reject, // Label 2282: @61131 GIM_Reject, // Label 59: @61132 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 2326*/ 62305, /*GILLT_s16*//*Label 2314*/ 61159, /*GILLT_s32*//*Label 2315*/ 61216, /*GILLT_s64*//*Label 2316*/ 61350, 0, 0, 0, /*GILLT_v2s64*//*Label 2317*/ 61484, 0, /*GILLT_v4s32*//*Label 2318*/ 61618, /*GILLT_v4s64*//*Label 2319*/ 61752, 0, /*GILLT_v8s16*//*Label 2320*/ 61886, /*GILLT_v8s32*//*Label 2321*/ 61943, /*GILLT_v8s64*//*Label 2322*/ 62077, 0, 0, /*GILLT_v16s16*//*Label 2323*/ 62134, /*GILLT_v16s32*//*Label 2324*/ 62191, 0, 0, /*GILLT_v32s16*//*Label 2325*/ 62248, // Label 2314: @61159 GIM_Try, /*On fail goto*//*Label 2327*/ 61215, // Rule ID 9723 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR16XRegClassID, // (strict_fma:{ *:[f16] } FR16X:{ *:[f16] }:$src2, FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src3) => (VFMADD213SHZr:{ *:[f16] } FR16X:{ *:[f16] }:$src1, FR16X:{ *:[f16] }:$src2, FR16X:{ *:[f16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SHZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9723, GIR_Done, // Label 2327: @61215 GIM_Reject, // Label 2315: @61216 GIM_Try, /*On fail goto*//*Label 2328*/ 61349, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 2329*/ 61274, // Rule ID 1029 // GIM_CheckFeatures, GIFBS_HasFMA_NoAVX512_NoFMA4, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR32RegClassID, // (strict_fma:{ *:[f32] } FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src3) => (VFMADD213SSr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SSr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1029, GIR_Done, // Label 2329: @61274 GIM_Try, /*On fail goto*//*Label 2330*/ 61304, // Rule ID 1093 // GIM_CheckFeatures, GIFBS_HasFMA4_NoAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR32RegClassID, // (strict_fma:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3) => (VFMADDSS4rr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2, FR32:{ *:[f32] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDSS4rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1093, GIR_Done, // Label 2330: @61304 GIM_Try, /*On fail goto*//*Label 2331*/ 61348, // Rule ID 9705 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR32XRegClassID, // (strict_fma:{ *:[f32] } FR32X:{ *:[f32] }:$src2, FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src3) => (VFMADD213SSZr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2, FR32X:{ *:[f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SSZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9705, GIR_Done, // Label 2331: @61348 GIM_Reject, // Label 2328: @61349 GIM_Reject, // Label 2316: @61350 GIM_Try, /*On fail goto*//*Label 2332*/ 61483, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 2333*/ 61408, // Rule ID 1037 // GIM_CheckFeatures, GIFBS_HasFMA_NoAVX512_NoFMA4, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR64RegClassID, // (strict_fma:{ *:[f64] } FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src3) => (VFMADD213SDr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SDr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1037, GIR_Done, // Label 2333: @61408 GIM_Try, /*On fail goto*//*Label 2334*/ 61438, // Rule ID 1177 // GIM_CheckFeatures, GIFBS_HasFMA4_NoAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR64RegClassID, // (strict_fma:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3) => (VFMADDSD4rr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2, FR64:{ *:[f64] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDSD4rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1177, GIR_Done, // Label 2334: @61438 GIM_Try, /*On fail goto*//*Label 2335*/ 61482, // Rule ID 9714 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::FR64XRegClassID, // (strict_fma:{ *:[f64] } FR64X:{ *:[f64] }:$src2, FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src3) => (VFMADD213SDZr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2, FR64X:{ *:[f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SDZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9714, GIR_Done, // Label 2335: @61482 GIM_Reject, // Label 2332: @61483 GIM_Reject, // Label 2317: @61484 GIM_Try, /*On fail goto*//*Label 2336*/ 61617, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 2337*/ 61542, // Rule ID 917 // GIM_CheckFeatures, GIFBS_HasFMA_NoFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (strict_fma:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src3) => (VFMADD213PDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 917, GIR_Done, // Label 2337: @61542 GIM_Try, /*On fail goto*//*Label 2338*/ 61572, // Rule ID 1201 // GIM_CheckFeatures, GIFBS_HasFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (strict_fma:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) => (VFMADDPD4rr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDPD4rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1201, GIR_Done, // Label 2338: @61572 GIM_Try, /*On fail goto*//*Label 2339*/ 61616, // Rule ID 8082 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (strict_fma:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src2, VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src3) => (VFMADD213PDZ128r:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2, VR128X:{ *:[v2f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDZ128r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8082, GIR_Done, // Label 2339: @61616 GIM_Reject, // Label 2336: @61617 GIM_Reject, // Label 2318: @61618 GIM_Try, /*On fail goto*//*Label 2340*/ 61751, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 2341*/ 61676, // Rule ID 869 // GIM_CheckFeatures, GIFBS_HasFMA_NoFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (strict_fma:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src3) => (VFMADD213PSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 869, GIR_Done, // Label 2341: @61676 GIM_Try, /*On fail goto*//*Label 2342*/ 61706, // Rule ID 1117 // GIM_CheckFeatures, GIFBS_HasFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (strict_fma:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) => (VFMADDPS4rr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDPS4rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1117, GIR_Done, // Label 2342: @61706 GIM_Try, /*On fail goto*//*Label 2343*/ 61750, // Rule ID 8043 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (strict_fma:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src2, VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src3) => (VFMADD213PSZ128r:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2, VR128X:{ *:[v4f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSZ128r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8043, GIR_Done, // Label 2343: @61750 GIM_Reject, // Label 2340: @61751 GIM_Reject, // Label 2319: @61752 GIM_Try, /*On fail goto*//*Label 2344*/ 61885, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 2345*/ 61810, // Rule ID 925 // GIM_CheckFeatures, GIFBS_HasFMA_NoFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (strict_fma:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src3) => (VFMADD213PDYr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDYr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 925, GIR_Done, // Label 2345: @61810 GIM_Try, /*On fail goto*//*Label 2346*/ 61840, // Rule ID 1207 // GIM_CheckFeatures, GIFBS_HasFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (strict_fma:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) => (VFMADDPD4Yrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDPD4Yrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1207, GIR_Done, // Label 2346: @61840 GIM_Try, /*On fail goto*//*Label 2347*/ 61884, // Rule ID 8070 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (strict_fma:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src2, VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src3) => (VFMADD213PDZ256r:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2, VR256X:{ *:[v4f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDZ256r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8070, GIR_Done, // Label 2347: @61884 GIM_Reject, // Label 2344: @61885 GIM_Reject, // Label 2320: @61886 GIM_Try, /*On fail goto*//*Label 2348*/ 61942, // Rule ID 8004 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (strict_fma:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src2, VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src3) => (VFMADD213PHZ128r:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src1, VR128X:{ *:[v8f16] }:$src2, VR128X:{ *:[v8f16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PHZ128r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8004, GIR_Done, // Label 2348: @61942 GIM_Reject, // Label 2321: @61943 GIM_Try, /*On fail goto*//*Label 2349*/ 62076, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 2350*/ 62001, // Rule ID 877 // GIM_CheckFeatures, GIFBS_HasFMA_NoFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (strict_fma:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src3) => (VFMADD213PSYr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSYr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 877, GIR_Done, // Label 2350: @62001 GIM_Try, /*On fail goto*//*Label 2351*/ 62031, // Rule ID 1123 // GIM_CheckFeatures, GIFBS_HasFMA4_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (strict_fma:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) => (VFMADDPS4Yrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VFMADDPS4Yrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1123, GIR_Done, // Label 2351: @62031 GIM_Try, /*On fail goto*//*Label 2352*/ 62075, // Rule ID 8031 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (strict_fma:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src2, VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src3) => (VFMADD213PSZ256r:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2, VR256X:{ *:[v8f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSZ256r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8031, GIR_Done, // Label 2352: @62075 GIM_Reject, // Label 2349: @62076 GIM_Reject, // Label 2322: @62077 GIM_Try, /*On fail goto*//*Label 2353*/ 62133, // Rule ID 8055 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (strict_fma:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src2, VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src3) => (VFMADD213PDZr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2, VR512:{ *:[v8f64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PDZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8055, GIR_Done, // Label 2353: @62133 GIM_Reject, // Label 2323: @62134 GIM_Try, /*On fail goto*//*Label 2354*/ 62190, // Rule ID 7992 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (strict_fma:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src2, VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src3) => (VFMADD213PHZ256r:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src1, VR256X:{ *:[v16f16] }:$src2, VR256X:{ *:[v16f16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PHZ256r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7992, GIR_Done, // Label 2354: @62190 GIM_Reject, // Label 2324: @62191 GIM_Try, /*On fail goto*//*Label 2355*/ 62247, // Rule ID 8016 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (strict_fma:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src2, VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src3) => (VFMADD213PSZr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2, VR512:{ *:[v16f32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PSZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8016, GIR_Done, // Label 2355: @62247 GIM_Reject, // Label 2325: @62248 GIM_Try, /*On fail goto*//*Label 2356*/ 62304, // Rule ID 7977 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (strict_fma:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src2, VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src3) => (VFMADD213PHZr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src1, VR512:{ *:[v32f16] }:$src2, VR512:{ *:[v32f16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213PHZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 7977, GIR_Done, // Label 2356: @62304 GIM_Reject, // Label 2326: @62305 GIM_Reject, // Label 60: @62306 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 2370*/ 63085, /*GILLT_s16*//*Label 2357*/ 62333, /*GILLT_s32*//*Label 2358*/ 62382, /*GILLT_s64*//*Label 2359*/ 62525, /*GILLT_s80*//*Label 2360*/ 62668, 0, 0, /*GILLT_v2s64*//*Label 2361*/ 62698, 0, /*GILLT_v4s32*//*Label 2362*/ 62772, /*GILLT_v4s64*//*Label 2363*/ 62846, 0, /*GILLT_v8s16*//*Label 2364*/ 62898, /*GILLT_v8s32*//*Label 2365*/ 62925, /*GILLT_v8s64*//*Label 2366*/ 62977, 0, 0, /*GILLT_v16s16*//*Label 2367*/ 63004, /*GILLT_v16s32*//*Label 2368*/ 63031, 0, 0, /*GILLT_v32s16*//*Label 2369*/ 63058, // Label 2357: @62333 GIM_Try, /*On fail goto*//*Label 2371*/ 62381, // Rule ID 19873 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR16XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR16XRegClassID, // (strict_fsqrt:{ *:[f16] } FR16X:{ *:[f16] }:$src) => (VSQRTSHZr:{ *:[f16] } (IMPLICIT_DEF:{ *:[f16] }), FR16X:{ *:[f16] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSHZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19873, GIR_Done, // Label 2371: @62381 GIM_Reject, // Label 2358: @62382 GIM_Try, /*On fail goto*//*Label 2372*/ 62524, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 2373*/ 62413, // Rule ID 782 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (strict_fsqrt:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (SQRT_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRT_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 782, GIR_Done, // Label 2373: @62413 GIM_Try, /*On fail goto*//*Label 2374*/ 62435, // Rule ID 2138 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (strict_fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src1) => (SQRTSSr:{ *:[f32] } FR32:{ *:[f32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTSSr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2138, GIR_Done, // Label 2374: @62435 GIM_Try, /*On fail goto*//*Label 2375*/ 62479, // Rule ID 16721 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (strict_fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src) => (VSQRTSSr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSSr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16721, GIR_Done, // Label 2375: @62479 GIM_Try, /*On fail goto*//*Label 2376*/ 62523, // Rule ID 19877 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (strict_fsqrt:{ *:[f32] } FR32X:{ *:[f32] }:$src) => (VSQRTSSZr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32X:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSSZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19877, GIR_Done, // Label 2376: @62523 GIM_Reject, // Label 2372: @62524 GIM_Reject, // Label 2359: @62525 GIM_Try, /*On fail goto*//*Label 2377*/ 62667, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 2378*/ 62556, // Rule ID 784 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (strict_fsqrt:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (SQRT_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRT_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 784, GIR_Done, // Label 2378: @62556 GIM_Try, /*On fail goto*//*Label 2379*/ 62578, // Rule ID 2154 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (strict_fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src1) => (SQRTSDr:{ *:[f64] } FR64:{ *:[f64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTSDr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2154, GIR_Done, // Label 2379: @62578 GIM_Try, /*On fail goto*//*Label 2380*/ 62622, // Rule ID 16725 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (strict_fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src) => (VSQRTSDr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSDr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16725, GIR_Done, // Label 2380: @62622 GIM_Try, /*On fail goto*//*Label 2381*/ 62666, // Rule ID 19881 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (strict_fsqrt:{ *:[f64] } FR64X:{ *:[f64] }:$src) => (VSQRTSDZr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64X:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSDZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19881, GIR_Done, // Label 2381: @62666 GIM_Reject, // Label 2377: @62667 GIM_Reject, // Label 2360: @62668 GIM_Try, /*On fail goto*//*Label 2382*/ 62697, // Rule ID 786 // GIM_CheckFeatures, GIFBS_HasX87, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (strict_fsqrt:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (SQRT_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRT_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 786, GIR_Done, // Label 2382: @62697 GIM_Reject, // Label 2361: @62698 GIM_Try, /*On fail goto*//*Label 2383*/ 62771, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 2384*/ 62726, // Rule ID 2158 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (strict_fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (VSQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2158, GIR_Done, // Label 2384: @62726 GIM_Try, /*On fail goto*//*Label 2385*/ 62748, // Rule ID 2166 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (strict_fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (SQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTPDr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2166, GIR_Done, // Label 2385: @62748 GIM_Try, /*On fail goto*//*Label 2386*/ 62770, // Rule ID 11787 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (strict_fsqrt:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src) => (VSQRTPDZ128r:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDZ128r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11787, GIR_Done, // Label 2386: @62770 GIM_Reject, // Label 2383: @62771 GIM_Reject, // Label 2362: @62772 GIM_Try, /*On fail goto*//*Label 2387*/ 62845, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 2388*/ 62800, // Rule ID 2142 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (strict_fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (VSQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2142, GIR_Done, // Label 2388: @62800 GIM_Try, /*On fail goto*//*Label 2389*/ 62822, // Rule ID 2150 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (strict_fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (SQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTPSr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2150, GIR_Done, // Label 2389: @62822 GIM_Try, /*On fail goto*//*Label 2390*/ 62844, // Rule ID 11763 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (strict_fsqrt:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src) => (VSQRTPSZ128r:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSZ128r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11763, GIR_Done, // Label 2390: @62844 GIM_Reject, // Label 2387: @62845 GIM_Reject, // Label 2363: @62846 GIM_Try, /*On fail goto*//*Label 2391*/ 62897, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 2392*/ 62874, // Rule ID 2162 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (strict_fsqrt:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) => (VSQRTPDYr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDYr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2162, GIR_Done, // Label 2392: @62874 GIM_Try, /*On fail goto*//*Label 2393*/ 62896, // Rule ID 11799 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (strict_fsqrt:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src) => (VSQRTPDZ256r:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDZ256r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11799, GIR_Done, // Label 2393: @62896 GIM_Reject, // Label 2391: @62897 GIM_Reject, // Label 2364: @62898 GIM_Try, /*On fail goto*//*Label 2394*/ 62924, // Rule ID 11715 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (strict_fsqrt:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src) => (VSQRTPHZ128r:{ *:[v8f16] } VR128X:{ *:[v8f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPHZ128r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11715, GIR_Done, // Label 2394: @62924 GIM_Reject, // Label 2365: @62925 GIM_Try, /*On fail goto*//*Label 2395*/ 62976, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 2396*/ 62953, // Rule ID 2146 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (strict_fsqrt:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) => (VSQRTPSYr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSYr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2146, GIR_Done, // Label 2396: @62953 GIM_Try, /*On fail goto*//*Label 2397*/ 62975, // Rule ID 11775 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (strict_fsqrt:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src) => (VSQRTPSZ256r:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSZ256r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11775, GIR_Done, // Label 2397: @62975 GIM_Reject, // Label 2395: @62976 GIM_Reject, // Label 2366: @62977 GIM_Try, /*On fail goto*//*Label 2398*/ 63003, // Rule ID 11751 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (strict_fsqrt:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src) => (VSQRTPDZr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDZr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11751, GIR_Done, // Label 2398: @63003 GIM_Reject, // Label 2367: @63004 GIM_Try, /*On fail goto*//*Label 2399*/ 63030, // Rule ID 11727 // GIM_CheckFeatures, GIFBS_HasFP16_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (strict_fsqrt:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src) => (VSQRTPHZ256r:{ *:[v16f16] } VR256X:{ *:[v16f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPHZ256r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11727, GIR_Done, // Label 2399: @63030 GIM_Reject, // Label 2368: @63031 GIM_Try, /*On fail goto*//*Label 2400*/ 63057, // Rule ID 11739 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (strict_fsqrt:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src) => (VSQRTPSZr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSZr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11739, GIR_Done, // Label 2400: @63057 GIM_Reject, // Label 2369: @63058 GIM_Try, /*On fail goto*//*Label 2401*/ 63084, // Rule ID 11703 // GIM_CheckFeatures, GIFBS_HasFP16, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (strict_fsqrt:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src) => (VSQRTPHZr:{ *:[v32f16] } VR512:{ *:[v32f16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPHZr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11703, GIR_Done, // Label 2401: @63084 GIM_Reject, // Label 2370: @63085 GIM_Reject, // Label 61: @63086 GIM_Reject, }; return MatchTable0; } #endif // ifdef GET_GLOBALISEL_IMPL #ifdef GET_GLOBALISEL_PREDICATES_DECL PredicateBitset AvailableModuleFeatures; mutable PredicateBitset AvailableFunctionFeatures; PredicateBitset getAvailableFeatures() const { return AvailableModuleFeatures | AvailableFunctionFeatures; } PredicateBitset computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const; PredicateBitset computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const; void setupGeneratedPerFunctionState(MachineFunction &MF) override; #endif // ifdef GET_GLOBALISEL_PREDICATES_DECL #ifdef GET_GLOBALISEL_PREDICATES_INIT AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)), AvailableFunctionFeatures() #endif // ifdef GET_GLOBALISEL_PREDICATES_INIT