/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Target Instruction Enum Values and Descriptors *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM namespace llvm { namespace ARM { enum { PHI = 0, INLINEASM = 1, INLINEASM_BR = 2, CFI_INSTRUCTION = 3, EH_LABEL = 4, GC_LABEL = 5, ANNOTATION_LABEL = 6, KILL = 7, EXTRACT_SUBREG = 8, INSERT_SUBREG = 9, IMPLICIT_DEF = 10, SUBREG_TO_REG = 11, COPY_TO_REGCLASS = 12, DBG_VALUE = 13, DBG_VALUE_LIST = 14, DBG_INSTR_REF = 15, DBG_PHI = 16, DBG_LABEL = 17, REG_SEQUENCE = 18, COPY = 19, BUNDLE = 20, LIFETIME_START = 21, LIFETIME_END = 22, PSEUDO_PROBE = 23, ARITH_FENCE = 24, STACKMAP = 25, FENTRY_CALL = 26, PATCHPOINT = 27, LOAD_STACK_GUARD = 28, PREALLOCATED_SETUP = 29, PREALLOCATED_ARG = 30, STATEPOINT = 31, LOCAL_ESCAPE = 32, FAULTING_OP = 33, PATCHABLE_OP = 34, PATCHABLE_FUNCTION_ENTER = 35, PATCHABLE_RET = 36, PATCHABLE_FUNCTION_EXIT = 37, PATCHABLE_TAIL_CALL = 38, PATCHABLE_EVENT_CALL = 39, PATCHABLE_TYPED_EVENT_CALL = 40, ICALL_BRANCH_FUNNEL = 41, MEMBARRIER = 42, G_ASSERT_SEXT = 43, G_ASSERT_ZEXT = 44, G_ASSERT_ALIGN = 45, G_ADD = 46, G_SUB = 47, G_MUL = 48, G_SDIV = 49, G_UDIV = 50, G_SREM = 51, G_UREM = 52, G_SDIVREM = 53, G_UDIVREM = 54, G_AND = 55, G_OR = 56, G_XOR = 57, G_IMPLICIT_DEF = 58, G_PHI = 59, G_FRAME_INDEX = 60, G_GLOBAL_VALUE = 61, G_EXTRACT = 62, G_UNMERGE_VALUES = 63, G_INSERT = 64, G_MERGE_VALUES = 65, G_BUILD_VECTOR = 66, G_BUILD_VECTOR_TRUNC = 67, G_CONCAT_VECTORS = 68, G_PTRTOINT = 69, G_INTTOPTR = 70, G_BITCAST = 71, G_FREEZE = 72, G_INTRINSIC_FPTRUNC_ROUND = 73, G_INTRINSIC_TRUNC = 74, G_INTRINSIC_ROUND = 75, G_INTRINSIC_LRINT = 76, G_INTRINSIC_ROUNDEVEN = 77, G_READCYCLECOUNTER = 78, G_LOAD = 79, G_SEXTLOAD = 80, G_ZEXTLOAD = 81, G_INDEXED_LOAD = 82, G_INDEXED_SEXTLOAD = 83, G_INDEXED_ZEXTLOAD = 84, G_STORE = 85, G_INDEXED_STORE = 86, G_ATOMIC_CMPXCHG_WITH_SUCCESS = 87, G_ATOMIC_CMPXCHG = 88, G_ATOMICRMW_XCHG = 89, G_ATOMICRMW_ADD = 90, G_ATOMICRMW_SUB = 91, G_ATOMICRMW_AND = 92, G_ATOMICRMW_NAND = 93, G_ATOMICRMW_OR = 94, G_ATOMICRMW_XOR = 95, G_ATOMICRMW_MAX = 96, G_ATOMICRMW_MIN = 97, G_ATOMICRMW_UMAX = 98, G_ATOMICRMW_UMIN = 99, G_ATOMICRMW_FADD = 100, G_ATOMICRMW_FSUB = 101, G_ATOMICRMW_FMAX = 102, G_ATOMICRMW_FMIN = 103, G_ATOMICRMW_UINC_WRAP = 104, G_ATOMICRMW_UDEC_WRAP = 105, G_FENCE = 106, G_BRCOND = 107, G_BRINDIRECT = 108, G_INVOKE_REGION_START = 109, G_INTRINSIC = 110, G_INTRINSIC_W_SIDE_EFFECTS = 111, G_ANYEXT = 112, G_TRUNC = 113, G_CONSTANT = 114, G_FCONSTANT = 115, G_VASTART = 116, G_VAARG = 117, G_SEXT = 118, G_SEXT_INREG = 119, G_ZEXT = 120, G_SHL = 121, G_LSHR = 122, G_ASHR = 123, G_FSHL = 124, G_FSHR = 125, G_ROTR = 126, G_ROTL = 127, G_ICMP = 128, G_FCMP = 129, G_SELECT = 130, G_UADDO = 131, G_UADDE = 132, G_USUBO = 133, G_USUBE = 134, G_SADDO = 135, G_SADDE = 136, G_SSUBO = 137, G_SSUBE = 138, G_UMULO = 139, G_SMULO = 140, G_UMULH = 141, G_SMULH = 142, G_UADDSAT = 143, G_SADDSAT = 144, G_USUBSAT = 145, G_SSUBSAT = 146, G_USHLSAT = 147, G_SSHLSAT = 148, G_SMULFIX = 149, G_UMULFIX = 150, G_SMULFIXSAT = 151, G_UMULFIXSAT = 152, G_SDIVFIX = 153, G_UDIVFIX = 154, G_SDIVFIXSAT = 155, G_UDIVFIXSAT = 156, G_FADD = 157, G_FSUB = 158, G_FMUL = 159, G_FMA = 160, G_FMAD = 161, G_FDIV = 162, G_FREM = 163, G_FPOW = 164, G_FPOWI = 165, G_FEXP = 166, G_FEXP2 = 167, G_FLOG = 168, G_FLOG2 = 169, G_FLOG10 = 170, G_FNEG = 171, G_FPEXT = 172, G_FPTRUNC = 173, G_FPTOSI = 174, G_FPTOUI = 175, G_SITOFP = 176, G_UITOFP = 177, G_FABS = 178, G_FCOPYSIGN = 179, G_IS_FPCLASS = 180, G_FCANONICALIZE = 181, G_FMINNUM = 182, G_FMAXNUM = 183, G_FMINNUM_IEEE = 184, G_FMAXNUM_IEEE = 185, G_FMINIMUM = 186, G_FMAXIMUM = 187, G_PTR_ADD = 188, G_PTRMASK = 189, G_SMIN = 190, G_SMAX = 191, G_UMIN = 192, G_UMAX = 193, G_ABS = 194, G_LROUND = 195, G_LLROUND = 196, G_BR = 197, G_BRJT = 198, G_INSERT_VECTOR_ELT = 199, G_EXTRACT_VECTOR_ELT = 200, G_SHUFFLE_VECTOR = 201, G_CTTZ = 202, G_CTTZ_ZERO_UNDEF = 203, G_CTLZ = 204, G_CTLZ_ZERO_UNDEF = 205, G_CTPOP = 206, G_BSWAP = 207, G_BITREVERSE = 208, G_FCEIL = 209, G_FCOS = 210, G_FSIN = 211, G_FSQRT = 212, G_FFLOOR = 213, G_FRINT = 214, G_FNEARBYINT = 215, G_ADDRSPACE_CAST = 216, G_BLOCK_ADDR = 217, G_JUMP_TABLE = 218, G_DYN_STACKALLOC = 219, G_STRICT_FADD = 220, G_STRICT_FSUB = 221, G_STRICT_FMUL = 222, G_STRICT_FDIV = 223, G_STRICT_FREM = 224, G_STRICT_FMA = 225, G_STRICT_FSQRT = 226, G_READ_REGISTER = 227, G_WRITE_REGISTER = 228, G_MEMCPY = 229, G_MEMCPY_INLINE = 230, G_MEMMOVE = 231, G_MEMSET = 232, G_BZERO = 233, G_VECREDUCE_SEQ_FADD = 234, G_VECREDUCE_SEQ_FMUL = 235, G_VECREDUCE_FADD = 236, G_VECREDUCE_FMUL = 237, G_VECREDUCE_FMAX = 238, G_VECREDUCE_FMIN = 239, G_VECREDUCE_ADD = 240, G_VECREDUCE_MUL = 241, G_VECREDUCE_AND = 242, G_VECREDUCE_OR = 243, G_VECREDUCE_XOR = 244, G_VECREDUCE_SMAX = 245, G_VECREDUCE_SMIN = 246, G_VECREDUCE_UMAX = 247, G_VECREDUCE_UMIN = 248, G_SBFX = 249, G_UBFX = 250, ABS = 251, ADDSri = 252, ADDSrr = 253, ADDSrsi = 254, ADDSrsr = 255, ADJCALLSTACKDOWN = 256, ADJCALLSTACKUP = 257, ASRi = 258, ASRr = 259, B = 260, BCCZi64 = 261, BCCi64 = 262, BLX_noip = 263, BLX_pred_noip = 264, BL_PUSHLR = 265, BMOVPCB_CALL = 266, BMOVPCRX_CALL = 267, BR_JTadd = 268, BR_JTm_i12 = 269, BR_JTm_rs = 270, BR_JTr = 271, BX_CALL = 272, CMP_SWAP_16 = 273, CMP_SWAP_32 = 274, CMP_SWAP_64 = 275, CMP_SWAP_8 = 276, CONSTPOOL_ENTRY = 277, COPY_STRUCT_BYVAL_I32 = 278, ITasm = 279, Int_eh_sjlj_dispatchsetup = 280, Int_eh_sjlj_longjmp = 281, Int_eh_sjlj_setjmp = 282, Int_eh_sjlj_setjmp_nofp = 283, Int_eh_sjlj_setup_dispatch = 284, JUMPTABLE_ADDRS = 285, JUMPTABLE_INSTS = 286, JUMPTABLE_TBB = 287, JUMPTABLE_TBH = 288, LDMIA_RET = 289, LDRBT_POST = 290, LDRConstPool = 291, LDRHTii = 292, LDRLIT_ga_abs = 293, LDRLIT_ga_pcrel = 294, LDRLIT_ga_pcrel_ldr = 295, LDRSBTii = 296, LDRSHTii = 297, LDRT_POST = 298, LEApcrel = 299, LEApcrelJT = 300, LOADDUAL = 301, LSLi = 302, LSLr = 303, LSRi = 304, LSRr = 305, MEMCPY = 306, MLAv5 = 307, MOVCCi = 308, MOVCCi16 = 309, MOVCCi32imm = 310, MOVCCr = 311, MOVCCsi = 312, MOVCCsr = 313, MOVPCRX = 314, MOVTi16_ga_pcrel = 315, MOV_ga_pcrel = 316, MOV_ga_pcrel_ldr = 317, MOVi16_ga_pcrel = 318, MOVi32imm = 319, MOVsra_flag = 320, MOVsrl_flag = 321, MQPRCopy = 322, MQQPRLoad = 323, MQQPRStore = 324, MQQQQPRLoad = 325, MQQQQPRStore = 326, MULv5 = 327, MVE_MEMCPYLOOPINST = 328, MVE_MEMSETLOOPINST = 329, MVNCCi = 330, PICADD = 331, PICLDR = 332, PICLDRB = 333, PICLDRH = 334, PICLDRSB = 335, PICLDRSH = 336, PICSTR = 337, PICSTRB = 338, PICSTRH = 339, RORi = 340, RORr = 341, RRX = 342, RRXi = 343, RSBSri = 344, RSBSrsi = 345, RSBSrsr = 346, SEH_EpilogEnd = 347, SEH_EpilogStart = 348, SEH_Nop = 349, SEH_Nop_Ret = 350, SEH_PrologEnd = 351, SEH_SaveFRegs = 352, SEH_SaveLR = 353, SEH_SaveRegs = 354, SEH_SaveRegs_Ret = 355, SEH_SaveSP = 356, SEH_StackAlloc = 357, SMLALv5 = 358, SMULLv5 = 359, SPACE = 360, STOREDUAL = 361, STRBT_POST = 362, STRBi_preidx = 363, STRBr_preidx = 364, STRH_preidx = 365, STRT_POST = 366, STRi_preidx = 367, STRr_preidx = 368, SUBS_PC_LR = 369, SUBSri = 370, SUBSrr = 371, SUBSrsi = 372, SUBSrsr = 373, SpeculationBarrierISBDSBEndBB = 374, SpeculationBarrierSBEndBB = 375, TAILJMPd = 376, TAILJMPr = 377, TAILJMPr4 = 378, TCRETURNdi = 379, TCRETURNri = 380, TPsoft = 381, UMLALv5 = 382, UMULLv5 = 383, VLD1LNdAsm_16 = 384, VLD1LNdAsm_32 = 385, VLD1LNdAsm_8 = 386, VLD1LNdWB_fixed_Asm_16 = 387, VLD1LNdWB_fixed_Asm_32 = 388, VLD1LNdWB_fixed_Asm_8 = 389, VLD1LNdWB_register_Asm_16 = 390, VLD1LNdWB_register_Asm_32 = 391, VLD1LNdWB_register_Asm_8 = 392, VLD2LNdAsm_16 = 393, VLD2LNdAsm_32 = 394, VLD2LNdAsm_8 = 395, VLD2LNdWB_fixed_Asm_16 = 396, VLD2LNdWB_fixed_Asm_32 = 397, VLD2LNdWB_fixed_Asm_8 = 398, VLD2LNdWB_register_Asm_16 = 399, VLD2LNdWB_register_Asm_32 = 400, VLD2LNdWB_register_Asm_8 = 401, VLD2LNqAsm_16 = 402, VLD2LNqAsm_32 = 403, VLD2LNqWB_fixed_Asm_16 = 404, VLD2LNqWB_fixed_Asm_32 = 405, VLD2LNqWB_register_Asm_16 = 406, VLD2LNqWB_register_Asm_32 = 407, VLD3DUPdAsm_16 = 408, VLD3DUPdAsm_32 = 409, VLD3DUPdAsm_8 = 410, VLD3DUPdWB_fixed_Asm_16 = 411, VLD3DUPdWB_fixed_Asm_32 = 412, VLD3DUPdWB_fixed_Asm_8 = 413, VLD3DUPdWB_register_Asm_16 = 414, VLD3DUPdWB_register_Asm_32 = 415, VLD3DUPdWB_register_Asm_8 = 416, VLD3DUPqAsm_16 = 417, VLD3DUPqAsm_32 = 418, VLD3DUPqAsm_8 = 419, VLD3DUPqWB_fixed_Asm_16 = 420, VLD3DUPqWB_fixed_Asm_32 = 421, VLD3DUPqWB_fixed_Asm_8 = 422, VLD3DUPqWB_register_Asm_16 = 423, VLD3DUPqWB_register_Asm_32 = 424, VLD3DUPqWB_register_Asm_8 = 425, VLD3LNdAsm_16 = 426, VLD3LNdAsm_32 = 427, VLD3LNdAsm_8 = 428, VLD3LNdWB_fixed_Asm_16 = 429, VLD3LNdWB_fixed_Asm_32 = 430, VLD3LNdWB_fixed_Asm_8 = 431, VLD3LNdWB_register_Asm_16 = 432, VLD3LNdWB_register_Asm_32 = 433, VLD3LNdWB_register_Asm_8 = 434, VLD3LNqAsm_16 = 435, VLD3LNqAsm_32 = 436, VLD3LNqWB_fixed_Asm_16 = 437, VLD3LNqWB_fixed_Asm_32 = 438, VLD3LNqWB_register_Asm_16 = 439, VLD3LNqWB_register_Asm_32 = 440, VLD3dAsm_16 = 441, VLD3dAsm_32 = 442, VLD3dAsm_8 = 443, VLD3dWB_fixed_Asm_16 = 444, VLD3dWB_fixed_Asm_32 = 445, VLD3dWB_fixed_Asm_8 = 446, VLD3dWB_register_Asm_16 = 447, VLD3dWB_register_Asm_32 = 448, VLD3dWB_register_Asm_8 = 449, VLD3qAsm_16 = 450, VLD3qAsm_32 = 451, VLD3qAsm_8 = 452, VLD3qWB_fixed_Asm_16 = 453, VLD3qWB_fixed_Asm_32 = 454, VLD3qWB_fixed_Asm_8 = 455, VLD3qWB_register_Asm_16 = 456, VLD3qWB_register_Asm_32 = 457, VLD3qWB_register_Asm_8 = 458, VLD4DUPdAsm_16 = 459, VLD4DUPdAsm_32 = 460, VLD4DUPdAsm_8 = 461, VLD4DUPdWB_fixed_Asm_16 = 462, VLD4DUPdWB_fixed_Asm_32 = 463, VLD4DUPdWB_fixed_Asm_8 = 464, VLD4DUPdWB_register_Asm_16 = 465, VLD4DUPdWB_register_Asm_32 = 466, VLD4DUPdWB_register_Asm_8 = 467, VLD4DUPqAsm_16 = 468, VLD4DUPqAsm_32 = 469, VLD4DUPqAsm_8 = 470, VLD4DUPqWB_fixed_Asm_16 = 471, VLD4DUPqWB_fixed_Asm_32 = 472, VLD4DUPqWB_fixed_Asm_8 = 473, VLD4DUPqWB_register_Asm_16 = 474, VLD4DUPqWB_register_Asm_32 = 475, VLD4DUPqWB_register_Asm_8 = 476, VLD4LNdAsm_16 = 477, VLD4LNdAsm_32 = 478, VLD4LNdAsm_8 = 479, VLD4LNdWB_fixed_Asm_16 = 480, VLD4LNdWB_fixed_Asm_32 = 481, VLD4LNdWB_fixed_Asm_8 = 482, VLD4LNdWB_register_Asm_16 = 483, VLD4LNdWB_register_Asm_32 = 484, VLD4LNdWB_register_Asm_8 = 485, VLD4LNqAsm_16 = 486, VLD4LNqAsm_32 = 487, VLD4LNqWB_fixed_Asm_16 = 488, VLD4LNqWB_fixed_Asm_32 = 489, VLD4LNqWB_register_Asm_16 = 490, VLD4LNqWB_register_Asm_32 = 491, VLD4dAsm_16 = 492, VLD4dAsm_32 = 493, VLD4dAsm_8 = 494, VLD4dWB_fixed_Asm_16 = 495, VLD4dWB_fixed_Asm_32 = 496, VLD4dWB_fixed_Asm_8 = 497, VLD4dWB_register_Asm_16 = 498, VLD4dWB_register_Asm_32 = 499, VLD4dWB_register_Asm_8 = 500, VLD4qAsm_16 = 501, VLD4qAsm_32 = 502, VLD4qAsm_8 = 503, VLD4qWB_fixed_Asm_16 = 504, VLD4qWB_fixed_Asm_32 = 505, VLD4qWB_fixed_Asm_8 = 506, VLD4qWB_register_Asm_16 = 507, VLD4qWB_register_Asm_32 = 508, VLD4qWB_register_Asm_8 = 509, VMOVD0 = 510, VMOVDcc = 511, VMOVHcc = 512, VMOVQ0 = 513, VMOVScc = 514, VST1LNdAsm_16 = 515, VST1LNdAsm_32 = 516, VST1LNdAsm_8 = 517, VST1LNdWB_fixed_Asm_16 = 518, VST1LNdWB_fixed_Asm_32 = 519, VST1LNdWB_fixed_Asm_8 = 520, VST1LNdWB_register_Asm_16 = 521, VST1LNdWB_register_Asm_32 = 522, VST1LNdWB_register_Asm_8 = 523, VST2LNdAsm_16 = 524, VST2LNdAsm_32 = 525, VST2LNdAsm_8 = 526, VST2LNdWB_fixed_Asm_16 = 527, VST2LNdWB_fixed_Asm_32 = 528, VST2LNdWB_fixed_Asm_8 = 529, VST2LNdWB_register_Asm_16 = 530, VST2LNdWB_register_Asm_32 = 531, VST2LNdWB_register_Asm_8 = 532, VST2LNqAsm_16 = 533, VST2LNqAsm_32 = 534, VST2LNqWB_fixed_Asm_16 = 535, VST2LNqWB_fixed_Asm_32 = 536, VST2LNqWB_register_Asm_16 = 537, VST2LNqWB_register_Asm_32 = 538, VST3LNdAsm_16 = 539, VST3LNdAsm_32 = 540, VST3LNdAsm_8 = 541, VST3LNdWB_fixed_Asm_16 = 542, VST3LNdWB_fixed_Asm_32 = 543, VST3LNdWB_fixed_Asm_8 = 544, VST3LNdWB_register_Asm_16 = 545, VST3LNdWB_register_Asm_32 = 546, VST3LNdWB_register_Asm_8 = 547, VST3LNqAsm_16 = 548, VST3LNqAsm_32 = 549, VST3LNqWB_fixed_Asm_16 = 550, VST3LNqWB_fixed_Asm_32 = 551, VST3LNqWB_register_Asm_16 = 552, VST3LNqWB_register_Asm_32 = 553, VST3dAsm_16 = 554, VST3dAsm_32 = 555, VST3dAsm_8 = 556, VST3dWB_fixed_Asm_16 = 557, VST3dWB_fixed_Asm_32 = 558, VST3dWB_fixed_Asm_8 = 559, VST3dWB_register_Asm_16 = 560, VST3dWB_register_Asm_32 = 561, VST3dWB_register_Asm_8 = 562, VST3qAsm_16 = 563, VST3qAsm_32 = 564, VST3qAsm_8 = 565, VST3qWB_fixed_Asm_16 = 566, VST3qWB_fixed_Asm_32 = 567, VST3qWB_fixed_Asm_8 = 568, VST3qWB_register_Asm_16 = 569, VST3qWB_register_Asm_32 = 570, VST3qWB_register_Asm_8 = 571, VST4LNdAsm_16 = 572, VST4LNdAsm_32 = 573, VST4LNdAsm_8 = 574, VST4LNdWB_fixed_Asm_16 = 575, VST4LNdWB_fixed_Asm_32 = 576, VST4LNdWB_fixed_Asm_8 = 577, VST4LNdWB_register_Asm_16 = 578, VST4LNdWB_register_Asm_32 = 579, VST4LNdWB_register_Asm_8 = 580, VST4LNqAsm_16 = 581, VST4LNqAsm_32 = 582, VST4LNqWB_fixed_Asm_16 = 583, VST4LNqWB_fixed_Asm_32 = 584, VST4LNqWB_register_Asm_16 = 585, VST4LNqWB_register_Asm_32 = 586, VST4dAsm_16 = 587, VST4dAsm_32 = 588, VST4dAsm_8 = 589, VST4dWB_fixed_Asm_16 = 590, VST4dWB_fixed_Asm_32 = 591, VST4dWB_fixed_Asm_8 = 592, VST4dWB_register_Asm_16 = 593, VST4dWB_register_Asm_32 = 594, VST4dWB_register_Asm_8 = 595, VST4qAsm_16 = 596, VST4qAsm_32 = 597, VST4qAsm_8 = 598, VST4qWB_fixed_Asm_16 = 599, VST4qWB_fixed_Asm_32 = 600, VST4qWB_fixed_Asm_8 = 601, VST4qWB_register_Asm_16 = 602, VST4qWB_register_Asm_32 = 603, VST4qWB_register_Asm_8 = 604, WIN__CHKSTK = 605, WIN__DBZCHK = 606, t2ABS = 607, t2ADDSri = 608, t2ADDSrr = 609, t2ADDSrs = 610, t2BF_LabelPseudo = 611, t2BR_JT = 612, t2CALL_BTI = 613, t2DoLoopStart = 614, t2DoLoopStartTP = 615, t2LDMIA_RET = 616, t2LDRBpcrel = 617, t2LDRConstPool = 618, t2LDRHpcrel = 619, t2LDRLIT_ga_pcrel = 620, t2LDRSBpcrel = 621, t2LDRSHpcrel = 622, t2LDR_POST_imm = 623, t2LDR_PRE_imm = 624, t2LDRpci_pic = 625, t2LDRpcrel = 626, t2LEApcrel = 627, t2LEApcrelJT = 628, t2LoopDec = 629, t2LoopEnd = 630, t2LoopEndDec = 631, t2MOVCCasr = 632, t2MOVCCi = 633, t2MOVCCi16 = 634, t2MOVCCi32imm = 635, t2MOVCClsl = 636, t2MOVCClsr = 637, t2MOVCCr = 638, t2MOVCCror = 639, t2MOVSsi = 640, t2MOVSsr = 641, t2MOVTi16_ga_pcrel = 642, t2MOV_ga_pcrel = 643, t2MOVi16_ga_pcrel = 644, t2MOVi32imm = 645, t2MOVsi = 646, t2MOVsr = 647, t2MVNCCi = 648, t2RSBSri = 649, t2RSBSrs = 650, t2STRB_preidx = 651, t2STRH_preidx = 652, t2STR_POST_imm = 653, t2STR_PRE_imm = 654, t2STR_preidx = 655, t2SUBSri = 656, t2SUBSrr = 657, t2SUBSrs = 658, t2SpeculationBarrierISBDSBEndBB = 659, t2SpeculationBarrierSBEndBB = 660, t2TBB_JT = 661, t2TBH_JT = 662, t2WhileLoopSetup = 663, t2WhileLoopStart = 664, t2WhileLoopStartLR = 665, t2WhileLoopStartTP = 666, tADCS = 667, tADDSi3 = 668, tADDSi8 = 669, tADDSrr = 670, tADDframe = 671, tADJCALLSTACKDOWN = 672, tADJCALLSTACKUP = 673, tBLXNS_CALL = 674, tBLXr_noip = 675, tBL_PUSHLR = 676, tBRIND = 677, tBR_JTr = 678, tBXNS_RET = 679, tBX_CALL = 680, tBX_RET = 681, tBX_RET_vararg = 682, tBfar = 683, tCMP_SWAP_16 = 684, tCMP_SWAP_32 = 685, tCMP_SWAP_8 = 686, tLDMIA_UPD = 687, tLDRConstPool = 688, tLDRLIT_ga_abs = 689, tLDRLIT_ga_pcrel = 690, tLDR_postidx = 691, tLDRpci_pic = 692, tLEApcrel = 693, tLEApcrelJT = 694, tLSLSri = 695, tMOVCCr_pseudo = 696, tPOP_RET = 697, tRSBS = 698, tSBCS = 699, tSUBSi3 = 700, tSUBSi8 = 701, tSUBSrr = 702, tTAILJMPd = 703, tTAILJMPdND = 704, tTAILJMPr = 705, tTBB_JT = 706, tTBH_JT = 707, tTPsoft = 708, ADCri = 709, ADCrr = 710, ADCrsi = 711, ADCrsr = 712, ADDri = 713, ADDrr = 714, ADDrsi = 715, ADDrsr = 716, ADR = 717, AESD = 718, AESE = 719, AESIMC = 720, AESMC = 721, ANDri = 722, ANDrr = 723, ANDrsi = 724, ANDrsr = 725, BF16VDOTI_VDOTD = 726, BF16VDOTI_VDOTQ = 727, BF16VDOTS_VDOTD = 728, BF16VDOTS_VDOTQ = 729, BF16_VCVT = 730, BF16_VCVTB = 731, BF16_VCVTT = 732, BFC = 733, BFI = 734, BICri = 735, BICrr = 736, BICrsi = 737, BICrsr = 738, BKPT = 739, BL = 740, BLX = 741, BLX_pred = 742, BLXi = 743, BL_pred = 744, BX = 745, BXJ = 746, BX_RET = 747, BX_pred = 748, Bcc = 749, CDE_CX1 = 750, CDE_CX1A = 751, CDE_CX1D = 752, CDE_CX1DA = 753, CDE_CX2 = 754, CDE_CX2A = 755, CDE_CX2D = 756, CDE_CX2DA = 757, CDE_CX3 = 758, CDE_CX3A = 759, CDE_CX3D = 760, CDE_CX3DA = 761, CDE_VCX1A_fpdp = 762, CDE_VCX1A_fpsp = 763, CDE_VCX1A_vec = 764, CDE_VCX1_fpdp = 765, CDE_VCX1_fpsp = 766, CDE_VCX1_vec = 767, CDE_VCX2A_fpdp = 768, CDE_VCX2A_fpsp = 769, CDE_VCX2A_vec = 770, CDE_VCX2_fpdp = 771, CDE_VCX2_fpsp = 772, CDE_VCX2_vec = 773, CDE_VCX3A_fpdp = 774, CDE_VCX3A_fpsp = 775, CDE_VCX3A_vec = 776, CDE_VCX3_fpdp = 777, CDE_VCX3_fpsp = 778, CDE_VCX3_vec = 779, CDP = 780, CDP2 = 781, CLREX = 782, CLZ = 783, CMNri = 784, CMNzrr = 785, CMNzrsi = 786, CMNzrsr = 787, CMPri = 788, CMPrr = 789, CMPrsi = 790, CMPrsr = 791, CPS1p = 792, CPS2p = 793, CPS3p = 794, CRC32B = 795, CRC32CB = 796, CRC32CH = 797, CRC32CW = 798, CRC32H = 799, CRC32W = 800, DBG = 801, DMB = 802, DSB = 803, EORri = 804, EORrr = 805, EORrsi = 806, EORrsr = 807, ERET = 808, FCONSTD = 809, FCONSTH = 810, FCONSTS = 811, FLDMXDB_UPD = 812, FLDMXIA = 813, FLDMXIA_UPD = 814, FMSTAT = 815, FSTMXDB_UPD = 816, FSTMXIA = 817, FSTMXIA_UPD = 818, HINT = 819, HLT = 820, HVC = 821, ISB = 822, LDA = 823, LDAB = 824, LDAEX = 825, LDAEXB = 826, LDAEXD = 827, LDAEXH = 828, LDAH = 829, LDC2L_OFFSET = 830, LDC2L_OPTION = 831, LDC2L_POST = 832, LDC2L_PRE = 833, LDC2_OFFSET = 834, LDC2_OPTION = 835, LDC2_POST = 836, LDC2_PRE = 837, LDCL_OFFSET = 838, LDCL_OPTION = 839, LDCL_POST = 840, LDCL_PRE = 841, LDC_OFFSET = 842, LDC_OPTION = 843, LDC_POST = 844, LDC_PRE = 845, LDMDA = 846, LDMDA_UPD = 847, LDMDB = 848, LDMDB_UPD = 849, LDMIA = 850, LDMIA_UPD = 851, LDMIB = 852, LDMIB_UPD = 853, LDRBT_POST_IMM = 854, LDRBT_POST_REG = 855, LDRB_POST_IMM = 856, LDRB_POST_REG = 857, LDRB_PRE_IMM = 858, LDRB_PRE_REG = 859, LDRBi12 = 860, LDRBrs = 861, LDRD = 862, LDRD_POST = 863, LDRD_PRE = 864, LDREX = 865, LDREXB = 866, LDREXD = 867, LDREXH = 868, LDRH = 869, LDRHTi = 870, LDRHTr = 871, LDRH_POST = 872, LDRH_PRE = 873, LDRSB = 874, LDRSBTi = 875, LDRSBTr = 876, LDRSB_POST = 877, LDRSB_PRE = 878, LDRSH = 879, LDRSHTi = 880, LDRSHTr = 881, LDRSH_POST = 882, LDRSH_PRE = 883, LDRT_POST_IMM = 884, LDRT_POST_REG = 885, LDR_POST_IMM = 886, LDR_POST_REG = 887, LDR_PRE_IMM = 888, LDR_PRE_REG = 889, LDRcp = 890, LDRi12 = 891, LDRrs = 892, MCR = 893, MCR2 = 894, MCRR = 895, MCRR2 = 896, MLA = 897, MLS = 898, MOVPCLR = 899, MOVTi16 = 900, MOVi = 901, MOVi16 = 902, MOVr = 903, MOVr_TC = 904, MOVsi = 905, MOVsr = 906, MRC = 907, MRC2 = 908, MRRC = 909, MRRC2 = 910, MRS = 911, MRSbanked = 912, MRSsys = 913, MSR = 914, MSRbanked = 915, MSRi = 916, MUL = 917, MVE_ASRLi = 918, MVE_ASRLr = 919, MVE_DLSTP_16 = 920, MVE_DLSTP_32 = 921, MVE_DLSTP_64 = 922, MVE_DLSTP_8 = 923, MVE_LCTP = 924, MVE_LETP = 925, MVE_LSLLi = 926, MVE_LSLLr = 927, MVE_LSRL = 928, MVE_SQRSHR = 929, MVE_SQRSHRL = 930, MVE_SQSHL = 931, MVE_SQSHLL = 932, MVE_SRSHR = 933, MVE_SRSHRL = 934, MVE_UQRSHL = 935, MVE_UQRSHLL = 936, MVE_UQSHL = 937, MVE_UQSHLL = 938, MVE_URSHR = 939, MVE_URSHRL = 940, MVE_VABAVs16 = 941, MVE_VABAVs32 = 942, MVE_VABAVs8 = 943, MVE_VABAVu16 = 944, MVE_VABAVu32 = 945, MVE_VABAVu8 = 946, MVE_VABDf16 = 947, MVE_VABDf32 = 948, MVE_VABDs16 = 949, MVE_VABDs32 = 950, MVE_VABDs8 = 951, MVE_VABDu16 = 952, MVE_VABDu32 = 953, MVE_VABDu8 = 954, MVE_VABSf16 = 955, MVE_VABSf32 = 956, MVE_VABSs16 = 957, MVE_VABSs32 = 958, MVE_VABSs8 = 959, MVE_VADC = 960, MVE_VADCI = 961, MVE_VADDLVs32acc = 962, MVE_VADDLVs32no_acc = 963, MVE_VADDLVu32acc = 964, MVE_VADDLVu32no_acc = 965, MVE_VADDVs16acc = 966, MVE_VADDVs16no_acc = 967, MVE_VADDVs32acc = 968, MVE_VADDVs32no_acc = 969, MVE_VADDVs8acc = 970, MVE_VADDVs8no_acc = 971, MVE_VADDVu16acc = 972, MVE_VADDVu16no_acc = 973, MVE_VADDVu32acc = 974, MVE_VADDVu32no_acc = 975, MVE_VADDVu8acc = 976, MVE_VADDVu8no_acc = 977, MVE_VADD_qr_f16 = 978, MVE_VADD_qr_f32 = 979, MVE_VADD_qr_i16 = 980, MVE_VADD_qr_i32 = 981, MVE_VADD_qr_i8 = 982, MVE_VADDf16 = 983, MVE_VADDf32 = 984, MVE_VADDi16 = 985, MVE_VADDi32 = 986, MVE_VADDi8 = 987, MVE_VAND = 988, MVE_VBIC = 989, MVE_VBICimmi16 = 990, MVE_VBICimmi32 = 991, MVE_VBRSR16 = 992, MVE_VBRSR32 = 993, MVE_VBRSR8 = 994, MVE_VCADDf16 = 995, MVE_VCADDf32 = 996, MVE_VCADDi16 = 997, MVE_VCADDi32 = 998, MVE_VCADDi8 = 999, MVE_VCLSs16 = 1000, MVE_VCLSs32 = 1001, MVE_VCLSs8 = 1002, MVE_VCLZs16 = 1003, MVE_VCLZs32 = 1004, MVE_VCLZs8 = 1005, MVE_VCMLAf16 = 1006, MVE_VCMLAf32 = 1007, MVE_VCMPf16 = 1008, MVE_VCMPf16r = 1009, MVE_VCMPf32 = 1010, MVE_VCMPf32r = 1011, MVE_VCMPi16 = 1012, MVE_VCMPi16r = 1013, MVE_VCMPi32 = 1014, MVE_VCMPi32r = 1015, MVE_VCMPi8 = 1016, MVE_VCMPi8r = 1017, MVE_VCMPs16 = 1018, MVE_VCMPs16r = 1019, MVE_VCMPs32 = 1020, MVE_VCMPs32r = 1021, MVE_VCMPs8 = 1022, MVE_VCMPs8r = 1023, MVE_VCMPu16 = 1024, MVE_VCMPu16r = 1025, MVE_VCMPu32 = 1026, MVE_VCMPu32r = 1027, MVE_VCMPu8 = 1028, MVE_VCMPu8r = 1029, MVE_VCMULf16 = 1030, MVE_VCMULf32 = 1031, MVE_VCTP16 = 1032, MVE_VCTP32 = 1033, MVE_VCTP64 = 1034, MVE_VCTP8 = 1035, MVE_VCVTf16f32bh = 1036, MVE_VCVTf16f32th = 1037, MVE_VCVTf16s16_fix = 1038, MVE_VCVTf16s16n = 1039, MVE_VCVTf16u16_fix = 1040, MVE_VCVTf16u16n = 1041, MVE_VCVTf32f16bh = 1042, MVE_VCVTf32f16th = 1043, MVE_VCVTf32s32_fix = 1044, MVE_VCVTf32s32n = 1045, MVE_VCVTf32u32_fix = 1046, MVE_VCVTf32u32n = 1047, MVE_VCVTs16f16_fix = 1048, MVE_VCVTs16f16a = 1049, MVE_VCVTs16f16m = 1050, MVE_VCVTs16f16n = 1051, MVE_VCVTs16f16p = 1052, MVE_VCVTs16f16z = 1053, MVE_VCVTs32f32_fix = 1054, MVE_VCVTs32f32a = 1055, MVE_VCVTs32f32m = 1056, MVE_VCVTs32f32n = 1057, MVE_VCVTs32f32p = 1058, MVE_VCVTs32f32z = 1059, MVE_VCVTu16f16_fix = 1060, MVE_VCVTu16f16a = 1061, MVE_VCVTu16f16m = 1062, MVE_VCVTu16f16n = 1063, MVE_VCVTu16f16p = 1064, MVE_VCVTu16f16z = 1065, MVE_VCVTu32f32_fix = 1066, MVE_VCVTu32f32a = 1067, MVE_VCVTu32f32m = 1068, MVE_VCVTu32f32n = 1069, MVE_VCVTu32f32p = 1070, MVE_VCVTu32f32z = 1071, MVE_VDDUPu16 = 1072, MVE_VDDUPu32 = 1073, MVE_VDDUPu8 = 1074, MVE_VDUP16 = 1075, MVE_VDUP32 = 1076, MVE_VDUP8 = 1077, MVE_VDWDUPu16 = 1078, MVE_VDWDUPu32 = 1079, MVE_VDWDUPu8 = 1080, MVE_VEOR = 1081, MVE_VFMA_qr_Sf16 = 1082, MVE_VFMA_qr_Sf32 = 1083, MVE_VFMA_qr_f16 = 1084, MVE_VFMA_qr_f32 = 1085, MVE_VFMAf16 = 1086, MVE_VFMAf32 = 1087, MVE_VFMSf16 = 1088, MVE_VFMSf32 = 1089, MVE_VHADD_qr_s16 = 1090, MVE_VHADD_qr_s32 = 1091, MVE_VHADD_qr_s8 = 1092, MVE_VHADD_qr_u16 = 1093, MVE_VHADD_qr_u32 = 1094, MVE_VHADD_qr_u8 = 1095, MVE_VHADDs16 = 1096, MVE_VHADDs32 = 1097, MVE_VHADDs8 = 1098, MVE_VHADDu16 = 1099, MVE_VHADDu32 = 1100, MVE_VHADDu8 = 1101, MVE_VHCADDs16 = 1102, MVE_VHCADDs32 = 1103, MVE_VHCADDs8 = 1104, MVE_VHSUB_qr_s16 = 1105, MVE_VHSUB_qr_s32 = 1106, MVE_VHSUB_qr_s8 = 1107, MVE_VHSUB_qr_u16 = 1108, MVE_VHSUB_qr_u32 = 1109, MVE_VHSUB_qr_u8 = 1110, MVE_VHSUBs16 = 1111, MVE_VHSUBs32 = 1112, MVE_VHSUBs8 = 1113, MVE_VHSUBu16 = 1114, MVE_VHSUBu32 = 1115, MVE_VHSUBu8 = 1116, MVE_VIDUPu16 = 1117, MVE_VIDUPu32 = 1118, MVE_VIDUPu8 = 1119, MVE_VIWDUPu16 = 1120, MVE_VIWDUPu32 = 1121, MVE_VIWDUPu8 = 1122, MVE_VLD20_16 = 1123, MVE_VLD20_16_wb = 1124, MVE_VLD20_32 = 1125, MVE_VLD20_32_wb = 1126, MVE_VLD20_8 = 1127, MVE_VLD20_8_wb = 1128, MVE_VLD21_16 = 1129, MVE_VLD21_16_wb = 1130, MVE_VLD21_32 = 1131, MVE_VLD21_32_wb = 1132, MVE_VLD21_8 = 1133, MVE_VLD21_8_wb = 1134, MVE_VLD40_16 = 1135, MVE_VLD40_16_wb = 1136, MVE_VLD40_32 = 1137, MVE_VLD40_32_wb = 1138, MVE_VLD40_8 = 1139, MVE_VLD40_8_wb = 1140, MVE_VLD41_16 = 1141, MVE_VLD41_16_wb = 1142, MVE_VLD41_32 = 1143, MVE_VLD41_32_wb = 1144, MVE_VLD41_8 = 1145, MVE_VLD41_8_wb = 1146, MVE_VLD42_16 = 1147, MVE_VLD42_16_wb = 1148, MVE_VLD42_32 = 1149, MVE_VLD42_32_wb = 1150, MVE_VLD42_8 = 1151, MVE_VLD42_8_wb = 1152, MVE_VLD43_16 = 1153, MVE_VLD43_16_wb = 1154, MVE_VLD43_32 = 1155, MVE_VLD43_32_wb = 1156, MVE_VLD43_8 = 1157, MVE_VLD43_8_wb = 1158, MVE_VLDRBS16 = 1159, MVE_VLDRBS16_post = 1160, MVE_VLDRBS16_pre = 1161, MVE_VLDRBS16_rq = 1162, MVE_VLDRBS32 = 1163, MVE_VLDRBS32_post = 1164, MVE_VLDRBS32_pre = 1165, MVE_VLDRBS32_rq = 1166, MVE_VLDRBU16 = 1167, MVE_VLDRBU16_post = 1168, MVE_VLDRBU16_pre = 1169, MVE_VLDRBU16_rq = 1170, MVE_VLDRBU32 = 1171, MVE_VLDRBU32_post = 1172, MVE_VLDRBU32_pre = 1173, MVE_VLDRBU32_rq = 1174, MVE_VLDRBU8 = 1175, MVE_VLDRBU8_post = 1176, MVE_VLDRBU8_pre = 1177, MVE_VLDRBU8_rq = 1178, MVE_VLDRDU64_qi = 1179, MVE_VLDRDU64_qi_pre = 1180, MVE_VLDRDU64_rq = 1181, MVE_VLDRDU64_rq_u = 1182, MVE_VLDRHS32 = 1183, MVE_VLDRHS32_post = 1184, MVE_VLDRHS32_pre = 1185, MVE_VLDRHS32_rq = 1186, MVE_VLDRHS32_rq_u = 1187, MVE_VLDRHU16 = 1188, MVE_VLDRHU16_post = 1189, MVE_VLDRHU16_pre = 1190, MVE_VLDRHU16_rq = 1191, MVE_VLDRHU16_rq_u = 1192, MVE_VLDRHU32 = 1193, MVE_VLDRHU32_post = 1194, MVE_VLDRHU32_pre = 1195, MVE_VLDRHU32_rq = 1196, MVE_VLDRHU32_rq_u = 1197, MVE_VLDRWU32 = 1198, MVE_VLDRWU32_post = 1199, MVE_VLDRWU32_pre = 1200, MVE_VLDRWU32_qi = 1201, MVE_VLDRWU32_qi_pre = 1202, MVE_VLDRWU32_rq = 1203, MVE_VLDRWU32_rq_u = 1204, MVE_VMAXAVs16 = 1205, MVE_VMAXAVs32 = 1206, MVE_VMAXAVs8 = 1207, MVE_VMAXAs16 = 1208, MVE_VMAXAs32 = 1209, MVE_VMAXAs8 = 1210, MVE_VMAXNMAVf16 = 1211, MVE_VMAXNMAVf32 = 1212, MVE_VMAXNMAf16 = 1213, MVE_VMAXNMAf32 = 1214, MVE_VMAXNMVf16 = 1215, MVE_VMAXNMVf32 = 1216, MVE_VMAXNMf16 = 1217, MVE_VMAXNMf32 = 1218, MVE_VMAXVs16 = 1219, MVE_VMAXVs32 = 1220, MVE_VMAXVs8 = 1221, MVE_VMAXVu16 = 1222, MVE_VMAXVu32 = 1223, MVE_VMAXVu8 = 1224, MVE_VMAXs16 = 1225, MVE_VMAXs32 = 1226, MVE_VMAXs8 = 1227, MVE_VMAXu16 = 1228, MVE_VMAXu32 = 1229, MVE_VMAXu8 = 1230, MVE_VMINAVs16 = 1231, MVE_VMINAVs32 = 1232, MVE_VMINAVs8 = 1233, MVE_VMINAs16 = 1234, MVE_VMINAs32 = 1235, MVE_VMINAs8 = 1236, MVE_VMINNMAVf16 = 1237, MVE_VMINNMAVf32 = 1238, MVE_VMINNMAf16 = 1239, MVE_VMINNMAf32 = 1240, MVE_VMINNMVf16 = 1241, MVE_VMINNMVf32 = 1242, MVE_VMINNMf16 = 1243, MVE_VMINNMf32 = 1244, MVE_VMINVs16 = 1245, MVE_VMINVs32 = 1246, MVE_VMINVs8 = 1247, MVE_VMINVu16 = 1248, MVE_VMINVu32 = 1249, MVE_VMINVu8 = 1250, MVE_VMINs16 = 1251, MVE_VMINs32 = 1252, MVE_VMINs8 = 1253, MVE_VMINu16 = 1254, MVE_VMINu32 = 1255, MVE_VMINu8 = 1256, MVE_VMLADAVas16 = 1257, MVE_VMLADAVas32 = 1258, MVE_VMLADAVas8 = 1259, MVE_VMLADAVau16 = 1260, MVE_VMLADAVau32 = 1261, MVE_VMLADAVau8 = 1262, MVE_VMLADAVaxs16 = 1263, MVE_VMLADAVaxs32 = 1264, MVE_VMLADAVaxs8 = 1265, MVE_VMLADAVs16 = 1266, MVE_VMLADAVs32 = 1267, MVE_VMLADAVs8 = 1268, MVE_VMLADAVu16 = 1269, MVE_VMLADAVu32 = 1270, MVE_VMLADAVu8 = 1271, MVE_VMLADAVxs16 = 1272, MVE_VMLADAVxs32 = 1273, MVE_VMLADAVxs8 = 1274, MVE_VMLALDAVas16 = 1275, MVE_VMLALDAVas32 = 1276, MVE_VMLALDAVau16 = 1277, MVE_VMLALDAVau32 = 1278, MVE_VMLALDAVaxs16 = 1279, MVE_VMLALDAVaxs32 = 1280, MVE_VMLALDAVs16 = 1281, MVE_VMLALDAVs32 = 1282, MVE_VMLALDAVu16 = 1283, MVE_VMLALDAVu32 = 1284, MVE_VMLALDAVxs16 = 1285, MVE_VMLALDAVxs32 = 1286, MVE_VMLAS_qr_i16 = 1287, MVE_VMLAS_qr_i32 = 1288, MVE_VMLAS_qr_i8 = 1289, MVE_VMLA_qr_i16 = 1290, MVE_VMLA_qr_i32 = 1291, MVE_VMLA_qr_i8 = 1292, MVE_VMLSDAVas16 = 1293, MVE_VMLSDAVas32 = 1294, MVE_VMLSDAVas8 = 1295, MVE_VMLSDAVaxs16 = 1296, MVE_VMLSDAVaxs32 = 1297, MVE_VMLSDAVaxs8 = 1298, MVE_VMLSDAVs16 = 1299, MVE_VMLSDAVs32 = 1300, MVE_VMLSDAVs8 = 1301, MVE_VMLSDAVxs16 = 1302, MVE_VMLSDAVxs32 = 1303, MVE_VMLSDAVxs8 = 1304, MVE_VMLSLDAVas16 = 1305, MVE_VMLSLDAVas32 = 1306, MVE_VMLSLDAVaxs16 = 1307, MVE_VMLSLDAVaxs32 = 1308, MVE_VMLSLDAVs16 = 1309, MVE_VMLSLDAVs32 = 1310, MVE_VMLSLDAVxs16 = 1311, MVE_VMLSLDAVxs32 = 1312, MVE_VMOVLs16bh = 1313, MVE_VMOVLs16th = 1314, MVE_VMOVLs8bh = 1315, MVE_VMOVLs8th = 1316, MVE_VMOVLu16bh = 1317, MVE_VMOVLu16th = 1318, MVE_VMOVLu8bh = 1319, MVE_VMOVLu8th = 1320, MVE_VMOVNi16bh = 1321, MVE_VMOVNi16th = 1322, MVE_VMOVNi32bh = 1323, MVE_VMOVNi32th = 1324, MVE_VMOV_from_lane_32 = 1325, MVE_VMOV_from_lane_s16 = 1326, MVE_VMOV_from_lane_s8 = 1327, MVE_VMOV_from_lane_u16 = 1328, MVE_VMOV_from_lane_u8 = 1329, MVE_VMOV_q_rr = 1330, MVE_VMOV_rr_q = 1331, MVE_VMOV_to_lane_16 = 1332, MVE_VMOV_to_lane_32 = 1333, MVE_VMOV_to_lane_8 = 1334, MVE_VMOVimmf32 = 1335, MVE_VMOVimmi16 = 1336, MVE_VMOVimmi32 = 1337, MVE_VMOVimmi64 = 1338, MVE_VMOVimmi8 = 1339, MVE_VMULHs16 = 1340, MVE_VMULHs32 = 1341, MVE_VMULHs8 = 1342, MVE_VMULHu16 = 1343, MVE_VMULHu32 = 1344, MVE_VMULHu8 = 1345, MVE_VMULLBp16 = 1346, MVE_VMULLBp8 = 1347, MVE_VMULLBs16 = 1348, MVE_VMULLBs32 = 1349, MVE_VMULLBs8 = 1350, MVE_VMULLBu16 = 1351, MVE_VMULLBu32 = 1352, MVE_VMULLBu8 = 1353, MVE_VMULLTp16 = 1354, MVE_VMULLTp8 = 1355, MVE_VMULLTs16 = 1356, MVE_VMULLTs32 = 1357, MVE_VMULLTs8 = 1358, MVE_VMULLTu16 = 1359, MVE_VMULLTu32 = 1360, MVE_VMULLTu8 = 1361, MVE_VMUL_qr_f16 = 1362, MVE_VMUL_qr_f32 = 1363, MVE_VMUL_qr_i16 = 1364, MVE_VMUL_qr_i32 = 1365, MVE_VMUL_qr_i8 = 1366, MVE_VMULf16 = 1367, MVE_VMULf32 = 1368, MVE_VMULi16 = 1369, MVE_VMULi32 = 1370, MVE_VMULi8 = 1371, MVE_VMVN = 1372, MVE_VMVNimmi16 = 1373, MVE_VMVNimmi32 = 1374, MVE_VNEGf16 = 1375, MVE_VNEGf32 = 1376, MVE_VNEGs16 = 1377, MVE_VNEGs32 = 1378, MVE_VNEGs8 = 1379, MVE_VORN = 1380, MVE_VORR = 1381, MVE_VORRimmi16 = 1382, MVE_VORRimmi32 = 1383, MVE_VPNOT = 1384, MVE_VPSEL = 1385, MVE_VPST = 1386, MVE_VPTv16i8 = 1387, MVE_VPTv16i8r = 1388, MVE_VPTv16s8 = 1389, MVE_VPTv16s8r = 1390, MVE_VPTv16u8 = 1391, MVE_VPTv16u8r = 1392, MVE_VPTv4f32 = 1393, MVE_VPTv4f32r = 1394, MVE_VPTv4i32 = 1395, MVE_VPTv4i32r = 1396, MVE_VPTv4s32 = 1397, MVE_VPTv4s32r = 1398, MVE_VPTv4u32 = 1399, MVE_VPTv4u32r = 1400, MVE_VPTv8f16 = 1401, MVE_VPTv8f16r = 1402, MVE_VPTv8i16 = 1403, MVE_VPTv8i16r = 1404, MVE_VPTv8s16 = 1405, MVE_VPTv8s16r = 1406, MVE_VPTv8u16 = 1407, MVE_VPTv8u16r = 1408, MVE_VQABSs16 = 1409, MVE_VQABSs32 = 1410, MVE_VQABSs8 = 1411, MVE_VQADD_qr_s16 = 1412, MVE_VQADD_qr_s32 = 1413, MVE_VQADD_qr_s8 = 1414, MVE_VQADD_qr_u16 = 1415, MVE_VQADD_qr_u32 = 1416, MVE_VQADD_qr_u8 = 1417, MVE_VQADDs16 = 1418, MVE_VQADDs32 = 1419, MVE_VQADDs8 = 1420, MVE_VQADDu16 = 1421, MVE_VQADDu32 = 1422, MVE_VQADDu8 = 1423, MVE_VQDMLADHXs16 = 1424, MVE_VQDMLADHXs32 = 1425, MVE_VQDMLADHXs8 = 1426, MVE_VQDMLADHs16 = 1427, MVE_VQDMLADHs32 = 1428, MVE_VQDMLADHs8 = 1429, MVE_VQDMLAH_qrs16 = 1430, MVE_VQDMLAH_qrs32 = 1431, MVE_VQDMLAH_qrs8 = 1432, MVE_VQDMLASH_qrs16 = 1433, MVE_VQDMLASH_qrs32 = 1434, MVE_VQDMLASH_qrs8 = 1435, MVE_VQDMLSDHXs16 = 1436, MVE_VQDMLSDHXs32 = 1437, MVE_VQDMLSDHXs8 = 1438, MVE_VQDMLSDHs16 = 1439, MVE_VQDMLSDHs32 = 1440, MVE_VQDMLSDHs8 = 1441, MVE_VQDMULH_qr_s16 = 1442, MVE_VQDMULH_qr_s32 = 1443, MVE_VQDMULH_qr_s8 = 1444, MVE_VQDMULHi16 = 1445, MVE_VQDMULHi32 = 1446, MVE_VQDMULHi8 = 1447, MVE_VQDMULL_qr_s16bh = 1448, MVE_VQDMULL_qr_s16th = 1449, MVE_VQDMULL_qr_s32bh = 1450, MVE_VQDMULL_qr_s32th = 1451, MVE_VQDMULLs16bh = 1452, MVE_VQDMULLs16th = 1453, MVE_VQDMULLs32bh = 1454, MVE_VQDMULLs32th = 1455, MVE_VQMOVNs16bh = 1456, MVE_VQMOVNs16th = 1457, MVE_VQMOVNs32bh = 1458, MVE_VQMOVNs32th = 1459, MVE_VQMOVNu16bh = 1460, MVE_VQMOVNu16th = 1461, MVE_VQMOVNu32bh = 1462, MVE_VQMOVNu32th = 1463, MVE_VQMOVUNs16bh = 1464, MVE_VQMOVUNs16th = 1465, MVE_VQMOVUNs32bh = 1466, MVE_VQMOVUNs32th = 1467, MVE_VQNEGs16 = 1468, MVE_VQNEGs32 = 1469, MVE_VQNEGs8 = 1470, MVE_VQRDMLADHXs16 = 1471, MVE_VQRDMLADHXs32 = 1472, MVE_VQRDMLADHXs8 = 1473, MVE_VQRDMLADHs16 = 1474, MVE_VQRDMLADHs32 = 1475, MVE_VQRDMLADHs8 = 1476, MVE_VQRDMLAH_qrs16 = 1477, MVE_VQRDMLAH_qrs32 = 1478, MVE_VQRDMLAH_qrs8 = 1479, MVE_VQRDMLASH_qrs16 = 1480, MVE_VQRDMLASH_qrs32 = 1481, MVE_VQRDMLASH_qrs8 = 1482, MVE_VQRDMLSDHXs16 = 1483, MVE_VQRDMLSDHXs32 = 1484, MVE_VQRDMLSDHXs8 = 1485, MVE_VQRDMLSDHs16 = 1486, MVE_VQRDMLSDHs32 = 1487, MVE_VQRDMLSDHs8 = 1488, MVE_VQRDMULH_qr_s16 = 1489, MVE_VQRDMULH_qr_s32 = 1490, MVE_VQRDMULH_qr_s8 = 1491, MVE_VQRDMULHi16 = 1492, MVE_VQRDMULHi32 = 1493, MVE_VQRDMULHi8 = 1494, MVE_VQRSHL_by_vecs16 = 1495, MVE_VQRSHL_by_vecs32 = 1496, MVE_VQRSHL_by_vecs8 = 1497, MVE_VQRSHL_by_vecu16 = 1498, MVE_VQRSHL_by_vecu32 = 1499, MVE_VQRSHL_by_vecu8 = 1500, MVE_VQRSHL_qrs16 = 1501, MVE_VQRSHL_qrs32 = 1502, MVE_VQRSHL_qrs8 = 1503, MVE_VQRSHL_qru16 = 1504, MVE_VQRSHL_qru32 = 1505, MVE_VQRSHL_qru8 = 1506, MVE_VQRSHRNbhs16 = 1507, MVE_VQRSHRNbhs32 = 1508, MVE_VQRSHRNbhu16 = 1509, MVE_VQRSHRNbhu32 = 1510, MVE_VQRSHRNths16 = 1511, MVE_VQRSHRNths32 = 1512, MVE_VQRSHRNthu16 = 1513, MVE_VQRSHRNthu32 = 1514, MVE_VQRSHRUNs16bh = 1515, MVE_VQRSHRUNs16th = 1516, MVE_VQRSHRUNs32bh = 1517, MVE_VQRSHRUNs32th = 1518, MVE_VQSHLU_imms16 = 1519, MVE_VQSHLU_imms32 = 1520, MVE_VQSHLU_imms8 = 1521, MVE_VQSHL_by_vecs16 = 1522, MVE_VQSHL_by_vecs32 = 1523, MVE_VQSHL_by_vecs8 = 1524, MVE_VQSHL_by_vecu16 = 1525, MVE_VQSHL_by_vecu32 = 1526, MVE_VQSHL_by_vecu8 = 1527, MVE_VQSHL_qrs16 = 1528, MVE_VQSHL_qrs32 = 1529, MVE_VQSHL_qrs8 = 1530, MVE_VQSHL_qru16 = 1531, MVE_VQSHL_qru32 = 1532, MVE_VQSHL_qru8 = 1533, MVE_VQSHLimms16 = 1534, MVE_VQSHLimms32 = 1535, MVE_VQSHLimms8 = 1536, MVE_VQSHLimmu16 = 1537, MVE_VQSHLimmu32 = 1538, MVE_VQSHLimmu8 = 1539, MVE_VQSHRNbhs16 = 1540, MVE_VQSHRNbhs32 = 1541, MVE_VQSHRNbhu16 = 1542, MVE_VQSHRNbhu32 = 1543, MVE_VQSHRNths16 = 1544, MVE_VQSHRNths32 = 1545, MVE_VQSHRNthu16 = 1546, MVE_VQSHRNthu32 = 1547, MVE_VQSHRUNs16bh = 1548, MVE_VQSHRUNs16th = 1549, MVE_VQSHRUNs32bh = 1550, MVE_VQSHRUNs32th = 1551, MVE_VQSUB_qr_s16 = 1552, MVE_VQSUB_qr_s32 = 1553, MVE_VQSUB_qr_s8 = 1554, MVE_VQSUB_qr_u16 = 1555, MVE_VQSUB_qr_u32 = 1556, MVE_VQSUB_qr_u8 = 1557, MVE_VQSUBs16 = 1558, MVE_VQSUBs32 = 1559, MVE_VQSUBs8 = 1560, MVE_VQSUBu16 = 1561, MVE_VQSUBu32 = 1562, MVE_VQSUBu8 = 1563, MVE_VREV16_8 = 1564, MVE_VREV32_16 = 1565, MVE_VREV32_8 = 1566, MVE_VREV64_16 = 1567, MVE_VREV64_32 = 1568, MVE_VREV64_8 = 1569, MVE_VRHADDs16 = 1570, MVE_VRHADDs32 = 1571, MVE_VRHADDs8 = 1572, MVE_VRHADDu16 = 1573, MVE_VRHADDu32 = 1574, MVE_VRHADDu8 = 1575, MVE_VRINTf16A = 1576, MVE_VRINTf16M = 1577, MVE_VRINTf16N = 1578, MVE_VRINTf16P = 1579, MVE_VRINTf16X = 1580, MVE_VRINTf16Z = 1581, MVE_VRINTf32A = 1582, MVE_VRINTf32M = 1583, MVE_VRINTf32N = 1584, MVE_VRINTf32P = 1585, MVE_VRINTf32X = 1586, MVE_VRINTf32Z = 1587, MVE_VRMLALDAVHas32 = 1588, MVE_VRMLALDAVHau32 = 1589, MVE_VRMLALDAVHaxs32 = 1590, MVE_VRMLALDAVHs32 = 1591, MVE_VRMLALDAVHu32 = 1592, MVE_VRMLALDAVHxs32 = 1593, MVE_VRMLSLDAVHas32 = 1594, MVE_VRMLSLDAVHaxs32 = 1595, MVE_VRMLSLDAVHs32 = 1596, MVE_VRMLSLDAVHxs32 = 1597, MVE_VRMULHs16 = 1598, MVE_VRMULHs32 = 1599, MVE_VRMULHs8 = 1600, MVE_VRMULHu16 = 1601, MVE_VRMULHu32 = 1602, MVE_VRMULHu8 = 1603, MVE_VRSHL_by_vecs16 = 1604, MVE_VRSHL_by_vecs32 = 1605, MVE_VRSHL_by_vecs8 = 1606, MVE_VRSHL_by_vecu16 = 1607, MVE_VRSHL_by_vecu32 = 1608, MVE_VRSHL_by_vecu8 = 1609, MVE_VRSHL_qrs16 = 1610, MVE_VRSHL_qrs32 = 1611, MVE_VRSHL_qrs8 = 1612, MVE_VRSHL_qru16 = 1613, MVE_VRSHL_qru32 = 1614, MVE_VRSHL_qru8 = 1615, MVE_VRSHRNi16bh = 1616, MVE_VRSHRNi16th = 1617, MVE_VRSHRNi32bh = 1618, MVE_VRSHRNi32th = 1619, MVE_VRSHR_imms16 = 1620, MVE_VRSHR_imms32 = 1621, MVE_VRSHR_imms8 = 1622, MVE_VRSHR_immu16 = 1623, MVE_VRSHR_immu32 = 1624, MVE_VRSHR_immu8 = 1625, MVE_VSBC = 1626, MVE_VSBCI = 1627, MVE_VSHLC = 1628, MVE_VSHLL_imms16bh = 1629, MVE_VSHLL_imms16th = 1630, MVE_VSHLL_imms8bh = 1631, MVE_VSHLL_imms8th = 1632, MVE_VSHLL_immu16bh = 1633, MVE_VSHLL_immu16th = 1634, MVE_VSHLL_immu8bh = 1635, MVE_VSHLL_immu8th = 1636, MVE_VSHLL_lws16bh = 1637, MVE_VSHLL_lws16th = 1638, MVE_VSHLL_lws8bh = 1639, MVE_VSHLL_lws8th = 1640, MVE_VSHLL_lwu16bh = 1641, MVE_VSHLL_lwu16th = 1642, MVE_VSHLL_lwu8bh = 1643, MVE_VSHLL_lwu8th = 1644, MVE_VSHL_by_vecs16 = 1645, MVE_VSHL_by_vecs32 = 1646, MVE_VSHL_by_vecs8 = 1647, MVE_VSHL_by_vecu16 = 1648, MVE_VSHL_by_vecu32 = 1649, MVE_VSHL_by_vecu8 = 1650, MVE_VSHL_immi16 = 1651, MVE_VSHL_immi32 = 1652, MVE_VSHL_immi8 = 1653, MVE_VSHL_qrs16 = 1654, MVE_VSHL_qrs32 = 1655, MVE_VSHL_qrs8 = 1656, MVE_VSHL_qru16 = 1657, MVE_VSHL_qru32 = 1658, MVE_VSHL_qru8 = 1659, MVE_VSHRNi16bh = 1660, MVE_VSHRNi16th = 1661, MVE_VSHRNi32bh = 1662, MVE_VSHRNi32th = 1663, MVE_VSHR_imms16 = 1664, MVE_VSHR_imms32 = 1665, MVE_VSHR_imms8 = 1666, MVE_VSHR_immu16 = 1667, MVE_VSHR_immu32 = 1668, MVE_VSHR_immu8 = 1669, MVE_VSLIimm16 = 1670, MVE_VSLIimm32 = 1671, MVE_VSLIimm8 = 1672, MVE_VSRIimm16 = 1673, MVE_VSRIimm32 = 1674, MVE_VSRIimm8 = 1675, MVE_VST20_16 = 1676, MVE_VST20_16_wb = 1677, MVE_VST20_32 = 1678, MVE_VST20_32_wb = 1679, MVE_VST20_8 = 1680, MVE_VST20_8_wb = 1681, MVE_VST21_16 = 1682, MVE_VST21_16_wb = 1683, MVE_VST21_32 = 1684, MVE_VST21_32_wb = 1685, MVE_VST21_8 = 1686, MVE_VST21_8_wb = 1687, MVE_VST40_16 = 1688, MVE_VST40_16_wb = 1689, MVE_VST40_32 = 1690, MVE_VST40_32_wb = 1691, MVE_VST40_8 = 1692, MVE_VST40_8_wb = 1693, MVE_VST41_16 = 1694, MVE_VST41_16_wb = 1695, MVE_VST41_32 = 1696, MVE_VST41_32_wb = 1697, MVE_VST41_8 = 1698, MVE_VST41_8_wb = 1699, MVE_VST42_16 = 1700, MVE_VST42_16_wb = 1701, MVE_VST42_32 = 1702, MVE_VST42_32_wb = 1703, MVE_VST42_8 = 1704, MVE_VST42_8_wb = 1705, MVE_VST43_16 = 1706, MVE_VST43_16_wb = 1707, MVE_VST43_32 = 1708, MVE_VST43_32_wb = 1709, MVE_VST43_8 = 1710, MVE_VST43_8_wb = 1711, MVE_VSTRB16 = 1712, MVE_VSTRB16_post = 1713, MVE_VSTRB16_pre = 1714, MVE_VSTRB16_rq = 1715, MVE_VSTRB32 = 1716, MVE_VSTRB32_post = 1717, MVE_VSTRB32_pre = 1718, MVE_VSTRB32_rq = 1719, MVE_VSTRB8_rq = 1720, MVE_VSTRBU8 = 1721, MVE_VSTRBU8_post = 1722, MVE_VSTRBU8_pre = 1723, MVE_VSTRD64_qi = 1724, MVE_VSTRD64_qi_pre = 1725, MVE_VSTRD64_rq = 1726, MVE_VSTRD64_rq_u = 1727, MVE_VSTRH16_rq = 1728, MVE_VSTRH16_rq_u = 1729, MVE_VSTRH32 = 1730, MVE_VSTRH32_post = 1731, MVE_VSTRH32_pre = 1732, MVE_VSTRH32_rq = 1733, MVE_VSTRH32_rq_u = 1734, MVE_VSTRHU16 = 1735, MVE_VSTRHU16_post = 1736, MVE_VSTRHU16_pre = 1737, MVE_VSTRW32_qi = 1738, MVE_VSTRW32_qi_pre = 1739, MVE_VSTRW32_rq = 1740, MVE_VSTRW32_rq_u = 1741, MVE_VSTRWU32 = 1742, MVE_VSTRWU32_post = 1743, MVE_VSTRWU32_pre = 1744, MVE_VSUB_qr_f16 = 1745, MVE_VSUB_qr_f32 = 1746, MVE_VSUB_qr_i16 = 1747, MVE_VSUB_qr_i32 = 1748, MVE_VSUB_qr_i8 = 1749, MVE_VSUBf16 = 1750, MVE_VSUBf32 = 1751, MVE_VSUBi16 = 1752, MVE_VSUBi32 = 1753, MVE_VSUBi8 = 1754, MVE_WLSTP_16 = 1755, MVE_WLSTP_32 = 1756, MVE_WLSTP_64 = 1757, MVE_WLSTP_8 = 1758, MVNi = 1759, MVNr = 1760, MVNsi = 1761, MVNsr = 1762, NEON_VMAXNMNDf = 1763, NEON_VMAXNMNDh = 1764, NEON_VMAXNMNQf = 1765, NEON_VMAXNMNQh = 1766, NEON_VMINNMNDf = 1767, NEON_VMINNMNDh = 1768, NEON_VMINNMNQf = 1769, NEON_VMINNMNQh = 1770, ORRri = 1771, ORRrr = 1772, ORRrsi = 1773, ORRrsr = 1774, PKHBT = 1775, PKHTB = 1776, PLDWi12 = 1777, PLDWrs = 1778, PLDi12 = 1779, PLDrs = 1780, PLIi12 = 1781, PLIrs = 1782, QADD = 1783, QADD16 = 1784, QADD8 = 1785, QASX = 1786, QDADD = 1787, QDSUB = 1788, QSAX = 1789, QSUB = 1790, QSUB16 = 1791, QSUB8 = 1792, RBIT = 1793, REV = 1794, REV16 = 1795, REVSH = 1796, RFEDA = 1797, RFEDA_UPD = 1798, RFEDB = 1799, RFEDB_UPD = 1800, RFEIA = 1801, RFEIA_UPD = 1802, RFEIB = 1803, RFEIB_UPD = 1804, RSBri = 1805, RSBrr = 1806, RSBrsi = 1807, RSBrsr = 1808, RSCri = 1809, RSCrr = 1810, RSCrsi = 1811, RSCrsr = 1812, SADD16 = 1813, SADD8 = 1814, SASX = 1815, SB = 1816, SBCri = 1817, SBCrr = 1818, SBCrsi = 1819, SBCrsr = 1820, SBFX = 1821, SDIV = 1822, SEL = 1823, SETEND = 1824, SETPAN = 1825, SHA1C = 1826, SHA1H = 1827, SHA1M = 1828, SHA1P = 1829, SHA1SU0 = 1830, SHA1SU1 = 1831, SHA256H = 1832, SHA256H2 = 1833, SHA256SU0 = 1834, SHA256SU1 = 1835, SHADD16 = 1836, SHADD8 = 1837, SHASX = 1838, SHSAX = 1839, SHSUB16 = 1840, SHSUB8 = 1841, SMC = 1842, SMLABB = 1843, SMLABT = 1844, SMLAD = 1845, SMLADX = 1846, SMLAL = 1847, SMLALBB = 1848, SMLALBT = 1849, SMLALD = 1850, SMLALDX = 1851, SMLALTB = 1852, SMLALTT = 1853, SMLATB = 1854, SMLATT = 1855, SMLAWB = 1856, SMLAWT = 1857, SMLSD = 1858, SMLSDX = 1859, SMLSLD = 1860, SMLSLDX = 1861, SMMLA = 1862, SMMLAR = 1863, SMMLS = 1864, SMMLSR = 1865, SMMUL = 1866, SMMULR = 1867, SMUAD = 1868, SMUADX = 1869, SMULBB = 1870, SMULBT = 1871, SMULL = 1872, SMULTB = 1873, SMULTT = 1874, SMULWB = 1875, SMULWT = 1876, SMUSD = 1877, SMUSDX = 1878, SRSDA = 1879, SRSDA_UPD = 1880, SRSDB = 1881, SRSDB_UPD = 1882, SRSIA = 1883, SRSIA_UPD = 1884, SRSIB = 1885, SRSIB_UPD = 1886, SSAT = 1887, SSAT16 = 1888, SSAX = 1889, SSUB16 = 1890, SSUB8 = 1891, STC2L_OFFSET = 1892, STC2L_OPTION = 1893, STC2L_POST = 1894, STC2L_PRE = 1895, STC2_OFFSET = 1896, STC2_OPTION = 1897, STC2_POST = 1898, STC2_PRE = 1899, STCL_OFFSET = 1900, STCL_OPTION = 1901, STCL_POST = 1902, STCL_PRE = 1903, STC_OFFSET = 1904, STC_OPTION = 1905, STC_POST = 1906, STC_PRE = 1907, STL = 1908, STLB = 1909, STLEX = 1910, STLEXB = 1911, STLEXD = 1912, STLEXH = 1913, STLH = 1914, STMDA = 1915, STMDA_UPD = 1916, STMDB = 1917, STMDB_UPD = 1918, STMIA = 1919, STMIA_UPD = 1920, STMIB = 1921, STMIB_UPD = 1922, STRBT_POST_IMM = 1923, STRBT_POST_REG = 1924, STRB_POST_IMM = 1925, STRB_POST_REG = 1926, STRB_PRE_IMM = 1927, STRB_PRE_REG = 1928, STRBi12 = 1929, STRBrs = 1930, STRD = 1931, STRD_POST = 1932, STRD_PRE = 1933, STREX = 1934, STREXB = 1935, STREXD = 1936, STREXH = 1937, STRH = 1938, STRHTi = 1939, STRHTr = 1940, STRH_POST = 1941, STRH_PRE = 1942, STRT_POST_IMM = 1943, STRT_POST_REG = 1944, STR_POST_IMM = 1945, STR_POST_REG = 1946, STR_PRE_IMM = 1947, STR_PRE_REG = 1948, STRi12 = 1949, STRrs = 1950, SUBri = 1951, SUBrr = 1952, SUBrsi = 1953, SUBrsr = 1954, SVC = 1955, SWP = 1956, SWPB = 1957, SXTAB = 1958, SXTAB16 = 1959, SXTAH = 1960, SXTB = 1961, SXTB16 = 1962, SXTH = 1963, TEQri = 1964, TEQrr = 1965, TEQrsi = 1966, TEQrsr = 1967, TRAP = 1968, TRAPNaCl = 1969, TSB = 1970, TSTri = 1971, TSTrr = 1972, TSTrsi = 1973, TSTrsr = 1974, UADD16 = 1975, UADD8 = 1976, UASX = 1977, UBFX = 1978, UDF = 1979, UDIV = 1980, UHADD16 = 1981, UHADD8 = 1982, UHASX = 1983, UHSAX = 1984, UHSUB16 = 1985, UHSUB8 = 1986, UMAAL = 1987, UMLAL = 1988, UMULL = 1989, UQADD16 = 1990, UQADD8 = 1991, UQASX = 1992, UQSAX = 1993, UQSUB16 = 1994, UQSUB8 = 1995, USAD8 = 1996, USADA8 = 1997, USAT = 1998, USAT16 = 1999, USAX = 2000, USUB16 = 2001, USUB8 = 2002, UXTAB = 2003, UXTAB16 = 2004, UXTAH = 2005, UXTB = 2006, UXTB16 = 2007, UXTH = 2008, VABALsv2i64 = 2009, VABALsv4i32 = 2010, VABALsv8i16 = 2011, VABALuv2i64 = 2012, VABALuv4i32 = 2013, VABALuv8i16 = 2014, VABAsv16i8 = 2015, VABAsv2i32 = 2016, VABAsv4i16 = 2017, VABAsv4i32 = 2018, VABAsv8i16 = 2019, VABAsv8i8 = 2020, VABAuv16i8 = 2021, VABAuv2i32 = 2022, VABAuv4i16 = 2023, VABAuv4i32 = 2024, VABAuv8i16 = 2025, VABAuv8i8 = 2026, VABDLsv2i64 = 2027, VABDLsv4i32 = 2028, VABDLsv8i16 = 2029, VABDLuv2i64 = 2030, VABDLuv4i32 = 2031, VABDLuv8i16 = 2032, VABDfd = 2033, VABDfq = 2034, VABDhd = 2035, VABDhq = 2036, VABDsv16i8 = 2037, VABDsv2i32 = 2038, VABDsv4i16 = 2039, VABDsv4i32 = 2040, VABDsv8i16 = 2041, VABDsv8i8 = 2042, VABDuv16i8 = 2043, VABDuv2i32 = 2044, VABDuv4i16 = 2045, VABDuv4i32 = 2046, VABDuv8i16 = 2047, VABDuv8i8 = 2048, VABSD = 2049, VABSH = 2050, VABSS = 2051, VABSfd = 2052, VABSfq = 2053, VABShd = 2054, VABShq = 2055, VABSv16i8 = 2056, VABSv2i32 = 2057, VABSv4i16 = 2058, VABSv4i32 = 2059, VABSv8i16 = 2060, VABSv8i8 = 2061, VACGEfd = 2062, VACGEfq = 2063, VACGEhd = 2064, VACGEhq = 2065, VACGTfd = 2066, VACGTfq = 2067, VACGThd = 2068, VACGThq = 2069, VADDD = 2070, VADDH = 2071, VADDHNv2i32 = 2072, VADDHNv4i16 = 2073, VADDHNv8i8 = 2074, VADDLsv2i64 = 2075, VADDLsv4i32 = 2076, VADDLsv8i16 = 2077, VADDLuv2i64 = 2078, VADDLuv4i32 = 2079, VADDLuv8i16 = 2080, VADDS = 2081, VADDWsv2i64 = 2082, VADDWsv4i32 = 2083, VADDWsv8i16 = 2084, VADDWuv2i64 = 2085, VADDWuv4i32 = 2086, VADDWuv8i16 = 2087, VADDfd = 2088, VADDfq = 2089, VADDhd = 2090, VADDhq = 2091, VADDv16i8 = 2092, VADDv1i64 = 2093, VADDv2i32 = 2094, VADDv2i64 = 2095, VADDv4i16 = 2096, VADDv4i32 = 2097, VADDv8i16 = 2098, VADDv8i8 = 2099, VANDd = 2100, VANDq = 2101, VBF16MALBQ = 2102, VBF16MALBQI = 2103, VBF16MALTQ = 2104, VBF16MALTQI = 2105, VBICd = 2106, VBICiv2i32 = 2107, VBICiv4i16 = 2108, VBICiv4i32 = 2109, VBICiv8i16 = 2110, VBICq = 2111, VBIFd = 2112, VBIFq = 2113, VBITd = 2114, VBITq = 2115, VBSLd = 2116, VBSLq = 2117, VBSPd = 2118, VBSPq = 2119, VCADDv2f32 = 2120, VCADDv4f16 = 2121, VCADDv4f32 = 2122, VCADDv8f16 = 2123, VCEQfd = 2124, VCEQfq = 2125, VCEQhd = 2126, VCEQhq = 2127, VCEQv16i8 = 2128, VCEQv2i32 = 2129, VCEQv4i16 = 2130, VCEQv4i32 = 2131, VCEQv8i16 = 2132, VCEQv8i8 = 2133, VCEQzv16i8 = 2134, VCEQzv2f32 = 2135, VCEQzv2i32 = 2136, VCEQzv4f16 = 2137, VCEQzv4f32 = 2138, VCEQzv4i16 = 2139, VCEQzv4i32 = 2140, VCEQzv8f16 = 2141, VCEQzv8i16 = 2142, VCEQzv8i8 = 2143, VCGEfd = 2144, VCGEfq = 2145, VCGEhd = 2146, VCGEhq = 2147, VCGEsv16i8 = 2148, VCGEsv2i32 = 2149, VCGEsv4i16 = 2150, VCGEsv4i32 = 2151, VCGEsv8i16 = 2152, VCGEsv8i8 = 2153, VCGEuv16i8 = 2154, VCGEuv2i32 = 2155, VCGEuv4i16 = 2156, VCGEuv4i32 = 2157, VCGEuv8i16 = 2158, VCGEuv8i8 = 2159, VCGEzv16i8 = 2160, VCGEzv2f32 = 2161, VCGEzv2i32 = 2162, VCGEzv4f16 = 2163, VCGEzv4f32 = 2164, VCGEzv4i16 = 2165, VCGEzv4i32 = 2166, VCGEzv8f16 = 2167, VCGEzv8i16 = 2168, VCGEzv8i8 = 2169, VCGTfd = 2170, VCGTfq = 2171, VCGThd = 2172, VCGThq = 2173, VCGTsv16i8 = 2174, VCGTsv2i32 = 2175, VCGTsv4i16 = 2176, VCGTsv4i32 = 2177, VCGTsv8i16 = 2178, VCGTsv8i8 = 2179, VCGTuv16i8 = 2180, VCGTuv2i32 = 2181, VCGTuv4i16 = 2182, VCGTuv4i32 = 2183, VCGTuv8i16 = 2184, VCGTuv8i8 = 2185, VCGTzv16i8 = 2186, VCGTzv2f32 = 2187, VCGTzv2i32 = 2188, VCGTzv4f16 = 2189, VCGTzv4f32 = 2190, VCGTzv4i16 = 2191, VCGTzv4i32 = 2192, VCGTzv8f16 = 2193, VCGTzv8i16 = 2194, VCGTzv8i8 = 2195, VCLEzv16i8 = 2196, VCLEzv2f32 = 2197, VCLEzv2i32 = 2198, VCLEzv4f16 = 2199, VCLEzv4f32 = 2200, VCLEzv4i16 = 2201, VCLEzv4i32 = 2202, VCLEzv8f16 = 2203, VCLEzv8i16 = 2204, VCLEzv8i8 = 2205, VCLSv16i8 = 2206, VCLSv2i32 = 2207, VCLSv4i16 = 2208, VCLSv4i32 = 2209, VCLSv8i16 = 2210, VCLSv8i8 = 2211, VCLTzv16i8 = 2212, VCLTzv2f32 = 2213, VCLTzv2i32 = 2214, VCLTzv4f16 = 2215, VCLTzv4f32 = 2216, VCLTzv4i16 = 2217, VCLTzv4i32 = 2218, VCLTzv8f16 = 2219, VCLTzv8i16 = 2220, VCLTzv8i8 = 2221, VCLZv16i8 = 2222, VCLZv2i32 = 2223, VCLZv4i16 = 2224, VCLZv4i32 = 2225, VCLZv8i16 = 2226, VCLZv8i8 = 2227, VCMLAv2f32 = 2228, VCMLAv2f32_indexed = 2229, VCMLAv4f16 = 2230, VCMLAv4f16_indexed = 2231, VCMLAv4f32 = 2232, VCMLAv4f32_indexed = 2233, VCMLAv8f16 = 2234, VCMLAv8f16_indexed = 2235, VCMPD = 2236, VCMPED = 2237, VCMPEH = 2238, VCMPES = 2239, VCMPEZD = 2240, VCMPEZH = 2241, VCMPEZS = 2242, VCMPH = 2243, VCMPS = 2244, VCMPZD = 2245, VCMPZH = 2246, VCMPZS = 2247, VCNTd = 2248, VCNTq = 2249, VCVTANSDf = 2250, VCVTANSDh = 2251, VCVTANSQf = 2252, VCVTANSQh = 2253, VCVTANUDf = 2254, VCVTANUDh = 2255, VCVTANUQf = 2256, VCVTANUQh = 2257, VCVTASD = 2258, VCVTASH = 2259, VCVTASS = 2260, VCVTAUD = 2261, VCVTAUH = 2262, VCVTAUS = 2263, VCVTBDH = 2264, VCVTBHD = 2265, VCVTBHS = 2266, VCVTBSH = 2267, VCVTDS = 2268, VCVTMNSDf = 2269, VCVTMNSDh = 2270, VCVTMNSQf = 2271, VCVTMNSQh = 2272, VCVTMNUDf = 2273, VCVTMNUDh = 2274, VCVTMNUQf = 2275, VCVTMNUQh = 2276, VCVTMSD = 2277, VCVTMSH = 2278, VCVTMSS = 2279, VCVTMUD = 2280, VCVTMUH = 2281, VCVTMUS = 2282, VCVTNNSDf = 2283, VCVTNNSDh = 2284, VCVTNNSQf = 2285, VCVTNNSQh = 2286, VCVTNNUDf = 2287, VCVTNNUDh = 2288, VCVTNNUQf = 2289, VCVTNNUQh = 2290, VCVTNSD = 2291, VCVTNSH = 2292, VCVTNSS = 2293, VCVTNUD = 2294, VCVTNUH = 2295, VCVTNUS = 2296, VCVTPNSDf = 2297, VCVTPNSDh = 2298, VCVTPNSQf = 2299, VCVTPNSQh = 2300, VCVTPNUDf = 2301, VCVTPNUDh = 2302, VCVTPNUQf = 2303, VCVTPNUQh = 2304, VCVTPSD = 2305, VCVTPSH = 2306, VCVTPSS = 2307, VCVTPUD = 2308, VCVTPUH = 2309, VCVTPUS = 2310, VCVTSD = 2311, VCVTTDH = 2312, VCVTTHD = 2313, VCVTTHS = 2314, VCVTTSH = 2315, VCVTf2h = 2316, VCVTf2sd = 2317, VCVTf2sq = 2318, VCVTf2ud = 2319, VCVTf2uq = 2320, VCVTf2xsd = 2321, VCVTf2xsq = 2322, VCVTf2xud = 2323, VCVTf2xuq = 2324, VCVTh2f = 2325, VCVTh2sd = 2326, VCVTh2sq = 2327, VCVTh2ud = 2328, VCVTh2uq = 2329, VCVTh2xsd = 2330, VCVTh2xsq = 2331, VCVTh2xud = 2332, VCVTh2xuq = 2333, VCVTs2fd = 2334, VCVTs2fq = 2335, VCVTs2hd = 2336, VCVTs2hq = 2337, VCVTu2fd = 2338, VCVTu2fq = 2339, VCVTu2hd = 2340, VCVTu2hq = 2341, VCVTxs2fd = 2342, VCVTxs2fq = 2343, VCVTxs2hd = 2344, VCVTxs2hq = 2345, VCVTxu2fd = 2346, VCVTxu2fq = 2347, VCVTxu2hd = 2348, VCVTxu2hq = 2349, VDIVD = 2350, VDIVH = 2351, VDIVS = 2352, VDUP16d = 2353, VDUP16q = 2354, VDUP32d = 2355, VDUP32q = 2356, VDUP8d = 2357, VDUP8q = 2358, VDUPLN16d = 2359, VDUPLN16q = 2360, VDUPLN32d = 2361, VDUPLN32q = 2362, VDUPLN8d = 2363, VDUPLN8q = 2364, VEORd = 2365, VEORq = 2366, VEXTd16 = 2367, VEXTd32 = 2368, VEXTd8 = 2369, VEXTq16 = 2370, VEXTq32 = 2371, VEXTq64 = 2372, VEXTq8 = 2373, VFMAD = 2374, VFMAH = 2375, VFMALD = 2376, VFMALDI = 2377, VFMALQ = 2378, VFMALQI = 2379, VFMAS = 2380, VFMAfd = 2381, VFMAfq = 2382, VFMAhd = 2383, VFMAhq = 2384, VFMSD = 2385, VFMSH = 2386, VFMSLD = 2387, VFMSLDI = 2388, VFMSLQ = 2389, VFMSLQI = 2390, VFMSS = 2391, VFMSfd = 2392, VFMSfq = 2393, VFMShd = 2394, VFMShq = 2395, VFNMAD = 2396, VFNMAH = 2397, VFNMAS = 2398, VFNMSD = 2399, VFNMSH = 2400, VFNMSS = 2401, VFP_VMAXNMD = 2402, VFP_VMAXNMH = 2403, VFP_VMAXNMS = 2404, VFP_VMINNMD = 2405, VFP_VMINNMH = 2406, VFP_VMINNMS = 2407, VGETLNi32 = 2408, VGETLNs16 = 2409, VGETLNs8 = 2410, VGETLNu16 = 2411, VGETLNu8 = 2412, VHADDsv16i8 = 2413, VHADDsv2i32 = 2414, VHADDsv4i16 = 2415, VHADDsv4i32 = 2416, VHADDsv8i16 = 2417, VHADDsv8i8 = 2418, VHADDuv16i8 = 2419, VHADDuv2i32 = 2420, VHADDuv4i16 = 2421, VHADDuv4i32 = 2422, VHADDuv8i16 = 2423, VHADDuv8i8 = 2424, VHSUBsv16i8 = 2425, VHSUBsv2i32 = 2426, VHSUBsv4i16 = 2427, VHSUBsv4i32 = 2428, VHSUBsv8i16 = 2429, VHSUBsv8i8 = 2430, VHSUBuv16i8 = 2431, VHSUBuv2i32 = 2432, VHSUBuv4i16 = 2433, VHSUBuv4i32 = 2434, VHSUBuv8i16 = 2435, VHSUBuv8i8 = 2436, VINSH = 2437, VJCVT = 2438, VLD1DUPd16 = 2439, VLD1DUPd16wb_fixed = 2440, VLD1DUPd16wb_register = 2441, VLD1DUPd32 = 2442, VLD1DUPd32wb_fixed = 2443, VLD1DUPd32wb_register = 2444, VLD1DUPd8 = 2445, VLD1DUPd8wb_fixed = 2446, VLD1DUPd8wb_register = 2447, VLD1DUPq16 = 2448, VLD1DUPq16wb_fixed = 2449, VLD1DUPq16wb_register = 2450, VLD1DUPq32 = 2451, VLD1DUPq32wb_fixed = 2452, VLD1DUPq32wb_register = 2453, VLD1DUPq8 = 2454, VLD1DUPq8wb_fixed = 2455, VLD1DUPq8wb_register = 2456, VLD1LNd16 = 2457, VLD1LNd16_UPD = 2458, VLD1LNd32 = 2459, VLD1LNd32_UPD = 2460, VLD1LNd8 = 2461, VLD1LNd8_UPD = 2462, VLD1LNq16Pseudo = 2463, VLD1LNq16Pseudo_UPD = 2464, VLD1LNq32Pseudo = 2465, VLD1LNq32Pseudo_UPD = 2466, VLD1LNq8Pseudo = 2467, VLD1LNq8Pseudo_UPD = 2468, VLD1d16 = 2469, VLD1d16Q = 2470, VLD1d16QPseudo = 2471, VLD1d16QPseudoWB_fixed = 2472, VLD1d16QPseudoWB_register = 2473, VLD1d16Qwb_fixed = 2474, VLD1d16Qwb_register = 2475, VLD1d16T = 2476, VLD1d16TPseudo = 2477, VLD1d16TPseudoWB_fixed = 2478, VLD1d16TPseudoWB_register = 2479, VLD1d16Twb_fixed = 2480, VLD1d16Twb_register = 2481, VLD1d16wb_fixed = 2482, VLD1d16wb_register = 2483, VLD1d32 = 2484, VLD1d32Q = 2485, VLD1d32QPseudo = 2486, VLD1d32QPseudoWB_fixed = 2487, VLD1d32QPseudoWB_register = 2488, VLD1d32Qwb_fixed = 2489, VLD1d32Qwb_register = 2490, VLD1d32T = 2491, VLD1d32TPseudo = 2492, VLD1d32TPseudoWB_fixed = 2493, VLD1d32TPseudoWB_register = 2494, VLD1d32Twb_fixed = 2495, VLD1d32Twb_register = 2496, VLD1d32wb_fixed = 2497, VLD1d32wb_register = 2498, VLD1d64 = 2499, VLD1d64Q = 2500, VLD1d64QPseudo = 2501, VLD1d64QPseudoWB_fixed = 2502, VLD1d64QPseudoWB_register = 2503, VLD1d64Qwb_fixed = 2504, VLD1d64Qwb_register = 2505, VLD1d64T = 2506, VLD1d64TPseudo = 2507, VLD1d64TPseudoWB_fixed = 2508, VLD1d64TPseudoWB_register = 2509, VLD1d64Twb_fixed = 2510, VLD1d64Twb_register = 2511, VLD1d64wb_fixed = 2512, VLD1d64wb_register = 2513, VLD1d8 = 2514, VLD1d8Q = 2515, VLD1d8QPseudo = 2516, VLD1d8QPseudoWB_fixed = 2517, VLD1d8QPseudoWB_register = 2518, VLD1d8Qwb_fixed = 2519, VLD1d8Qwb_register = 2520, VLD1d8T = 2521, VLD1d8TPseudo = 2522, VLD1d8TPseudoWB_fixed = 2523, VLD1d8TPseudoWB_register = 2524, VLD1d8Twb_fixed = 2525, VLD1d8Twb_register = 2526, VLD1d8wb_fixed = 2527, VLD1d8wb_register = 2528, VLD1q16 = 2529, VLD1q16HighQPseudo = 2530, VLD1q16HighQPseudo_UPD = 2531, VLD1q16HighTPseudo = 2532, VLD1q16HighTPseudo_UPD = 2533, VLD1q16LowQPseudo_UPD = 2534, VLD1q16LowTPseudo_UPD = 2535, VLD1q16wb_fixed = 2536, VLD1q16wb_register = 2537, VLD1q32 = 2538, VLD1q32HighQPseudo = 2539, VLD1q32HighQPseudo_UPD = 2540, VLD1q32HighTPseudo = 2541, VLD1q32HighTPseudo_UPD = 2542, VLD1q32LowQPseudo_UPD = 2543, VLD1q32LowTPseudo_UPD = 2544, VLD1q32wb_fixed = 2545, VLD1q32wb_register = 2546, VLD1q64 = 2547, VLD1q64HighQPseudo = 2548, VLD1q64HighQPseudo_UPD = 2549, VLD1q64HighTPseudo = 2550, VLD1q64HighTPseudo_UPD = 2551, VLD1q64LowQPseudo_UPD = 2552, VLD1q64LowTPseudo_UPD = 2553, VLD1q64wb_fixed = 2554, VLD1q64wb_register = 2555, VLD1q8 = 2556, VLD1q8HighQPseudo = 2557, VLD1q8HighQPseudo_UPD = 2558, VLD1q8HighTPseudo = 2559, VLD1q8HighTPseudo_UPD = 2560, VLD1q8LowQPseudo_UPD = 2561, VLD1q8LowTPseudo_UPD = 2562, VLD1q8wb_fixed = 2563, VLD1q8wb_register = 2564, VLD2DUPd16 = 2565, VLD2DUPd16wb_fixed = 2566, VLD2DUPd16wb_register = 2567, VLD2DUPd16x2 = 2568, VLD2DUPd16x2wb_fixed = 2569, VLD2DUPd16x2wb_register = 2570, VLD2DUPd32 = 2571, VLD2DUPd32wb_fixed = 2572, VLD2DUPd32wb_register = 2573, VLD2DUPd32x2 = 2574, VLD2DUPd32x2wb_fixed = 2575, VLD2DUPd32x2wb_register = 2576, VLD2DUPd8 = 2577, VLD2DUPd8wb_fixed = 2578, VLD2DUPd8wb_register = 2579, VLD2DUPd8x2 = 2580, VLD2DUPd8x2wb_fixed = 2581, VLD2DUPd8x2wb_register = 2582, VLD2DUPq16EvenPseudo = 2583, VLD2DUPq16OddPseudo = 2584, VLD2DUPq16OddPseudoWB_fixed = 2585, VLD2DUPq16OddPseudoWB_register = 2586, VLD2DUPq32EvenPseudo = 2587, VLD2DUPq32OddPseudo = 2588, VLD2DUPq32OddPseudoWB_fixed = 2589, VLD2DUPq32OddPseudoWB_register = 2590, VLD2DUPq8EvenPseudo = 2591, VLD2DUPq8OddPseudo = 2592, VLD2DUPq8OddPseudoWB_fixed = 2593, VLD2DUPq8OddPseudoWB_register = 2594, VLD2LNd16 = 2595, VLD2LNd16Pseudo = 2596, VLD2LNd16Pseudo_UPD = 2597, VLD2LNd16_UPD = 2598, VLD2LNd32 = 2599, VLD2LNd32Pseudo = 2600, VLD2LNd32Pseudo_UPD = 2601, VLD2LNd32_UPD = 2602, VLD2LNd8 = 2603, VLD2LNd8Pseudo = 2604, VLD2LNd8Pseudo_UPD = 2605, VLD2LNd8_UPD = 2606, VLD2LNq16 = 2607, VLD2LNq16Pseudo = 2608, VLD2LNq16Pseudo_UPD = 2609, VLD2LNq16_UPD = 2610, VLD2LNq32 = 2611, VLD2LNq32Pseudo = 2612, VLD2LNq32Pseudo_UPD = 2613, VLD2LNq32_UPD = 2614, VLD2b16 = 2615, VLD2b16wb_fixed = 2616, VLD2b16wb_register = 2617, VLD2b32 = 2618, VLD2b32wb_fixed = 2619, VLD2b32wb_register = 2620, VLD2b8 = 2621, VLD2b8wb_fixed = 2622, VLD2b8wb_register = 2623, VLD2d16 = 2624, VLD2d16wb_fixed = 2625, VLD2d16wb_register = 2626, VLD2d32 = 2627, VLD2d32wb_fixed = 2628, VLD2d32wb_register = 2629, VLD2d8 = 2630, VLD2d8wb_fixed = 2631, VLD2d8wb_register = 2632, VLD2q16 = 2633, VLD2q16Pseudo = 2634, VLD2q16PseudoWB_fixed = 2635, VLD2q16PseudoWB_register = 2636, VLD2q16wb_fixed = 2637, VLD2q16wb_register = 2638, VLD2q32 = 2639, VLD2q32Pseudo = 2640, VLD2q32PseudoWB_fixed = 2641, VLD2q32PseudoWB_register = 2642, VLD2q32wb_fixed = 2643, VLD2q32wb_register = 2644, VLD2q8 = 2645, VLD2q8Pseudo = 2646, VLD2q8PseudoWB_fixed = 2647, VLD2q8PseudoWB_register = 2648, VLD2q8wb_fixed = 2649, VLD2q8wb_register = 2650, VLD3DUPd16 = 2651, VLD3DUPd16Pseudo = 2652, VLD3DUPd16Pseudo_UPD = 2653, VLD3DUPd16_UPD = 2654, VLD3DUPd32 = 2655, VLD3DUPd32Pseudo = 2656, VLD3DUPd32Pseudo_UPD = 2657, VLD3DUPd32_UPD = 2658, VLD3DUPd8 = 2659, VLD3DUPd8Pseudo = 2660, VLD3DUPd8Pseudo_UPD = 2661, VLD3DUPd8_UPD = 2662, VLD3DUPq16 = 2663, VLD3DUPq16EvenPseudo = 2664, VLD3DUPq16OddPseudo = 2665, VLD3DUPq16OddPseudo_UPD = 2666, VLD3DUPq16_UPD = 2667, VLD3DUPq32 = 2668, VLD3DUPq32EvenPseudo = 2669, VLD3DUPq32OddPseudo = 2670, VLD3DUPq32OddPseudo_UPD = 2671, VLD3DUPq32_UPD = 2672, VLD3DUPq8 = 2673, VLD3DUPq8EvenPseudo = 2674, VLD3DUPq8OddPseudo = 2675, VLD3DUPq8OddPseudo_UPD = 2676, VLD3DUPq8_UPD = 2677, VLD3LNd16 = 2678, VLD3LNd16Pseudo = 2679, VLD3LNd16Pseudo_UPD = 2680, VLD3LNd16_UPD = 2681, VLD3LNd32 = 2682, VLD3LNd32Pseudo = 2683, VLD3LNd32Pseudo_UPD = 2684, VLD3LNd32_UPD = 2685, VLD3LNd8 = 2686, VLD3LNd8Pseudo = 2687, VLD3LNd8Pseudo_UPD = 2688, VLD3LNd8_UPD = 2689, VLD3LNq16 = 2690, VLD3LNq16Pseudo = 2691, VLD3LNq16Pseudo_UPD = 2692, VLD3LNq16_UPD = 2693, VLD3LNq32 = 2694, VLD3LNq32Pseudo = 2695, VLD3LNq32Pseudo_UPD = 2696, VLD3LNq32_UPD = 2697, VLD3d16 = 2698, VLD3d16Pseudo = 2699, VLD3d16Pseudo_UPD = 2700, VLD3d16_UPD = 2701, VLD3d32 = 2702, VLD3d32Pseudo = 2703, VLD3d32Pseudo_UPD = 2704, VLD3d32_UPD = 2705, VLD3d8 = 2706, VLD3d8Pseudo = 2707, VLD3d8Pseudo_UPD = 2708, VLD3d8_UPD = 2709, VLD3q16 = 2710, VLD3q16Pseudo_UPD = 2711, VLD3q16_UPD = 2712, VLD3q16oddPseudo = 2713, VLD3q16oddPseudo_UPD = 2714, VLD3q32 = 2715, VLD3q32Pseudo_UPD = 2716, VLD3q32_UPD = 2717, VLD3q32oddPseudo = 2718, VLD3q32oddPseudo_UPD = 2719, VLD3q8 = 2720, VLD3q8Pseudo_UPD = 2721, VLD3q8_UPD = 2722, VLD3q8oddPseudo = 2723, VLD3q8oddPseudo_UPD = 2724, VLD4DUPd16 = 2725, VLD4DUPd16Pseudo = 2726, VLD4DUPd16Pseudo_UPD = 2727, VLD4DUPd16_UPD = 2728, VLD4DUPd32 = 2729, VLD4DUPd32Pseudo = 2730, VLD4DUPd32Pseudo_UPD = 2731, VLD4DUPd32_UPD = 2732, VLD4DUPd8 = 2733, VLD4DUPd8Pseudo = 2734, VLD4DUPd8Pseudo_UPD = 2735, VLD4DUPd8_UPD = 2736, VLD4DUPq16 = 2737, VLD4DUPq16EvenPseudo = 2738, VLD4DUPq16OddPseudo = 2739, VLD4DUPq16OddPseudo_UPD = 2740, VLD4DUPq16_UPD = 2741, VLD4DUPq32 = 2742, VLD4DUPq32EvenPseudo = 2743, VLD4DUPq32OddPseudo = 2744, VLD4DUPq32OddPseudo_UPD = 2745, VLD4DUPq32_UPD = 2746, VLD4DUPq8 = 2747, VLD4DUPq8EvenPseudo = 2748, VLD4DUPq8OddPseudo = 2749, VLD4DUPq8OddPseudo_UPD = 2750, VLD4DUPq8_UPD = 2751, VLD4LNd16 = 2752, VLD4LNd16Pseudo = 2753, VLD4LNd16Pseudo_UPD = 2754, VLD4LNd16_UPD = 2755, VLD4LNd32 = 2756, VLD4LNd32Pseudo = 2757, VLD4LNd32Pseudo_UPD = 2758, VLD4LNd32_UPD = 2759, VLD4LNd8 = 2760, VLD4LNd8Pseudo = 2761, VLD4LNd8Pseudo_UPD = 2762, VLD4LNd8_UPD = 2763, VLD4LNq16 = 2764, VLD4LNq16Pseudo = 2765, VLD4LNq16Pseudo_UPD = 2766, VLD4LNq16_UPD = 2767, VLD4LNq32 = 2768, VLD4LNq32Pseudo = 2769, VLD4LNq32Pseudo_UPD = 2770, VLD4LNq32_UPD = 2771, VLD4d16 = 2772, VLD4d16Pseudo = 2773, VLD4d16Pseudo_UPD = 2774, VLD4d16_UPD = 2775, VLD4d32 = 2776, VLD4d32Pseudo = 2777, VLD4d32Pseudo_UPD = 2778, VLD4d32_UPD = 2779, VLD4d8 = 2780, VLD4d8Pseudo = 2781, VLD4d8Pseudo_UPD = 2782, VLD4d8_UPD = 2783, VLD4q16 = 2784, VLD4q16Pseudo_UPD = 2785, VLD4q16_UPD = 2786, VLD4q16oddPseudo = 2787, VLD4q16oddPseudo_UPD = 2788, VLD4q32 = 2789, VLD4q32Pseudo_UPD = 2790, VLD4q32_UPD = 2791, VLD4q32oddPseudo = 2792, VLD4q32oddPseudo_UPD = 2793, VLD4q8 = 2794, VLD4q8Pseudo_UPD = 2795, VLD4q8_UPD = 2796, VLD4q8oddPseudo = 2797, VLD4q8oddPseudo_UPD = 2798, VLDMDDB_UPD = 2799, VLDMDIA = 2800, VLDMDIA_UPD = 2801, VLDMQIA = 2802, VLDMSDB_UPD = 2803, VLDMSIA = 2804, VLDMSIA_UPD = 2805, VLDRD = 2806, VLDRH = 2807, VLDRS = 2808, VLDR_FPCXTNS_off = 2809, VLDR_FPCXTNS_post = 2810, VLDR_FPCXTNS_pre = 2811, VLDR_FPCXTS_off = 2812, VLDR_FPCXTS_post = 2813, VLDR_FPCXTS_pre = 2814, VLDR_FPSCR_NZCVQC_off = 2815, VLDR_FPSCR_NZCVQC_post = 2816, VLDR_FPSCR_NZCVQC_pre = 2817, VLDR_FPSCR_off = 2818, VLDR_FPSCR_post = 2819, VLDR_FPSCR_pre = 2820, VLDR_P0_off = 2821, VLDR_P0_post = 2822, VLDR_P0_pre = 2823, VLDR_VPR_off = 2824, VLDR_VPR_post = 2825, VLDR_VPR_pre = 2826, VLLDM = 2827, VLSTM = 2828, VMAXfd = 2829, VMAXfq = 2830, VMAXhd = 2831, VMAXhq = 2832, VMAXsv16i8 = 2833, VMAXsv2i32 = 2834, VMAXsv4i16 = 2835, VMAXsv4i32 = 2836, VMAXsv8i16 = 2837, VMAXsv8i8 = 2838, VMAXuv16i8 = 2839, VMAXuv2i32 = 2840, VMAXuv4i16 = 2841, VMAXuv4i32 = 2842, VMAXuv8i16 = 2843, VMAXuv8i8 = 2844, VMINfd = 2845, VMINfq = 2846, VMINhd = 2847, VMINhq = 2848, VMINsv16i8 = 2849, VMINsv2i32 = 2850, VMINsv4i16 = 2851, VMINsv4i32 = 2852, VMINsv8i16 = 2853, VMINsv8i8 = 2854, VMINuv16i8 = 2855, VMINuv2i32 = 2856, VMINuv4i16 = 2857, VMINuv4i32 = 2858, VMINuv8i16 = 2859, VMINuv8i8 = 2860, VMLAD = 2861, VMLAH = 2862, VMLALslsv2i32 = 2863, VMLALslsv4i16 = 2864, VMLALsluv2i32 = 2865, VMLALsluv4i16 = 2866, VMLALsv2i64 = 2867, VMLALsv4i32 = 2868, VMLALsv8i16 = 2869, VMLALuv2i64 = 2870, VMLALuv4i32 = 2871, VMLALuv8i16 = 2872, VMLAS = 2873, VMLAfd = 2874, VMLAfq = 2875, VMLAhd = 2876, VMLAhq = 2877, VMLAslfd = 2878, VMLAslfq = 2879, VMLAslhd = 2880, VMLAslhq = 2881, VMLAslv2i32 = 2882, VMLAslv4i16 = 2883, VMLAslv4i32 = 2884, VMLAslv8i16 = 2885, VMLAv16i8 = 2886, VMLAv2i32 = 2887, VMLAv4i16 = 2888, VMLAv4i32 = 2889, VMLAv8i16 = 2890, VMLAv8i8 = 2891, VMLSD = 2892, VMLSH = 2893, VMLSLslsv2i32 = 2894, VMLSLslsv4i16 = 2895, VMLSLsluv2i32 = 2896, VMLSLsluv4i16 = 2897, VMLSLsv2i64 = 2898, VMLSLsv4i32 = 2899, VMLSLsv8i16 = 2900, VMLSLuv2i64 = 2901, VMLSLuv4i32 = 2902, VMLSLuv8i16 = 2903, VMLSS = 2904, VMLSfd = 2905, VMLSfq = 2906, VMLShd = 2907, VMLShq = 2908, VMLSslfd = 2909, VMLSslfq = 2910, VMLSslhd = 2911, VMLSslhq = 2912, VMLSslv2i32 = 2913, VMLSslv4i16 = 2914, VMLSslv4i32 = 2915, VMLSslv8i16 = 2916, VMLSv16i8 = 2917, VMLSv2i32 = 2918, VMLSv4i16 = 2919, VMLSv4i32 = 2920, VMLSv8i16 = 2921, VMLSv8i8 = 2922, VMMLA = 2923, VMOVD = 2924, VMOVDRR = 2925, VMOVH = 2926, VMOVHR = 2927, VMOVLsv2i64 = 2928, VMOVLsv4i32 = 2929, VMOVLsv8i16 = 2930, VMOVLuv2i64 = 2931, VMOVLuv4i32 = 2932, VMOVLuv8i16 = 2933, VMOVNv2i32 = 2934, VMOVNv4i16 = 2935, VMOVNv8i8 = 2936, VMOVRH = 2937, VMOVRRD = 2938, VMOVRRS = 2939, VMOVRS = 2940, VMOVS = 2941, VMOVSR = 2942, VMOVSRR = 2943, VMOVv16i8 = 2944, VMOVv1i64 = 2945, VMOVv2f32 = 2946, VMOVv2i32 = 2947, VMOVv2i64 = 2948, VMOVv4f32 = 2949, VMOVv4i16 = 2950, VMOVv4i32 = 2951, VMOVv8i16 = 2952, VMOVv8i8 = 2953, VMRS = 2954, VMRS_FPCXTNS = 2955, VMRS_FPCXTS = 2956, VMRS_FPEXC = 2957, VMRS_FPINST = 2958, VMRS_FPINST2 = 2959, VMRS_FPSCR_NZCVQC = 2960, VMRS_FPSID = 2961, VMRS_MVFR0 = 2962, VMRS_MVFR1 = 2963, VMRS_MVFR2 = 2964, VMRS_P0 = 2965, VMRS_VPR = 2966, VMSR = 2967, VMSR_FPCXTNS = 2968, VMSR_FPCXTS = 2969, VMSR_FPEXC = 2970, VMSR_FPINST = 2971, VMSR_FPINST2 = 2972, VMSR_FPSCR_NZCVQC = 2973, VMSR_FPSID = 2974, VMSR_P0 = 2975, VMSR_VPR = 2976, VMULD = 2977, VMULH = 2978, VMULLp64 = 2979, VMULLp8 = 2980, VMULLslsv2i32 = 2981, VMULLslsv4i16 = 2982, VMULLsluv2i32 = 2983, VMULLsluv4i16 = 2984, VMULLsv2i64 = 2985, VMULLsv4i32 = 2986, VMULLsv8i16 = 2987, VMULLuv2i64 = 2988, VMULLuv4i32 = 2989, VMULLuv8i16 = 2990, VMULS = 2991, VMULfd = 2992, VMULfq = 2993, VMULhd = 2994, VMULhq = 2995, VMULpd = 2996, VMULpq = 2997, VMULslfd = 2998, VMULslfq = 2999, VMULslhd = 3000, VMULslhq = 3001, VMULslv2i32 = 3002, VMULslv4i16 = 3003, VMULslv4i32 = 3004, VMULslv8i16 = 3005, VMULv16i8 = 3006, VMULv2i32 = 3007, VMULv4i16 = 3008, VMULv4i32 = 3009, VMULv8i16 = 3010, VMULv8i8 = 3011, VMVNd = 3012, VMVNq = 3013, VMVNv2i32 = 3014, VMVNv4i16 = 3015, VMVNv4i32 = 3016, VMVNv8i16 = 3017, VNEGD = 3018, VNEGH = 3019, VNEGS = 3020, VNEGf32q = 3021, VNEGfd = 3022, VNEGhd = 3023, VNEGhq = 3024, VNEGs16d = 3025, VNEGs16q = 3026, VNEGs32d = 3027, VNEGs32q = 3028, VNEGs8d = 3029, VNEGs8q = 3030, VNMLAD = 3031, VNMLAH = 3032, VNMLAS = 3033, VNMLSD = 3034, VNMLSH = 3035, VNMLSS = 3036, VNMULD = 3037, VNMULH = 3038, VNMULS = 3039, VORNd = 3040, VORNq = 3041, VORRd = 3042, VORRiv2i32 = 3043, VORRiv4i16 = 3044, VORRiv4i32 = 3045, VORRiv8i16 = 3046, VORRq = 3047, VPADALsv16i8 = 3048, VPADALsv2i32 = 3049, VPADALsv4i16 = 3050, VPADALsv4i32 = 3051, VPADALsv8i16 = 3052, VPADALsv8i8 = 3053, VPADALuv16i8 = 3054, VPADALuv2i32 = 3055, VPADALuv4i16 = 3056, VPADALuv4i32 = 3057, VPADALuv8i16 = 3058, VPADALuv8i8 = 3059, VPADDLsv16i8 = 3060, VPADDLsv2i32 = 3061, VPADDLsv4i16 = 3062, VPADDLsv4i32 = 3063, VPADDLsv8i16 = 3064, VPADDLsv8i8 = 3065, VPADDLuv16i8 = 3066, VPADDLuv2i32 = 3067, VPADDLuv4i16 = 3068, VPADDLuv4i32 = 3069, VPADDLuv8i16 = 3070, VPADDLuv8i8 = 3071, VPADDf = 3072, VPADDh = 3073, VPADDi16 = 3074, VPADDi32 = 3075, VPADDi8 = 3076, VPMAXf = 3077, VPMAXh = 3078, VPMAXs16 = 3079, VPMAXs32 = 3080, VPMAXs8 = 3081, VPMAXu16 = 3082, VPMAXu32 = 3083, VPMAXu8 = 3084, VPMINf = 3085, VPMINh = 3086, VPMINs16 = 3087, VPMINs32 = 3088, VPMINs8 = 3089, VPMINu16 = 3090, VPMINu32 = 3091, VPMINu8 = 3092, VQABSv16i8 = 3093, VQABSv2i32 = 3094, VQABSv4i16 = 3095, VQABSv4i32 = 3096, VQABSv8i16 = 3097, VQABSv8i8 = 3098, VQADDsv16i8 = 3099, VQADDsv1i64 = 3100, VQADDsv2i32 = 3101, VQADDsv2i64 = 3102, VQADDsv4i16 = 3103, VQADDsv4i32 = 3104, VQADDsv8i16 = 3105, VQADDsv8i8 = 3106, VQADDuv16i8 = 3107, VQADDuv1i64 = 3108, VQADDuv2i32 = 3109, VQADDuv2i64 = 3110, VQADDuv4i16 = 3111, VQADDuv4i32 = 3112, VQADDuv8i16 = 3113, VQADDuv8i8 = 3114, VQDMLALslv2i32 = 3115, VQDMLALslv4i16 = 3116, VQDMLALv2i64 = 3117, VQDMLALv4i32 = 3118, VQDMLSLslv2i32 = 3119, VQDMLSLslv4i16 = 3120, VQDMLSLv2i64 = 3121, VQDMLSLv4i32 = 3122, VQDMULHslv2i32 = 3123, VQDMULHslv4i16 = 3124, VQDMULHslv4i32 = 3125, VQDMULHslv8i16 = 3126, VQDMULHv2i32 = 3127, VQDMULHv4i16 = 3128, VQDMULHv4i32 = 3129, VQDMULHv8i16 = 3130, VQDMULLslv2i32 = 3131, VQDMULLslv4i16 = 3132, VQDMULLv2i64 = 3133, VQDMULLv4i32 = 3134, VQMOVNsuv2i32 = 3135, VQMOVNsuv4i16 = 3136, VQMOVNsuv8i8 = 3137, VQMOVNsv2i32 = 3138, VQMOVNsv4i16 = 3139, VQMOVNsv8i8 = 3140, VQMOVNuv2i32 = 3141, VQMOVNuv4i16 = 3142, VQMOVNuv8i8 = 3143, VQNEGv16i8 = 3144, VQNEGv2i32 = 3145, VQNEGv4i16 = 3146, VQNEGv4i32 = 3147, VQNEGv8i16 = 3148, VQNEGv8i8 = 3149, VQRDMLAHslv2i32 = 3150, VQRDMLAHslv4i16 = 3151, VQRDMLAHslv4i32 = 3152, VQRDMLAHslv8i16 = 3153, VQRDMLAHv2i32 = 3154, VQRDMLAHv4i16 = 3155, VQRDMLAHv4i32 = 3156, VQRDMLAHv8i16 = 3157, VQRDMLSHslv2i32 = 3158, VQRDMLSHslv4i16 = 3159, VQRDMLSHslv4i32 = 3160, VQRDMLSHslv8i16 = 3161, VQRDMLSHv2i32 = 3162, VQRDMLSHv4i16 = 3163, VQRDMLSHv4i32 = 3164, VQRDMLSHv8i16 = 3165, VQRDMULHslv2i32 = 3166, VQRDMULHslv4i16 = 3167, VQRDMULHslv4i32 = 3168, VQRDMULHslv8i16 = 3169, VQRDMULHv2i32 = 3170, VQRDMULHv4i16 = 3171, VQRDMULHv4i32 = 3172, VQRDMULHv8i16 = 3173, VQRSHLsv16i8 = 3174, VQRSHLsv1i64 = 3175, VQRSHLsv2i32 = 3176, VQRSHLsv2i64 = 3177, VQRSHLsv4i16 = 3178, VQRSHLsv4i32 = 3179, VQRSHLsv8i16 = 3180, VQRSHLsv8i8 = 3181, VQRSHLuv16i8 = 3182, VQRSHLuv1i64 = 3183, VQRSHLuv2i32 = 3184, VQRSHLuv2i64 = 3185, VQRSHLuv4i16 = 3186, VQRSHLuv4i32 = 3187, VQRSHLuv8i16 = 3188, VQRSHLuv8i8 = 3189, VQRSHRNsv2i32 = 3190, VQRSHRNsv4i16 = 3191, VQRSHRNsv8i8 = 3192, VQRSHRNuv2i32 = 3193, VQRSHRNuv4i16 = 3194, VQRSHRNuv8i8 = 3195, VQRSHRUNv2i32 = 3196, VQRSHRUNv4i16 = 3197, VQRSHRUNv8i8 = 3198, VQSHLsiv16i8 = 3199, VQSHLsiv1i64 = 3200, VQSHLsiv2i32 = 3201, VQSHLsiv2i64 = 3202, VQSHLsiv4i16 = 3203, VQSHLsiv4i32 = 3204, VQSHLsiv8i16 = 3205, VQSHLsiv8i8 = 3206, VQSHLsuv16i8 = 3207, VQSHLsuv1i64 = 3208, VQSHLsuv2i32 = 3209, VQSHLsuv2i64 = 3210, VQSHLsuv4i16 = 3211, VQSHLsuv4i32 = 3212, VQSHLsuv8i16 = 3213, VQSHLsuv8i8 = 3214, VQSHLsv16i8 = 3215, VQSHLsv1i64 = 3216, VQSHLsv2i32 = 3217, VQSHLsv2i64 = 3218, VQSHLsv4i16 = 3219, VQSHLsv4i32 = 3220, VQSHLsv8i16 = 3221, VQSHLsv8i8 = 3222, VQSHLuiv16i8 = 3223, VQSHLuiv1i64 = 3224, VQSHLuiv2i32 = 3225, VQSHLuiv2i64 = 3226, VQSHLuiv4i16 = 3227, VQSHLuiv4i32 = 3228, VQSHLuiv8i16 = 3229, VQSHLuiv8i8 = 3230, VQSHLuv16i8 = 3231, VQSHLuv1i64 = 3232, VQSHLuv2i32 = 3233, VQSHLuv2i64 = 3234, VQSHLuv4i16 = 3235, VQSHLuv4i32 = 3236, VQSHLuv8i16 = 3237, VQSHLuv8i8 = 3238, VQSHRNsv2i32 = 3239, VQSHRNsv4i16 = 3240, VQSHRNsv8i8 = 3241, VQSHRNuv2i32 = 3242, VQSHRNuv4i16 = 3243, VQSHRNuv8i8 = 3244, VQSHRUNv2i32 = 3245, VQSHRUNv4i16 = 3246, VQSHRUNv8i8 = 3247, VQSUBsv16i8 = 3248, VQSUBsv1i64 = 3249, VQSUBsv2i32 = 3250, VQSUBsv2i64 = 3251, VQSUBsv4i16 = 3252, VQSUBsv4i32 = 3253, VQSUBsv8i16 = 3254, VQSUBsv8i8 = 3255, VQSUBuv16i8 = 3256, VQSUBuv1i64 = 3257, VQSUBuv2i32 = 3258, VQSUBuv2i64 = 3259, VQSUBuv4i16 = 3260, VQSUBuv4i32 = 3261, VQSUBuv8i16 = 3262, VQSUBuv8i8 = 3263, VRADDHNv2i32 = 3264, VRADDHNv4i16 = 3265, VRADDHNv8i8 = 3266, VRECPEd = 3267, VRECPEfd = 3268, VRECPEfq = 3269, VRECPEhd = 3270, VRECPEhq = 3271, VRECPEq = 3272, VRECPSfd = 3273, VRECPSfq = 3274, VRECPShd = 3275, VRECPShq = 3276, VREV16d8 = 3277, VREV16q8 = 3278, VREV32d16 = 3279, VREV32d8 = 3280, VREV32q16 = 3281, VREV32q8 = 3282, VREV64d16 = 3283, VREV64d32 = 3284, VREV64d8 = 3285, VREV64q16 = 3286, VREV64q32 = 3287, VREV64q8 = 3288, VRHADDsv16i8 = 3289, VRHADDsv2i32 = 3290, VRHADDsv4i16 = 3291, VRHADDsv4i32 = 3292, VRHADDsv8i16 = 3293, VRHADDsv8i8 = 3294, VRHADDuv16i8 = 3295, VRHADDuv2i32 = 3296, VRHADDuv4i16 = 3297, VRHADDuv4i32 = 3298, VRHADDuv8i16 = 3299, VRHADDuv8i8 = 3300, VRINTAD = 3301, VRINTAH = 3302, VRINTANDf = 3303, VRINTANDh = 3304, VRINTANQf = 3305, VRINTANQh = 3306, VRINTAS = 3307, VRINTMD = 3308, VRINTMH = 3309, VRINTMNDf = 3310, VRINTMNDh = 3311, VRINTMNQf = 3312, VRINTMNQh = 3313, VRINTMS = 3314, VRINTND = 3315, VRINTNH = 3316, VRINTNNDf = 3317, VRINTNNDh = 3318, VRINTNNQf = 3319, VRINTNNQh = 3320, VRINTNS = 3321, VRINTPD = 3322, VRINTPH = 3323, VRINTPNDf = 3324, VRINTPNDh = 3325, VRINTPNQf = 3326, VRINTPNQh = 3327, VRINTPS = 3328, VRINTRD = 3329, VRINTRH = 3330, VRINTRS = 3331, VRINTXD = 3332, VRINTXH = 3333, VRINTXNDf = 3334, VRINTXNDh = 3335, VRINTXNQf = 3336, VRINTXNQh = 3337, VRINTXS = 3338, VRINTZD = 3339, VRINTZH = 3340, VRINTZNDf = 3341, VRINTZNDh = 3342, VRINTZNQf = 3343, VRINTZNQh = 3344, VRINTZS = 3345, VRSHLsv16i8 = 3346, VRSHLsv1i64 = 3347, VRSHLsv2i32 = 3348, VRSHLsv2i64 = 3349, VRSHLsv4i16 = 3350, VRSHLsv4i32 = 3351, VRSHLsv8i16 = 3352, VRSHLsv8i8 = 3353, VRSHLuv16i8 = 3354, VRSHLuv1i64 = 3355, VRSHLuv2i32 = 3356, VRSHLuv2i64 = 3357, VRSHLuv4i16 = 3358, VRSHLuv4i32 = 3359, VRSHLuv8i16 = 3360, VRSHLuv8i8 = 3361, VRSHRNv2i32 = 3362, VRSHRNv4i16 = 3363, VRSHRNv8i8 = 3364, VRSHRsv16i8 = 3365, VRSHRsv1i64 = 3366, VRSHRsv2i32 = 3367, VRSHRsv2i64 = 3368, VRSHRsv4i16 = 3369, VRSHRsv4i32 = 3370, VRSHRsv8i16 = 3371, VRSHRsv8i8 = 3372, VRSHRuv16i8 = 3373, VRSHRuv1i64 = 3374, VRSHRuv2i32 = 3375, VRSHRuv2i64 = 3376, VRSHRuv4i16 = 3377, VRSHRuv4i32 = 3378, VRSHRuv8i16 = 3379, VRSHRuv8i8 = 3380, VRSQRTEd = 3381, VRSQRTEfd = 3382, VRSQRTEfq = 3383, VRSQRTEhd = 3384, VRSQRTEhq = 3385, VRSQRTEq = 3386, VRSQRTSfd = 3387, VRSQRTSfq = 3388, VRSQRTShd = 3389, VRSQRTShq = 3390, VRSRAsv16i8 = 3391, VRSRAsv1i64 = 3392, VRSRAsv2i32 = 3393, VRSRAsv2i64 = 3394, VRSRAsv4i16 = 3395, VRSRAsv4i32 = 3396, VRSRAsv8i16 = 3397, VRSRAsv8i8 = 3398, VRSRAuv16i8 = 3399, VRSRAuv1i64 = 3400, VRSRAuv2i32 = 3401, VRSRAuv2i64 = 3402, VRSRAuv4i16 = 3403, VRSRAuv4i32 = 3404, VRSRAuv8i16 = 3405, VRSRAuv8i8 = 3406, VRSUBHNv2i32 = 3407, VRSUBHNv4i16 = 3408, VRSUBHNv8i8 = 3409, VSCCLRMD = 3410, VSCCLRMS = 3411, VSDOTD = 3412, VSDOTDI = 3413, VSDOTQ = 3414, VSDOTQI = 3415, VSELEQD = 3416, VSELEQH = 3417, VSELEQS = 3418, VSELGED = 3419, VSELGEH = 3420, VSELGES = 3421, VSELGTD = 3422, VSELGTH = 3423, VSELGTS = 3424, VSELVSD = 3425, VSELVSH = 3426, VSELVSS = 3427, VSETLNi16 = 3428, VSETLNi32 = 3429, VSETLNi8 = 3430, VSHLLi16 = 3431, VSHLLi32 = 3432, VSHLLi8 = 3433, VSHLLsv2i64 = 3434, VSHLLsv4i32 = 3435, VSHLLsv8i16 = 3436, VSHLLuv2i64 = 3437, VSHLLuv4i32 = 3438, VSHLLuv8i16 = 3439, VSHLiv16i8 = 3440, VSHLiv1i64 = 3441, VSHLiv2i32 = 3442, VSHLiv2i64 = 3443, VSHLiv4i16 = 3444, VSHLiv4i32 = 3445, VSHLiv8i16 = 3446, VSHLiv8i8 = 3447, VSHLsv16i8 = 3448, VSHLsv1i64 = 3449, VSHLsv2i32 = 3450, VSHLsv2i64 = 3451, VSHLsv4i16 = 3452, VSHLsv4i32 = 3453, VSHLsv8i16 = 3454, VSHLsv8i8 = 3455, VSHLuv16i8 = 3456, VSHLuv1i64 = 3457, VSHLuv2i32 = 3458, VSHLuv2i64 = 3459, VSHLuv4i16 = 3460, VSHLuv4i32 = 3461, VSHLuv8i16 = 3462, VSHLuv8i8 = 3463, VSHRNv2i32 = 3464, VSHRNv4i16 = 3465, VSHRNv8i8 = 3466, VSHRsv16i8 = 3467, VSHRsv1i64 = 3468, VSHRsv2i32 = 3469, VSHRsv2i64 = 3470, VSHRsv4i16 = 3471, VSHRsv4i32 = 3472, VSHRsv8i16 = 3473, VSHRsv8i8 = 3474, VSHRuv16i8 = 3475, VSHRuv1i64 = 3476, VSHRuv2i32 = 3477, VSHRuv2i64 = 3478, VSHRuv4i16 = 3479, VSHRuv4i32 = 3480, VSHRuv8i16 = 3481, VSHRuv8i8 = 3482, VSHTOD = 3483, VSHTOH = 3484, VSHTOS = 3485, VSITOD = 3486, VSITOH = 3487, VSITOS = 3488, VSLIv16i8 = 3489, VSLIv1i64 = 3490, VSLIv2i32 = 3491, VSLIv2i64 = 3492, VSLIv4i16 = 3493, VSLIv4i32 = 3494, VSLIv8i16 = 3495, VSLIv8i8 = 3496, VSLTOD = 3497, VSLTOH = 3498, VSLTOS = 3499, VSMMLA = 3500, VSQRTD = 3501, VSQRTH = 3502, VSQRTS = 3503, VSRAsv16i8 = 3504, VSRAsv1i64 = 3505, VSRAsv2i32 = 3506, VSRAsv2i64 = 3507, VSRAsv4i16 = 3508, VSRAsv4i32 = 3509, VSRAsv8i16 = 3510, VSRAsv8i8 = 3511, VSRAuv16i8 = 3512, VSRAuv1i64 = 3513, VSRAuv2i32 = 3514, VSRAuv2i64 = 3515, VSRAuv4i16 = 3516, VSRAuv4i32 = 3517, VSRAuv8i16 = 3518, VSRAuv8i8 = 3519, VSRIv16i8 = 3520, VSRIv1i64 = 3521, VSRIv2i32 = 3522, VSRIv2i64 = 3523, VSRIv4i16 = 3524, VSRIv4i32 = 3525, VSRIv8i16 = 3526, VSRIv8i8 = 3527, VST1LNd16 = 3528, VST1LNd16_UPD = 3529, VST1LNd32 = 3530, VST1LNd32_UPD = 3531, VST1LNd8 = 3532, VST1LNd8_UPD = 3533, VST1LNq16Pseudo = 3534, VST1LNq16Pseudo_UPD = 3535, VST1LNq32Pseudo = 3536, VST1LNq32Pseudo_UPD = 3537, VST1LNq8Pseudo = 3538, VST1LNq8Pseudo_UPD = 3539, VST1d16 = 3540, VST1d16Q = 3541, VST1d16QPseudo = 3542, VST1d16QPseudoWB_fixed = 3543, VST1d16QPseudoWB_register = 3544, VST1d16Qwb_fixed = 3545, VST1d16Qwb_register = 3546, VST1d16T = 3547, VST1d16TPseudo = 3548, VST1d16TPseudoWB_fixed = 3549, VST1d16TPseudoWB_register = 3550, VST1d16Twb_fixed = 3551, VST1d16Twb_register = 3552, VST1d16wb_fixed = 3553, VST1d16wb_register = 3554, VST1d32 = 3555, VST1d32Q = 3556, VST1d32QPseudo = 3557, VST1d32QPseudoWB_fixed = 3558, VST1d32QPseudoWB_register = 3559, VST1d32Qwb_fixed = 3560, VST1d32Qwb_register = 3561, VST1d32T = 3562, VST1d32TPseudo = 3563, VST1d32TPseudoWB_fixed = 3564, VST1d32TPseudoWB_register = 3565, VST1d32Twb_fixed = 3566, VST1d32Twb_register = 3567, VST1d32wb_fixed = 3568, VST1d32wb_register = 3569, VST1d64 = 3570, VST1d64Q = 3571, VST1d64QPseudo = 3572, VST1d64QPseudoWB_fixed = 3573, VST1d64QPseudoWB_register = 3574, VST1d64Qwb_fixed = 3575, VST1d64Qwb_register = 3576, VST1d64T = 3577, VST1d64TPseudo = 3578, VST1d64TPseudoWB_fixed = 3579, VST1d64TPseudoWB_register = 3580, VST1d64Twb_fixed = 3581, VST1d64Twb_register = 3582, VST1d64wb_fixed = 3583, VST1d64wb_register = 3584, VST1d8 = 3585, VST1d8Q = 3586, VST1d8QPseudo = 3587, VST1d8QPseudoWB_fixed = 3588, VST1d8QPseudoWB_register = 3589, VST1d8Qwb_fixed = 3590, VST1d8Qwb_register = 3591, VST1d8T = 3592, VST1d8TPseudo = 3593, VST1d8TPseudoWB_fixed = 3594, VST1d8TPseudoWB_register = 3595, VST1d8Twb_fixed = 3596, VST1d8Twb_register = 3597, VST1d8wb_fixed = 3598, VST1d8wb_register = 3599, VST1q16 = 3600, VST1q16HighQPseudo = 3601, VST1q16HighQPseudo_UPD = 3602, VST1q16HighTPseudo = 3603, VST1q16HighTPseudo_UPD = 3604, VST1q16LowQPseudo_UPD = 3605, VST1q16LowTPseudo_UPD = 3606, VST1q16wb_fixed = 3607, VST1q16wb_register = 3608, VST1q32 = 3609, VST1q32HighQPseudo = 3610, VST1q32HighQPseudo_UPD = 3611, VST1q32HighTPseudo = 3612, VST1q32HighTPseudo_UPD = 3613, VST1q32LowQPseudo_UPD = 3614, VST1q32LowTPseudo_UPD = 3615, VST1q32wb_fixed = 3616, VST1q32wb_register = 3617, VST1q64 = 3618, VST1q64HighQPseudo = 3619, VST1q64HighQPseudo_UPD = 3620, VST1q64HighTPseudo = 3621, VST1q64HighTPseudo_UPD = 3622, VST1q64LowQPseudo_UPD = 3623, VST1q64LowTPseudo_UPD = 3624, VST1q64wb_fixed = 3625, VST1q64wb_register = 3626, VST1q8 = 3627, VST1q8HighQPseudo = 3628, VST1q8HighQPseudo_UPD = 3629, VST1q8HighTPseudo = 3630, VST1q8HighTPseudo_UPD = 3631, VST1q8LowQPseudo_UPD = 3632, VST1q8LowTPseudo_UPD = 3633, VST1q8wb_fixed = 3634, VST1q8wb_register = 3635, VST2LNd16 = 3636, VST2LNd16Pseudo = 3637, VST2LNd16Pseudo_UPD = 3638, VST2LNd16_UPD = 3639, VST2LNd32 = 3640, VST2LNd32Pseudo = 3641, VST2LNd32Pseudo_UPD = 3642, VST2LNd32_UPD = 3643, VST2LNd8 = 3644, VST2LNd8Pseudo = 3645, VST2LNd8Pseudo_UPD = 3646, VST2LNd8_UPD = 3647, VST2LNq16 = 3648, VST2LNq16Pseudo = 3649, VST2LNq16Pseudo_UPD = 3650, VST2LNq16_UPD = 3651, VST2LNq32 = 3652, VST2LNq32Pseudo = 3653, VST2LNq32Pseudo_UPD = 3654, VST2LNq32_UPD = 3655, VST2b16 = 3656, VST2b16wb_fixed = 3657, VST2b16wb_register = 3658, VST2b32 = 3659, VST2b32wb_fixed = 3660, VST2b32wb_register = 3661, VST2b8 = 3662, VST2b8wb_fixed = 3663, VST2b8wb_register = 3664, VST2d16 = 3665, VST2d16wb_fixed = 3666, VST2d16wb_register = 3667, VST2d32 = 3668, VST2d32wb_fixed = 3669, VST2d32wb_register = 3670, VST2d8 = 3671, VST2d8wb_fixed = 3672, VST2d8wb_register = 3673, VST2q16 = 3674, VST2q16Pseudo = 3675, VST2q16PseudoWB_fixed = 3676, VST2q16PseudoWB_register = 3677, VST2q16wb_fixed = 3678, VST2q16wb_register = 3679, VST2q32 = 3680, VST2q32Pseudo = 3681, VST2q32PseudoWB_fixed = 3682, VST2q32PseudoWB_register = 3683, VST2q32wb_fixed = 3684, VST2q32wb_register = 3685, VST2q8 = 3686, VST2q8Pseudo = 3687, VST2q8PseudoWB_fixed = 3688, VST2q8PseudoWB_register = 3689, VST2q8wb_fixed = 3690, VST2q8wb_register = 3691, VST3LNd16 = 3692, VST3LNd16Pseudo = 3693, VST3LNd16Pseudo_UPD = 3694, VST3LNd16_UPD = 3695, VST3LNd32 = 3696, VST3LNd32Pseudo = 3697, VST3LNd32Pseudo_UPD = 3698, VST3LNd32_UPD = 3699, VST3LNd8 = 3700, VST3LNd8Pseudo = 3701, VST3LNd8Pseudo_UPD = 3702, VST3LNd8_UPD = 3703, VST3LNq16 = 3704, VST3LNq16Pseudo = 3705, VST3LNq16Pseudo_UPD = 3706, VST3LNq16_UPD = 3707, VST3LNq32 = 3708, VST3LNq32Pseudo = 3709, VST3LNq32Pseudo_UPD = 3710, VST3LNq32_UPD = 3711, VST3d16 = 3712, VST3d16Pseudo = 3713, VST3d16Pseudo_UPD = 3714, VST3d16_UPD = 3715, VST3d32 = 3716, VST3d32Pseudo = 3717, VST3d32Pseudo_UPD = 3718, VST3d32_UPD = 3719, VST3d8 = 3720, VST3d8Pseudo = 3721, VST3d8Pseudo_UPD = 3722, VST3d8_UPD = 3723, VST3q16 = 3724, VST3q16Pseudo_UPD = 3725, VST3q16_UPD = 3726, VST3q16oddPseudo = 3727, VST3q16oddPseudo_UPD = 3728, VST3q32 = 3729, VST3q32Pseudo_UPD = 3730, VST3q32_UPD = 3731, VST3q32oddPseudo = 3732, VST3q32oddPseudo_UPD = 3733, VST3q8 = 3734, VST3q8Pseudo_UPD = 3735, VST3q8_UPD = 3736, VST3q8oddPseudo = 3737, VST3q8oddPseudo_UPD = 3738, VST4LNd16 = 3739, VST4LNd16Pseudo = 3740, VST4LNd16Pseudo_UPD = 3741, VST4LNd16_UPD = 3742, VST4LNd32 = 3743, VST4LNd32Pseudo = 3744, VST4LNd32Pseudo_UPD = 3745, VST4LNd32_UPD = 3746, VST4LNd8 = 3747, VST4LNd8Pseudo = 3748, VST4LNd8Pseudo_UPD = 3749, VST4LNd8_UPD = 3750, VST4LNq16 = 3751, VST4LNq16Pseudo = 3752, VST4LNq16Pseudo_UPD = 3753, VST4LNq16_UPD = 3754, VST4LNq32 = 3755, VST4LNq32Pseudo = 3756, VST4LNq32Pseudo_UPD = 3757, VST4LNq32_UPD = 3758, VST4d16 = 3759, VST4d16Pseudo = 3760, VST4d16Pseudo_UPD = 3761, VST4d16_UPD = 3762, VST4d32 = 3763, VST4d32Pseudo = 3764, VST4d32Pseudo_UPD = 3765, VST4d32_UPD = 3766, VST4d8 = 3767, VST4d8Pseudo = 3768, VST4d8Pseudo_UPD = 3769, VST4d8_UPD = 3770, VST4q16 = 3771, VST4q16Pseudo_UPD = 3772, VST4q16_UPD = 3773, VST4q16oddPseudo = 3774, VST4q16oddPseudo_UPD = 3775, VST4q32 = 3776, VST4q32Pseudo_UPD = 3777, VST4q32_UPD = 3778, VST4q32oddPseudo = 3779, VST4q32oddPseudo_UPD = 3780, VST4q8 = 3781, VST4q8Pseudo_UPD = 3782, VST4q8_UPD = 3783, VST4q8oddPseudo = 3784, VST4q8oddPseudo_UPD = 3785, VSTMDDB_UPD = 3786, VSTMDIA = 3787, VSTMDIA_UPD = 3788, VSTMQIA = 3789, VSTMSDB_UPD = 3790, VSTMSIA = 3791, VSTMSIA_UPD = 3792, VSTRD = 3793, VSTRH = 3794, VSTRS = 3795, VSTR_FPCXTNS_off = 3796, VSTR_FPCXTNS_post = 3797, VSTR_FPCXTNS_pre = 3798, VSTR_FPCXTS_off = 3799, VSTR_FPCXTS_post = 3800, VSTR_FPCXTS_pre = 3801, VSTR_FPSCR_NZCVQC_off = 3802, VSTR_FPSCR_NZCVQC_post = 3803, VSTR_FPSCR_NZCVQC_pre = 3804, VSTR_FPSCR_off = 3805, VSTR_FPSCR_post = 3806, VSTR_FPSCR_pre = 3807, VSTR_P0_off = 3808, VSTR_P0_post = 3809, VSTR_P0_pre = 3810, VSTR_VPR_off = 3811, VSTR_VPR_post = 3812, VSTR_VPR_pre = 3813, VSUBD = 3814, VSUBH = 3815, VSUBHNv2i32 = 3816, VSUBHNv4i16 = 3817, VSUBHNv8i8 = 3818, VSUBLsv2i64 = 3819, VSUBLsv4i32 = 3820, VSUBLsv8i16 = 3821, VSUBLuv2i64 = 3822, VSUBLuv4i32 = 3823, VSUBLuv8i16 = 3824, VSUBS = 3825, VSUBWsv2i64 = 3826, VSUBWsv4i32 = 3827, VSUBWsv8i16 = 3828, VSUBWuv2i64 = 3829, VSUBWuv4i32 = 3830, VSUBWuv8i16 = 3831, VSUBfd = 3832, VSUBfq = 3833, VSUBhd = 3834, VSUBhq = 3835, VSUBv16i8 = 3836, VSUBv1i64 = 3837, VSUBv2i32 = 3838, VSUBv2i64 = 3839, VSUBv4i16 = 3840, VSUBv4i32 = 3841, VSUBv8i16 = 3842, VSUBv8i8 = 3843, VSUDOTDI = 3844, VSUDOTQI = 3845, VSWPd = 3846, VSWPq = 3847, VTBL1 = 3848, VTBL2 = 3849, VTBL3 = 3850, VTBL3Pseudo = 3851, VTBL4 = 3852, VTBL4Pseudo = 3853, VTBX1 = 3854, VTBX2 = 3855, VTBX3 = 3856, VTBX3Pseudo = 3857, VTBX4 = 3858, VTBX4Pseudo = 3859, VTOSHD = 3860, VTOSHH = 3861, VTOSHS = 3862, VTOSIRD = 3863, VTOSIRH = 3864, VTOSIRS = 3865, VTOSIZD = 3866, VTOSIZH = 3867, VTOSIZS = 3868, VTOSLD = 3869, VTOSLH = 3870, VTOSLS = 3871, VTOUHD = 3872, VTOUHH = 3873, VTOUHS = 3874, VTOUIRD = 3875, VTOUIRH = 3876, VTOUIRS = 3877, VTOUIZD = 3878, VTOUIZH = 3879, VTOUIZS = 3880, VTOULD = 3881, VTOULH = 3882, VTOULS = 3883, VTRNd16 = 3884, VTRNd32 = 3885, VTRNd8 = 3886, VTRNq16 = 3887, VTRNq32 = 3888, VTRNq8 = 3889, VTSTv16i8 = 3890, VTSTv2i32 = 3891, VTSTv4i16 = 3892, VTSTv4i32 = 3893, VTSTv8i16 = 3894, VTSTv8i8 = 3895, VUDOTD = 3896, VUDOTDI = 3897, VUDOTQ = 3898, VUDOTQI = 3899, VUHTOD = 3900, VUHTOH = 3901, VUHTOS = 3902, VUITOD = 3903, VUITOH = 3904, VUITOS = 3905, VULTOD = 3906, VULTOH = 3907, VULTOS = 3908, VUMMLA = 3909, VUSDOTD = 3910, VUSDOTDI = 3911, VUSDOTQ = 3912, VUSDOTQI = 3913, VUSMMLA = 3914, VUZPd16 = 3915, VUZPd8 = 3916, VUZPq16 = 3917, VUZPq32 = 3918, VUZPq8 = 3919, VZIPd16 = 3920, VZIPd8 = 3921, VZIPq16 = 3922, VZIPq32 = 3923, VZIPq8 = 3924, sysLDMDA = 3925, sysLDMDA_UPD = 3926, sysLDMDB = 3927, sysLDMDB_UPD = 3928, sysLDMIA = 3929, sysLDMIA_UPD = 3930, sysLDMIB = 3931, sysLDMIB_UPD = 3932, sysSTMDA = 3933, sysSTMDA_UPD = 3934, sysSTMDB = 3935, sysSTMDB_UPD = 3936, sysSTMIA = 3937, sysSTMIA_UPD = 3938, sysSTMIB = 3939, sysSTMIB_UPD = 3940, t2ADCri = 3941, t2ADCrr = 3942, t2ADCrs = 3943, t2ADDri = 3944, t2ADDri12 = 3945, t2ADDrr = 3946, t2ADDrs = 3947, t2ADDspImm = 3948, t2ADDspImm12 = 3949, t2ADR = 3950, t2ANDri = 3951, t2ANDrr = 3952, t2ANDrs = 3953, t2ASRri = 3954, t2ASRrr = 3955, t2AUT = 3956, t2AUTG = 3957, t2B = 3958, t2BFC = 3959, t2BFI = 3960, t2BFLi = 3961, t2BFLr = 3962, t2BFi = 3963, t2BFic = 3964, t2BFr = 3965, t2BICri = 3966, t2BICrr = 3967, t2BICrs = 3968, t2BTI = 3969, t2BXAUT = 3970, t2BXJ = 3971, t2Bcc = 3972, t2CDP = 3973, t2CDP2 = 3974, t2CLREX = 3975, t2CLRM = 3976, t2CLZ = 3977, t2CMNri = 3978, t2CMNzrr = 3979, t2CMNzrs = 3980, t2CMPri = 3981, t2CMPrr = 3982, t2CMPrs = 3983, t2CPS1p = 3984, t2CPS2p = 3985, t2CPS3p = 3986, t2CRC32B = 3987, t2CRC32CB = 3988, t2CRC32CH = 3989, t2CRC32CW = 3990, t2CRC32H = 3991, t2CRC32W = 3992, t2CSEL = 3993, t2CSINC = 3994, t2CSINV = 3995, t2CSNEG = 3996, t2DBG = 3997, t2DCPS1 = 3998, t2DCPS2 = 3999, t2DCPS3 = 4000, t2DLS = 4001, t2DMB = 4002, t2DSB = 4003, t2EORri = 4004, t2EORrr = 4005, t2EORrs = 4006, t2HINT = 4007, t2HVC = 4008, t2ISB = 4009, t2IT = 4010, t2Int_eh_sjlj_setjmp = 4011, t2Int_eh_sjlj_setjmp_nofp = 4012, t2LDA = 4013, t2LDAB = 4014, t2LDAEX = 4015, t2LDAEXB = 4016, t2LDAEXD = 4017, t2LDAEXH = 4018, t2LDAH = 4019, t2LDC2L_OFFSET = 4020, t2LDC2L_OPTION = 4021, t2LDC2L_POST = 4022, t2LDC2L_PRE = 4023, t2LDC2_OFFSET = 4024, t2LDC2_OPTION = 4025, t2LDC2_POST = 4026, t2LDC2_PRE = 4027, t2LDCL_OFFSET = 4028, t2LDCL_OPTION = 4029, t2LDCL_POST = 4030, t2LDCL_PRE = 4031, t2LDC_OFFSET = 4032, t2LDC_OPTION = 4033, t2LDC_POST = 4034, t2LDC_PRE = 4035, t2LDMDB = 4036, t2LDMDB_UPD = 4037, t2LDMIA = 4038, t2LDMIA_UPD = 4039, t2LDRBT = 4040, t2LDRB_POST = 4041, t2LDRB_PRE = 4042, t2LDRBi12 = 4043, t2LDRBi8 = 4044, t2LDRBpci = 4045, t2LDRBs = 4046, t2LDRD_POST = 4047, t2LDRD_PRE = 4048, t2LDRDi8 = 4049, t2LDREX = 4050, t2LDREXB = 4051, t2LDREXD = 4052, t2LDREXH = 4053, t2LDRHT = 4054, t2LDRH_POST = 4055, t2LDRH_PRE = 4056, t2LDRHi12 = 4057, t2LDRHi8 = 4058, t2LDRHpci = 4059, t2LDRHs = 4060, t2LDRSBT = 4061, t2LDRSB_POST = 4062, t2LDRSB_PRE = 4063, t2LDRSBi12 = 4064, t2LDRSBi8 = 4065, t2LDRSBpci = 4066, t2LDRSBs = 4067, t2LDRSHT = 4068, t2LDRSH_POST = 4069, t2LDRSH_PRE = 4070, t2LDRSHi12 = 4071, t2LDRSHi8 = 4072, t2LDRSHpci = 4073, t2LDRSHs = 4074, t2LDRT = 4075, t2LDR_POST = 4076, t2LDR_PRE = 4077, t2LDRi12 = 4078, t2LDRi8 = 4079, t2LDRpci = 4080, t2LDRs = 4081, t2LE = 4082, t2LEUpdate = 4083, t2LSLri = 4084, t2LSLrr = 4085, t2LSRri = 4086, t2LSRrr = 4087, t2MCR = 4088, t2MCR2 = 4089, t2MCRR = 4090, t2MCRR2 = 4091, t2MLA = 4092, t2MLS = 4093, t2MOVTi16 = 4094, t2MOVi = 4095, t2MOVi16 = 4096, t2MOVr = 4097, t2MOVsra_flag = 4098, t2MOVsrl_flag = 4099, t2MRC = 4100, t2MRC2 = 4101, t2MRRC = 4102, t2MRRC2 = 4103, t2MRS_AR = 4104, t2MRS_M = 4105, t2MRSbanked = 4106, t2MRSsys_AR = 4107, t2MSR_AR = 4108, t2MSR_M = 4109, t2MSRbanked = 4110, t2MUL = 4111, t2MVNi = 4112, t2MVNr = 4113, t2MVNs = 4114, t2ORNri = 4115, t2ORNrr = 4116, t2ORNrs = 4117, t2ORRri = 4118, t2ORRrr = 4119, t2ORRrs = 4120, t2PAC = 4121, t2PACBTI = 4122, t2PACG = 4123, t2PKHBT = 4124, t2PKHTB = 4125, t2PLDWi12 = 4126, t2PLDWi8 = 4127, t2PLDWs = 4128, t2PLDi12 = 4129, t2PLDi8 = 4130, t2PLDpci = 4131, t2PLDs = 4132, t2PLIi12 = 4133, t2PLIi8 = 4134, t2PLIpci = 4135, t2PLIs = 4136, t2QADD = 4137, t2QADD16 = 4138, t2QADD8 = 4139, t2QASX = 4140, t2QDADD = 4141, t2QDSUB = 4142, t2QSAX = 4143, t2QSUB = 4144, t2QSUB16 = 4145, t2QSUB8 = 4146, t2RBIT = 4147, t2REV = 4148, t2REV16 = 4149, t2REVSH = 4150, t2RFEDB = 4151, t2RFEDBW = 4152, t2RFEIA = 4153, t2RFEIAW = 4154, t2RORri = 4155, t2RORrr = 4156, t2RRX = 4157, t2RSBri = 4158, t2RSBrr = 4159, t2RSBrs = 4160, t2SADD16 = 4161, t2SADD8 = 4162, t2SASX = 4163, t2SB = 4164, t2SBCri = 4165, t2SBCrr = 4166, t2SBCrs = 4167, t2SBFX = 4168, t2SDIV = 4169, t2SEL = 4170, t2SETPAN = 4171, t2SG = 4172, t2SHADD16 = 4173, t2SHADD8 = 4174, t2SHASX = 4175, t2SHSAX = 4176, t2SHSUB16 = 4177, t2SHSUB8 = 4178, t2SMC = 4179, t2SMLABB = 4180, t2SMLABT = 4181, t2SMLAD = 4182, t2SMLADX = 4183, t2SMLAL = 4184, t2SMLALBB = 4185, t2SMLALBT = 4186, t2SMLALD = 4187, t2SMLALDX = 4188, t2SMLALTB = 4189, t2SMLALTT = 4190, t2SMLATB = 4191, t2SMLATT = 4192, t2SMLAWB = 4193, t2SMLAWT = 4194, t2SMLSD = 4195, t2SMLSDX = 4196, t2SMLSLD = 4197, t2SMLSLDX = 4198, t2SMMLA = 4199, t2SMMLAR = 4200, t2SMMLS = 4201, t2SMMLSR = 4202, t2SMMUL = 4203, t2SMMULR = 4204, t2SMUAD = 4205, t2SMUADX = 4206, t2SMULBB = 4207, t2SMULBT = 4208, t2SMULL = 4209, t2SMULTB = 4210, t2SMULTT = 4211, t2SMULWB = 4212, t2SMULWT = 4213, t2SMUSD = 4214, t2SMUSDX = 4215, t2SRSDB = 4216, t2SRSDB_UPD = 4217, t2SRSIA = 4218, t2SRSIA_UPD = 4219, t2SSAT = 4220, t2SSAT16 = 4221, t2SSAX = 4222, t2SSUB16 = 4223, t2SSUB8 = 4224, t2STC2L_OFFSET = 4225, t2STC2L_OPTION = 4226, t2STC2L_POST = 4227, t2STC2L_PRE = 4228, t2STC2_OFFSET = 4229, t2STC2_OPTION = 4230, t2STC2_POST = 4231, t2STC2_PRE = 4232, t2STCL_OFFSET = 4233, t2STCL_OPTION = 4234, t2STCL_POST = 4235, t2STCL_PRE = 4236, t2STC_OFFSET = 4237, t2STC_OPTION = 4238, t2STC_POST = 4239, t2STC_PRE = 4240, t2STL = 4241, t2STLB = 4242, t2STLEX = 4243, t2STLEXB = 4244, t2STLEXD = 4245, t2STLEXH = 4246, t2STLH = 4247, t2STMDB = 4248, t2STMDB_UPD = 4249, t2STMIA = 4250, t2STMIA_UPD = 4251, t2STRBT = 4252, t2STRB_POST = 4253, t2STRB_PRE = 4254, t2STRBi12 = 4255, t2STRBi8 = 4256, t2STRBs = 4257, t2STRD_POST = 4258, t2STRD_PRE = 4259, t2STRDi8 = 4260, t2STREX = 4261, t2STREXB = 4262, t2STREXD = 4263, t2STREXH = 4264, t2STRHT = 4265, t2STRH_POST = 4266, t2STRH_PRE = 4267, t2STRHi12 = 4268, t2STRHi8 = 4269, t2STRHs = 4270, t2STRT = 4271, t2STR_POST = 4272, t2STR_PRE = 4273, t2STRi12 = 4274, t2STRi8 = 4275, t2STRs = 4276, t2SUBS_PC_LR = 4277, t2SUBri = 4278, t2SUBri12 = 4279, t2SUBrr = 4280, t2SUBrs = 4281, t2SUBspImm = 4282, t2SUBspImm12 = 4283, t2SXTAB = 4284, t2SXTAB16 = 4285, t2SXTAH = 4286, t2SXTB = 4287, t2SXTB16 = 4288, t2SXTH = 4289, t2TBB = 4290, t2TBH = 4291, t2TEQri = 4292, t2TEQrr = 4293, t2TEQrs = 4294, t2TSB = 4295, t2TSTri = 4296, t2TSTrr = 4297, t2TSTrs = 4298, t2TT = 4299, t2TTA = 4300, t2TTAT = 4301, t2TTT = 4302, t2UADD16 = 4303, t2UADD8 = 4304, t2UASX = 4305, t2UBFX = 4306, t2UDF = 4307, t2UDIV = 4308, t2UHADD16 = 4309, t2UHADD8 = 4310, t2UHASX = 4311, t2UHSAX = 4312, t2UHSUB16 = 4313, t2UHSUB8 = 4314, t2UMAAL = 4315, t2UMLAL = 4316, t2UMULL = 4317, t2UQADD16 = 4318, t2UQADD8 = 4319, t2UQASX = 4320, t2UQSAX = 4321, t2UQSUB16 = 4322, t2UQSUB8 = 4323, t2USAD8 = 4324, t2USADA8 = 4325, t2USAT = 4326, t2USAT16 = 4327, t2USAX = 4328, t2USUB16 = 4329, t2USUB8 = 4330, t2UXTAB = 4331, t2UXTAB16 = 4332, t2UXTAH = 4333, t2UXTB = 4334, t2UXTB16 = 4335, t2UXTH = 4336, t2WLS = 4337, tADC = 4338, tADDhirr = 4339, tADDi3 = 4340, tADDi8 = 4341, tADDrSP = 4342, tADDrSPi = 4343, tADDrr = 4344, tADDspi = 4345, tADDspr = 4346, tADR = 4347, tAND = 4348, tASRri = 4349, tASRrr = 4350, tB = 4351, tBIC = 4352, tBKPT = 4353, tBL = 4354, tBLXNSr = 4355, tBLXi = 4356, tBLXr = 4357, tBX = 4358, tBXNS = 4359, tBcc = 4360, tCBNZ = 4361, tCBZ = 4362, tCMNz = 4363, tCMPhir = 4364, tCMPi8 = 4365, tCMPr = 4366, tCPS = 4367, tEOR = 4368, tHINT = 4369, tHLT = 4370, tInt_WIN_eh_sjlj_longjmp = 4371, tInt_eh_sjlj_longjmp = 4372, tInt_eh_sjlj_setjmp = 4373, tLDMIA = 4374, tLDRBi = 4375, tLDRBr = 4376, tLDRHi = 4377, tLDRHr = 4378, tLDRSB = 4379, tLDRSH = 4380, tLDRi = 4381, tLDRpci = 4382, tLDRr = 4383, tLDRspi = 4384, tLSLri = 4385, tLSLrr = 4386, tLSRri = 4387, tLSRrr = 4388, tMOVSr = 4389, tMOVi8 = 4390, tMOVr = 4391, tMUL = 4392, tMVN = 4393, tORR = 4394, tPICADD = 4395, tPOP = 4396, tPUSH = 4397, tREV = 4398, tREV16 = 4399, tREVSH = 4400, tROR = 4401, tRSB = 4402, tSBC = 4403, tSETEND = 4404, tSTMIA_UPD = 4405, tSTRBi = 4406, tSTRBr = 4407, tSTRHi = 4408, tSTRHr = 4409, tSTRi = 4410, tSTRr = 4411, tSTRspi = 4412, tSUBi3 = 4413, tSUBi8 = 4414, tSUBrr = 4415, tSUBspi = 4416, tSVC = 4417, tSXTB = 4418, tSXTH = 4419, tTRAP = 4420, tTST = 4421, tUDF = 4422, tUXTB = 4423, tUXTH = 4424, t__brkdiv0 = 4425, INSTRUCTION_LIST_END = 4426 }; } // end namespace ARM } // end namespace llvm #endif // GET_INSTRINFO_ENUM #ifdef GET_INSTRINFO_SCHED_ENUM #undef GET_INSTRINFO_SCHED_ENUM namespace llvm { namespace ARM { namespace Sched { enum { NoInstrModel = 0, IIC_iALUi_WriteALU_ReadALU = 1, IIC_iALUr_WriteALU_ReadALU_ReadALU = 2, IIC_iALUsr_WriteALUsi_ReadALU = 3, IIC_iALUsr_WriteALUSsr_ReadALUsr = 4, IIC_Br_WriteBr = 5, IIC_Br_WriteBrL = 6, IIC_Br_WriteBrTbl = 7, IIC_iLoad_mBr = 8, IIC_iLoad_i = 9, IIC_iLoadiALU = 10, IIC_iLoad_d_r = 11, IIC_iMAC32_WriteMAC32_ReadMUL_ReadMUL_ReadMAC = 12, IIC_iCMOVi_WriteALU = 13, IIC_iMOVi_WriteALU = 14, IIC_iCMOVix2 = 15, IIC_iCMOVr_WriteALU = 16, IIC_iCMOVsr_WriteALU = 17, IIC_iMOVix2addpc = 18, IIC_iMOVix2ld = 19, IIC_iMOVix2 = 20, IIC_iMOVsi_WriteALU = 21, IIC_iMUL32_WriteMUL32_ReadMUL_ReadMUL = 22, IIC_iALUr_WriteALU_ReadALU = 23, IIC_iLoad_r = 24, IIC_iLoad_bh_r = 25, IIC_iStore_r = 26, IIC_iStore_bh_r = 27, IIC_iMAC64_WriteMAC64Lo_WriteMAC64Hi_ReadMUL_ReadMUL_ReadMAC_ReadMAC = 28, IIC_iMUL64_WriteMUL64Lo_WriteMUL64Hi_ReadMUL_ReadMUL = 29, IIC_iStore_d_r = 30, IIC_iStore_ru = 31, IIC_Br = 32, IIC_VMOVImm = 33, IIC_fpUNA64 = 34, IIC_fpUNA16 = 35, IIC_fpUNA32 = 36, IIC_iALUsi_WriteALUsi_ReadALUsr = 37, IIC_iCMOVsi_WriteALU = 38, IIC_iALUsi_WriteALUsi_ReadALU = 39, IIC_iStore_ru_WriteST = 40, IIC_iALUr_WriteALU = 41, IIC_iALUi_WriteALU = 42, IIC_iLoad_mu = 43, IIC_iPop_Br_WriteBrL = 44, IIC_iALUsr_WriteALUsr_ReadALUsr = 45, IIC_iBITi_WriteALU_ReadALU = 46, IIC_iBITr_WriteALU_ReadALU_ReadALU = 47, IIC_iBITsr_WriteALUsi_ReadALU = 48, IIC_iBITsr_WriteALUsr_ReadALUsr = 49, IIC_VDOTPROD = 50, IIC_iUNAsi = 51, WriteBrL = 52, WriteBr = 53, IIC_iUNAr_WriteALU = 54, IIC_iCMPi_WriteCMP_ReadALU = 55, IIC_iCMPr_WriteCMP_ReadALU_ReadALU = 56, IIC_iCMPsr_WriteCMPsi_ReadALU = 57, IIC_iCMPsr_WriteCMPsr_ReadALU = 58, IIC_fpSTAT = 59, IIC_iLoad_m = 60, IIC_iLoad_bh_ru = 61, IIC_iLoad_bh_iu = 62, IIC_iLoad_bh_si = 63, IIC_iLoad_d_ru = 64, IIC_iLoad_ru = 65, IIC_iLoad_iu = 66, IIC_iLoad_si = 67, IIC_iMOVr_WriteALU = 68, IIC_iMOVsr_WriteALU = 69, IIC_iMVNi_WriteALU = 70, IIC_iMVNr_WriteALU = 71, IIC_iMVNsr_WriteALU = 72, IIC_iBITsi_WriteALUsi_ReadALU = 73, IIC_Preload_WritePreLd = 74, IIC_iDIV_WriteDIV = 75, IIC_iMAC16_WriteMAC16_ReadMUL_ReadMUL_ReadMAC = 76, WriteMAC32_ReadMUL_ReadMUL_ReadMAC = 77, WriteMAC64Lo_WriteMAC64Hi_ReadMUL_ReadMUL_ReadMAC_ReadMAC = 78, WriteMUL64Lo_WriteMUL64Hi_ReadMUL_ReadMUL = 79, WriteMUL32_ReadMUL_ReadMUL = 80, IIC_iMUL16_WriteMUL16_ReadMUL_ReadMUL = 81, IIC_iStore_m = 82, IIC_iStore_mu = 83, IIC_iStore_bh_ru = 84, IIC_iStore_bh_iu = 85, IIC_iStore_bh_si = 86, IIC_iStore_d_ru = 87, IIC_iStore_iu = 88, IIC_iStore_si = 89, IIC_iEXTAr_WriteALUsr = 90, IIC_iEXTr_WriteALUsi = 91, IIC_iTSTi_WriteCMP_ReadALU = 92, IIC_iTSTr_WriteCMP_ReadALU_ReadALU = 93, IIC_iTSTsr_WriteCMPsi_ReadALU = 94, IIC_iTSTsr_WriteCMPsr_ReadALU = 95, IIC_iMUL64_WriteMAC64Lo_WriteMAC64Hi_ReadMUL_ReadMUL = 96, WriteALU_ReadALU_ReadALU = 97, IIC_VABAD = 98, IIC_VABAQ = 99, IIC_VSUBi4Q = 100, IIC_VBIND = 101, IIC_VBINQ = 102, IIC_VSUBi4D = 103, IIC_VUNAD = 104, IIC_VUNAQ = 105, IIC_VUNAiQ = 106, IIC_VUNAiD = 107, IIC_fpALU64_WriteFPALU64 = 108, IIC_fpALU16_WriteFPALU32 = 109, IIC_VBINi4D = 110, IIC_VSHLiD = 111, IIC_fpALU32_WriteFPALU32 = 112, IIC_VSUBiD = 113, IIC_VBINiQ = 114, IIC_VBINiD = 115, IIC_VMACD = 116, IIC_VMACQ = 117, IIC_VCNTiQ = 118, IIC_VCNTiD = 119, IIC_fpCMP64 = 120, IIC_fpCMP16 = 121, IIC_fpCMP32 = 122, WriteFPCVT = 123, IIC_fpCVTSH_WriteFPCVT = 124, IIC_fpCVTHS_WriteFPCVT = 125, IIC_fpCVTDS_WriteFPCVT = 126, IIC_fpCVTSD_WriteFPCVT = 127, IIC_fpDIV64_WriteFPDIV64 = 128, IIC_fpDIV16_WriteFPDIV32 = 129, IIC_fpDIV32_WriteFPDIV32 = 130, IIC_VMOVIS = 131, IIC_VMOVD = 132, IIC_VMOVQ = 133, IIC_VEXTD = 134, IIC_VEXTQ = 135, IIC_fpFMAC64_WriteFPMAC64_ReadFPMAC_ReadFPMUL_ReadFPMUL = 136, IIC_fpFMAC16_WriteFPMAC32_ReadFPMAC_ReadFPMUL_ReadFPMUL = 137, IIC_fpFMAC32_WriteFPMAC32_ReadFPMAC_ReadFPMUL_ReadFPMUL = 138, IIC_VFMACD = 139, IIC_VFMACQ = 140, IIC_VMOVSI = 141, IIC_VBINi4Q = 142, IIC_fpCVTDI = 143, IIC_VLD1dup_WriteVLD2 = 144, IIC_VLD1dupu = 145, IIC_VLD1dup = 146, IIC_VLD1dupu_WriteVLD1 = 147, IIC_VLD1ln = 148, IIC_VLD1lnu_WriteVLD1 = 149, IIC_VLD1ln_WriteVLD1 = 150, IIC_VLD1_WriteVLD1 = 151, IIC_VLD1x4_WriteVLD4 = 152, IIC_VLD1x2u_WriteVLD4 = 153, IIC_VLD1x3_WriteVLD3 = 154, IIC_VLD1x2u_WriteVLD3 = 155, IIC_VLD1u_WriteVLD1 = 156, IIC_VLD1x2_WriteVLD2 = 157, IIC_VLD1x2u_WriteVLD2 = 158, IIC_VLD2dup = 159, IIC_VLD2dupu_WriteVLD1 = 160, IIC_VLD2dup_WriteVLD2 = 161, IIC_VLD2ln_WriteVLD1 = 162, IIC_VLD2lnu_WriteVLD1 = 163, IIC_VLD2lnu = 164, IIC_VLD2_WriteVLD2 = 165, IIC_VLD2u_WriteVLD2 = 166, IIC_VLD2x2_WriteVLD4 = 167, IIC_VLD2x2u_WriteVLD4 = 168, IIC_VLD3dup_WriteVLD2 = 169, IIC_VLD3dupu_WriteVLD2 = 170, IIC_VLD3ln_WriteVLD2 = 171, IIC_VLD3lnu_WriteVLD2 = 172, IIC_VLD3_WriteVLD3 = 173, IIC_VLD3u_WriteVLD3 = 174, IIC_VLD4dup = 175, IIC_VLD4dup_WriteVLD2 = 176, IIC_VLD4dupu_WriteVLD2 = 177, IIC_VLD4ln_WriteVLD2 = 178, IIC_VLD4lnu_WriteVLD2 = 179, IIC_VLD4lnu = 180, IIC_VLD4_WriteVLD4 = 181, IIC_VLD4u_WriteVLD4 = 182, IIC_fpLoad_mu = 183, IIC_fpLoad_m = 184, IIC_fpLoad64 = 185, IIC_fpLoad16 = 186, IIC_fpLoad32 = 187, IIC_fpMAC64_WriteFPMAC64_ReadFPMAC_ReadFPMUL_ReadFPMUL = 188, IIC_fpMAC16 = 189, IIC_VMACi32D = 190, IIC_VMACi16D = 191, IIC_fpMAC32_WriteFPMAC32_ReadFPMAC_ReadFPMUL_ReadFPMUL = 192, IIC_VMACi32Q = 193, IIC_VMACi16Q = 194, IIC_fpMOVID_WriteFPMOV = 195, IIC_fpMOVIS_WriteFPMOV = 196, IIC_VQUNAiD = 197, IIC_VMOVN = 198, IIC_fpMOVSI_WriteFPMOV = 199, IIC_fpMOVDI_WriteFPMOV = 200, IIC_fpMUL64_WriteFPMUL64_ReadFPMUL_ReadFPMUL = 201, IIC_fpMUL16_WriteFPMUL32_ReadFPMUL_ReadFPMUL = 202, IIC_VMULi16D = 203, IIC_VMULi32D = 204, IIC_fpMUL32_WriteFPMUL32_ReadFPMUL_ReadFPMUL = 205, IIC_VFMULD = 206, IIC_VFMULQ = 207, IIC_VMULi16Q = 208, IIC_VMULi32Q = 209, IIC_VSHLiQ = 210, IIC_VPALiQ = 211, IIC_VPALiD = 212, IIC_VPBIND = 213, IIC_VQUNAiQ = 214, IIC_VSHLi4Q = 215, IIC_VSHLi4D = 216, IIC_VRECSD = 217, IIC_VRECSQ = 218, IIC_VMOVISL = 219, IIC_fpCVTID_WriteFPCVT = 220, IIC_fpCVTIH_WriteFPCVT = 221, IIC_fpCVTIS_WriteFPCVT = 222, IIC_fpSQRT64_WriteFPSQRT64 = 223, IIC_fpSQRT16 = 224, IIC_fpSQRT32_WriteFPSQRT32 = 225, IIC_VST1ln_WriteVST1 = 226, IIC_VST1lnu_WriteVST1 = 227, IIC_VST1_WriteVST1 = 228, IIC_VST1x4_WriteVST4 = 229, IIC_VST1x4u_WriteVST4 = 230, IIC_VLD1x4u_WriteVST4 = 231, IIC_VST1x3_WriteVST3 = 232, IIC_VST1x3u_WriteVST3 = 233, IIC_VLD1x3u_WriteVST3 = 234, IIC_VLD1u_WriteVST1 = 235, IIC_VST1x2_WriteVST2 = 236, IIC_VLD1x2u_WriteVST2 = 237, IIC_VST2ln_WriteVST1 = 238, IIC_VST2lnu_WriteVST1 = 239, IIC_VST2lnu = 240, IIC_VST2 = 241, IIC_VLD1u_WriteVST2 = 242, IIC_VST2_WriteVST2 = 243, IIC_VST2x2_WriteVST4 = 244, IIC_VST2x2u_WriteVST4 = 245, IIC_VLD1u_WriteVST4 = 246, IIC_VST3ln_WriteVST2 = 247, IIC_VST3lnu_WriteVST2 = 248, IIC_VST3lnu = 249, IIC_VST3ln = 250, IIC_VST3_WriteVST3 = 251, IIC_VST3u_WriteVST3 = 252, IIC_VST4ln_WriteVST2 = 253, IIC_VST4lnu_WriteVST2 = 254, IIC_VST4lnu = 255, IIC_VST4_WriteVST4 = 256, IIC_VST4u_WriteVST4 = 257, IIC_fpStore_mu = 258, IIC_fpStore_m = 259, IIC_fpStore64 = 260, IIC_fpStore16 = 261, IIC_fpStore32 = 262, IIC_VSUBiQ = 263, IIC_VTB1 = 264, IIC_VTB2 = 265, IIC_VTB3 = 266, IIC_VTB4 = 267, IIC_VTBX1 = 268, IIC_VTBX2 = 269, IIC_VTBX3 = 270, IIC_VTBX4 = 271, IIC_fpCVTDI_WriteFPCVT = 272, IIC_fpCVTHI_WriteFPCVT = 273, IIC_fpCVTSI_WriteFPCVT = 274, IIC_VPERMD = 275, IIC_VPERMQ = 276, IIC_VPERMQ3 = 277, IIC_iUNAsi_WriteALU = 278, IIC_iBITi_WriteALU = 279, IIC_iCMPsi_WriteCMPsi_ReadALU_ReadALU = 280, IIC_iCMPi_WriteCMP = 281, IIC_iCMPr_WriteCMP = 282, IIC_iCMPsi_WriteCMPsi = 283, IIC_iALUx = 284, WriteLd = 285, IIC_iLoad_bh_i_WriteLd = 286, IIC_iLoad_bh_iu_WriteLd = 287, IIC_iLoad_bh_si_WriteLd = 288, IIC_iLoad_d_ru_WriteLd = 289, IIC_iLoad_d_i_WriteLd = 290, IIC_iLoad_i_WriteLd = 291, IIC_iLoad_iu_WriteLd = 292, IIC_iLoad_si_WriteLd = 293, IIC_iMVNsi_WriteALU = 294, IIC_iALUsir_WriteALUsi_ReadALU = 295, IIC_iMUL16_WriteMAC16_ReadMUL_ReadMUL_ReadMAC = 296, IIC_iMAC32 = 297, WriteALU = 298, WriteST = 299, IIC_iStore_bh_i_WriteST = 300, IIC_iStore_bh_iu_WriteST = 301, IIC_iStore_bh_si_WriteST = 302, IIC_iStore_d_ru_WriteST = 303, IIC_iStore_d_r_WriteST = 304, IIC_iStore_iu_WriteST = 305, IIC_iStore_i_WriteST = 306, IIC_iStore_si_WriteST = 307, IIC_iEXTAsr_WriteALU_ReadALU = 308, IIC_iEXTr_WriteALU_ReadALU = 309, IIC_iTSTi_WriteCMP = 310, IIC_iTSTr_WriteCMP = 311, IIC_iTSTsi_WriteCMPsi = 312, IIC_iBITr_WriteALU = 313, IIC_iLoad_bh_r_WriteLd = 314, IIC_iLoad_r_WriteLd = 315, IIC_iPop_WriteLd = 316, IIC_iStore_m_WriteST = 317, IIC_iStore_bh_r_WriteST = 318, IIC_iStore_r_WriteST = 319, IIC_iTSTr_WriteALU = 320, ANDri_ORRri_EORri_BICri = 321, ANDrr_ORRrr_EORrr_BICrr = 322, ANDrsi_ORRrsi_EORrsi_BICrsi = 323, ANDrsr_ORRrsr_EORrsr_BICrsr = 324, MOVsra_flag_MOVsrl_flag = 325, MOVsr_MOVsi = 326, MVNsr = 327, MOVCCsi_MOVCCsr = 328, MVNr = 329, MOVCCi32imm = 330, MOVi32imm = 331, MOV_ga_pcrel = 332, MOV_ga_pcrel_ldr = 333, SEL = 334, BFC_BFI_UBFX_SBFX = 335, MULv5_MUL_SMMUL_SMMULR = 336, MLAv5_MLA_MLS_SMMLA_SMMLAR_SMMLS_SMMLSR = 337, SMULLv5_SMULL_UMULLv5 = 338, UMULL = 339, SMLAL_UMLALv5_UMLAL_UMAAL_SMLALv5_SMLALBB_SMLALBT_SMLALTB_SMLALTT = 340, SMLAD_SMLADX_SMLSD_SMLSDX = 341, SMLALD_SMLSLD = 342, SMLALDX_SMLSLDX = 343, SMUAD_SMUADX_SMUSD_SMUSDX = 344, SMULBB_SMULBT_SMULTB_SMULTT_SMULWB_SMULWT = 345, SMLABB_SMLABT_SMLATB_SMLATT_SMLAWB_SMLAWT = 346, LDRi12_PICLDR = 347, LDRrs = 348, LDRBi12_PICLDRH_PICLDRB_PICLDRSH_PICLDRSB_LDRH_LDRSH_LDRSB = 349, LDRHTii_LDRSHTii_LDRSBTii = 350, LDRHTi_LDRHTr_LDRH_POST_LDRH_PRE_LDRSHTi_LDRSHTr_LDRSH_POST_LDRSH_PRE_LDRSBTi_LDRSBTr_LDRSB_POST_LDRSB_PRE = 351, SXTB_SXTB16_SXTH_UXTB_UXTB16_UXTH = 352, t2SXTB_t2SXTB16_t2SXTH_t2UXTB_t2UXTB16_t2UXTH = 353, t2MOVCCi32imm = 354, t2MOVi32imm = 355, t2MOV_ga_pcrel = 356, t2MOVi16_ga_pcrel = 357, t2SEL = 358, t2BFC_t2UBFX_t2SBFX = 359, t2BFI = 360, QADD_QADD16_QADD8_QSUB_QSUB16_QSUB8_QDADD_QDSUB_QASX_QSAX_UQADD8_UQADD16_UQSUB8_UQSUB16_UQASX_UQSAX = 361, SSAT_SSAT16_USAT_USAT16_t2QADD_t2QADD16_t2QADD8_t2QSUB_t2QSUB16_t2QSUB8_t2QDADD_t2QDSUB_t2QASX_t2QSAX_t2UQADD8_t2UQADD16_t2UQSUB8_t2UQSUB16_t2UQASX_t2UQSAX = 362, t2SSAT_t2SSAT16_t2USAT_t2USAT16 = 363, SADD8_SADD16_SSUB8_SSUB16_SASX_SSAX_UADD8_UADD16_USUB8_USUB16_UASX_USAX = 364, t2SADD8_t2SADD16_t2SSUB8_t2SSUB16_t2SASX_t2SSAX_t2UADD8_t2UADD16_t2USUB8_t2USUB16_t2UASX_t2USAX = 365, SHADD8_SHADD16_SHSUB8_SHSUB16_SHASX_SHSAX_UHADD8_UHADD16_UHSUB8_UHSUB16_UHASX_UHSAX = 366, SXTAB_SXTAB16_SXTAH_UXTAB_UXTAB16_UXTAH = 367, t2SHADD8_t2SHADD16_t2SHSUB8_t2SHSUB16_t2SHASX_t2SHSAX_t2UHADD8_t2UHADD16_t2UHSUB8_t2UHSUB16_t2UHASX_t2UHSAX = 368, t2SXTAB_t2SXTAB16_t2SXTAH_t2UXTAB_t2UXTAB16_t2UXTAH = 369, USAD8 = 370, USADA8 = 371, SMUSD_SMUSDX = 372, t2MUL_t2SMMUL_t2SMMULR = 373, t2SMULBB_t2SMULBT_t2SMULTB_t2SMULTT_t2SMULWB_t2SMULWT = 374, t2SMUSD_t2SMUSDX = 375, t2MLA_t2MLS_t2SMMLA_t2SMMLAR_t2SMMLS_t2SMMLSR = 376, t2SMUAD_t2SMUADX = 377, SMLSD_SMLSDX = 378, t2SMLABB_t2SMLABT_t2SMLATB_t2SMLATT_t2SMLAWB_t2SMLAWT = 379, t2SMLSD_t2SMLSDX = 380, t2SMLAD_t2SMLADX = 381, SMULL = 382, t2SMULL_t2UMULL = 383, t2SMLAL_t2SMLALBB_t2SMLALBT_t2SMLALD_t2SMLALDX_t2SMLALTB_t2SMLALTT_t2UMLAL_t2SMLSLD_t2SMLSLDX_t2UMAAL = 384, SDIV_UDIV_t2SDIV_t2UDIV = 385, LDRi12 = 386, LDRBi12 = 387, LDRBrs = 388, t2LDRpci_pic = 389, t2LDRi12_t2LDRi8_t2LDRpci_tLDRi_tLDRpci_tLDRspi = 390, t2LDRs = 391, t2LDRBi12_t2LDRBi8_t2LDRBpci_t2LDRHi12_t2LDRHi8_t2LDRHpci_tLDRBi_tLDRHi = 392, t2LDRBs_t2LDRHs = 393, LDREX_LDREXB_LDREXD_LDREXH_tLDRpci_pic = 394, tLDRBr_tLDRHr = 395, tLDRr = 396, LDRH_PICLDRB_PICLDRH = 397, LDRcp = 398, t2LDRSBpcrel_t2LDRSHpcrel = 399, t2LDRSBi12_t2LDRSBi8_t2LDRSBpci_t2LDRSHi12_t2LDRSHi8_t2LDRSHpci = 400, t2LDRSBs_t2LDRSHs = 401, tLDRSB_tLDRSH = 402, LDRBT_POST_IMM_LDRBT_POST_REG_LDRB_POST_REG_LDRB_PRE_REG = 403, LDRB_POST_IMM_LDRB_PRE_IMM = 404, LDRT_POST_IMM_LDRT_POST_REG_LDR_POST_REG_LDR_PRE_REG = 405, LDR_POST_IMM_LDR_PRE_IMM = 406, LDRH_POST_LDRH_PRE_LDRHTi_LDRHTr = 407, LDRHTii = 408, t2LDR_POST_imm_t2LDR_PRE_imm = 409, t2LDRB_POST_t2LDRB_PRE_t2LDRH_POST_t2LDRH_PRE = 410, t2LDR_POST_t2LDR_PRE = 411, t2LDRBT_t2LDRHT = 412, t2LDRT = 413, t2LDRSB_POST_t2LDRSB_PRE_t2LDRSH_POST_t2LDRSH_PRE = 414, t2LDRSBT_t2LDRSHT = 415, t2LDRDi8 = 416, LDRD = 417, LDRD_POST_LDRD_PRE = 418, t2LDRD_POST_t2LDRD_PRE = 419, LDMDA_LDMDB_LDMIA_LDMIB_t2LDMDB_t2LDMIA_sysLDMDA_sysLDMDB_sysLDMIA_sysLDMIB_tLDMIA = 420, LDMDA_UPD_LDMDB_UPD_LDMIA_UPD_LDMIB_UPD_tLDMIA_UPD_sysLDMDA_UPD_sysLDMDB_UPD_sysLDMIA_UPD_sysLDMIB_UPD_t2LDMDB_UPD_t2LDMIA_UPD = 421, LDMIA_RET_t2LDMIA_RET = 422, tPOP_RET = 423, tPOP = 424, PICSTR_STRi12 = 425, PICSTRB_PICSTRH_STRBi12_STRH = 426, STRrs = 427, STRBrs = 428, STREX_STREXB_STREXD_STREXH = 429, t2STRi12_t2STRi8_tSTRi_tSTRspi = 430, t2STRs = 431, t2STRBi12_t2STRBi8_t2STRHi12_t2STRHi8_tSTRBi_tSTRHi = 432, t2STRBs_t2STRHs = 433, tSTRBr_tSTRHr = 434, tSTRr = 435, STRBT_POST_IMM_STRBT_POST_REG_STRB_POST_REG_STRB_PRE_REG_STRH_POST_STRH_PRE_STRHTi_STRHTr = 436, STRB_POST_IMM_STRB_PRE_IMM = 437, STRT_POST_IMM_STRT_POST_REG_STR_POST_REG_STR_PRE_REG_STRi_preidx_STRr_preidx_STRBi_preidx_STRBr_preidx_STRH_preidx = 438, STR_POST_IMM_STR_PRE_IMM = 439, STRBT_POST_STRT_POST_t2STR_POST_imm_t2STR_PRE_imm = 440, t2STR_POST_t2STR_PRE_t2STRH_PRE = 441, t2STRB_POST_t2STRB_PRE_t2STRH_POST = 442, t2STR_preidx_t2STRB_preidx_t2STRH_preidx = 443, t2STRBT_t2STRHT = 444, t2STRT = 445, STRD = 446, t2STRDi8 = 447, t2STRD_POST_t2STRD_PRE = 448, STRD_POST_STRD_PRE = 449, STMDA_STMDB_STMIA_STMIB_sysSTMDA_sysSTMDB_sysSTMIA_sysSTMIB_t2STMDB_t2STMIA = 450, STMDA_UPD_STMDB_UPD_STMIA_UPD_STMIB_UPD_sysSTMDA_UPD_sysSTMDB_UPD_sysSTMIA_UPD_sysSTMIB_UPD_t2STMDB_UPD_t2STMIA_UPD_tSTMIA_UPD = 451, tPUSH = 452, LDRLIT_ga_abs_tLDRLIT_ga_abs = 453, LDRLIT_ga_pcrel_tLDRLIT_ga_pcrel = 454, LDRLIT_ga_pcrel_ldr = 455, t2IT = 456, ITasm = 457, VADDv16i8_VADDv2i64_VADDv4i32_VADDv8i16_VANDq_VBICq_VEORq_VORNq_VORRq_VBIFq_VBITq_VBSLq_VBSPq = 458, VADDv1i64_VADDv2i32_VADDv4i16_VADDv8i8_VANDd_VBICd_VEORd_VORNd_VORRd_VBIFd_VBITd_VBSLd_VBSPd = 459, VSUBv16i8_VSUBv2i64_VSUBv4i32_VSUBv8i16 = 460, VSUBv1i64_VSUBv2i32_VSUBv4i16_VSUBv8i8_VADDWsv2i64_VADDWsv4i32_VADDWsv8i16_VADDWuv2i64_VADDWuv4i32_VADDWuv8i16_VSUBWsv2i64_VSUBWsv4i32_VSUBWsv8i16_VSUBWuv2i64_VSUBWuv4i32_VSUBWuv8i16 = 461, VNEGf32q = 462, VNEGfd = 463, VNEGs16d_VNEGs32d_VNEGs8d_VADDLsv2i64_VADDLsv4i32_VADDLsv8i16_VADDLuv2i64_VADDLuv4i32_VADDLuv8i16_VSUBLsv2i64_VSUBLsv4i32_VSUBLsv8i16_VSUBLuv2i64_VSUBLuv4i32_VSUBLuv8i16_VPADDi16_VPADDi32_VPADDi8_VPADDLsv16i8_VPADDLsv2i32_VPADDLsv4i16_VPADDLsv4i32_VPADDLsv8i16_VPADDLsv8i8_VPADDLuv16i8_VPADDLuv2i32_VPADDLuv4i16_VPADDLuv4i32_VPADDLuv8i16_VPADDLuv8i8_VSHLLi16_VSHLLi32_VSHLLi8_VSHLLsv2i64_VSHLLsv4i32_VSHLLsv8i16_VSHLLuv2i64_VSHLLuv4i32_VSHLLuv8i16_VSHLiv16i8_VSHLiv1i64_VSHLiv2i32_VSHLiv2i64_VSHLiv4i16_VSHLiv4i32_VSHLiv8i16_VSHLiv8i8_VSHLsv1i64_VSHLsv2i32_VSHLsv4i16_VSHLsv8i8_VSHLuv1i64_VSHLuv2i32_VSHLuv4i16_VSHLuv8i8_VSHRsv16i8_VSHRsv1i64_VSHRsv2i32_VSHRsv2i64_VSHRsv4i16_VSHRsv4i32_VSHRsv8i16_VSHRsv8i8_VSHRuv16i8_VSHRuv1i64_VSHRuv2i32_VSHRuv2i64_VSHRuv4i16_VSHRuv4i32_VSHRuv8i16_VSHRuv8i8_VSLIv1i64_VSLIv2i32_VSLIv4i16_VSLIv8i8_VSRIv1i64_VSRIv2i32_VSRIv4i16_VSRIv8i8 = 464, VNEGs16q_VNEGs32q_VNEGs8q_VSHLsv16i8_VSHLsv2i64_VSHLsv4i32_VSHLsv8i16_VSHLuv16i8_VSHLuv2i64_VSHLuv4i32_VSHLuv8i16_VSLIv16i8_VSLIv2i64_VSLIv4i32_VSLIv8i16_VSRIv16i8_VSRIv2i64_VSRIv4i32_VSRIv8i16 = 465, VHADDsv16i8_VHADDsv4i32_VHADDsv8i16_VHADDuv16i8_VHADDuv4i32_VHADDuv8i16_VRHADDsv16i8_VRHADDsv4i32_VRHADDsv8i16_VRHADDuv16i8_VRHADDuv4i32_VRHADDuv8i16_VTSTv16i8_VTSTv4i32_VTSTv8i16 = 466, VHADDsv2i32_VHADDsv4i16_VHADDsv8i8_VHADDuv2i32_VHADDuv4i16_VHADDuv8i8_VRHADDsv2i32_VRHADDsv4i16_VRHADDsv8i8_VRHADDuv2i32_VRHADDuv4i16_VRHADDuv8i8_VTSTv2i32_VTSTv4i16_VTSTv8i8 = 467, VHSUBsv16i8_VHSUBsv4i32_VHSUBsv8i16_VHSUBuv16i8_VHSUBuv4i32_VHSUBuv8i16 = 468, VHSUBsv2i32_VHSUBsv4i16_VHSUBsv8i8_VHSUBuv2i32_VHSUBuv4i16_VHSUBuv8i8 = 469, VBICiv2i32_VBICiv4i16_VBICiv4i32_VBICiv8i16_VORRiv2i32_VORRiv4i16_VORRiv4i32_VORRiv8i16 = 470, VQSHLsiv16i8_VQSHLsiv1i64_VQSHLsiv2i32_VQSHLsiv2i64_VQSHLsiv4i16_VQSHLsiv4i32_VQSHLsiv8i16_VQSHLsiv8i8_VQSHLsuv16i8_VQSHLsuv1i64_VQSHLsuv2i32_VQSHLsuv2i64_VQSHLsuv4i16_VQSHLsuv4i32_VQSHLsuv8i16_VQSHLsuv8i8_VQSHLsv1i64_VQSHLsv2i32_VQSHLsv4i16_VQSHLsv8i8_VQSHLuiv16i8_VQSHLuiv1i64_VQSHLuiv2i32_VQSHLuiv2i64_VQSHLuiv4i16_VQSHLuiv4i32_VQSHLuiv8i16_VQSHLuiv8i8_VQSHLuv1i64_VQSHLuv2i32_VQSHLuv4i16_VQSHLuv8i8 = 471, VQSHLsv16i8_VQSHLsv2i64_VQSHLsv4i32_VQSHLsv8i16_VQSHLuv16i8_VQSHLuv2i64_VQSHLuv4i32_VQSHLuv8i16 = 472, VCLSv16i8_VCLSv4i32_VCLSv8i16_VCLZv16i8_VCLZv4i32_VCLZv8i16_VCNTq = 473, VCLSv2i32_VCLSv4i16_VCLSv8i8_VCLZv2i32_VCLZv4i16_VCLZv8i8_VCNTd = 474, VEXTd16_VEXTd32_VEXTd8 = 475, VEXTq16_VEXTq32_VEXTq64_VEXTq8 = 476, VREV16d8_VREV32d16_VREV32d8_VREV64d16_VREV64d32_VREV64d8 = 477, VREV16q8_VREV32q16_VREV32q8_VREV64q16_VREV64q32_VREV64q8 = 478, VABALsv2i64_VABALsv4i32_VABALsv8i16_VABALuv2i64_VABALuv4i32_VABALuv8i16_VABAsv2i32_VABAsv4i16_VABAsv8i8_VABAuv2i32_VABAuv4i16_VABAuv8i8 = 479, VABAsv16i8_VABAsv4i32_VABAsv8i16_VABAuv16i8_VABAuv4i32_VABAuv8i16 = 480, VPADALsv16i8_VPADALsv4i32_VPADALsv8i16_VPADALuv16i8_VPADALuv4i32_VPADALuv8i16 = 481, VPADALsv2i32_VPADALsv4i16_VPADALsv8i8_VPADALuv2i32_VPADALuv4i16_VPADALuv8i8_VRSRAsv16i8_VRSRAsv1i64_VRSRAsv2i32_VRSRAsv2i64_VRSRAsv4i16_VRSRAsv4i32_VRSRAsv8i16_VRSRAsv8i8_VRSRAuv16i8_VRSRAuv1i64_VRSRAuv2i32_VRSRAuv2i64_VRSRAuv4i16_VRSRAuv4i32_VRSRAuv8i16_VRSRAuv8i8_VSRAsv16i8_VSRAsv1i64_VSRAsv2i32_VSRAsv2i64_VSRAsv4i16_VSRAsv4i32_VSRAsv8i16_VSRAsv8i8_VSRAuv16i8_VSRAuv1i64_VSRAuv2i32_VSRAuv2i64_VSRAuv4i16_VSRAuv4i32_VSRAuv8i16_VSRAuv8i8 = 482, VACGEfd_VACGEhd_VACGTfd_VACGThd_VCEQfd_VCEQhd_VCGEfd_VCGEhd_VCGTfd_VCGThd = 483, VACGEfq_VACGEhq_VACGTfq_VACGThq_VCEQfq_VCEQhq_VCGEfq_VCGEhq_VCGTfq_VCGThq = 484, VCEQv16i8_VCEQv4i32_VCEQv8i16_VCGEsv16i8_VCGEsv4i32_VCGEsv8i16_VCGEuv16i8_VCGEuv4i32_VCGEuv8i16_VCGTsv16i8_VCGTsv4i32_VCGTsv8i16_VCGTuv16i8_VCGTuv4i32_VCGTuv8i16_VQSUBsv16i8_VQSUBsv2i64_VQSUBsv4i32_VQSUBsv8i16_VQSUBuv16i8_VQSUBuv2i64_VQSUBuv4i32_VQSUBuv8i16 = 485, VCEQv2i32_VCEQv4i16_VCEQv8i8_VCGEsv2i32_VCGEsv4i16_VCGEsv8i8_VCGEuv2i32_VCGEuv4i16_VCGEuv8i8_VCGTsv2i32_VCGTsv4i16_VCGTsv8i8_VCGTuv2i32_VCGTuv4i16_VCGTuv8i8_VQSUBsv1i64_VQSUBsv2i32_VQSUBsv4i16_VQSUBsv8i8_VQSUBuv1i64_VQSUBuv2i32_VQSUBuv4i16_VQSUBuv8i8 = 486, VCEQzv16i8_VCEQzv2f32_VCEQzv2i32_VCEQzv4f16_VCEQzv4f32_VCEQzv4i16_VCEQzv4i32_VCEQzv8f16_VCEQzv8i16_VCEQzv8i8_VCGEzv16i8_VCGEzv2f32_VCGEzv2i32_VCGEzv4f16_VCGEzv4f32_VCGEzv4i16_VCGEzv4i32_VCGEzv8f16_VCGEzv8i16_VCGEzv8i8_VCGTzv16i8_VCGTzv2f32_VCGTzv2i32_VCGTzv4f16_VCGTzv4f32_VCGTzv4i16_VCGTzv4i32_VCGTzv8f16_VCGTzv8i16_VCGTzv8i8_VCLEzv16i8_VCLEzv2f32_VCLEzv2i32_VCLEzv4f16_VCLEzv4f32_VCLEzv4i16_VCLEzv4i32_VCLEzv8f16_VCLEzv8i16_VCLEzv8i8_VCLTzv16i8_VCLTzv2f32_VCLTzv2i32_VCLTzv4f16_VCLTzv4f32_VCLTzv4i16_VCLTzv4i32_VCLTzv8f16_VCLTzv8i16_VCLTzv8i8 = 487, VRSHLsv16i8_VRSHLsv2i64_VRSHLsv4i32_VRSHLsv8i16_VRSHLuv16i8_VRSHLuv2i64_VRSHLuv4i32_VRSHLuv8i16_VQRSHLsv16i8_VQRSHLsv2i64_VQRSHLsv4i32_VQRSHLsv8i16_VQRSHLuv16i8_VQRSHLuv2i64_VQRSHLuv4i32_VQRSHLuv8i16 = 488, VRSHLsv1i64_VRSHLsv2i32_VRSHLsv4i16_VRSHLsv8i8_VRSHLuv1i64_VRSHLuv2i32_VRSHLuv4i16_VRSHLuv8i8_VQRSHLsv1i64_VQRSHLsv2i32_VQRSHLsv4i16_VQRSHLsv8i8_VQRSHLuv1i64_VQRSHLuv2i32_VQRSHLuv4i16_VQRSHLuv8i8_VRSHRsv16i8_VRSHRsv1i64_VRSHRsv2i32_VRSHRsv2i64_VRSHRsv4i16_VRSHRsv4i32_VRSHRsv8i16_VRSHRsv8i8_VRSHRuv16i8_VRSHRuv1i64_VRSHRuv2i32_VRSHRuv2i64_VRSHRuv4i16_VRSHRuv4i32_VRSHRuv8i16_VRSHRuv8i8 = 489, VABSfd = 490, VABSfq = 491, VABSv16i8_VABSv4i32_VABSv8i16 = 492, VABSv2i32_VABSv4i16_VABSv8i8 = 493, VQABSv16i8_VQABSv4i32_VQABSv8i16_VQNEGv16i8_VQNEGv4i32_VQNEGv8i16 = 494, VQABSv2i32_VQABSv4i16_VQABSv8i8_VQNEGv2i32_VQNEGv4i16_VQNEGv8i8 = 495, VQADDsv16i8_VQADDsv2i64_VQADDsv4i32_VQADDsv8i16_VQADDuv16i8_VQADDuv2i64_VQADDuv4i32_VQADDuv8i16 = 496, VQADDsv1i64_VQADDsv2i32_VQADDsv4i16_VQADDsv8i8_VQADDuv1i64_VQADDuv2i32_VQADDuv4i16_VQADDuv8i8 = 497, VRECPEd_VRECPEfd_VRECPEhd_VRSQRTEd_VRSQRTEfd_VRSQRTEhd = 498, VRECPEfq_VRECPEhq_VRECPEq_VRSQRTEfq_VRSQRTEhq_VRSQRTEq = 499, VADDHNv2i32_VADDHNv4i16_VADDHNv8i8_VSUBHNv2i32_VSUBHNv4i16_VSUBHNv8i8 = 500, VSHRNv2i32_VSHRNv4i16_VSHRNv8i8 = 501, VRADDHNv2i32_VRADDHNv4i16_VRADDHNv8i8_VRSUBHNv2i32_VRSUBHNv4i16_VRSUBHNv8i8 = 502, VRSHRNv2i32_VRSHRNv4i16_VRSHRNv8i8_VQSHRNsv2i32_VQSHRNsv4i16_VQSHRNsv8i8_VQSHRNuv2i32_VQSHRNuv4i16_VQSHRNuv8i8_VQSHRUNv2i32_VQSHRUNv4i16_VQSHRUNv8i8_VQRSHRNsv2i32_VQRSHRNsv4i16_VQRSHRNsv8i8_VQRSHRNuv2i32_VQRSHRNuv4i16_VQRSHRNuv8i8_VQRSHRUNv2i32_VQRSHRUNv4i16_VQRSHRUNv8i8 = 503, VTBL1 = 504, VTBX1 = 505, VTBL2 = 506, VTBX2 = 507, VTBL3_VTBL3Pseudo = 508, VTBX3_VTBX3Pseudo = 509, VTBL4_VTBL4Pseudo = 510, VTBX4_VTBX4Pseudo = 511, VSWPd_VSWPq = 512, VTRNd16_VTRNd32_VTRNd8_VUZPd16_VUZPd8_VZIPd16_VZIPd8 = 513, VTRNq16_VTRNq32_VTRNq8 = 514, VUZPq16_VUZPq32_VUZPq8_VZIPq16_VZIPq32_VZIPq8 = 515, VABSD_VNEGD = 516, VABSS_VNEGS = 517, VCMPD_VCMPZD_VCMPED_VCMPEZD = 518, VCMPS_VCMPZS_VCMPES_VCMPEZS = 519, VADDS_VSUBS = 520, VADDfd_VSUBfd_VABDfd_VABDhd_VMAXfd_VMAXhd_VMINfd_VMINhd = 521, VADDfq_VSUBfq_VABDfq_VABDhq_VMAXfq_VMAXhq_VMINfq_VMINhq = 522, VABDLsv2i64_VABDLsv4i32_VABDLsv8i16_VABDLuv2i64_VABDLuv4i32_VABDLuv8i16_VABDsv16i8_VABDsv4i32_VABDsv8i16_VABDuv16i8_VABDuv4i32_VABDuv8i16_VMAXsv16i8_VMAXsv4i32_VMAXsv8i16_VMAXuv16i8_VMAXuv4i32_VMAXuv8i16_VMINsv16i8_VMINsv4i32_VMINsv8i16_VMINuv16i8_VMINuv4i32_VMINuv8i16 = 523, VABDsv2i32_VABDsv4i16_VABDsv8i8_VABDuv2i32_VABDuv4i16_VABDuv8i8_VMAXsv2i32_VMAXsv4i16_VMAXsv8i8_VMAXuv2i32_VMAXuv4i16_VMAXuv8i8_VMINsv2i32_VMINsv4i16_VMINsv8i8_VMINuv2i32_VMINuv4i16_VMINuv8i8_VPMAXs16_VPMAXs32_VPMAXs8_VPMAXu16_VPMAXu32_VPMAXu8_VPMINs16_VPMINs32_VPMINs8_VPMINu16_VPMINu32_VPMINu8 = 524, VPADDf_VPMAXf_VPMAXh_VPMINf_VPMINh = 525, VADDD_VSUBD = 526, VRECPSfd_VRECPShd_VRSQRTSfd_VRSQRTShd = 527, VRECPSfq_VRECPShq_VRSQRTSfq_VRSQRTShq = 528, VMULS_VNMULS = 529, VMULfd = 530, VMULfq = 531, VMULpd_VMULslhd_VMULslv4i16_VMULv4i16_VMULv8i8_VQDMULHslv4i16_VQDMULHv4i16_VQRDMULHslv4i16_VQRDMULHv4i16_VMULLp8_VMULLslsv2i32_VMULLslsv4i16_VMULLsluv2i32_VMULLsluv4i16_VMULLsv4i32_VMULLsv8i16_VMULLuv4i32_VMULLuv8i16_VQDMULLslv2i32_VQDMULLslv4i16_VQDMULLv4i32 = 532, VMULpq_VMULslhq_VMULslv8i16_VMULv16i8_VMULv8i16_VQDMULHslv8i16_VQDMULHv8i16_VQRDMULHslv8i16_VQRDMULHv8i16 = 533, VMULslfd = 534, VMULslfq = 535, VMULslv2i32_VMULv2i32_VQDMULHslv2i32_VQDMULHv2i32_VQRDMULHslv2i32_VQRDMULHv2i32_VMULLsv2i64_VMULLuv2i64_VQDMULLv2i64 = 536, VMULslv4i32_VMULv4i32_VQDMULHslv4i32_VQDMULHv4i32_VQRDMULHslv4i32_VQRDMULHv4i32 = 537, VMULLp64 = 538, VMLAD_VMLSD_VNMLAD_VNMLSD = 539, VMLAH_VMLSH_VNMLAH_VNMLSH = 540, VMLALslsv2i32_VMLALsluv2i32_VMLALsv2i64_VMLALuv2i64_VMLAslv2i32_VMLAv2i32_VMLSLslsv2i32_VMLSLsluv2i32_VMLSLsv2i64_VMLSLuv2i64_VMLSslv2i32_VMLSv2i32_VQDMLALslv2i32_VQDMLALv2i64_VQDMLSLslv2i32_VQDMLSLv2i64 = 541, VMLALslsv4i16_VMLALsluv4i16_VMLALsv4i32_VMLALsv8i16_VMLALuv4i32_VMLALuv8i16_VMLAslv4i16_VMLAv4i16_VMLAv8i8_VMLSLslsv4i16_VMLSLsluv4i16_VMLSLsv4i32_VMLSLsv8i16_VMLSLuv4i32_VMLSLuv8i16_VMLSslv4i16_VMLSv4i16_VMLSv8i8_VQDMLALslv4i16_VQDMLALv4i32_VQDMLSLslv4i16_VQDMLSLv4i32 = 542, VMLAS_VMLSS_VNMLAS_VNMLSS = 543, VMLAfd_VMLAhd_VMLAslfd_VMLAslhd_VMLSfd_VMLShd_VMLSslfd_VMLSslhd = 544, VMLAfq_VMLAhq_VMLAslfq_VMLAslhq_VMLSfq_VMLShq_VMLSslfq_VMLSslhq = 545, VMLAslv4i32_VMLAv4i32_VMLSslv4i32_VMLSv4i32 = 546, VMLAslv8i16_VMLAv16i8_VMLAv8i16_VMLSslv8i16_VMLSv16i8_VMLSv8i16 = 547, VFMAD_VFMSD_VFNMAD_VFNMSD = 548, VFMAS_VFMSS_VFNMAS_VFNMSS = 549, VFNMAH_VFNMSH = 550, VFMAfd_VFMSfd = 551, VFMAfq_VFMSfq = 552, VCVTANSDf_VCVTANSDh_VCVTANSQf_VCVTANSQh_VCVTANUDf_VCVTANUDh_VCVTANUQf_VCVTANUQh_VCVTASD_VCVTASH_VCVTASS_VCVTAUD_VCVTAUH_VCVTAUS_VCVTBDH_VCVTMNSDf_VCVTMNSDh_VCVTMNSQf_VCVTMNSQh_VCVTMNUDf_VCVTMNUDh_VCVTMNUQf_VCVTMNUQh_VCVTMSD_VCVTMSH_VCVTMSS_VCVTMUD_VCVTMUH_VCVTMUS_VCVTNNSDf_VCVTNNSDh_VCVTNNSQf_VCVTNNSQh_VCVTNNUDf_VCVTNNUDh_VCVTNNUQf_VCVTNNUQh_VCVTNSD_VCVTNSH_VCVTNSS_VCVTNUD_VCVTNUH_VCVTNUS_VCVTPNSDf_VCVTPNSDh_VCVTPNSQf_VCVTPNSQh_VCVTPNUDf_VCVTPNUDh_VCVTPNUQf_VCVTPNUQh_VCVTPSD_VCVTPSH_VCVTPSS_VCVTPUD_VCVTPUH_VCVTPUS_VCVTTDH_VCVTTHD = 553, VCVTBHD = 554, VCVTBHS_VCVTTHS = 555, VCVTBSH_VCVTTSH = 556, VCVTDS = 557, VCVTSD = 558, VCVTf2h_VCVTf2sq_VCVTf2uq_VCVTf2xsq_VCVTf2xuq_VCVTh2f_VCVTh2sq_VCVTh2uq_VCVTh2xsq_VCVTh2xuq_VCVTs2fq_VCVTs2hq_VCVTu2fq_VCVTu2hq_VCVTxs2fq_VCVTxs2hq_VCVTxu2fq_VCVTxu2hq = 559, VCVTf2sd_VCVTf2ud_VCVTf2xsd_VCVTf2xud_VCVTh2sd_VCVTh2ud_VCVTh2xsd_VCVTh2xud_VCVTs2fd_VCVTs2hd_VCVTu2fd_VCVTu2hd_VCVTxs2fd_VCVTxs2hd_VCVTxu2fd_VCVTxu2hd = 560, VSITOD_VUITOD = 561, VSITOH_VUITOH = 562, VSITOS_VUITOS = 563, VTOSHD_VTOSIRD_VTOSIZD_VTOSLD_VTOUHD_VTOUIRD_VTOUIZD_VTOULD = 564, VTOSHH_VTOSIRH_VTOSIZH_VTOSLH_VTOUHH_VTOUIRH_VTOUIZH_VTOULH = 565, VTOSHS_VTOSIRS_VTOSIZS_VTOSLS_VTOUHS_VTOUIRS_VTOUIZS_VTOULS = 566, VMOVv16i8_VMOVv1i64_VMOVv2f32_VMOVv2i32_VMOVv2i64_VMOVv4f32_VMOVv4i16_VMOVv4i32_VMOVv8i16_VMOVv8i8_VMVNv2i32_VMVNv4i16_VMVNv4i32_VMVNv8i16 = 567, VMOVD_VMOVDcc_FCONSTD = 568, VMOVS_VMOVScc_FCONSTS = 569, VMVNd_VMVNq = 570, VMOVNv2i32_VMOVNv4i16_VMOVNv8i8 = 571, VMOVLsv2i64_VMOVLsv4i32_VMOVLsv8i16_VMOVLuv2i64_VMOVLuv4i32_VMOVLuv8i16 = 572, VQMOVNsuv2i32_VQMOVNsuv4i16_VQMOVNsuv8i8_VQMOVNsv2i32_VQMOVNsv4i16_VQMOVNsv8i8_VQMOVNuv2i32_VQMOVNuv4i16_VQMOVNuv8i8 = 573, VDUPLN16d_VDUPLN32d_VDUPLN8d = 574, VDUPLN16q_VDUPLN32q_VDUPLN8q = 575, VDUP16d_VDUP16q_VDUP32d_VDUP32q_VDUP8d_VDUP8q = 576, VMOVRS = 577, VMOVSR = 578, VSETLNi16_VSETLNi32_VSETLNi8 = 579, VMOVRRD_VMOVRRS = 580, VMOVDRR = 581, VMOVSRR = 582, VGETLNi32_VGETLNu16_VGETLNu8 = 583, VGETLNs16_VGETLNs8 = 584, VMRS_VMRS_FPCXTNS_VMRS_FPCXTS_VMRS_FPEXC_VMRS_FPINST_VMRS_FPINST2_VMRS_FPSCR_NZCVQC_VMRS_FPSID_VMRS_MVFR0_VMRS_MVFR1_VMRS_MVFR2_VMRS_P0_VMRS_VPR = 585, VMSR_VMSR_FPCXTNS_VMSR_FPCXTS_VMSR_FPEXC_VMSR_FPINST_VMSR_FPINST2_VMSR_FPSCR_NZCVQC_VMSR_FPSID_VMSR_P0_VMSR_VPR = 586, FMSTAT = 587, VLDRD = 588, VLDRS = 589, VSTRD = 590, VSTRS = 591, VLDMQIA = 592, VSTMQIA = 593, VLDMDIA_VLDMSIA = 594, VLDMDDB_UPD_VLDMDIA_UPD_VLDMSDB_UPD_VLDMSIA_UPD = 595, VSTMDIA_VSTMSIA = 596, VSTMDDB_UPD_VSTMDIA_UPD_VSTMSDB_UPD_VSTMSIA_UPD = 597, VLD1d16_VLD1d32_VLD1d64_VLD1d8 = 598, VLD1q16_VLD1q32_VLD1q64_VLD1q8 = 599, VLD1d16wb_fixed_VLD1d16wb_register_VLD1d32wb_fixed_VLD1d32wb_register_VLD1d64wb_fixed_VLD1d64wb_register_VLD1d8wb_fixed_VLD1d8wb_register = 600, VLD1q16wb_fixed_VLD1q16wb_register_VLD1q32wb_fixed_VLD1q32wb_register_VLD1q64wb_fixed_VLD1q64wb_register_VLD1q8wb_fixed_VLD1q8wb_register = 601, VLD1d16T_VLD1d32T_VLD1d64T_VLD1d8T_VLD1d64TPseudo_VLD1d64TPseudoWB_fixed_VLD1d64TPseudoWB_register = 602, VLD1d16Twb_fixed_VLD1d16Twb_register_VLD1d32Twb_fixed_VLD1d32Twb_register_VLD1d64Twb_fixed_VLD1d64Twb_register_VLD1d8Twb_fixed_VLD1d8Twb_register = 603, VLD1d16Q_VLD1d32Q_VLD1d64Q_VLD1d8Q_VLD1d64QPseudo_VLD1d64QPseudoWB_fixed_VLD1d64QPseudoWB_register = 604, VLD1d16Qwb_fixed_VLD1d16Qwb_register_VLD1d32Qwb_fixed_VLD1d32Qwb_register_VLD1d64Qwb_fixed_VLD1d64Qwb_register_VLD1d8Qwb_fixed_VLD1d8Qwb_register = 605, VLD2b16_VLD2b32_VLD2b8_VLD2d16_VLD2d32_VLD2d8 = 606, VLD2q16_VLD2q32_VLD2q8_VLD2q16Pseudo_VLD2q32Pseudo_VLD2q8Pseudo = 607, VLD2b16wb_fixed_VLD2b16wb_register_VLD2b32wb_fixed_VLD2b32wb_register_VLD2b8wb_fixed_VLD2b8wb_register_VLD2d16wb_fixed_VLD2d16wb_register_VLD2d32wb_fixed_VLD2d32wb_register_VLD2d8wb_fixed_VLD2d8wb_register = 608, VLD2q16wb_fixed_VLD2q16wb_register_VLD2q32wb_fixed_VLD2q32wb_register_VLD2q8wb_fixed_VLD2q8wb_register_VLD2q16PseudoWB_fixed_VLD2q16PseudoWB_register_VLD2q32PseudoWB_fixed_VLD2q32PseudoWB_register_VLD2q8PseudoWB_fixed_VLD2q8PseudoWB_register = 609, VLD3d16_VLD3d32_VLD3d8_VLD3q16_VLD3q32_VLD3q8 = 610, VLD3d16Pseudo_VLD3d32Pseudo_VLD3d8Pseudo_VLD3q16oddPseudo_VLD3q32oddPseudo_VLD3q8oddPseudo = 611, VLD3d16_UPD_VLD3d32_UPD_VLD3d8_UPD_VLD3q16_UPD_VLD3q32_UPD_VLD3q8_UPD = 612, VLD3d16Pseudo_UPD_VLD3d32Pseudo_UPD_VLD3d8Pseudo_UPD_VLD3q16Pseudo_UPD_VLD3q16oddPseudo_UPD_VLD3q32Pseudo_UPD_VLD3q32oddPseudo_UPD_VLD3q8Pseudo_UPD_VLD3q8oddPseudo_UPD = 613, VLD4d16_VLD4d32_VLD4d8_VLD4q16_VLD4q32_VLD4q8 = 614, VLD4d16Pseudo_VLD4d32Pseudo_VLD4d8Pseudo_VLD4q16oddPseudo_VLD4q32oddPseudo_VLD4q8oddPseudo = 615, VLD4d16_UPD_VLD4d32_UPD_VLD4d8_UPD_VLD4q16_UPD_VLD4q32_UPD_VLD4q8_UPD = 616, VLD4d16Pseudo_UPD_VLD4d32Pseudo_UPD_VLD4d8Pseudo_UPD_VLD4q16Pseudo_UPD_VLD4q16oddPseudo_UPD_VLD4q32Pseudo_UPD_VLD4q32oddPseudo_UPD_VLD4q8Pseudo_UPD_VLD4q8oddPseudo_UPD = 617, VLD1DUPd16_VLD1DUPd32_VLD1DUPd8 = 618, VLD1DUPq16_VLD1DUPq32_VLD1DUPq8 = 619, VLD1LNd16_VLD1LNd8 = 620, VLD1LNd32_VLD1LNq16Pseudo_VLD1LNq32Pseudo_VLD1LNq8Pseudo = 621, VLD1DUPd16wb_fixed_VLD1DUPd16wb_register_VLD1DUPd32wb_fixed_VLD1DUPd32wb_register_VLD1DUPd8wb_fixed_VLD1DUPd8wb_register_VLD1DUPq16wb_register_VLD1DUPq32wb_register_VLD1DUPq8wb_register = 622, VLD1DUPq16wb_fixed_VLD1DUPq32wb_fixed_VLD1DUPq8wb_fixed = 623, VLD1LNd16_UPD_VLD1LNd32_UPD_VLD1LNd8_UPD_VLD1LNq16Pseudo_UPD_VLD1LNq32Pseudo_UPD_VLD1LNq8Pseudo_UPD = 624, VLD2DUPd16_VLD2DUPd16x2_VLD2DUPd32_VLD2DUPd32x2_VLD2DUPd8_VLD2DUPd8x2 = 625, VLD2LNd16_VLD2LNd32_VLD2LNd8_VLD2LNq16_VLD2LNq32_VLD2LNd16Pseudo_VLD2LNd32Pseudo_VLD2LNd8Pseudo_VLD2LNq16Pseudo_VLD2LNq32Pseudo = 626, VLD2LNd16_UPD_VLD2LNd32_UPD_VLD2LNd8_UPD_VLD2LNq16_UPD_VLD2LNq32_UPD = 627, VLD2DUPd16wb_fixed_VLD2DUPd16wb_register_VLD2DUPd16x2wb_fixed_VLD2DUPd16x2wb_register_VLD2DUPd32wb_fixed_VLD2DUPd32wb_register_VLD2DUPd32x2wb_fixed_VLD2DUPd32x2wb_register_VLD2DUPd8wb_fixed_VLD2DUPd8wb_register_VLD2DUPd8x2wb_fixed_VLD2DUPd8x2wb_register = 628, VLD2LNd16Pseudo_UPD_VLD2LNd32Pseudo_UPD_VLD2LNd8Pseudo_UPD_VLD2LNq16Pseudo_UPD_VLD2LNq32Pseudo_UPD = 629, VLD3DUPd16_VLD3DUPd32_VLD3DUPd8_VLD3DUPq16_VLD3DUPq32_VLD3DUPq8_VLD3DUPd16Pseudo_VLD3DUPd32Pseudo_VLD3DUPd8Pseudo = 630, VLD3LNd16_VLD3LNd32_VLD3LNd8_VLD3LNq16_VLD3LNq32_VLD3LNd16Pseudo_VLD3LNd32Pseudo_VLD3LNd8Pseudo_VLD3LNq16Pseudo_VLD3LNq32Pseudo = 631, VLD3DUPd16_UPD_VLD3DUPd32_UPD_VLD3DUPd8_UPD_VLD3DUPq16_UPD_VLD3DUPq32_UPD_VLD3DUPq8_UPD = 632, VLD3LNd16_UPD_VLD3LNd32_UPD_VLD3LNd8_UPD_VLD3LNq16_UPD_VLD3LNq32_UPD = 633, VLD3DUPd16Pseudo_UPD_VLD3DUPd32Pseudo_UPD_VLD3DUPd8Pseudo_UPD = 634, VLD3LNd16Pseudo_UPD_VLD3LNd32Pseudo_UPD_VLD3LNd8Pseudo_UPD_VLD3LNq16Pseudo_UPD_VLD3LNq32Pseudo_UPD = 635, VLD4DUPd16_VLD4DUPd32_VLD4DUPd8_VLD4DUPq16_VLD4DUPq32_VLD4DUPq8 = 636, VLD4LNd16_VLD4LNd32_VLD4LNd8_VLD4LNq16_VLD4LNq32_VLD4LNd16Pseudo_VLD4LNd32Pseudo_VLD4LNd8Pseudo_VLD4LNq16Pseudo_VLD4LNq32Pseudo = 637, VLD4DUPd16Pseudo_VLD4DUPd32Pseudo_VLD4DUPd8Pseudo = 638, VLD4DUPd16_UPD_VLD4DUPd32_UPD_VLD4DUPd8_UPD_VLD4DUPq16_UPD_VLD4DUPq32_UPD_VLD4DUPq8_UPD = 639, VLD4LNd16_UPD_VLD4LNd32_UPD_VLD4LNd8_UPD_VLD4LNq16_UPD_VLD4LNq32_UPD = 640, VLD4DUPd16Pseudo_UPD_VLD4DUPd32Pseudo_UPD_VLD4DUPd8Pseudo_UPD = 641, VLD4LNd16Pseudo_UPD_VLD4LNd32Pseudo_UPD_VLD4LNd8Pseudo_UPD_VLD4LNq16Pseudo_UPD_VLD4LNq32Pseudo_UPD = 642, VST1d16_VST1d32_VST1d64_VST1d8 = 643, VST1q16_VST1q32_VST1q64_VST1q8 = 644, VST1d16wb_fixed_VST1d16wb_register_VST1d32wb_fixed_VST1d32wb_register_VST1d64wb_fixed_VST1d64wb_register_VST1d8wb_fixed_VST1d8wb_register = 645, VST1q16wb_fixed_VST1q16wb_register_VST1q32wb_fixed_VST1q32wb_register_VST1q64wb_fixed_VST1q64wb_register_VST1q8wb_fixed_VST1q8wb_register = 646, VST1d16T_VST1d32T_VST1d64T_VST1d8T_VST1d64TPseudo = 647, VST1d16Twb_fixed_VST1d16Twb_register_VST1d32Twb_fixed_VST1d32Twb_register_VST1d64Twb_fixed_VST1d64Twb_register_VST1d8Twb_fixed_VST1d8Twb_register = 648, VST1d64TPseudoWB_fixed_VST1d64TPseudoWB_register = 649, VST1d16Q_VST1d16QPseudo_VST1d32Q_VST1d32QPseudo_VST1d64Q_VST1d64QPseudo_VST1d8Q_VST1d8QPseudo = 650, VST1d16QPseudoWB_fixed_VST1d16QPseudoWB_register_VST1d32QPseudoWB_fixed_VST1d32QPseudoWB_register_VST1d64QPseudoWB_fixed_VST1d64QPseudoWB_register_VST1d8QPseudoWB_fixed_VST1d8QPseudoWB_register = 651, VST1d16Qwb_fixed_VST1d16Qwb_register_VST1d32Qwb_fixed_VST1d32Qwb_register_VST1d64Qwb_fixed_VST1d64Qwb_register_VST1d8Qwb_fixed_VST1d8Qwb_register = 652, VST2b16_VST2b32_VST2b8 = 653, VST2d16_VST2d32_VST2d8 = 654, VST2b16wb_fixed_VST2b16wb_register_VST2b32wb_fixed_VST2b32wb_register_VST2b8wb_fixed_VST2b8wb_register_VST2d16wb_fixed_VST2d16wb_register_VST2d32wb_fixed_VST2d32wb_register_VST2d8wb_fixed_VST2d8wb_register = 655, VST2q16_VST2q32_VST2q8_VST2q16Pseudo_VST2q32Pseudo_VST2q8Pseudo = 656, VST2q16wb_fixed_VST2q16wb_register_VST2q32wb_fixed_VST2q32wb_register_VST2q8wb_fixed_VST2q8wb_register = 657, VST2q16PseudoWB_fixed_VST2q16PseudoWB_register_VST2q32PseudoWB_fixed_VST2q32PseudoWB_register_VST2q8PseudoWB_fixed_VST2q8PseudoWB_register = 658, VST3d16_VST3d32_VST3d8_VST3q16_VST3q32_VST3q8_VST3d16Pseudo_VST3d32Pseudo_VST3d8Pseudo_VST3q16oddPseudo_VST3q32oddPseudo_VST3q8oddPseudo = 659, VST3d16_UPD_VST3d32_UPD_VST3d8_UPD_VST3q16_UPD_VST3q32_UPD_VST3q8_UPD_VST3d16Pseudo_UPD_VST3d32Pseudo_UPD_VST3d8Pseudo_UPD_VST3q16Pseudo_UPD_VST3q16oddPseudo_UPD_VST3q32Pseudo_UPD_VST3q32oddPseudo_UPD_VST3q8Pseudo_UPD_VST3q8oddPseudo_UPD = 660, VST4d16_VST4d32_VST4d8_VST4q16_VST4q32_VST4q8_VST4d16Pseudo_VST4d32Pseudo_VST4d8Pseudo_VST4q16oddPseudo_VST4q32oddPseudo_VST4q8oddPseudo = 661, VST4d16_UPD_VST4d32_UPD_VST4d8_UPD_VST4q16_UPD_VST4q32_UPD_VST4q8_UPD_VST4d16Pseudo_UPD_VST4d32Pseudo_UPD_VST4d8Pseudo_UPD_VST4q16Pseudo_UPD_VST4q16oddPseudo_UPD_VST4q32Pseudo_UPD_VST4q32oddPseudo_UPD_VST4q8Pseudo_UPD_VST4q8oddPseudo_UPD = 662, VST1LNd16_VST1LNd32_VST1LNd8_VST1LNq16Pseudo_VST1LNq32Pseudo_VST1LNq8Pseudo = 663, VST1LNd16_UPD_VST1LNd32_UPD_VST1LNd8_UPD_VST1LNq16Pseudo_UPD_VST1LNq32Pseudo_UPD_VST1LNq8Pseudo_UPD = 664, VST2LNd16_VST2LNd32_VST2LNd8_VST2LNq16_VST2LNq32_VST2LNd16Pseudo_VST2LNd32Pseudo_VST2LNd8Pseudo_VST2LNq16Pseudo_VST2LNq32Pseudo = 665, VST2LNd16_UPD_VST2LNd32_UPD_VST2LNd8_UPD_VST2LNq16_UPD_VST2LNq32_UPD = 666, VST2LNd16Pseudo_UPD_VST2LNd32Pseudo_UPD_VST2LNd8Pseudo_UPD_VST2LNq16Pseudo_UPD_VST2LNq32Pseudo_UPD = 667, VST3LNd16_VST3LNd32_VST3LNd8_VST3LNq16_VST3LNq32_VST3LNd16Pseudo_VST3LNd32Pseudo_VST3LNd8Pseudo = 668, VST3LNq16Pseudo_VST3LNq32Pseudo = 669, VST3LNd16_UPD_VST3LNd32_UPD_VST3LNd8_UPD_VST3LNq16_UPD_VST3LNq32_UPD = 670, VST3LNd16Pseudo_UPD_VST3LNd32Pseudo_UPD_VST3LNd8Pseudo_UPD_VST3LNq16Pseudo_UPD_VST3LNq32Pseudo_UPD = 671, VST4LNd16_VST4LNd32_VST4LNd8_VST4LNq16_VST4LNq32_VST4LNd16Pseudo_VST4LNd32Pseudo_VST4LNd8Pseudo_VST4LNq16Pseudo_VST4LNq32Pseudo = 672, VST4LNd16_UPD_VST4LNd32_UPD_VST4LNd8_UPD_VST4LNq16_UPD_VST4LNq32_UPD = 673, VST4LNd16Pseudo_UPD_VST4LNd32Pseudo_UPD_VST4LNd8Pseudo_UPD_VST4LNq16Pseudo_UPD_VST4LNq32Pseudo_UPD = 674, VDIVS = 675, VSQRTS = 676, VDIVD = 677, VSQRTD = 678, ABS = 679, COPY = 680, t2MOVCCi_t2MOVCCi16 = 681, t2MOVi_t2MOVi16 = 682, t2ABS = 683, t2USAD8_t2USADA8 = 684, t2SDIV_t2UDIV = 685, t2LDREX_t2LDREXB_t2LDREXD_t2LDREXH_t2LDA_t2LDAB_t2LDAEX_t2LDAEXB_t2LDAEXD_t2LDAEXH_t2LDAH = 686, LDA_LDAB_LDAEX_LDAEXB_LDAEXD_LDAEXH_LDAH = 687, LDRBT_POST = 688, MOVsr = 689, t2MOVSsr_t2MOVsr = 690, t2MOVsra_flag_t2MOVsrl_flag = 691, MOVTi16_ga_pcrel_MOVTi16_t2MOVTi16_ga_pcrel_t2MOVTi16 = 692, ADDSri_ADCri_ADDri_RSBSri_RSBri_RSCri_SBCri_t2ADDSri_t2ADCri_t2ADDri_t2ADDri12_t2RSBSri_t2RSBri_t2SBCri = 693, CLZ_t2CLZ = 694, t2ANDri_t2BICri_t2EORri_t2ORRri = 695, t2MVNCCi = 696, t2MVNi = 697, t2MVNr = 698, t2MVNs = 699, ADDSrr_ADCrr_ADDrr_RSBrr_RSCrr_SBCrr_t2ADDSrr_t2ADCrr_t2ADDrr_t2SBCrr = 700, CRC32B_CRC32CB_CRC32CH_CRC32CW_CRC32H_CRC32W_t2CRC32B_t2CRC32CB_t2CRC32CH_t2CRC32CW_t2CRC32H_t2CRC32W = 701, t2ANDrr_t2BICrr_t2EORrr = 702, ADDSrsi_ADCrsi_ADDrsi_RSBrsi_RSCrsi_SBCrsi = 703, t2ADDSrs = 704, t2ADCrs_t2ADDrs_t2SBCrs = 705, t2ANDrs_t2BICrs_t2EORrs_t2ORRrs = 706, t2RSBrs = 707, ADDSrsr = 708, ADCrsr_ADDrsr_RSBrsr_RSCrsr_SBCrsr = 709, ADR = 710, MVNi = 711, MVNsi = 712, t2MOVSsi_t2MOVsi = 713, ASRi_RORi = 714, ASRr_RORr_LSRi_LSRr_LSLi_LSLr = 715, CMPri_CMNri = 716, CMPrr_CMNzrr = 717, CMPrsi_CMNzrsi = 718, CMPrsr_CMNzrsr = 719, t2LDC2L_OFFSET_t2LDC2L_OPTION_t2LDC2L_POST_t2LDC2L_PRE_t2LDC2_OFFSET_t2LDC2_OPTION_t2LDC2_POST_t2LDC2_PRE_t2LDCL_OFFSET_t2LDCL_OPTION_t2LDCL_POST_t2LDCL_PRE_t2LDC_OFFSET_t2LDC_OPTION_t2LDC_POST_t2LDC_PRE_RRXi = 720, RBIT_REV_REV16_REVSH = 721, RRX = 722, TSTri = 723, TSTrr = 724, TSTrsi = 725, TSTrsr = 726, MRS_MRSbanked_MRSsys = 727, MSR_MSRbanked_MSRi = 728, SRSDA_SRSDA_UPD_SRSDB_SRSDB_UPD_SRSIA_SRSIA_UPD_SRSIB_SRSIB_UPD_t2SRSDB_t2SRSDB_UPD_t2SRSIA_t2SRSIA_UPD_RFEDA_RFEDA_UPD_RFEDB_RFEDB_UPD_RFEIA_RFEIA_UPD_RFEIB_RFEIB_UPD_t2RFEDB_t2RFEDBW_t2RFEIA_t2RFEIAW = 729, t2STREX_t2STREXB_t2STREXD_t2STREXH = 730, STL_STLB_STLEX_STLEXB_STLEXD_STLEXH_STLH = 731, t2STL_t2STLB_t2STLEX_t2STLEXB_t2STLEXD_t2STLEXH_t2STLH = 732, VABDfd_VABDhd = 733, VABDfq_VABDhq = 734, VABSD = 735, VABSH = 736, VABSS = 737, VABShd = 738, VABShq = 739, VACGEfd_VACGEhd_VACGTfd_VACGThd = 740, VACGEfq_VACGEhq_VACGTfq_VACGThq = 741, VADDH_VSUBH = 742, VADDfd_VSUBfd = 743, VADDhd_VSUBhd = 744, VADDfq_VSUBfq = 745, VADDhq_VSUBhq = 746, VLDRH = 747, VLDR_FPCXTNS_off_VLDR_FPCXTNS_post_VLDR_FPCXTNS_pre_VLDR_FPCXTS_off_VLDR_FPCXTS_post_VLDR_FPCXTS_pre_VLDR_FPSCR_NZCVQC_off_VLDR_FPSCR_NZCVQC_post_VLDR_FPSCR_NZCVQC_pre_VLDR_FPSCR_off_VLDR_FPSCR_post_VLDR_FPSCR_pre_VLDR_P0_off_VLDR_P0_post_VLDR_P0_pre_VLDR_VPR_off_VLDR_VPR_post_VLDR_VPR_pre = 748, VSTRH = 749, VSTR_FPCXTNS_off_VSTR_FPCXTNS_post_VSTR_FPCXTNS_pre_VSTR_FPCXTS_off_VSTR_FPCXTS_post_VSTR_FPCXTS_pre_VSTR_FPSCR_NZCVQC_off_VSTR_FPSCR_NZCVQC_post_VSTR_FPSCR_NZCVQC_pre_VSTR_FPSCR_off_VSTR_FPSCR_post_VSTR_FPSCR_pre_VSTR_P0_off_VSTR_P0_post_VSTR_P0_pre_VSTR_VPR_off_VSTR_VPR_post_VSTR_VPR_pre = 750, VABAsv2i32_VABAsv4i16_VABAsv8i8_VABAuv2i32_VABAuv4i16_VABAuv8i8 = 751, VABDsv2i32_VABDsv4i16_VABDsv8i8_VABDuv2i32_VABDuv4i16_VABDuv8i8 = 752, VABDsv16i8_VABDsv4i32_VABDsv8i16_VABDuv16i8_VABDuv4i32_VABDuv8i16 = 753, VABDLsv4i32_VABDLsv8i16_VABDLuv4i32_VABDLuv8i16 = 754, VADDv1i64_VADDv2i32_VADDv4i16_VADDv8i8 = 755, VSUBv1i64_VSUBv2i32_VSUBv4i16_VSUBv8i8 = 756, VADDv16i8_VADDv2i64_VADDv4i32_VADDv8i16 = 757, VADDLsv2i64_VADDLsv4i32_VADDLsv8i16_VADDLuv2i64_VADDLuv4i32_VADDLuv8i16_VSUBLsv2i64_VSUBLsv4i32_VSUBLsv8i16_VSUBLuv2i64_VSUBLuv4i32_VSUBLuv8i16 = 758, VANDd_VBICd_VEORd = 759, VANDq_VBICq_VEORq = 760, VBICiv2i32_VBICiv4i16 = 761, VBICiv4i32_VBICiv8i16 = 762, VBIFd_VBITd_VBSLd_VBSPd = 763, VBIFq_VBITq_VBSLq_VBSPq = 764, VCEQv16i8_VCEQv4i32_VCEQv8i16_VCGEsv16i8_VCGEsv4i32_VCGEsv8i16_VCGEuv16i8_VCGEuv4i32_VCGEuv8i16_VCGTsv16i8_VCGTsv4i32_VCGTsv8i16_VCGTuv16i8_VCGTuv4i32_VCGTuv8i16 = 765, VCEQv2i32_VCEQv4i16_VCEQv8i8_VCGEsv2i32_VCGEsv4i16_VCGEsv8i8_VCGEuv2i32_VCGEuv4i16_VCGEuv8i8_VCGTsv2i32_VCGTsv4i16_VCGTsv8i8_VCGTuv2i32_VCGTuv4i16_VCGTuv8i8 = 766, VCLZv16i8_VCLZv4i32_VCLZv8i16_VCNTq = 767, VCLZv2i32_VCLZv4i16_VCLZv8i8_VCNTd = 768, VCMPEH_VCMPEZH_VCMPH_VCMPZH = 769, VDUP16d_VDUP32d_VDUP8d = 770, VSELEQD_VSELEQH_VSELEQS_VSELGED_VSELGEH_VSELGES_VSELGTD_VSELGTH_VSELGTS_VSELVSD_VSELVSH_VSELVSS = 771, VFMAhd_VFMShd = 772, VFMAhq_VFMShq = 773, VHADDsv2i32_VHADDsv4i16_VHADDsv8i8_VHADDuv2i32_VHADDuv4i16_VHADDuv8i8 = 774, VHADDsv16i8_VHADDsv4i32_VHADDsv8i16_VHADDuv16i8_VHADDuv4i32_VHADDuv8i16 = 775, VMAXsv16i8_VMAXsv4i32_VMAXsv8i16_VMAXuv16i8_VMAXuv4i32_VMAXuv8i16_VMINsv16i8_VMINsv4i32_VMINsv8i16_VMINuv16i8_VMINuv4i32_VMINuv8i16 = 776, VPMAXf_VPMAXh_VPMINf_VPMINh = 777, VNEGH = 778, VNEGhd = 779, VNEGhq = 780, VNEGs16d_VNEGs32d_VNEGs8d = 781, VNEGs16q_VNEGs32q_VNEGs8q = 782, VPADDi16_VPADDi32_VPADDi8 = 783, VPADALsv2i32_VPADALsv4i16_VPADALsv8i8_VPADALuv2i32_VPADALuv4i16_VPADALuv8i8 = 784, VPADDLsv16i8_VPADDLsv2i32_VPADDLsv4i16_VPADDLsv4i32_VPADDLsv8i16_VPADDLsv8i8_VPADDLuv16i8_VPADDLuv2i32_VPADDLuv4i16_VPADDLuv4i32_VPADDLuv8i16_VPADDLuv8i8 = 785, VQABSv2i32_VQABSv4i16_VQABSv8i8 = 786, VQABSv16i8_VQABSv4i32_VQABSv8i16 = 787, VQDMLALslv2i32_VQDMLALv2i64_VQDMLSLslv2i32_VQDMLSLv2i64 = 788, VQDMLALslv4i16_VQDMLALv4i32_VQDMLSLslv4i16_VQDMLSLv4i32 = 789, VQDMULHslv2i32_VQDMULHv2i32_VQDMULLv2i64_VQRDMULHslv2i32_VQRDMULHv2i32 = 790, VQDMULHslv4i16_VQDMULHv4i16_VQDMULLslv2i32_VQDMULLslv4i16_VQDMULLv4i32_VQRDMULHslv4i16_VQRDMULHv4i16 = 791, VQDMULHslv4i32_VQDMULHv4i32_VQRDMULHslv4i32_VQRDMULHv4i32 = 792, VQDMULHslv8i16_VQDMULHv8i16_VQRDMULHslv8i16_VQRDMULHv8i16 = 793, VQSHRNsv2i32_VQSHRNsv4i16_VQSHRNsv8i8_VQSHRNuv2i32_VQSHRNuv4i16_VQSHRNuv8i8 = 794, VRSHLsv16i8_VRSHLsv2i64_VRSHLsv4i32_VRSHLsv8i16_VRSHLuv16i8_VRSHLuv2i64_VRSHLuv4i32_VRSHLuv8i16 = 795, VRSHLsv1i64_VRSHLsv2i32_VRSHLsv4i16_VRSHLsv8i8_VRSHLuv1i64_VRSHLuv2i32_VRSHLuv4i16_VRSHLuv8i8_VRSHRsv16i8_VRSHRsv1i64_VRSHRsv2i32_VRSHRsv2i64_VRSHRsv4i16_VRSHRsv4i32_VRSHRsv8i16_VRSHRsv8i8_VRSHRuv16i8_VRSHRuv1i64_VRSHRuv2i32_VRSHRuv2i64_VRSHRuv4i16_VRSHRuv4i32_VRSHRuv8i16_VRSHRuv8i8 = 796, VRSHRNv2i32_VRSHRNv4i16_VRSHRNv8i8 = 797, VST1d16T_VST1d32T_VST1d64T_VST1d8T = 798, VST1d16Q_VST1d32Q_VST1d64Q_VST1d8Q = 799, VST1d64QPseudo = 800, VST1LNd16_VST1LNd32_VST1LNd8 = 801, VST1LNdAsm_16_VST1LNdAsm_32_VST1LNdAsm_8 = 802, VST1d64QPseudoWB_fixed_VST1d64QPseudoWB_register = 803, VST1LNd16_UPD_VST1LNd32_UPD_VST1LNd8_UPD = 804, VST1LNdWB_fixed_Asm_16_VST1LNdWB_fixed_Asm_32_VST1LNdWB_fixed_Asm_8_VST1LNdWB_register_Asm_16_VST1LNdWB_register_Asm_32_VST1LNdWB_register_Asm_8 = 805, VST2q16_VST2q32_VST2q8 = 806, VST2LNd16_VST2LNd32_VST2LNd8 = 807, VST2LNdAsm_16_VST2LNdAsm_32_VST2LNdAsm_8 = 808, VST2LNd16Pseudo_VST2LNd32Pseudo_VST2LNd8Pseudo = 809, VST2LNq16_VST2LNq32 = 810, VST2LNqAsm_16_VST2LNqAsm_32 = 811, VST2LNd16_UPD_VST2LNd32_UPD_VST2LNd8_UPD = 812, VST2LNdWB_fixed_Asm_16_VST2LNdWB_fixed_Asm_32_VST2LNdWB_fixed_Asm_8_VST2LNdWB_register_Asm_16_VST2LNdWB_register_Asm_32_VST2LNdWB_register_Asm_8 = 813, VST2LNd16Pseudo_UPD_VST2LNd32Pseudo_UPD_VST2LNd8Pseudo_UPD = 814, VST2LNqWB_fixed_Asm_16_VST2LNqWB_fixed_Asm_32_VST2LNqWB_register_Asm_16_VST2LNqWB_register_Asm_32 = 815, VST3d16_VST3d32_VST3d8_VST3q16_VST3q32_VST3q8 = 816, VST3dAsm_16_VST3dAsm_32_VST3dAsm_8_VST3qAsm_16_VST3qAsm_32_VST3qAsm_8 = 817, VST3d16Pseudo_VST3d32Pseudo_VST3d8Pseudo = 818, VST3LNd16_VST3LNd32_VST3LNd8 = 819, VST3LNdAsm_16_VST3LNdAsm_32_VST3LNdAsm_8 = 820, VST3LNd16Pseudo_VST3LNd32Pseudo_VST3LNd8Pseudo = 821, VST3LNqAsm_16_VST3LNqAsm_32 = 822, VST3d16_UPD_VST3d32_UPD_VST3d8_UPD_VST3q16_UPD_VST3q32_UPD_VST3q8_UPD = 823, VST3dWB_fixed_Asm_16_VST3dWB_fixed_Asm_32_VST3dWB_fixed_Asm_8_VST3dWB_register_Asm_16_VST3dWB_register_Asm_32_VST3dWB_register_Asm_8_VST3qWB_fixed_Asm_16_VST3qWB_fixed_Asm_32_VST3qWB_fixed_Asm_8_VST3qWB_register_Asm_16_VST3qWB_register_Asm_32_VST3qWB_register_Asm_8 = 824, VST3LNd16_UPD_VST3LNd32_UPD_VST3LNd8_UPD = 825, VST3LNdWB_fixed_Asm_16_VST3LNdWB_fixed_Asm_32_VST3LNdWB_fixed_Asm_8_VST3LNdWB_register_Asm_16_VST3LNdWB_register_Asm_32_VST3LNdWB_register_Asm_8 = 826, VST3LNd16Pseudo_UPD_VST3LNd32Pseudo_UPD_VST3LNd8Pseudo_UPD = 827, VST3LNqWB_fixed_Asm_16_VST3LNqWB_fixed_Asm_32_VST3LNqWB_register_Asm_16_VST3LNqWB_register_Asm_32 = 828, VST4d16_VST4d32_VST4d8_VST4q16_VST4q32_VST4q8 = 829, VST4dAsm_16_VST4dAsm_32_VST4dAsm_8_VST4qAsm_16_VST4qAsm_32_VST4qAsm_8 = 830, VST4d16Pseudo_VST4d32Pseudo_VST4d8Pseudo = 831, VST4LNd16_VST4LNd32_VST4LNd8 = 832, VST4LNdAsm_16_VST4LNdAsm_32_VST4LNdAsm_8 = 833, VST4LNd16Pseudo_VST4LNd32Pseudo_VST4LNd8Pseudo = 834, VST4LNq16_VST4LNq32 = 835, VST4LNqAsm_16_VST4LNqAsm_32 = 836, VST4d16_UPD_VST4d32_UPD_VST4d8_UPD_VST4q16_UPD_VST4q32_UPD_VST4q8_UPD = 837, VST4dWB_fixed_Asm_16_VST4dWB_fixed_Asm_32_VST4dWB_fixed_Asm_8_VST4dWB_register_Asm_16_VST4dWB_register_Asm_32_VST4dWB_register_Asm_8_VST4qWB_fixed_Asm_16_VST4qWB_fixed_Asm_32_VST4qWB_fixed_Asm_8_VST4qWB_register_Asm_16_VST4qWB_register_Asm_32_VST4qWB_register_Asm_8 = 838, VST4LNd16_UPD_VST4LNd32_UPD_VST4LNd8_UPD = 839, VST4LNdWB_fixed_Asm_16_VST4LNdWB_fixed_Asm_32_VST4LNdWB_fixed_Asm_8_VST4LNdWB_register_Asm_16_VST4LNdWB_register_Asm_32_VST4LNdWB_register_Asm_8 = 840, VST4LNd16Pseudo_UPD_VST4LNd32Pseudo_UPD_VST4LNd8Pseudo_UPD = 841, VST4LNqWB_fixed_Asm_16_VST4LNqWB_fixed_Asm_32_VST4LNqWB_register_Asm_16_VST4LNqWB_register_Asm_32 = 842, BKPT_tBKPT_CDP_CDP2_t2CDP_t2CDP2_CLREX_t2CLREX_CONSTPOOL_ENTRY_COPY_STRUCT_BYVAL_I32_CPS1p_CPS2p_CPS3p_t2CPS1p_t2CPS2p_t2CPS3p_DBG_t2DBG_DMB_t2DMB_DSB_t2DSB_ERET_HINT_t2HINT_tHINT_HLT_tHLT_HVC_ISB_t2ISB_SETEND_tSETEND_SETPAN_t2SETPAN_SMC_t2SMC_SPACE_SWP_SWPB_TRAP_TRAPNaCl_UDF_t2DCPS1_t2DCPS2_t2DCPS3_t2SG_t2TT_t2TTA_t2TTAT_t2TTT_tCPS_CMP_SWAP_16_CMP_SWAP_32_CMP_SWAP_64_CMP_SWAP_8 = 843, t2HVC_tTRAP_SVC_tSVC = 844, t2UDF_tUDF_t__brkdiv0 = 845, LDC2L_OFFSET_LDC2L_OPTION_LDC2L_POST_LDC2L_PRE_LDC2_OFFSET_LDC2_OPTION_LDC2_POST_LDC2_PRE_LDCL_OFFSET_LDCL_OPTION_LDCL_POST_LDCL_PRE_LDC_OFFSET_LDC_OPTION_LDC_POST_LDC_PRE_STC2L_OFFSET_STC2L_OPTION_STC2L_POST_STC2L_PRE_STC2_OFFSET_STC2_OPTION_STC2_POST_STC2_PRE_STCL_OFFSET_STCL_OPTION_STCL_POST_STCL_PRE_STC_OFFSET_STC_OPTION_STC_POST_STC_PRE_t2STC2L_OFFSET_t2STC2L_OPTION_t2STC2L_POST_t2STC2L_PRE_t2STC2_OFFSET_t2STC2_OPTION_t2STC2_POST_t2STC2_PRE_t2STCL_OFFSET_t2STCL_OPTION_t2STCL_POST_t2STCL_PRE_t2STC_OFFSET_t2STC_OPTION_t2STC_POST_t2STC_PRE_MEMCPY = 846, t2LDC2L_OFFSET_t2LDC2L_OPTION_t2LDC2L_POST_t2LDC2L_PRE_t2LDC2_OFFSET_t2LDC2_OPTION_t2LDC2_POST_t2LDC2_PRE_t2LDCL_OFFSET_t2LDCL_OPTION_t2LDCL_POST_t2LDCL_PRE_t2LDC_OFFSET_t2LDC_OPTION_t2LDC_POST_t2LDC_PRE = 847, LDREX_LDREXB_LDREXD_LDREXH = 848, MCR_MCR2_MCRR_MCRR2_t2MCR_t2MCR2_t2MCRR_t2MCRR2_MRC_MRC2_t2MRC_t2MRC2_MRRC_MRRC2_t2MRRC_t2MRRC2_t2MRS_AR_t2MRS_M_t2MRSbanked_t2MRSsys_AR_t2MSR_AR_t2MSR_M_t2MSRbanked = 849, FLDMXDB_UPD_FLDMXIA_FLDMXIA_UPD_FSTMXDB_UPD_FSTMXIA_FSTMXIA_UPD = 850, ADJCALLSTACKDOWN_tADJCALLSTACKDOWN_ADJCALLSTACKUP_tADJCALLSTACKUP_Int_eh_sjlj_dispatchsetup_Int_eh_sjlj_longjmp_Int_eh_sjlj_setjmp_Int_eh_sjlj_setjmp_nofp_Int_eh_sjlj_setup_dispatch_t2Int_eh_sjlj_setjmp_t2Int_eh_sjlj_setjmp_nofp_tInt_eh_sjlj_longjmp_tInt_eh_sjlj_setjmp_t2SUBS_PC_LR_JUMPTABLE_ADDRS_JUMPTABLE_INSTS_JUMPTABLE_TBB_JUMPTABLE_TBH_tInt_WIN_eh_sjlj_longjmp_VLD1LNdAsm_16_VLD1LNdAsm_32_VLD1LNdAsm_8_VLD1LNdWB_fixed_Asm_16_VLD1LNdWB_fixed_Asm_32_VLD1LNdWB_fixed_Asm_8_VLD1LNdWB_register_Asm_16_VLD1LNdWB_register_Asm_32_VLD1LNdWB_register_Asm_8_VLD2LNdAsm_16_VLD2LNdAsm_32_VLD2LNdAsm_8_VLD2LNdWB_fixed_Asm_16_VLD2LNdWB_fixed_Asm_32_VLD2LNdWB_fixed_Asm_8_VLD2LNdWB_register_Asm_16_VLD2LNdWB_register_Asm_32_VLD2LNdWB_register_Asm_8_VLD2LNqAsm_16_VLD2LNqAsm_32_VLD2LNqWB_fixed_Asm_16_VLD2LNqWB_fixed_Asm_32_VLD2LNqWB_register_Asm_16_VLD2LNqWB_register_Asm_32_VLD3DUPdAsm_16_VLD3DUPdAsm_32_VLD3DUPdAsm_8_VLD3DUPdWB_fixed_Asm_16_VLD3DUPdWB_fixed_Asm_32_VLD3DUPdWB_fixed_Asm_8_VLD3DUPdWB_register_Asm_16_VLD3DUPdWB_register_Asm_32_VLD3DUPdWB_register_Asm_8_VLD3DUPqAsm_16_VLD3DUPqAsm_32_VLD3DUPqAsm_8_VLD3DUPqWB_fixed_Asm_16_VLD3DUPqWB_fixed_Asm_32_VLD3DUPqWB_fixed_Asm_8_VLD3DUPqWB_register_Asm_16_VLD3DUPqWB_register_Asm_32_VLD3DUPqWB_register_Asm_8_VLD3LNdAsm_16_VLD3LNdAsm_32_VLD3LNdAsm_8_VLD3LNdWB_fixed_Asm_16_VLD3LNdWB_fixed_Asm_32_VLD3LNdWB_fixed_Asm_8_VLD3LNdWB_register_Asm_16_VLD3LNdWB_register_Asm_32_VLD3LNdWB_register_Asm_8_VLD3LNqAsm_16_VLD3LNqAsm_32_VLD3LNqWB_fixed_Asm_16_VLD3LNqWB_fixed_Asm_32_VLD3LNqWB_register_Asm_16_VLD3LNqWB_register_Asm_32_VLD3dAsm_16_VLD3dAsm_32_VLD3dAsm_8_VLD3dWB_fixed_Asm_16_VLD3dWB_fixed_Asm_32_VLD3dWB_fixed_Asm_8_VLD3dWB_register_Asm_16_VLD3dWB_register_Asm_32_VLD3dWB_register_Asm_8_VLD3qAsm_16_VLD3qAsm_32_VLD3qAsm_8_VLD3qWB_fixed_Asm_16_VLD3qWB_fixed_Asm_32_VLD3qWB_fixed_Asm_8_VLD3qWB_register_Asm_16_VLD3qWB_register_Asm_32_VLD3qWB_register_Asm_8_VLD4DUPdAsm_16_VLD4DUPdAsm_32_VLD4DUPdAsm_8_VLD4DUPdWB_fixed_Asm_16_VLD4DUPdWB_fixed_Asm_32_VLD4DUPdWB_fixed_Asm_8_VLD4DUPdWB_register_Asm_16_VLD4DUPdWB_register_Asm_32_VLD4DUPdWB_register_Asm_8_VLD4DUPqAsm_16_VLD4DUPqAsm_32_VLD4DUPqAsm_8_VLD4DUPqWB_fixed_Asm_16_VLD4DUPqWB_fixed_Asm_32_VLD4DUPqWB_fixed_Asm_8_VLD4DUPqWB_register_Asm_16_VLD4DUPqWB_register_Asm_32_VLD4DUPqWB_register_Asm_8_VLD4LNdAsm_16_VLD4LNdAsm_32_VLD4LNdAsm_8_VLD4LNdWB_fixed_Asm_16_VLD4LNdWB_fixed_Asm_32_VLD4LNdWB_fixed_Asm_8_VLD4LNdWB_register_Asm_16_VLD4LNdWB_register_Asm_32_VLD4LNdWB_register_Asm_8_VLD4LNqAsm_16_VLD4LNqAsm_32_VLD4LNqWB_fixed_Asm_16_VLD4LNqWB_fixed_Asm_32_VLD4LNqWB_register_Asm_16_VLD4LNqWB_register_Asm_32_VLD4dAsm_16_VLD4dAsm_32_VLD4dAsm_8_VLD4dWB_fixed_Asm_16_VLD4dWB_fixed_Asm_32_VLD4dWB_fixed_Asm_8_VLD4dWB_register_Asm_16_VLD4dWB_register_Asm_32_VLD4dWB_register_Asm_8_VLD4qAsm_16_VLD4qAsm_32_VLD4qAsm_8_VLD4qWB_fixed_Asm_16_VLD4qWB_fixed_Asm_32_VLD4qWB_fixed_Asm_8_VLD4qWB_register_Asm_16_VLD4qWB_register_Asm_32_VLD4qWB_register_Asm_8_WIN__CHKSTK_WIN__DBZCHK = 851, SUBS_PC_LR = 852, B_t2B_tB_BX_CALL_tBXNS_RET_tBX_CALL_tBX_RET_tBX_RET_vararg_BX_BX_RET_BX_pred_tBX_tBXNS_Bcc_t2Bcc_tBcc_TAILJMPd_TAILJMPr_TAILJMPr4_tTAILJMPd_tTAILJMPdND_tTAILJMPr_TCRETURNdi_TCRETURNri_tCBNZ_tCBZ = 853, BXJ = 854, tBfar = 855, BL_tBL_BL_pred_tBLXi = 856, BLXi = 857, TPsoft_tTPsoft = 858, BLX_noip_BLX_pred_noip_BLX_BLX_pred_tBLXr_noip_tBLXNSr_tBLXr = 859, BCCi64_BCCZi64 = 860, BR_JTadd_tBR_JTr_t2TBB_t2TBH = 861, BR_JTr_t2BR_JT_t2TBB_JT_t2TBH_JT_tBRIND = 862, t2BXJ = 863, BR_JTm_i12_BR_JTm_rs = 864, tADDframe = 865, MOVi16_ga_pcrel_MOVi_MOVi16_MOVCCi16_tMOVi8 = 866, MOVr_MOVr_TC_tMOVSr_tMOVr = 867, MVNCCi_MOVCCi = 868, BMOVPCB_CALL_BMOVPCRX_CALL = 869, MOVCCr = 870, tMOVCCr_pseudo = 871, tMVN = 872, MOVCCsi = 873, t2ASRri_tASRri_t2LSRri_tLSRri_t2LSLri_tLSLri_t2RORri_t2RRX = 874, LSRi_LSLi = 875, t2MOVCCasr_t2MOVCClsl_t2MOVCClsr_t2MOVCCror = 876, t2MOVCCr = 877, t2MOVTi16_ga_pcrel_t2MOVTi16 = 878, t2MOVr = 879, tROR = 880, t2ASRrr_tASRrr_t2LSRrr_tLSRrr_t2LSLrr_tLSLrr_t2RORrr = 881, MOVPCRX_MOVPCLR = 882, tMUL = 883, SADD16_SADD8_SSUB16_SSUB8_UADD16_UADD8_USUB16_USUB8 = 884, t2SADD16_t2SADD8_t2SSUB16_t2SSUB8_t2UADD16_t2UADD8_t2USUB16_t2USUB8 = 885, SHADD16_SHADD8_SHSUB16_SHSUB8_UHADD16_UHADD8_UHSUB16_UHSUB8 = 886, t2SHADD16_t2SHADD8_t2SHSUB16_t2SHSUB8_t2UHADD16_t2UHADD8_t2UHSUB16_t2UHSUB8 = 887, QADD16_QADD8_QSUB16_QSUB8_UQADD16_UQADD8_UQSUB16_UQSUB8 = 888, t2QADD_t2QADD16_t2QADD8_t2UQADD16_t2UQADD8_t2QSUB_t2QSUB16_t2QSUB8_t2UQSUB16_t2UQSUB8 = 889, QASX_QSAX_UQASX_UQSAX = 890, t2QASX_t2QSAX_t2UQASX_t2UQSAX = 891, SSAT_SSAT16_USAT_USAT16 = 892, QADD_QSUB = 893, SBFX_UBFX = 894, t2SBFX_t2UBFX = 895, SXTB_SXTH_UXTB_UXTH = 896, t2SXTB_t2SXTH_t2UXTB_t2UXTH = 897, tSXTB_tSXTH_tUXTB_tUXTH = 898, SXTAB_SXTAH_UXTAB_UXTAH = 899, t2SXTAB_t2SXTAH_t2UXTAB_t2UXTAH = 900, LDRConstPool_t2LDRConstPool_tLDRConstPool = 901, PICLDRB_PICLDRH = 902, PICLDRSB_PICLDRSH = 903, tLDR_postidx = 904, tLDRBi_tLDRHi = 905, tLDRi_tLDRpci_tLDRspi = 906, t2LDRBpcrel_t2LDRHpcrel_t2LDRpcrel = 907, LDR_PRE_IMM = 908, LDRB_PRE_IMM = 909, t2LDRB_PRE = 910, LDR_PRE_REG = 911, LDRB_PRE_REG = 912, LDRH_PRE = 913, LDRSB_PRE_LDRSH_PRE = 914, t2LDR_PRE_imm = 915, t2LDRH_PRE = 916, t2LDRSB_PRE_t2LDRSH_PRE = 917, t2LDR_PRE = 918, LDRD_PRE = 919, t2LDRD_PRE = 920, LDRT_POST_IMM = 921, LDRBT_POST_IMM = 922, LDRHTi = 923, LDRSBTi_LDRSHTi = 924, t2LDRB_POST = 925, LDRH_POST = 926, LDRSB_POST_LDRSH_POST = 927, LDR_POST_REG = 928, LDRB_POST_REG = 929, LDRT_POST = 930, PLDi12_t2PLDi12_PLDWi12_t2PLDWi12_t2PLDWi8_t2PLDWs_t2PLDi8_t2PLDpci_t2PLDs_PLIi12_PLIrs_t2PLIi12_t2PLIi8_t2PLIpci_t2PLIs = 931, PLDrs_PLDWrs = 932, VLLDM = 933, STRBi12_PICSTRB_PICSTRH = 934, t2STRBT = 935, STR_PRE_IMM = 936, STRB_PRE_IMM = 937, STRBi_preidx_STRBr_preidx_STRi_preidx_STRr_preidx_STRH_preidx = 938, STRH_PRE = 939, t2STRH_PRE_t2STR_PRE = 940, t2STR_PRE_imm = 941, t2STRB_PRE = 942, t2STRD_PRE = 943, STR_PRE_REG = 944, STRB_PRE_REG = 945, STRD_PRE = 946, STRT_POST_IMM = 947, STRBT_POST_IMM = 948, t2STR_POST_imm = 949, t2STRB_POST = 950, STRBT_POST_REG_STRB_POST_REG = 951, VLSTM = 952, VCVTASD_VCVTASH_VCVTASS_VCVTAUD_VCVTAUH_VCVTAUS_VCVTMSD_VCVTMSH_VCVTMSS_VCVTMUD_VCVTMUH_VCVTMUS_VCVTNSD_VCVTNSH_VCVTNSS_VCVTNUD_VCVTNUH_VCVTNUS_VCVTPSD_VCVTPSH_VCVTPSS_VCVTPUD_VCVTPUH_VCVTPUS_VCVTBDH_VCVTTDH_VCVTTHD = 953, VTOSLS_VTOUHS_VTOULS = 954, VJCVT = 955, VRINTAD_VRINTAH_VRINTAS_VRINTMD_VRINTMH_VRINTMS_VRINTND_VRINTNH_VRINTNS_VRINTPD_VRINTPH_VRINTPS_VRINTRD_VRINTRH_VRINTRS_VRINTXD_VRINTXH_VRINTXS_VRINTZD_VRINTZH_VRINTZS = 956, VSQRTH = 957, VMAXsv2i32_VMAXsv4i16_VMAXsv8i8_VMAXuv2i32_VMAXuv4i16_VMAXuv8i8_VMINsv2i32_VMINsv4i16_VMINsv8i8_VMINuv2i32_VMINuv4i16_VMINuv8i8 = 958, VUDOTD_VUDOTDI_VSDOTD_VSDOTDI_VUDOTQ_VUDOTQI_VSDOTQ_VSDOTQI = 959, FCONSTD = 960, FCONSTH = 961, FCONSTS = 962, VMOVHcc_VMOVH = 963, VINSH = 964, VSTMSIA = 965, VSTMSDB_UPD_VSTMSIA_UPD = 966, VRHADDsv16i8_VRHADDsv4i32_VRHADDsv8i16_VRHADDuv16i8_VRHADDuv4i32_VRHADDuv8i16 = 967, VRHADDsv2i32_VRHADDsv4i16_VRHADDsv8i8_VRHADDuv2i32_VRHADDuv4i16_VRHADDuv8i8 = 968, VMVNv2i32_VMVNv4i16_VMVNv4i32_VMVNv8i16 = 969, VMULpd_VMULv4i16_VMULv8i8_VMULslv4i16 = 970, VMULv2i32_VMULslv2i32 = 971, VQDMULHslv2i32_VQDMULHv2i32_VQRDMULHslv2i32_VQRDMULHv2i32 = 972, VQDMULHslv4i16_VQDMULHv4i16_VQRDMULHslv4i16_VQRDMULHv4i16 = 973, VMULpq_VMULv16i8_VMULv8i16_VMULslv8i16 = 974, VMLAslv2i32_VMLAv2i32_VMLSslv2i32_VMLSv2i32 = 975, VMLAslv4i16_VMLAv4i16_VMLAv8i8_VMLSslv4i16_VMLSv4i16_VMLSv8i8 = 976, VQRDMLAHslv2i32_VQRDMLAHv2i32_VQRDMLSHslv2i32_VQRDMLSHv2i32 = 977, VQRDMLAHslv4i16_VQRDMLAHv4i16_VQRDMLSHslv4i16_VQRDMLSHv4i16 = 978, VQRDMLAHslv4i32_VQRDMLAHv4i32_VQRDMLSHslv4i32_VQRDMLSHv4i32 = 979, VQRDMLAHslv8i16_VQRDMLAHv8i16_VQRDMLSHslv8i16_VQRDMLSHv8i16 = 980, VMULLp8_VMULLslsv2i32_VMULLslsv4i16_VMULLsluv2i32_VMULLsluv4i16_VMULLsv4i32_VMULLsv8i16_VMULLuv4i32_VMULLuv8i16 = 981, VSHLiv16i8_VSHLiv1i64_VSHLiv2i32_VSHLiv2i64_VSHLiv4i16_VSHLiv4i32_VSHLiv8i16_VSHLiv8i8_VSHLLi16_VSHLLi32_VSHLLi8_VSHLLsv2i64_VSHLLsv4i32_VSHLLsv8i16_VSHLLuv2i64_VSHLLuv4i32_VSHLLuv8i16_VSHRsv16i8_VSHRsv1i64_VSHRsv2i32_VSHRsv2i64_VSHRsv4i16_VSHRsv4i32_VSHRsv8i16_VSHRsv8i8_VSHRuv16i8_VSHRuv1i64_VSHRuv2i32_VSHRuv2i64_VSHRuv4i16_VSHRuv4i32_VSHRuv8i16_VSHRuv8i8 = 982, VQSHLsiv16i8_VQSHLsiv1i64_VQSHLsiv2i32_VQSHLsiv2i64_VQSHLsiv4i16_VQSHLsiv4i32_VQSHLsiv8i16_VQSHLsiv8i8_VQSHLsuv16i8_VQSHLsuv1i64_VQSHLsuv2i32_VQSHLsuv2i64_VQSHLsuv4i16_VQSHLsuv4i32_VQSHLsuv8i16_VQSHLsuv8i8_VQSHLuiv16i8_VQSHLuiv1i64_VQSHLuiv2i32_VQSHLuiv2i64_VQSHLuiv4i16_VQSHLuiv4i32_VQSHLuiv8i16_VQSHLuiv8i8 = 983, VRSHRsv16i8_VRSHRsv1i64_VRSHRsv2i32_VRSHRsv2i64_VRSHRsv4i16_VRSHRsv4i32_VRSHRsv8i16_VRSHRsv8i8_VRSHRuv16i8_VRSHRuv1i64_VRSHRuv2i32_VRSHRuv2i64_VRSHRuv4i16_VRSHRuv4i32_VRSHRuv8i16_VRSHRuv8i8 = 984, VSLIv1i64_VSLIv2i32_VSLIv4i16_VSLIv8i8_VSRIv1i64_VSRIv2i32_VSRIv4i16_VSRIv8i8 = 985, VSLIv16i8_VSLIv2i64_VSLIv4i32_VSLIv8i16_VSRIv16i8_VSRIv2i64_VSRIv4i32_VSRIv8i16 = 986, VPADDh = 987, VCADDv2f32_VCADDv4f16_VCMLAv2f32_VCMLAv2f32_indexed_VCMLAv4f16_VCMLAv4f16_indexed = 988, VCADDv4f32_VCADDv8f16_VCMLAv4f32_VCMLAv4f32_indexed_VCMLAv8f16_VCMLAv8f16_indexed = 989, VCVTf2sd_VCVTf2ud_VCVTf2xsd_VCVTf2xud_VCVTs2fd_VCVTu2fd_VCVTxs2fd_VCVTxu2fd = 990, VCVTf2sq_VCVTf2uq_VCVTs2fq_VCVTu2fq_VCVTf2xsq_VCVTf2xuq_VCVTxs2fq_VCVTxu2fq = 991, NEON_VMAXNMNDf_NEON_VMAXNMNDh_NEON_VMAXNMNQf_NEON_VMAXNMNQh_VFP_VMAXNMD_VFP_VMAXNMH_VFP_VMAXNMS_NEON_VMINNMNDf_NEON_VMINNMNDh_NEON_VMINNMNQf_NEON_VMINNMNQh_VFP_VMINNMD_VFP_VMINNMH_VFP_VMINNMS = 992, VMULhd = 993, VMULhq = 994, VRINTANDf_VRINTANDh_VRINTANQf_VRINTANQh_VRINTMNDf_VRINTMNDh_VRINTMNQf_VRINTMNQh_VRINTNNDf_VRINTNNDh_VRINTNNQf_VRINTNNQh_VRINTPNDf_VRINTPNDh_VRINTPNQf_VRINTPNQh_VRINTXNDf_VRINTXNDh_VRINTXNQf_VRINTXNQh_VRINTZNDf_VRINTZNDh_VRINTZNQf_VRINTZNQh = 995, VMOVD0_VMOVQ0 = 996, VTRNd16_VTRNd32_VTRNd8 = 997, VLD2d16_VLD2d32_VLD2d8 = 998, VLD2d16wb_fixed_VLD2d16wb_register_VLD2d32wb_fixed_VLD2d32wb_register_VLD2d8wb_fixed_VLD2d8wb_register = 999, VLD3LNd32_VLD3LNq32_VLD3LNd32Pseudo_VLD3LNq32Pseudo = 1000, VLD3LNd32_UPD_VLD3LNq32_UPD = 1001, VLD3LNd32Pseudo_UPD_VLD3LNq32Pseudo_UPD = 1002, VLD4LNd32_VLD4LNq32_VLD4LNd32Pseudo_VLD4LNq32Pseudo = 1003, VLD4LNd32_UPD_VLD4LNq32_UPD = 1004, VLD4LNd32Pseudo_UPD_VLD4LNq32Pseudo_UPD = 1005, AESD_AESE_AESIMC_AESMC = 1006, SHA1SU0 = 1007, SHA1H_SHA1SU1 = 1008, SHA1C_SHA1M_SHA1P = 1009, SHA256SU0 = 1010, SHA256H_SHA256H2_SHA256SU1 = 1011, t2LDMIA_RET = 1012, tLDMIA_UPD_t2LDMDB_UPD_t2LDMIA_UPD = 1013, t2LDMDB_t2LDMIA_tLDMIA = 1014, t2LDRConstPool_tLDRConstPool = 1015, t2LDRLIT_ga_pcrel = 1016, tLDRLIT_ga_abs = 1017, tLDRLIT_ga_pcrel = 1018, t2LDREX_t2LDREXB_t2LDREXD_t2LDREXH = 1019, t2STMDB_t2STMIA = 1020, t2STMDB_UPD_t2STMIA_UPD_tSTMIA_UPD = 1021, tMOVSr_tMOVr = 1022, tMOVi8 = 1023, t2MSR_AR_t2MSR_M_t2MSRbanked_t2MRS_AR_t2MRS_M_t2MRSbanked_t2MRSsys_AR = 1024, t2CLREX = 1025, t2SMLAL_t2SMLALBB_t2SMLALBT_t2SMLALD_t2SMLALDX_t2SMLALTB_t2SMLALTT_t2SMLSLD_t2SMLSLDX = 1026, t2REV_t2REV16_t2REVSH_tREV_tREV16_tREVSH = 1027, t2CDP_t2CDP2 = 1028, t2MCR_t2MCR2_t2MCRR_t2MCRR2_t2MRC_t2MRC2_t2MRRC_t2MRRC2 = 1029, t2STC2L_OFFSET_t2STC2L_OPTION_t2STC2L_POST_t2STC2L_PRE_t2STC2_OFFSET_t2STC2_OPTION_t2STC2_POST_t2STC2_PRE_t2STCL_OFFSET_t2STCL_OPTION_t2STCL_POST_t2STCL_PRE_t2STC_OFFSET_t2STC_OPTION_t2STC_POST_t2STC_PRE = 1030, tCPS_t2ISB_t2DSB_t2DMB_t2HINT_tHINT = 1031, t2UDF_tUDF = 1032, tBKPT_t2DBG = 1033, Int_eh_sjlj_dispatchsetup_Int_eh_sjlj_longjmp_Int_eh_sjlj_setjmp_Int_eh_sjlj_setjmp_nofp_Int_eh_sjlj_setup_dispatch_t2Int_eh_sjlj_setjmp_t2Int_eh_sjlj_setjmp_nofp_tInt_eh_sjlj_longjmp_tInt_eh_sjlj_setjmp_ADJCALLSTACKDOWN_ADJCALLSTACKUP_tADJCALLSTACKDOWN_tADJCALLSTACKUP = 1034, CMP_SWAP_16_CMP_SWAP_32_CMP_SWAP_64_CMP_SWAP_8 = 1035, JUMPTABLE_ADDRS_JUMPTABLE_INSTS_JUMPTABLE_TBB_JUMPTABLE_TBH = 1036, MEMCPY = 1037, VSETLNi32 = 1038, VGETLNi32 = 1039, VLD1LNdAsm_16_VLD1LNdAsm_32_VLD1LNdAsm_8_VLD1LNdWB_fixed_Asm_16_VLD1LNdWB_fixed_Asm_32_VLD1LNdWB_fixed_Asm_8_VLD1LNdWB_register_Asm_16_VLD1LNdWB_register_Asm_32_VLD1LNdWB_register_Asm_8_VLD2LNdAsm_16_VLD2LNdAsm_32_VLD2LNdAsm_8_VLD2LNdWB_fixed_Asm_16_VLD2LNdWB_fixed_Asm_32_VLD2LNdWB_fixed_Asm_8_VLD2LNdWB_register_Asm_16_VLD2LNdWB_register_Asm_32_VLD2LNdWB_register_Asm_8_VLD2LNqAsm_16_VLD2LNqAsm_32_VLD2LNqWB_fixed_Asm_16_VLD2LNqWB_fixed_Asm_32_VLD2LNqWB_register_Asm_16_VLD2LNqWB_register_Asm_32_VLD3DUPdAsm_16_VLD3DUPdAsm_32_VLD3DUPdAsm_8_VLD3DUPdWB_fixed_Asm_16_VLD3DUPdWB_fixed_Asm_32_VLD3DUPdWB_fixed_Asm_8_VLD3DUPdWB_register_Asm_16_VLD3DUPdWB_register_Asm_32_VLD3DUPdWB_register_Asm_8_VLD3DUPqAsm_16_VLD3DUPqAsm_32_VLD3DUPqAsm_8_VLD3DUPqWB_fixed_Asm_16_VLD3DUPqWB_fixed_Asm_32_VLD3DUPqWB_fixed_Asm_8_VLD3DUPqWB_register_Asm_16_VLD3DUPqWB_register_Asm_32_VLD3DUPqWB_register_Asm_8_VLD3LNdAsm_16_VLD3LNdAsm_32_VLD3LNdAsm_8_VLD3LNdWB_fixed_Asm_16_VLD3LNdWB_fixed_Asm_32_VLD3LNdWB_fixed_Asm_8_VLD3LNdWB_register_Asm_16_VLD3LNdWB_register_Asm_32_VLD3LNdWB_register_Asm_8_VLD3LNqAsm_16_VLD3LNqAsm_32_VLD3LNqWB_fixed_Asm_16_VLD3LNqWB_fixed_Asm_32_VLD3LNqWB_register_Asm_16_VLD3LNqWB_register_Asm_32_VLD3dAsm_16_VLD3dAsm_32_VLD3dAsm_8_VLD3dWB_fixed_Asm_16_VLD3dWB_fixed_Asm_32_VLD3dWB_fixed_Asm_8_VLD3dWB_register_Asm_16_VLD3dWB_register_Asm_32_VLD3dWB_register_Asm_8_VLD3qAsm_16_VLD3qAsm_32_VLD3qAsm_8_VLD3qWB_fixed_Asm_16_VLD3qWB_fixed_Asm_32_VLD3qWB_fixed_Asm_8_VLD3qWB_register_Asm_16_VLD3qWB_register_Asm_32_VLD3qWB_register_Asm_8_VLD4DUPdAsm_16_VLD4DUPdAsm_32_VLD4DUPdAsm_8_VLD4DUPdWB_fixed_Asm_16_VLD4DUPdWB_fixed_Asm_32_VLD4DUPdWB_fixed_Asm_8_VLD4DUPdWB_register_Asm_16_VLD4DUPdWB_register_Asm_32_VLD4DUPdWB_register_Asm_8_VLD4DUPqAsm_16_VLD4DUPqAsm_32_VLD4DUPqAsm_8_VLD4DUPqWB_fixed_Asm_16_VLD4DUPqWB_fixed_Asm_32_VLD4DUPqWB_fixed_Asm_8_VLD4DUPqWB_register_Asm_16_VLD4DUPqWB_register_Asm_32_VLD4DUPqWB_register_Asm_8_VLD4LNdAsm_16_VLD4LNdAsm_32_VLD4LNdAsm_8_VLD4LNdWB_fixed_Asm_16_VLD4LNdWB_fixed_Asm_32_VLD4LNdWB_fixed_Asm_8_VLD4LNdWB_register_Asm_16_VLD4LNdWB_register_Asm_32_VLD4LNdWB_register_Asm_8_VLD4LNqAsm_16_VLD4LNqAsm_32_VLD4LNqWB_fixed_Asm_16_VLD4LNqWB_fixed_Asm_32_VLD4LNqWB_register_Asm_16_VLD4LNqWB_register_Asm_32_VLD4dAsm_16_VLD4dAsm_32_VLD4dAsm_8_VLD4dWB_fixed_Asm_16_VLD4dWB_fixed_Asm_32_VLD4dWB_fixed_Asm_8_VLD4dWB_register_Asm_16_VLD4dWB_register_Asm_32_VLD4dWB_register_Asm_8_VLD4qAsm_16_VLD4qAsm_32_VLD4qAsm_8_VLD4qWB_fixed_Asm_16_VLD4qWB_fixed_Asm_32_VLD4qWB_fixed_Asm_8_VLD4qWB_register_Asm_16_VLD4qWB_register_Asm_32_VLD4qWB_register_Asm_8 = 1040, VLD1d16QPseudo_VLD1d16QPseudoWB_fixed_VLD1d16QPseudoWB_register_VLD1d32QPseudo_VLD1d32QPseudoWB_fixed_VLD1d32QPseudoWB_register_VLD1d8QPseudo_VLD1d8QPseudoWB_fixed_VLD1d8QPseudoWB_register_VLD1q16HighQPseudo_VLD1q16HighQPseudo_UPD_VLD1q16LowQPseudo_UPD_VLD1q32HighQPseudo_VLD1q32HighQPseudo_UPD_VLD1q32LowQPseudo_UPD_VLD1q64HighQPseudo_VLD1q64HighQPseudo_UPD_VLD1q64LowQPseudo_UPD_VLD1q8HighQPseudo_VLD1q8HighQPseudo_UPD_VLD1q8LowQPseudo_UPD = 1041, VLD1d16TPseudo_VLD1d16TPseudoWB_fixed_VLD1d16TPseudoWB_register_VLD1d32TPseudo_VLD1d32TPseudoWB_fixed_VLD1d32TPseudoWB_register_VLD1d8TPseudo_VLD1d8TPseudoWB_fixed_VLD1d8TPseudoWB_register_VLD1q16HighTPseudo_VLD1q16HighTPseudo_UPD_VLD1q16LowTPseudo_UPD_VLD1q32HighTPseudo_VLD1q32HighTPseudo_UPD_VLD1q32LowTPseudo_UPD_VLD1q64HighTPseudo_VLD1q64HighTPseudo_UPD_VLD1q64LowTPseudo_UPD_VLD1q8HighTPseudo_VLD1q8HighTPseudo_UPD_VLD1q8LowTPseudo_UPD = 1042, VLD2DUPq16EvenPseudo_VLD2DUPq16OddPseudo_VLD2DUPq16OddPseudoWB_fixed_VLD2DUPq16OddPseudoWB_register_VLD2DUPq32EvenPseudo_VLD2DUPq32OddPseudo_VLD2DUPq32OddPseudoWB_fixed_VLD2DUPq32OddPseudoWB_register_VLD2DUPq8EvenPseudo_VLD2DUPq8OddPseudo_VLD2DUPq8OddPseudoWB_fixed_VLD2DUPq8OddPseudoWB_register = 1043, VLD3DUPq16EvenPseudo_VLD3DUPq16OddPseudo_VLD3DUPq32EvenPseudo_VLD3DUPq32OddPseudo_VLD3DUPq8EvenPseudo_VLD3DUPq8OddPseudo = 1044, VLD3DUPq16OddPseudo_UPD_VLD3DUPq32OddPseudo_UPD_VLD3DUPq8OddPseudo_UPD = 1045, VLD4DUPq16EvenPseudo_VLD4DUPq16OddPseudo_VLD4DUPq32EvenPseudo_VLD4DUPq32OddPseudo_VLD4DUPq8EvenPseudo_VLD4DUPq8OddPseudo = 1046, VLD4DUPq16OddPseudo_UPD_VLD4DUPq32OddPseudo_UPD_VLD4DUPq8OddPseudo_UPD = 1047, VST1d16TPseudo_VST1d32TPseudo_VST1d8TPseudo_VST1q16HighTPseudo_VST1q16HighTPseudo_UPD_VST1q16LowTPseudo_UPD_VST1q32HighTPseudo_VST1q32HighTPseudo_UPD_VST1q32LowTPseudo_UPD_VST1q64HighTPseudo_VST1q64HighTPseudo_UPD_VST1q64LowTPseudo_UPD_VST1q8HighTPseudo_VST1q8HighTPseudo_UPD_VST1q8LowTPseudo_UPD = 1048, VST1d16TPseudoWB_fixed_VST1d16TPseudoWB_register_VST1d32TPseudoWB_fixed_VST1d32TPseudoWB_register_VST1d8TPseudoWB_fixed_VST1d8TPseudoWB_register = 1049, VST1q16HighQPseudo_VST1q16HighQPseudo_UPD_VST1q16LowQPseudo_UPD_VST1q32HighQPseudo_VST1q32HighQPseudo_UPD_VST1q32LowQPseudo_UPD_VST1q64HighQPseudo_VST1q64HighQPseudo_UPD_VST1q64LowQPseudo_UPD_VST1q8HighQPseudo_VST1q8HighQPseudo_UPD_VST1q8LowQPseudo_UPD = 1050, VMOVD0 = 1051, t2CPS1p_t2CPS2p_t2CPS3p_t2SG_t2TT_t2TTA_t2TTAT_t2TTT = 1052, t2DBG = 1053, t2SUBS_PC_LR = 1054, COPY_TO_REGCLASS = 1055, COPY_STRUCT_BYVAL_I32 = 1056, t2CSEL_t2CSINC_t2CSINV_t2CSNEG = 1057, t2ADDrr_t2ADDSrr_t2SBCrr = 1058, t2ASRri_t2LSLri_t2LSRri = 1059, t2ASRrr_t2LSLrr_t2LSRrr_t2RORrr = 1060, t2CMNzrr = 1061, t2CMPri = 1062, t2CMPrr = 1063, t2ORRrr = 1064, t2REV_t2REV16_t2REVSH = 1065, t2RSBri_t2RSBSri = 1066, t2RSBrr_t2SUBSrr_t2SUBrr = 1067, t2TEQrr_t2TSTrr = 1068, t2STRi12 = 1069, t2STRBi12_t2STRHi12 = 1070, t2STMIA_UPD_t2STMDB_UPD = 1071, t2SETPAN_tHLT_tSETEND = 1072, tADC_tADDhirr_tADDrSP_tADDrr_tADDspr_tPICADD_tSBC_tSUBrr = 1073, tADDrSPi_tADDspi_tADR_tRSB_tSUBspi = 1074, tAND_tBIC_tEOR_tORR = 1075, tASRri_tLSLri_tLSRri = 1076, tCBNZ_tCBZ = 1077, tCMNz_tCMPhir_tCMPr = 1078, tCMPi8 = 1079, tCPS_tHINT = 1080, tMOVSr = 1081, tSTRBi_tSTRHi = 1082, tSTRi_tSTRspi = 1083, tSVC_tTRAP = 1084, tTST = 1085, tUDF = 1086, tB_tBX_tBXNS_tBcc = 1087, tBLXNSr_tBLXr = 1088, t2DMB_t2DSB_t2ISB = 1089, t2MCR_t2MCR2_t2MCRR_t2MCRR2_t2MRC_t2MRC2 = 1090, t2MOVSsi = 1091, t2MOVSsr = 1092, t2MUL = 1093, t2SMMLA_t2SMMLAR_t2SMMLS_t2SMMLSR = 1094, t2UXTAB_t2UXTAH = 1095, t2UXTAB16 = 1096, MVE_SQRSHR_MVE_SQSHL_MVE_SRSHR_MVE_UQRSHL_MVE_UQSHL_MVE_URSHR = 1097, MVE_ASRLi_MVE_ASRLr_MVE_LSLLi_MVE_LSLLr_MVE_LSRL_MVE_SQRSHRL_MVE_SQSHLL_MVE_SRSHRL_MVE_UQRSHLL_MVE_UQSHLL_MVE_URSHRL = 1098, t2CLRM = 1099, t2LDRBi12_t2LDRHi12 = 1100, t2LDRi12 = 1101, t2LDMDB_t2LDMIA = 1102, t2LDMDB_UPD_t2LDMIA_UPD = 1103, tADDi3_tADDi8_tSUBi3_tSUBi8 = 1104, t2ADDSri_t2ADDri = 1105, t2SUBSri_t2SUBri = 1106, t2LoopDec = 1107, MVE_VLDRBS16_MVE_VLDRBS32_MVE_VLDRBU16_MVE_VLDRBU32_MVE_VLDRBU8_MVE_VLDRHS32_MVE_VLDRHU16_MVE_VLDRHU32_MVE_VLDRWU32 = 1108, MVE_VLDRBS16_post_MVE_VLDRBS16_pre_MVE_VLDRBS32_post_MVE_VLDRBS32_pre_MVE_VLDRBU16_post_MVE_VLDRBU16_pre_MVE_VLDRBU32_post_MVE_VLDRBU32_pre_MVE_VLDRBU8_post_MVE_VLDRBU8_pre_MVE_VLDRHS32_post_MVE_VLDRHS32_pre_MVE_VLDRHU16_post_MVE_VLDRHU16_pre_MVE_VLDRHU32_post_MVE_VLDRHU32_pre_MVE_VLDRWU32_post_MVE_VLDRWU32_pre = 1109, MVE_VLDRBS16_rq_MVE_VLDRBS32_rq_MVE_VLDRBU16_rq_MVE_VLDRBU32_rq_MVE_VLDRBU8_rq_MVE_VLDRDU64_rq_MVE_VLDRDU64_rq_u_MVE_VLDRHS32_rq_MVE_VLDRHS32_rq_u_MVE_VLDRHU16_rq_MVE_VLDRHU16_rq_u_MVE_VLDRHU32_rq_MVE_VLDRHU32_rq_u_MVE_VLDRWU32_rq_MVE_VLDRWU32_rq_u = 1110, MVE_VLDRDU64_qi_MVE_VLDRWU32_qi = 1111, MVE_VLDRDU64_qi_pre_MVE_VLDRWU32_qi_pre = 1112, MVE_VLD20_16_MVE_VLD20_32_MVE_VLD20_8_MVE_VLD21_16_MVE_VLD21_32_MVE_VLD21_8_MVE_VLD40_16_MVE_VLD40_32_MVE_VLD40_8_MVE_VLD41_16_MVE_VLD41_32_MVE_VLD41_8_MVE_VLD42_16_MVE_VLD42_32_MVE_VLD42_8_MVE_VLD43_16_MVE_VLD43_32_MVE_VLD43_8 = 1113, MVE_VLD20_16_wb_MVE_VLD20_32_wb_MVE_VLD20_8_wb_MVE_VLD21_16_wb_MVE_VLD21_32_wb_MVE_VLD21_8_wb_MVE_VLD40_16_wb_MVE_VLD40_32_wb_MVE_VLD40_8_wb_MVE_VLD41_16_wb_MVE_VLD41_32_wb_MVE_VLD41_8_wb_MVE_VLD42_16_wb_MVE_VLD42_32_wb_MVE_VLD42_8_wb_MVE_VLD43_16_wb_MVE_VLD43_32_wb_MVE_VLD43_8_wb = 1114, MVE_VSTRB16_MVE_VSTRB32_MVE_VSTRBU8_MVE_VSTRH32_MVE_VSTRHU16_MVE_VSTRWU32 = 1115, MVE_VSTRB16_post_MVE_VSTRB16_pre_MVE_VSTRB32_post_MVE_VSTRB32_pre_MVE_VSTRBU8_post_MVE_VSTRBU8_pre_MVE_VSTRH32_post_MVE_VSTRH32_pre_MVE_VSTRHU16_post_MVE_VSTRHU16_pre_MVE_VSTRWU32_post_MVE_VSTRWU32_pre = 1116, MVE_VSTRB16_rq_MVE_VSTRB32_rq_MVE_VSTRB8_rq_MVE_VSTRD64_rq_MVE_VSTRD64_rq_u_MVE_VSTRH16_rq_MVE_VSTRH16_rq_u_MVE_VSTRH32_rq_MVE_VSTRH32_rq_u_MVE_VSTRW32_rq_MVE_VSTRW32_rq_u = 1117, MVE_VSTRD64_qi_MVE_VSTRD64_qi_pre_MVE_VSTRW32_qi_MVE_VSTRW32_qi_pre = 1118, MVE_VST20_16_MVE_VST20_16_wb_MVE_VST20_32_MVE_VST20_32_wb_MVE_VST20_8_MVE_VST20_8_wb_MVE_VST21_16_MVE_VST21_16_wb_MVE_VST21_32_MVE_VST21_32_wb_MVE_VST21_8_MVE_VST21_8_wb_MVE_VST40_16_MVE_VST40_16_wb_MVE_VST40_32_MVE_VST40_32_wb_MVE_VST40_8_MVE_VST40_8_wb_MVE_VST41_16_MVE_VST41_16_wb_MVE_VST41_32_MVE_VST41_32_wb_MVE_VST41_8_MVE_VST41_8_wb_MVE_VST42_16_MVE_VST42_16_wb_MVE_VST42_32_MVE_VST42_32_wb_MVE_VST42_8_MVE_VST42_8_wb_MVE_VST43_16_MVE_VST43_16_wb_MVE_VST43_32_MVE_VST43_32_wb_MVE_VST43_8_MVE_VST43_8_wb = 1119, MVE_VABAVs16_MVE_VABAVs32_MVE_VABAVs8_MVE_VABAVu16_MVE_VABAVu32_MVE_VABAVu8 = 1120, MVE_VABDs16_MVE_VABDs32_MVE_VABDs8_MVE_VABDu16_MVE_VABDu32_MVE_VABDu8 = 1121, MVE_VABSs16_MVE_VABSs32_MVE_VABSs8 = 1122, MVE_VADC_MVE_VADCI = 1123, MVE_VADD_qr_i16_MVE_VADD_qr_i32_MVE_VADD_qr_i8_MVE_VADDi16_MVE_VADDi32_MVE_VADDi8 = 1124, MVE_VAND = 1125, MVE_VBIC_MVE_VBICimmi16_MVE_VBICimmi32 = 1126, MVE_VBRSR16_MVE_VBRSR32_MVE_VBRSR8 = 1127, MVE_VCADDi16_MVE_VCADDi32_MVE_VCADDi8 = 1128, MVE_VCLSs16_MVE_VCLSs32_MVE_VCLSs8 = 1129, MVE_VCLZs16_MVE_VCLZs32_MVE_VCLZs8 = 1130, MVE_VDDUPu16_MVE_VDDUPu32_MVE_VDDUPu8_MVE_VDUP16_MVE_VDUP32_MVE_VDUP8_MVE_VDWDUPu16_MVE_VDWDUPu32_MVE_VDWDUPu8_MVE_VIDUPu16_MVE_VIDUPu32_MVE_VIDUPu8_MVE_VIWDUPu16_MVE_VIWDUPu32_MVE_VIWDUPu8 = 1131, MVE_VEOR = 1132, MVE_VHADD_qr_s16_MVE_VHADD_qr_s32_MVE_VHADD_qr_s8_MVE_VHADD_qr_u16_MVE_VHADD_qr_u32_MVE_VHADD_qr_u8_MVE_VHADDs16_MVE_VHADDs32_MVE_VHADDs8_MVE_VHADDu16_MVE_VHADDu32_MVE_VHADDu8 = 1133, MVE_VHCADDs16_MVE_VHCADDs32_MVE_VHCADDs8 = 1134, MVE_VHSUB_qr_s16_MVE_VHSUB_qr_s32_MVE_VHSUB_qr_s8_MVE_VHSUB_qr_u16_MVE_VHSUB_qr_u32_MVE_VHSUB_qr_u8_MVE_VHSUBs16_MVE_VHSUBs32_MVE_VHSUBs8_MVE_VHSUBu16_MVE_VHSUBu32_MVE_VHSUBu8 = 1135, MVE_VMAXAs16_MVE_VMAXAs32_MVE_VMAXAs8_MVE_VMAXs16_MVE_VMAXs32_MVE_VMAXs8_MVE_VMAXu16_MVE_VMAXu32_MVE_VMAXu8_MVE_VMINAs16_MVE_VMINAs32_MVE_VMINAs8_MVE_VMINs16_MVE_VMINs32_MVE_VMINs8_MVE_VMINu16_MVE_VMINu32_MVE_VMINu8 = 1136, MVE_VMAXAVs8_MVE_VMAXVs8_MVE_VMAXVu8_MVE_VMINAVs8_MVE_VMINVs8_MVE_VMINVu8 = 1137, MVE_VMAXAVs16_MVE_VMAXVs16_MVE_VMAXVu16_MVE_VMINAVs16_MVE_VMINVs16_MVE_VMINVu16 = 1138, MVE_VMAXAVs32_MVE_VMAXVs32_MVE_VMAXVu32_MVE_VMINAVs32_MVE_VMINVs32_MVE_VMINVu32 = 1139, MVE_VMOVNi16bh_MVE_VMOVNi16th_MVE_VMOVNi32bh_MVE_VMOVNi32th = 1140, MVE_VMOVLs16bh_MVE_VMOVLs16th_MVE_VMOVLs8bh_MVE_VMOVLs8th_MVE_VMOVLu16bh_MVE_VMOVLu16th_MVE_VMOVLu8bh_MVE_VMOVLu8th = 1141, MVE_VMULLBp16_MVE_VMULLBp8_MVE_VMULLTp16_MVE_VMULLTp8 = 1142, MVE_VMVN_MVE_VMVNimmi16_MVE_VMVNimmi32 = 1143, MVE_VNEGs16_MVE_VNEGs32_MVE_VNEGs8 = 1144, MVE_VORN = 1145, MVE_VORR_MVE_VORRimmi16_MVE_VORRimmi32 = 1146, MVE_VPSEL = 1147, MQPRCopy = 1148, MVE_VQABSs16_MVE_VQABSs32_MVE_VQABSs8 = 1149, MVE_VQADD_qr_s16_MVE_VQADD_qr_s32_MVE_VQADD_qr_s8_MVE_VQADD_qr_u16_MVE_VQADD_qr_u32_MVE_VQADD_qr_u8_MVE_VQADDs16_MVE_VQADDs32_MVE_VQADDs8_MVE_VQADDu16_MVE_VQADDu32_MVE_VQADDu8 = 1150, MVE_VQMOVNs16bh_MVE_VQMOVNs16th_MVE_VQMOVNs32bh_MVE_VQMOVNs32th_MVE_VQMOVNu16bh_MVE_VQMOVNu16th_MVE_VQMOVNu32bh_MVE_VQMOVNu32th_MVE_VQMOVUNs16bh_MVE_VQMOVUNs16th_MVE_VQMOVUNs32bh_MVE_VQMOVUNs32th = 1151, MVE_VQNEGs16_MVE_VQNEGs32_MVE_VQNEGs8 = 1152, MVE_VSHLC_MVE_VSHLL_imms16bh_MVE_VSHLL_imms16th_MVE_VSHLL_imms8bh_MVE_VSHLL_imms8th_MVE_VSHLL_immu16bh_MVE_VSHLL_immu16th_MVE_VSHLL_immu8bh_MVE_VSHLL_immu8th_MVE_VSHLL_lws16bh_MVE_VSHLL_lws16th_MVE_VSHLL_lws8bh_MVE_VSHLL_lws8th_MVE_VSHLL_lwu16bh_MVE_VSHLL_lwu16th_MVE_VSHLL_lwu8bh_MVE_VSHLL_lwu8th_MVE_VSHL_by_vecs16_MVE_VSHL_by_vecs32_MVE_VSHL_by_vecs8_MVE_VSHL_by_vecu16_MVE_VSHL_by_vecu32_MVE_VSHL_by_vecu8_MVE_VSHL_immi16_MVE_VSHL_immi32_MVE_VSHL_immi8_MVE_VSHL_qrs16_MVE_VSHL_qrs32_MVE_VSHL_qrs8_MVE_VSHL_qru16_MVE_VSHL_qru32_MVE_VSHL_qru8 = 1153, MVE_VQSHLU_imms16_MVE_VQSHLU_imms32_MVE_VQSHLU_imms8_MVE_VQSHL_by_vecs16_MVE_VQSHL_by_vecs32_MVE_VQSHL_by_vecs8_MVE_VQSHL_by_vecu16_MVE_VQSHL_by_vecu32_MVE_VQSHL_by_vecu8_MVE_VQSHL_qrs16_MVE_VQSHL_qrs32_MVE_VQSHL_qrs8_MVE_VQSHL_qru16_MVE_VQSHL_qru32_MVE_VQSHL_qru8_MVE_VQSHLimms16_MVE_VQSHLimms32_MVE_VQSHLimms8_MVE_VQSHLimmu16_MVE_VQSHLimmu32_MVE_VQSHLimmu8_MVE_VRSHL_by_vecs16_MVE_VRSHL_by_vecs32_MVE_VRSHL_by_vecs8_MVE_VRSHL_by_vecu16_MVE_VRSHL_by_vecu32_MVE_VRSHL_by_vecu8_MVE_VRSHL_qrs16_MVE_VRSHL_qrs32_MVE_VRSHL_qrs8_MVE_VRSHL_qru16_MVE_VRSHL_qru32_MVE_VRSHL_qru8 = 1154, MVE_VQRSHL_by_vecs16_MVE_VQRSHL_by_vecs32_MVE_VQRSHL_by_vecs8_MVE_VQRSHL_by_vecu16_MVE_VQRSHL_by_vecu32_MVE_VQRSHL_by_vecu8_MVE_VQRSHL_qrs16_MVE_VQRSHL_qrs32_MVE_VQRSHL_qrs8_MVE_VQRSHL_qru16_MVE_VQRSHL_qru32_MVE_VQRSHL_qru8 = 1155, MVE_VQRSHRNbhs16_MVE_VQRSHRNbhs32_MVE_VQRSHRNbhu16_MVE_VQRSHRNbhu32_MVE_VQRSHRNths16_MVE_VQRSHRNths32_MVE_VQRSHRNthu16_MVE_VQRSHRNthu32_MVE_VQRSHRUNs16bh_MVE_VQRSHRUNs16th_MVE_VQRSHRUNs32bh_MVE_VQRSHRUNs32th_MVE_VQSHRNbhs16_MVE_VQSHRNbhs32_MVE_VQSHRNbhu16_MVE_VQSHRNbhu32_MVE_VQSHRNths16_MVE_VQSHRNths32_MVE_VQSHRNthu16_MVE_VQSHRNthu32_MVE_VQSHRUNs16bh_MVE_VQSHRUNs16th_MVE_VQSHRUNs32bh_MVE_VQSHRUNs32th_MVE_VRSHRNi16bh_MVE_VRSHRNi16th_MVE_VRSHRNi32bh_MVE_VRSHRNi32th_MVE_VSHRNi16bh_MVE_VSHRNi16th_MVE_VSHRNi32bh_MVE_VSHRNi32th = 1156, MVE_VSHR_imms16_MVE_VSHR_imms32_MVE_VSHR_imms8_MVE_VSHR_immu16_MVE_VSHR_immu32_MVE_VSHR_immu8 = 1157, MVE_VRSHR_imms16_MVE_VRSHR_imms32_MVE_VRSHR_imms8_MVE_VRSHR_immu16_MVE_VRSHR_immu32_MVE_VRSHR_immu8 = 1158, MVE_VQSUB_qr_s16_MVE_VQSUB_qr_s32_MVE_VQSUB_qr_s8_MVE_VQSUB_qr_u16_MVE_VQSUB_qr_u32_MVE_VQSUB_qr_u8_MVE_VQSUBs16_MVE_VQSUBs32_MVE_VQSUBs8_MVE_VQSUBu16_MVE_VQSUBu32_MVE_VQSUBu8 = 1159, MVE_VREV16_8_MVE_VREV32_16_MVE_VREV32_8_MVE_VREV64_16_MVE_VREV64_32_MVE_VREV64_8 = 1160, MVE_VRHADDs16_MVE_VRHADDs32_MVE_VRHADDs8_MVE_VRHADDu16_MVE_VRHADDu32_MVE_VRHADDu8 = 1161, MVE_VSBC_MVE_VSBCI = 1162, MVE_VSLIimm16_MVE_VSLIimm32_MVE_VSLIimm8 = 1163, MVE_VSRIimm16_MVE_VSRIimm32_MVE_VSRIimm8 = 1164, MVE_VSUB_qr_i16_MVE_VSUB_qr_i32_MVE_VSUB_qr_i8_MVE_VSUBi16_MVE_VSUBi32_MVE_VSUBi8 = 1165, MVE_VABDf16_MVE_VABDf32 = 1166, MVE_VABSf16_MVE_VABSf32 = 1167, MVE_VADDf16_MVE_VADDf32 = 1168, MVE_VADD_qr_f16_MVE_VADD_qr_f32 = 1169, MVE_VADDLVs32acc_MVE_VADDLVs32no_acc_MVE_VADDLVu32acc_MVE_VADDLVu32no_acc = 1170, MVE_VADDVs16acc_MVE_VADDVs16no_acc_MVE_VADDVs32acc_MVE_VADDVs32no_acc_MVE_VADDVs8acc_MVE_VADDVs8no_acc_MVE_VADDVu16acc_MVE_VADDVu16no_acc_MVE_VADDVu32acc_MVE_VADDVu32no_acc_MVE_VADDVu8acc_MVE_VADDVu8no_acc = 1171, MVE_VCADDf16_MVE_VCADDf32 = 1172, MVE_VCMLAf16_MVE_VCMLAf32 = 1173, MVE_VCMULf16_MVE_VCMULf32 = 1174, MVE_VCMPi16_MVE_VCMPi16r_MVE_VCMPi32_MVE_VCMPi32r_MVE_VCMPi8_MVE_VCMPi8r_MVE_VCMPs16_MVE_VCMPs16r_MVE_VCMPs32_MVE_VCMPs32r_MVE_VCMPs8_MVE_VCMPs8r_MVE_VCMPu16_MVE_VCMPu16r_MVE_VCMPu32_MVE_VCMPu32r_MVE_VCMPu8_MVE_VCMPu8r_MVE_VPTv16i8_MVE_VPTv16i8r_MVE_VPTv16s8_MVE_VPTv16s8r_MVE_VPTv16u8_MVE_VPTv16u8r_MVE_VPTv4i32_MVE_VPTv4i32r_MVE_VPTv4s32_MVE_VPTv4s32r_MVE_VPTv4u32_MVE_VPTv4u32r_MVE_VPTv8i16_MVE_VPTv8i16r_MVE_VPTv8s16_MVE_VPTv8s16r_MVE_VPTv8u16_MVE_VPTv8u16r = 1175, MVE_VCMPf16_MVE_VCMPf16r_MVE_VCMPf32_MVE_VCMPf32r_MVE_VPTv4f32_MVE_VPTv4f32r_MVE_VPTv8f16_MVE_VPTv8f16r = 1176, MVE_VCVTf16s16_fix_MVE_VCVTf16s16n_MVE_VCVTf16u16_fix_MVE_VCVTf16u16n = 1177, MVE_VCVTf32s32_fix_MVE_VCVTf32s32n_MVE_VCVTf32u32_fix_MVE_VCVTf32u32n = 1178, MVE_VCVTs16f16_fix_MVE_VCVTs16f16a_MVE_VCVTs16f16m_MVE_VCVTs16f16n_MVE_VCVTs16f16p_MVE_VCVTs16f16z_MVE_VCVTu16f16_fix_MVE_VCVTu16f16a_MVE_VCVTu16f16m_MVE_VCVTu16f16n_MVE_VCVTu16f16p_MVE_VCVTu16f16z = 1179, MVE_VCVTs32f32_fix_MVE_VCVTs32f32a_MVE_VCVTs32f32m_MVE_VCVTs32f32n_MVE_VCVTs32f32p_MVE_VCVTs32f32z_MVE_VCVTu32f32_fix_MVE_VCVTu32f32a_MVE_VCVTu32f32m_MVE_VCVTu32f32n_MVE_VCVTu32f32p_MVE_VCVTu32f32z = 1180, MVE_VCVTf16f32bh_MVE_VCVTf16f32th = 1181, MVE_VCVTf32f16bh_MVE_VCVTf32f16th = 1182, MVE_VFMA_qr_Sf16_MVE_VFMA_qr_Sf32_MVE_VFMA_qr_f16_MVE_VFMA_qr_f32_MVE_VFMAf16_MVE_VFMAf32_MVE_VFMSf16_MVE_VFMSf32 = 1183, MVE_VMAXNMAVf16_MVE_VMAXNMAVf32_MVE_VMAXNMAf16_MVE_VMAXNMAf32_MVE_VMAXNMVf16_MVE_VMAXNMVf32_MVE_VMAXNMf16_MVE_VMAXNMf32_MVE_VMINNMAVf16_MVE_VMINNMAVf32_MVE_VMINNMAf16_MVE_VMINNMAf32_MVE_VMINNMVf16_MVE_VMINNMVf32_MVE_VMINNMf16_MVE_VMINNMf32 = 1184, MVE_VMOV_from_lane_32_MVE_VMOV_from_lane_s16_MVE_VMOV_from_lane_s8_MVE_VMOV_from_lane_u16_MVE_VMOV_from_lane_u8 = 1185, MVE_VMOV_rr_q = 1186, MVE_VMOVimmf32_MVE_VMOVimmi16_MVE_VMOVimmi32_MVE_VMOVimmi64_MVE_VMOVimmi8 = 1187, MVE_VMUL_qr_f16_MVE_VMUL_qr_f32_MVE_VMUL_qr_i16_MVE_VMUL_qr_i32_MVE_VMUL_qr_i8_MVE_VMULf16_MVE_VMULf32_MVE_VMULi16_MVE_VMULi32_MVE_VMULi8 = 1188, MVE_VMULHs16_MVE_VMULHs32_MVE_VMULHs8_MVE_VMULHu16_MVE_VMULHu32_MVE_VMULHu8_MVE_VQDMULH_qr_s16_MVE_VQDMULH_qr_s32_MVE_VQDMULH_qr_s8_MVE_VQDMULHi16_MVE_VQDMULHi32_MVE_VQDMULHi8_MVE_VQRDMULH_qr_s16_MVE_VQRDMULH_qr_s32_MVE_VQRDMULH_qr_s8_MVE_VQRDMULHi16_MVE_VQRDMULHi32_MVE_VQRDMULHi8_MVE_VRMULHs16_MVE_VRMULHs32_MVE_VRMULHs8_MVE_VRMULHu16_MVE_VRMULHu32_MVE_VRMULHu8 = 1189, MVE_VMULLBs16_MVE_VMULLBs32_MVE_VMULLBs8_MVE_VMULLBu16_MVE_VMULLBu32_MVE_VMULLBu8_MVE_VMULLTs16_MVE_VMULLTs32_MVE_VMULLTs8_MVE_VMULLTu16_MVE_VMULLTu32_MVE_VMULLTu8_MVE_VQDMULLs16bh_MVE_VQDMULLs16th_MVE_VQDMULLs32bh_MVE_VQDMULLs32th = 1190, MVE_VQDMULL_qr_s16bh_MVE_VQDMULL_qr_s16th_MVE_VQDMULL_qr_s32bh_MVE_VQDMULL_qr_s32th = 1191, MVE_VMLADAVas16_MVE_VMLADAVas32_MVE_VMLADAVas8_MVE_VMLADAVau16_MVE_VMLADAVau32_MVE_VMLADAVau8_MVE_VMLADAVaxs16_MVE_VMLADAVaxs32_MVE_VMLADAVaxs8_MVE_VMLADAVs16_MVE_VMLADAVs32_MVE_VMLADAVs8_MVE_VMLADAVu16_MVE_VMLADAVu32_MVE_VMLADAVu8_MVE_VMLADAVxs16_MVE_VMLADAVxs32_MVE_VMLADAVxs8_MVE_VMLAS_qr_i16_MVE_VMLAS_qr_i32_MVE_VMLAS_qr_i8_MVE_VMLA_qr_i16_MVE_VMLA_qr_i32_MVE_VMLA_qr_i8_MVE_VMLSDAVas16_MVE_VMLSDAVas32_MVE_VMLSDAVas8_MVE_VMLSDAVaxs16_MVE_VMLSDAVaxs32_MVE_VMLSDAVaxs8_MVE_VMLSDAVs16_MVE_VMLSDAVs32_MVE_VMLSDAVs8_MVE_VMLSDAVxs16_MVE_VMLSDAVxs32_MVE_VMLSDAVxs8_MVE_VQDMLADHXs16_MVE_VQDMLADHXs32_MVE_VQDMLADHXs8_MVE_VQDMLADHs16_MVE_VQDMLADHs32_MVE_VQDMLADHs8_MVE_VQDMLAH_qrs16_MVE_VQDMLAH_qrs32_MVE_VQDMLAH_qrs8_MVE_VQDMLASH_qrs16_MVE_VQDMLASH_qrs32_MVE_VQDMLASH_qrs8_MVE_VQDMLSDHXs16_MVE_VQDMLSDHXs32_MVE_VQDMLSDHXs8_MVE_VQDMLSDHs16_MVE_VQDMLSDHs32_MVE_VQDMLSDHs8_MVE_VQRDMLADHXs16_MVE_VQRDMLADHXs32_MVE_VQRDMLADHXs8_MVE_VQRDMLADHs16_MVE_VQRDMLADHs32_MVE_VQRDMLADHs8_MVE_VQRDMLAH_qrs16_MVE_VQRDMLAH_qrs32_MVE_VQRDMLAH_qrs8_MVE_VQRDMLASH_qrs16_MVE_VQRDMLASH_qrs32_MVE_VQRDMLASH_qrs8_MVE_VQRDMLSDHXs16_MVE_VQRDMLSDHXs32_MVE_VQRDMLSDHXs8_MVE_VQRDMLSDHs16_MVE_VQRDMLSDHs32_MVE_VQRDMLSDHs8 = 1192, MVE_VMLALDAVas16_MVE_VMLALDAVas32_MVE_VMLALDAVau16_MVE_VMLALDAVau32_MVE_VMLALDAVaxs16_MVE_VMLALDAVaxs32_MVE_VMLALDAVs16_MVE_VMLALDAVs32_MVE_VMLALDAVu16_MVE_VMLALDAVu32_MVE_VMLALDAVxs16_MVE_VMLALDAVxs32_MVE_VMLSLDAVas16_MVE_VMLSLDAVas32_MVE_VMLSLDAVaxs16_MVE_VMLSLDAVaxs32_MVE_VMLSLDAVs16_MVE_VMLSLDAVs32_MVE_VMLSLDAVxs16_MVE_VMLSLDAVxs32_MVE_VRMLALDAVHas32_MVE_VRMLALDAVHau32_MVE_VRMLALDAVHaxs32_MVE_VRMLALDAVHs32_MVE_VRMLALDAVHu32_MVE_VRMLALDAVHxs32_MVE_VRMLSLDAVHas32_MVE_VRMLSLDAVHaxs32_MVE_VRMLSLDAVHs32_MVE_VRMLSLDAVHxs32 = 1193, MVE_VNEGf16_MVE_VNEGf32 = 1194, MVE_VRINTf16A_MVE_VRINTf16M_MVE_VRINTf16N_MVE_VRINTf16P_MVE_VRINTf16X_MVE_VRINTf16Z_MVE_VRINTf32A_MVE_VRINTf32M_MVE_VRINTf32N_MVE_VRINTf32P_MVE_VRINTf32X_MVE_VRINTf32Z = 1195, MVE_VSUBf16_MVE_VSUBf32 = 1196, MVE_VSUB_qr_f16_MVE_VSUB_qr_f32 = 1197, MVE_VMOV_to_lane_16_MVE_VMOV_to_lane_32_MVE_VMOV_to_lane_8_MVE_VMOV_q_rr = 1198, MVE_VCTP16_MVE_VCTP32_MVE_VCTP64_MVE_VCTP8 = 1199, MVE_VPNOT = 1200, MVE_VPST = 1201, VCVTASD_VCVTASH_VCVTASS_VCVTAUD_VCVTAUH_VCVTAUS_VCVTMSD_VCVTMSH_VCVTMSS_VCVTMUD_VCVTMUH_VCVTMUS_VCVTNSD_VCVTNSH_VCVTNSS_VCVTNUD_VCVTNUH_VCVTNUS_VCVTPSD_VCVTPSH_VCVTPSS_VCVTPUD_VCVTPUH_VCVTPUS = 1202, VDIVH = 1203, VFMAH_VFMSH = 1204, VFP_VMAXNMD_VFP_VMAXNMH_VFP_VMAXNMS_VFP_VMINNMD_VFP_VMINNMH_VFP_VMINNMS = 1205, VMOVH = 1206, VMOVHR = 1207, VMOVD = 1208, VMOVS = 1209, VMOVRH = 1210, tSVC = 1211, t2HVC = 1212, t2SMC_ERET = 1213, tHINT = 1214, BUNDLE = 1215, t2LDRBpcrel_t2LDRHpcrel = 1216, t2LDRBpci_t2LDRHpci = 1217, t2LDRSBpci_t2LDRSHpci = 1218, t2LDREX = 1219, t2LDREXB_t2LDREXH = 1220, t2STREX_t2STREXB_t2STREXH = 1221, t2LDRpci = 1222, t2PLDpci_t2PLIpci = 1223, tLDRpci = 1224, t2PLDWi12_t2PLDWi8_t2PLDi12_t2PLDi8_t2PLIi12_t2PLIi8 = 1225, t2PLDs_t2PLIs = 1226, t2TBB_JT_t2TBH_JT = 1227, t2TBB_t2TBH = 1228, t2RSBSrs_t2SUBrs = 1229, t2SUBSrs = 1230, t2BICrs_t2EORrs_t2ORRrs = 1231, t2ORNrs = 1232, t2CMNzrs = 1233, t2CMPrs = 1234, t2TEQrs_t2TSTrs = 1235, t2RRX = 1236, tLSLSri = 1237, t2CLZ = 1238, t2USAD8 = 1239, t2RBIT = 1240, t2PKHBT_t2PKHTB = 1241, VCVTASS_VCVTAUS_VCVTMSS_VCVTMUS_VCVTNSS_VCVTNUS_VCVTPSS_VCVTPUS = 1242, VFP_VMAXNMS_VFP_VMINNMS = 1243, VRINTAS_VRINTMS_VRINTNS_VRINTPS_VRINTRS_VRINTXS_VRINTZS = 1244, VCVTASD_VCVTAUD_VCVTMSD_VCVTMUD_VCVTNSD_VCVTNUD_VCVTPSD_VCVTPUD = 1245, VCVTTHD = 1246, VFP_VMAXNMD_VFP_VMINNMD = 1247, VRINTAD_VRINTMD_VRINTND_VRINTPD_VRINTRD_VRINTXD_VRINTZD = 1248, VCMPS = 1249, VCMPD = 1250, VSELEQS_VSELGES_VSELGTS_VSELVSS = 1251, VSELEQD_VSELGED_VSELGTD_VSELVSD = 1252, VMULD_VNMULD = 1253, SCHED_LIST_END = 1254 }; } // end namespace Sched } // end namespace ARM } // end namespace llvm #endif // GET_INSTRINFO_SCHED_ENUM #ifdef GET_INSTRINFO_MC_DESC #undef GET_INSTRINFO_MC_DESC namespace llvm { static const MCPhysReg ImplicitList1[] = { ARM::CPSR }; static const MCPhysReg ImplicitList2[] = { ARM::SP, ARM::SP }; static const MCPhysReg ImplicitList3[] = { ARM::SP, ARM::LR }; static const MCPhysReg ImplicitList4[] = { ARM::R7, ARM::LR, ARM::SP }; static const MCPhysReg ImplicitList5[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15 }; static const MCPhysReg ImplicitList6[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR }; static const MCPhysReg ImplicitList7[] = { ARM::SP }; static const MCPhysReg ImplicitList8[] = { ARM::SP, ARM::R0, ARM::R12, ARM::LR, ARM::CPSR }; static const MCPhysReg ImplicitList9[] = { ARM::R4, ARM::R4, ARM::SP }; static const MCPhysReg ImplicitList10[] = { ARM::CPSR, ARM::CPSR }; static const MCPhysReg ImplicitList11[] = { ARM::LR }; static const MCPhysReg ImplicitList12[] = { ARM::PC }; static const MCPhysReg ImplicitList13[] = { ARM::FPSCR_NZCV, ARM::CPSR }; static const MCPhysReg ImplicitList14[] = { ARM::VPR }; static const MCPhysReg ImplicitList15[] = { ARM::FPSCR_NZCV }; static const MCPhysReg ImplicitList16[] = { ARM::FPSCR }; static const MCPhysReg ImplicitList17[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::VPR, ARM::FPSCR, ARM::FPSCR_NZCV }; static const MCPhysReg ImplicitList18[] = { ARM::R12, ARM::LR, ARM::SP }; static const MCPhysReg ImplicitList19[] = { ARM::ITSTATE }; static const MCPhysReg ImplicitList20[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15 }; static const MCPhysReg ImplicitList21[] = { ARM::LR, ARM::SP, ARM::R12 }; static const MCPhysReg ImplicitList22[] = { ARM::R11, ARM::LR, ARM::SP }; static const MCPhysReg ImplicitList23[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::CPSR }; static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, }; static const MCOperandInfo OperandInfo10[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo11[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo12[] = { { 0, 0|(1<InitMCInstrInfo(ARMInsts, ARMInstrNameIndices, ARMInstrNameData, ARMInstrDeprecationFeatures, ARMInstrComplexDeprecationInfos, 4426); } } // end namespace llvm #endif // GET_INSTRINFO_MC_DESC #ifdef GET_INSTRINFO_HEADER #undef GET_INSTRINFO_HEADER namespace llvm { struct ARMGenInstrInfo : public TargetInstrInfo { explicit ARMGenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u); ~ARMGenInstrInfo() override = default; }; } // end namespace llvm #endif // GET_INSTRINFO_HEADER #ifdef GET_INSTRINFO_HELPER_DECLS #undef GET_INSTRINFO_HELPER_DECLS #endif // GET_INSTRINFO_HELPER_DECLS #ifdef GET_INSTRINFO_HELPERS #undef GET_INSTRINFO_HELPERS #endif // GET_INSTRINFO_HELPERS #ifdef GET_INSTRINFO_CTOR_DTOR #undef GET_INSTRINFO_CTOR_DTOR namespace llvm { extern const MCInstrDesc ARMInsts[]; extern const unsigned ARMInstrNameIndices[]; extern const char ARMInstrNameData[]; extern const uint8_t ARMInstrDeprecationFeatures[]; extern const MCInstrInfo::ComplexDeprecationPredicate ARMInstrComplexDeprecationInfos[]; ARMGenInstrInfo::ARMGenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode) : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { InitMCInstrInfo(ARMInsts, ARMInstrNameIndices, ARMInstrNameData, ARMInstrDeprecationFeatures, ARMInstrComplexDeprecationInfos, 4426); } } // end namespace llvm #endif // GET_INSTRINFO_CTOR_DTOR #ifdef GET_INSTRINFO_OPERAND_ENUM #undef GET_INSTRINFO_OPERAND_ENUM namespace llvm { namespace ARM { namespace OpName { enum { OPERAND_LAST }; } // end namespace OpName } // end namespace ARM } // end namespace llvm #endif //GET_INSTRINFO_OPERAND_ENUM #ifdef GET_INSTRINFO_NAMED_OPS #undef GET_INSTRINFO_NAMED_OPS namespace llvm { namespace ARM { LLVM_READONLY int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { return -1; } } // end namespace ARM } // end namespace llvm #endif //GET_INSTRINFO_NAMED_OPS #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM #undef GET_INSTRINFO_OPERAND_TYPES_ENUM namespace llvm { namespace ARM { namespace OpTypes { enum OperandType { MVEPairVectorIndex0 = 0, MVEPairVectorIndex2 = 1, MVE_VIDUP_imm = 2, VecListFourDByteIndexed = 3, VecListFourDHWordIndexed = 4, VecListFourDWordIndexed = 5, VecListFourQHWordIndexed = 6, VecListFourQWordIndexed = 7, VecListOneDByteIndexed = 8, VecListOneDHWordIndexed = 9, VecListOneDWordIndexed = 10, VecListThreeDByteIndexed = 11, VecListThreeDHWordIndexed = 12, VecListThreeDWordIndexed = 13, VecListThreeQHWordIndexed = 14, VecListThreeQWordIndexed = 15, VecListTwoDByteIndexed = 16, VecListTwoDHWordIndexed = 17, VecListTwoDWordIndexed = 18, VecListTwoQHWordIndexed = 19, VecListTwoQWordIndexed = 20, VectorIndex16 = 21, VectorIndex32 = 22, VectorIndex64 = 23, VectorIndex8 = 24, addr_offset_none = 25, addrmode3 = 26, addrmode3_pre = 27, addrmode5 = 28, addrmode5_pre = 29, addrmode5fp16 = 30, addrmode6 = 31, addrmode6align16 = 32, addrmode6align32 = 33, addrmode6align64 = 34, addrmode6align64or128 = 35, addrmode6align64or128or256 = 36, addrmode6alignNone = 37, addrmode6dup = 38, addrmode6dupalign16 = 39, addrmode6dupalign32 = 40, addrmode6dupalign64 = 41, addrmode6dupalign64or128 = 42, addrmode6dupalignNone = 43, addrmode6oneL32 = 44, addrmode_imm12 = 45, addrmode_imm12_pre = 46, addrmode_tbb = 47, addrmode_tbh = 48, addrmodepc = 49, adrlabel = 50, am2offset_imm = 51, am2offset_reg = 52, am3offset = 53, am6offset = 54, arm_bl_target = 87, arm_blx_target = 88, arm_br_target = 89, banked_reg = 90, bf_inv_mask_imm = 91, bfafter_target = 92, bflabel_s12 = 93, bflabel_s16 = 94, bflabel_s18 = 95, bflabel_u4 = 96, brtarget = 97, c_imm = 98, cc_out = 99, cmovpred = 100, complexrotateop = 101, complexrotateopodd = 102, const_pool_asm_imm = 103, coproc_option_imm = 104, cpinst_operand = 105, dpr_reglist = 106, f32imm = 107, f64imm = 108, fbits16 = 109, fbits32 = 110, fp_dreglist_with_vpr = 111, fp_sreglist_with_vpr = 112, i16imm = 113, i1imm = 114, i32imm = 115, i64imm = 116, i8imm = 117, iflags_op = 118, imm0_1 = 119, imm0_15 = 120, imm0_239 = 121, imm0_255 = 122, imm0_3 = 123, imm0_31 = 124, imm0_32 = 125, imm0_4095 = 126, imm0_4095_neg = 127, imm0_63 = 128, imm0_65535 = 129, imm0_65535_expr = 130, imm0_65535_neg = 131, imm0_7 = 132, imm16 = 133, imm1_15 = 134, imm1_16 = 135, imm1_31 = 136, imm1_32 = 137, imm1_7 = 138, imm24b = 139, imm256_65535_expr = 140, imm32 = 141, imm8 = 142, imm8_255 = 143, imm_11b = 144, imm_12b = 145, imm_13b = 146, imm_3b = 147, imm_4b = 148, imm_6b = 149, imm_7b = 150, imm_9b = 151, imm_sr = 152, imod_op = 153, instsyncb_opt = 154, it_mask = 155, it_pred = 156, ldst_so_reg = 157, ldstm_mode = 158, lelabel_u11 = 159, long_shift = 160, memb_opt = 161, mod_imm = 162, mod_imm1_7_neg = 163, mod_imm8_255_neg = 164, mod_imm_neg = 165, mod_imm_not = 166, msr_mask = 167, mve_shift_imm1_15 = 168, mve_shift_imm1_7 = 169, nImmSplatI16 = 170, nImmSplatI32 = 171, nImmSplatI64 = 172, nImmSplatI8 = 173, nImmSplatNotI16 = 174, nImmSplatNotI32 = 175, nImmVMOVF32 = 176, nImmVMOVI32 = 177, nImmVMOVI32Neg = 178, nModImm = 179, neon_vcvt_imm32 = 180, nohash_imm = 181, p_imm = 182, pclabel = 183, pkh_asr_amt = 184, pkh_lsl_amt = 185, postidx_imm8 = 186, postidx_imm8s4 = 187, postidx_reg = 188, pred = 189, pred_basic_fp = 190, pred_basic_i = 191, pred_basic_s = 192, pred_basic_u = 193, pred_noal = 194, pred_noal_inv = 195, ptype0 = 196, ptype1 = 197, ptype2 = 198, ptype3 = 199, ptype4 = 200, ptype5 = 201, reglist = 202, reglist_with_apsr = 203, rot_imm = 204, s_cc_out = 205, saturateop = 206, setend_op = 207, shift_imm = 208, shift_so_reg_imm = 209, shift_so_reg_reg = 210, shr_imm16 = 211, shr_imm32 = 212, shr_imm64 = 213, shr_imm8 = 214, so_reg_imm = 215, so_reg_reg = 216, spr_reglist = 217, t2_addr_offset_none = 218, t2_nosp_addr_offset_none = 219, t2_shift_imm = 220, t2_so_imm = 221, t2_so_imm_neg = 222, t2_so_imm_not = 223, t2_so_imm_notSext = 224, t2_so_reg = 225, t2_so_reg_oneuse = 226, t2addrmode_imm0_1020s4 = 227, t2addrmode_imm12 = 228, t2addrmode_imm7s4 = 229, t2addrmode_imm7s4_pre = 230, t2addrmode_imm8 = 231, t2addrmode_imm8_pre = 232, t2addrmode_imm8s4 = 233, t2addrmode_imm8s4_pre = 234, t2addrmode_negimm8 = 235, t2addrmode_posimm8 = 236, t2addrmode_so_reg = 237, t2adrlabel = 238, t2am_imm7s4_offset = 239, t2am_imm8_offset = 240, t2am_imm8s4_offset = 241, t2ldr_pcrel_imm12 = 242, t2ldrlabel = 243, t_addr_offset_none = 244, t_addrmode_is1 = 245, t_addrmode_is2 = 246, t_addrmode_is4 = 247, t_addrmode_pc = 248, t_addrmode_rr = 249, t_addrmode_rr_sext = 250, t_addrmode_rrs1 = 251, t_addrmode_rrs2 = 252, t_addrmode_rrs4 = 253, t_addrmode_sp = 254, t_adrlabel = 255, t_brtarget = 256, t_imm0_1020s4 = 257, t_imm0_508s4 = 258, t_imm0_508s4_neg = 259, thumb_bcc_target = 260, thumb_bl_target = 261, thumb_blx_target = 262, thumb_br_target = 263, thumb_cb_target = 264, tsb_opt = 265, type0 = 266, type1 = 267, type2 = 268, type3 = 269, type4 = 270, type5 = 271, untyped_imm_0 = 272, vfp_f16imm = 273, vfp_f32imm = 274, vfp_f64imm = 275, vpred_n = 276, vpred_r = 277, vpt_mask = 278, wlslabel_u11 = 279, CDEDualRegOp = 280, GPRPairOp = 281, VecList2Q = 282, VecList4Q = 283, VecListDPair = 284, VecListDPairAllLanes = 285, VecListDPairSpaced = 286, VecListDPairSpacedAllLanes = 287, VecListFourD = 288, VecListFourDAllLanes = 289, VecListFourQ = 290, VecListFourQAllLanes = 291, VecListOneD = 292, VecListOneDAllLanes = 293, VecListThreeD = 294, VecListThreeDAllLanes = 295, VecListThreeQ = 296, VecListThreeQAllLanes = 297, CCR = 298, DPR = 299, DPR_8 = 300, DPR_VFP2 = 301, DPair = 302, DPairSpc = 303, DQuad = 304, DQuadSpc = 305, DTriple = 306, DTripleSpc = 307, FPCXTRegs = 308, FPWithVPR = 309, GPR = 310, GPRPair = 311, GPRPairnosp = 312, GPRlr = 313, GPRnoip = 314, GPRnopc = 315, GPRnosp = 316, GPRsp = 317, GPRwithAPSR = 318, GPRwithAPSR_NZCVnosp = 319, GPRwithAPSRnosp = 320, GPRwithZR = 321, GPRwithZRnosp = 322, HPR = 323, MQPR = 324, MQQPR = 325, MQQQQPR = 326, QPR = 327, QPR_8 = 328, QPR_VFP2 = 329, QQPR = 330, QQQQPR = 331, SPR = 332, SPR_8 = 333, VCCR = 334, cl_FPSCR_NZCV = 335, hGPR = 336, rGPR = 337, tGPR = 338, tGPREven = 339, tGPROdd = 340, tGPRwithpc = 341, tcGPR = 342, OPERAND_TYPE_LIST_END }; } // end namespace OpTypes } // end namespace ARM } // end namespace llvm #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM #ifdef GET_INSTRINFO_OPERAND_TYPE #undef GET_INSTRINFO_OPERAND_TYPE namespace llvm { namespace ARM { LLVM_READONLY static int getOperandType(uint16_t Opcode, uint16_t OpIdx) { const uint16_t Offsets[] = { /* PHI */ 0, /* INLINEASM */ 1, /* INLINEASM_BR */ 1, /* CFI_INSTRUCTION */ 1, /* EH_LABEL */ 2, /* GC_LABEL */ 3, /* ANNOTATION_LABEL */ 4, /* KILL */ 5, /* EXTRACT_SUBREG */ 5, /* INSERT_SUBREG */ 8, /* IMPLICIT_DEF */ 12, /* SUBREG_TO_REG */ 13, /* COPY_TO_REGCLASS */ 17, /* DBG_VALUE */ 20, /* DBG_VALUE_LIST */ 20, /* DBG_INSTR_REF */ 20, /* DBG_PHI */ 20, /* DBG_LABEL */ 20, /* REG_SEQUENCE */ 21, /* COPY */ 23, /* BUNDLE */ 25, /* LIFETIME_START */ 25, /* LIFETIME_END */ 26, /* PSEUDO_PROBE */ 27, /* ARITH_FENCE */ 31, /* STACKMAP */ 33, /* FENTRY_CALL */ 35, /* PATCHPOINT */ 35, /* LOAD_STACK_GUARD */ 41, /* PREALLOCATED_SETUP */ 42, /* PREALLOCATED_ARG */ 43, /* STATEPOINT */ 46, /* LOCAL_ESCAPE */ 46, /* FAULTING_OP */ 48, /* PATCHABLE_OP */ 49, /* PATCHABLE_FUNCTION_ENTER */ 49, /* PATCHABLE_RET */ 49, /* PATCHABLE_FUNCTION_EXIT */ 49, /* PATCHABLE_TAIL_CALL */ 49, /* PATCHABLE_EVENT_CALL */ 49, /* PATCHABLE_TYPED_EVENT_CALL */ 51, /* ICALL_BRANCH_FUNNEL */ 54, /* MEMBARRIER */ 54, /* G_ASSERT_SEXT */ 54, /* G_ASSERT_ZEXT */ 57, /* G_ASSERT_ALIGN */ 60, /* G_ADD */ 63, /* G_SUB */ 66, /* G_MUL */ 69, /* G_SDIV */ 72, /* G_UDIV */ 75, /* G_SREM */ 78, /* G_UREM */ 81, /* G_SDIVREM */ 84, /* G_UDIVREM */ 88, /* G_AND */ 92, /* G_OR */ 95, /* G_XOR */ 98, /* G_IMPLICIT_DEF */ 101, /* G_PHI */ 102, /* G_FRAME_INDEX */ 103, /* G_GLOBAL_VALUE */ 105, /* G_EXTRACT */ 107, /* G_UNMERGE_VALUES */ 110, /* G_INSERT */ 112, /* G_MERGE_VALUES */ 116, /* G_BUILD_VECTOR */ 118, /* G_BUILD_VECTOR_TRUNC */ 120, /* G_CONCAT_VECTORS */ 122, /* G_PTRTOINT */ 124, /* G_INTTOPTR */ 126, /* G_BITCAST */ 128, /* G_FREEZE */ 130, /* G_INTRINSIC_FPTRUNC_ROUND */ 132, /* G_INTRINSIC_TRUNC */ 135, /* G_INTRINSIC_ROUND */ 137, /* G_INTRINSIC_LRINT */ 139, /* G_INTRINSIC_ROUNDEVEN */ 141, /* G_READCYCLECOUNTER */ 143, /* G_LOAD */ 144, /* G_SEXTLOAD */ 146, /* G_ZEXTLOAD */ 148, /* G_INDEXED_LOAD */ 150, /* G_INDEXED_SEXTLOAD */ 155, /* G_INDEXED_ZEXTLOAD */ 160, /* G_STORE */ 165, /* G_INDEXED_STORE */ 167, /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ 172, /* G_ATOMIC_CMPXCHG */ 177, /* G_ATOMICRMW_XCHG */ 181, /* G_ATOMICRMW_ADD */ 184, /* G_ATOMICRMW_SUB */ 187, /* G_ATOMICRMW_AND */ 190, /* G_ATOMICRMW_NAND */ 193, /* G_ATOMICRMW_OR */ 196, /* G_ATOMICRMW_XOR */ 199, /* G_ATOMICRMW_MAX */ 202, /* G_ATOMICRMW_MIN */ 205, /* G_ATOMICRMW_UMAX */ 208, /* G_ATOMICRMW_UMIN */ 211, /* G_ATOMICRMW_FADD */ 214, /* G_ATOMICRMW_FSUB */ 217, /* G_ATOMICRMW_FMAX */ 220, /* G_ATOMICRMW_FMIN */ 223, /* G_ATOMICRMW_UINC_WRAP */ 226, /* G_ATOMICRMW_UDEC_WRAP */ 229, /* G_FENCE */ 232, /* G_BRCOND */ 234, /* G_BRINDIRECT */ 236, /* G_INVOKE_REGION_START */ 237, /* G_INTRINSIC */ 237, /* G_INTRINSIC_W_SIDE_EFFECTS */ 238, /* G_ANYEXT */ 239, /* G_TRUNC */ 241, /* G_CONSTANT */ 243, /* G_FCONSTANT */ 245, /* G_VASTART */ 247, /* G_VAARG */ 248, /* G_SEXT */ 251, /* G_SEXT_INREG */ 253, /* G_ZEXT */ 256, /* G_SHL */ 258, /* G_LSHR */ 261, /* G_ASHR */ 264, /* G_FSHL */ 267, /* G_FSHR */ 271, /* G_ROTR */ 275, /* G_ROTL */ 278, /* G_ICMP */ 281, /* G_FCMP */ 285, /* G_SELECT */ 289, /* G_UADDO */ 293, /* G_UADDE */ 297, /* G_USUBO */ 302, /* G_USUBE */ 306, /* G_SADDO */ 311, /* G_SADDE */ 315, /* G_SSUBO */ 320, /* G_SSUBE */ 324, /* G_UMULO */ 329, /* G_SMULO */ 333, /* G_UMULH */ 337, /* G_SMULH */ 340, /* G_UADDSAT */ 343, /* G_SADDSAT */ 346, /* G_USUBSAT */ 349, /* G_SSUBSAT */ 352, /* G_USHLSAT */ 355, /* G_SSHLSAT */ 358, /* G_SMULFIX */ 361, /* G_UMULFIX */ 365, /* G_SMULFIXSAT */ 369, /* G_UMULFIXSAT */ 373, /* G_SDIVFIX */ 377, /* G_UDIVFIX */ 381, /* G_SDIVFIXSAT */ 385, /* G_UDIVFIXSAT */ 389, /* G_FADD */ 393, /* G_FSUB */ 396, /* G_FMUL */ 399, /* G_FMA */ 402, /* G_FMAD */ 406, /* G_FDIV */ 410, /* G_FREM */ 413, /* G_FPOW */ 416, /* G_FPOWI */ 419, /* G_FEXP */ 422, /* G_FEXP2 */ 424, /* G_FLOG */ 426, /* G_FLOG2 */ 428, /* G_FLOG10 */ 430, /* G_FNEG */ 432, /* G_FPEXT */ 434, /* G_FPTRUNC */ 436, /* G_FPTOSI */ 438, /* G_FPTOUI */ 440, /* G_SITOFP */ 442, /* G_UITOFP */ 444, /* G_FABS */ 446, /* G_FCOPYSIGN */ 448, /* G_IS_FPCLASS */ 451, /* G_FCANONICALIZE */ 454, /* G_FMINNUM */ 456, /* G_FMAXNUM */ 459, /* G_FMINNUM_IEEE */ 462, /* G_FMAXNUM_IEEE */ 465, /* G_FMINIMUM */ 468, /* G_FMAXIMUM */ 471, /* G_PTR_ADD */ 474, /* G_PTRMASK */ 477, /* G_SMIN */ 480, /* G_SMAX */ 483, /* G_UMIN */ 486, /* G_UMAX */ 489, /* G_ABS */ 492, /* G_LROUND */ 494, /* G_LLROUND */ 496, /* G_BR */ 498, /* G_BRJT */ 499, /* G_INSERT_VECTOR_ELT */ 502, /* G_EXTRACT_VECTOR_ELT */ 506, /* G_SHUFFLE_VECTOR */ 509, /* G_CTTZ */ 513, /* G_CTTZ_ZERO_UNDEF */ 515, /* G_CTLZ */ 517, /* G_CTLZ_ZERO_UNDEF */ 519, /* G_CTPOP */ 521, /* G_BSWAP */ 523, /* G_BITREVERSE */ 525, /* G_FCEIL */ 527, /* G_FCOS */ 529, /* G_FSIN */ 531, /* G_FSQRT */ 533, /* G_FFLOOR */ 535, /* G_FRINT */ 537, /* G_FNEARBYINT */ 539, /* G_ADDRSPACE_CAST */ 541, /* G_BLOCK_ADDR */ 543, /* G_JUMP_TABLE */ 545, /* G_DYN_STACKALLOC */ 547, /* G_STRICT_FADD */ 550, /* G_STRICT_FSUB */ 553, /* G_STRICT_FMUL */ 556, /* G_STRICT_FDIV */ 559, /* G_STRICT_FREM */ 562, /* G_STRICT_FMA */ 565, /* G_STRICT_FSQRT */ 569, /* G_READ_REGISTER */ 571, /* G_WRITE_REGISTER */ 573, /* G_MEMCPY */ 575, /* G_MEMCPY_INLINE */ 579, /* G_MEMMOVE */ 582, /* G_MEMSET */ 586, /* G_BZERO */ 590, /* G_VECREDUCE_SEQ_FADD */ 593, /* G_VECREDUCE_SEQ_FMUL */ 596, /* G_VECREDUCE_FADD */ 599, /* G_VECREDUCE_FMUL */ 601, /* G_VECREDUCE_FMAX */ 603, /* G_VECREDUCE_FMIN */ 605, /* G_VECREDUCE_ADD */ 607, /* G_VECREDUCE_MUL */ 609, /* G_VECREDUCE_AND */ 611, /* G_VECREDUCE_OR */ 613, /* G_VECREDUCE_XOR */ 615, /* G_VECREDUCE_SMAX */ 617, /* G_VECREDUCE_SMIN */ 619, /* G_VECREDUCE_UMAX */ 621, /* G_VECREDUCE_UMIN */ 623, /* G_SBFX */ 625, /* G_UBFX */ 629, /* ABS */ 633, /* ADDSri */ 635, /* ADDSrr */ 640, /* ADDSrsi */ 645, /* ADDSrsr */ 651, /* ADJCALLSTACKDOWN */ 658, /* ADJCALLSTACKUP */ 662, /* ASRi */ 666, /* ASRr */ 672, /* B */ 678, /* BCCZi64 */ 679, /* BCCi64 */ 683, /* BLX_noip */ 689, /* BLX_pred_noip */ 690, /* BL_PUSHLR */ 691, /* BMOVPCB_CALL */ 693, /* BMOVPCRX_CALL */ 694, /* BR_JTadd */ 695, /* BR_JTm_i12 */ 698, /* BR_JTm_rs */ 701, /* BR_JTr */ 705, /* BX_CALL */ 707, /* CMP_SWAP_16 */ 708, /* CMP_SWAP_32 */ 713, /* CMP_SWAP_64 */ 718, /* CMP_SWAP_8 */ 723, /* CONSTPOOL_ENTRY */ 728, /* COPY_STRUCT_BYVAL_I32 */ 731, /* ITasm */ 735, /* Int_eh_sjlj_dispatchsetup */ 737, /* Int_eh_sjlj_longjmp */ 737, /* Int_eh_sjlj_setjmp */ 739, /* Int_eh_sjlj_setjmp_nofp */ 741, /* Int_eh_sjlj_setup_dispatch */ 743, /* JUMPTABLE_ADDRS */ 743, /* JUMPTABLE_INSTS */ 746, /* JUMPTABLE_TBB */ 749, /* JUMPTABLE_TBH */ 752, /* LDMIA_RET */ 755, /* LDRBT_POST */ 760, /* LDRConstPool */ 764, /* LDRHTii */ 768, /* LDRLIT_ga_abs */ 772, /* LDRLIT_ga_pcrel */ 774, /* LDRLIT_ga_pcrel_ldr */ 776, /* LDRSBTii */ 778, /* LDRSHTii */ 782, /* LDRT_POST */ 786, /* LEApcrel */ 790, /* LEApcrelJT */ 794, /* LOADDUAL */ 798, /* LSLi */ 802, /* LSLr */ 808, /* LSRi */ 814, /* LSRr */ 820, /* MEMCPY */ 826, /* MLAv5 */ 831, /* MOVCCi */ 838, /* MOVCCi16 */ 843, /* MOVCCi32imm */ 848, /* MOVCCr */ 853, /* MOVCCsi */ 858, /* MOVCCsr */ 864, /* MOVPCRX */ 871, /* MOVTi16_ga_pcrel */ 872, /* MOV_ga_pcrel */ 876, /* MOV_ga_pcrel_ldr */ 878, /* MOVi16_ga_pcrel */ 880, /* MOVi32imm */ 883, /* MOVsra_flag */ 885, /* MOVsrl_flag */ 887, /* MQPRCopy */ 889, /* MQQPRLoad */ 891, /* MQQPRStore */ 893, /* MQQQQPRLoad */ 895, /* MQQQQPRStore */ 897, /* MULv5 */ 899, /* MVE_MEMCPYLOOPINST */ 905, /* MVE_MEMSETLOOPINST */ 908, /* MVNCCi */ 911, /* PICADD */ 916, /* PICLDR */ 921, /* PICLDRB */ 926, /* PICLDRH */ 931, /* PICLDRSB */ 936, /* PICLDRSH */ 941, /* PICSTR */ 946, /* PICSTRB */ 951, /* PICSTRH */ 956, /* RORi */ 961, /* RORr */ 967, /* RRX */ 973, /* RRXi */ 975, /* RSBSri */ 980, /* RSBSrsi */ 985, /* RSBSrsr */ 991, /* SEH_EpilogEnd */ 998, /* SEH_EpilogStart */ 998, /* SEH_Nop */ 998, /* SEH_Nop_Ret */ 999, /* SEH_PrologEnd */ 1000, /* SEH_SaveFRegs */ 1000, /* SEH_SaveLR */ 1002, /* SEH_SaveRegs */ 1003, /* SEH_SaveRegs_Ret */ 1005, /* SEH_SaveSP */ 1007, /* SEH_StackAlloc */ 1008, /* SMLALv5 */ 1010, /* SMULLv5 */ 1019, /* SPACE */ 1026, /* STOREDUAL */ 1029, /* STRBT_POST */ 1033, /* STRBi_preidx */ 1037, /* STRBr_preidx */ 1044, /* STRH_preidx */ 1051, /* STRT_POST */ 1058, /* STRi_preidx */ 1062, /* STRr_preidx */ 1069, /* SUBS_PC_LR */ 1076, /* SUBSri */ 1079, /* SUBSrr */ 1084, /* SUBSrsi */ 1089, /* SUBSrsr */ 1095, /* SpeculationBarrierISBDSBEndBB */ 1102, /* SpeculationBarrierSBEndBB */ 1102, /* TAILJMPd */ 1102, /* TAILJMPr */ 1103, /* TAILJMPr4 */ 1104, /* TCRETURNdi */ 1105, /* TCRETURNri */ 1107, /* TPsoft */ 1109, /* UMLALv5 */ 1109, /* UMULLv5 */ 1118, /* VLD1LNdAsm_16 */ 1125, /* VLD1LNdAsm_32 */ 1131, /* VLD1LNdAsm_8 */ 1137, /* VLD1LNdWB_fixed_Asm_16 */ 1143, /* VLD1LNdWB_fixed_Asm_32 */ 1149, /* VLD1LNdWB_fixed_Asm_8 */ 1155, /* VLD1LNdWB_register_Asm_16 */ 1161, /* VLD1LNdWB_register_Asm_32 */ 1168, /* VLD1LNdWB_register_Asm_8 */ 1175, /* VLD2LNdAsm_16 */ 1182, /* VLD2LNdAsm_32 */ 1188, /* VLD2LNdAsm_8 */ 1194, /* VLD2LNdWB_fixed_Asm_16 */ 1200, /* VLD2LNdWB_fixed_Asm_32 */ 1206, /* VLD2LNdWB_fixed_Asm_8 */ 1212, /* VLD2LNdWB_register_Asm_16 */ 1218, /* VLD2LNdWB_register_Asm_32 */ 1225, /* VLD2LNdWB_register_Asm_8 */ 1232, /* VLD2LNqAsm_16 */ 1239, /* VLD2LNqAsm_32 */ 1245, /* VLD2LNqWB_fixed_Asm_16 */ 1251, /* VLD2LNqWB_fixed_Asm_32 */ 1257, /* VLD2LNqWB_register_Asm_16 */ 1263, /* VLD2LNqWB_register_Asm_32 */ 1270, /* VLD3DUPdAsm_16 */ 1277, /* VLD3DUPdAsm_32 */ 1282, /* VLD3DUPdAsm_8 */ 1287, /* VLD3DUPdWB_fixed_Asm_16 */ 1292, /* VLD3DUPdWB_fixed_Asm_32 */ 1297, /* VLD3DUPdWB_fixed_Asm_8 */ 1302, /* VLD3DUPdWB_register_Asm_16 */ 1307, /* VLD3DUPdWB_register_Asm_32 */ 1313, /* VLD3DUPdWB_register_Asm_8 */ 1319, /* VLD3DUPqAsm_16 */ 1325, /* VLD3DUPqAsm_32 */ 1330, /* VLD3DUPqAsm_8 */ 1335, /* VLD3DUPqWB_fixed_Asm_16 */ 1340, /* VLD3DUPqWB_fixed_Asm_32 */ 1345, /* VLD3DUPqWB_fixed_Asm_8 */ 1350, /* VLD3DUPqWB_register_Asm_16 */ 1355, /* VLD3DUPqWB_register_Asm_32 */ 1361, /* VLD3DUPqWB_register_Asm_8 */ 1367, /* VLD3LNdAsm_16 */ 1373, /* VLD3LNdAsm_32 */ 1379, /* VLD3LNdAsm_8 */ 1385, /* VLD3LNdWB_fixed_Asm_16 */ 1391, /* VLD3LNdWB_fixed_Asm_32 */ 1397, /* VLD3LNdWB_fixed_Asm_8 */ 1403, /* VLD3LNdWB_register_Asm_16 */ 1409, /* VLD3LNdWB_register_Asm_32 */ 1416, /* VLD3LNdWB_register_Asm_8 */ 1423, /* VLD3LNqAsm_16 */ 1430, /* VLD3LNqAsm_32 */ 1436, /* VLD3LNqWB_fixed_Asm_16 */ 1442, /* VLD3LNqWB_fixed_Asm_32 */ 1448, /* VLD3LNqWB_register_Asm_16 */ 1454, /* VLD3LNqWB_register_Asm_32 */ 1461, /* VLD3dAsm_16 */ 1468, /* VLD3dAsm_32 */ 1473, /* VLD3dAsm_8 */ 1478, /* VLD3dWB_fixed_Asm_16 */ 1483, /* VLD3dWB_fixed_Asm_32 */ 1488, /* VLD3dWB_fixed_Asm_8 */ 1493, /* VLD3dWB_register_Asm_16 */ 1498, /* VLD3dWB_register_Asm_32 */ 1504, /* VLD3dWB_register_Asm_8 */ 1510, /* VLD3qAsm_16 */ 1516, /* VLD3qAsm_32 */ 1521, /* VLD3qAsm_8 */ 1526, /* VLD3qWB_fixed_Asm_16 */ 1531, /* VLD3qWB_fixed_Asm_32 */ 1536, /* VLD3qWB_fixed_Asm_8 */ 1541, /* VLD3qWB_register_Asm_16 */ 1546, /* VLD3qWB_register_Asm_32 */ 1552, /* VLD3qWB_register_Asm_8 */ 1558, /* VLD4DUPdAsm_16 */ 1564, /* VLD4DUPdAsm_32 */ 1569, /* VLD4DUPdAsm_8 */ 1574, /* VLD4DUPdWB_fixed_Asm_16 */ 1579, /* VLD4DUPdWB_fixed_Asm_32 */ 1584, /* VLD4DUPdWB_fixed_Asm_8 */ 1589, /* VLD4DUPdWB_register_Asm_16 */ 1594, /* VLD4DUPdWB_register_Asm_32 */ 1600, /* VLD4DUPdWB_register_Asm_8 */ 1606, /* VLD4DUPqAsm_16 */ 1612, /* VLD4DUPqAsm_32 */ 1617, /* VLD4DUPqAsm_8 */ 1622, /* VLD4DUPqWB_fixed_Asm_16 */ 1627, /* VLD4DUPqWB_fixed_Asm_32 */ 1632, /* VLD4DUPqWB_fixed_Asm_8 */ 1637, /* VLD4DUPqWB_register_Asm_16 */ 1642, /* VLD4DUPqWB_register_Asm_32 */ 1648, /* VLD4DUPqWB_register_Asm_8 */ 1654, /* VLD4LNdAsm_16 */ 1660, /* VLD4LNdAsm_32 */ 1666, /* VLD4LNdAsm_8 */ 1672, /* VLD4LNdWB_fixed_Asm_16 */ 1678, /* VLD4LNdWB_fixed_Asm_32 */ 1684, /* VLD4LNdWB_fixed_Asm_8 */ 1690, /* VLD4LNdWB_register_Asm_16 */ 1696, /* VLD4LNdWB_register_Asm_32 */ 1703, /* VLD4LNdWB_register_Asm_8 */ 1710, /* VLD4LNqAsm_16 */ 1717, /* VLD4LNqAsm_32 */ 1723, /* VLD4LNqWB_fixed_Asm_16 */ 1729, /* VLD4LNqWB_fixed_Asm_32 */ 1735, /* VLD4LNqWB_register_Asm_16 */ 1741, /* VLD4LNqWB_register_Asm_32 */ 1748, /* VLD4dAsm_16 */ 1755, /* VLD4dAsm_32 */ 1760, /* VLD4dAsm_8 */ 1765, /* VLD4dWB_fixed_Asm_16 */ 1770, /* VLD4dWB_fixed_Asm_32 */ 1775, /* VLD4dWB_fixed_Asm_8 */ 1780, /* VLD4dWB_register_Asm_16 */ 1785, /* VLD4dWB_register_Asm_32 */ 1791, /* VLD4dWB_register_Asm_8 */ 1797, /* VLD4qAsm_16 */ 1803, /* VLD4qAsm_32 */ 1808, /* VLD4qAsm_8 */ 1813, /* VLD4qWB_fixed_Asm_16 */ 1818, /* VLD4qWB_fixed_Asm_32 */ 1823, /* VLD4qWB_fixed_Asm_8 */ 1828, /* VLD4qWB_register_Asm_16 */ 1833, /* VLD4qWB_register_Asm_32 */ 1839, /* VLD4qWB_register_Asm_8 */ 1845, /* VMOVD0 */ 1851, /* VMOVDcc */ 1852, /* VMOVHcc */ 1857, /* VMOVQ0 */ 1862, /* VMOVScc */ 1863, /* VST1LNdAsm_16 */ 1868, /* VST1LNdAsm_32 */ 1874, /* VST1LNdAsm_8 */ 1880, /* VST1LNdWB_fixed_Asm_16 */ 1886, /* VST1LNdWB_fixed_Asm_32 */ 1892, /* VST1LNdWB_fixed_Asm_8 */ 1898, /* VST1LNdWB_register_Asm_16 */ 1904, /* VST1LNdWB_register_Asm_32 */ 1911, /* VST1LNdWB_register_Asm_8 */ 1918, /* VST2LNdAsm_16 */ 1925, /* VST2LNdAsm_32 */ 1931, /* VST2LNdAsm_8 */ 1937, /* VST2LNdWB_fixed_Asm_16 */ 1943, /* VST2LNdWB_fixed_Asm_32 */ 1949, /* VST2LNdWB_fixed_Asm_8 */ 1955, /* VST2LNdWB_register_Asm_16 */ 1961, /* VST2LNdWB_register_Asm_32 */ 1968, /* VST2LNdWB_register_Asm_8 */ 1975, /* VST2LNqAsm_16 */ 1982, /* VST2LNqAsm_32 */ 1988, /* VST2LNqWB_fixed_Asm_16 */ 1994, /* VST2LNqWB_fixed_Asm_32 */ 2000, /* VST2LNqWB_register_Asm_16 */ 2006, /* VST2LNqWB_register_Asm_32 */ 2013, /* VST3LNdAsm_16 */ 2020, /* VST3LNdAsm_32 */ 2026, /* VST3LNdAsm_8 */ 2032, /* VST3LNdWB_fixed_Asm_16 */ 2038, /* VST3LNdWB_fixed_Asm_32 */ 2044, /* VST3LNdWB_fixed_Asm_8 */ 2050, /* VST3LNdWB_register_Asm_16 */ 2056, /* VST3LNdWB_register_Asm_32 */ 2063, /* VST3LNdWB_register_Asm_8 */ 2070, /* VST3LNqAsm_16 */ 2077, /* VST3LNqAsm_32 */ 2083, /* VST3LNqWB_fixed_Asm_16 */ 2089, /* VST3LNqWB_fixed_Asm_32 */ 2095, /* VST3LNqWB_register_Asm_16 */ 2101, /* VST3LNqWB_register_Asm_32 */ 2108, /* VST3dAsm_16 */ 2115, /* VST3dAsm_32 */ 2120, /* VST3dAsm_8 */ 2125, /* VST3dWB_fixed_Asm_16 */ 2130, /* VST3dWB_fixed_Asm_32 */ 2135, /* VST3dWB_fixed_Asm_8 */ 2140, /* VST3dWB_register_Asm_16 */ 2145, /* VST3dWB_register_Asm_32 */ 2151, /* VST3dWB_register_Asm_8 */ 2157, /* VST3qAsm_16 */ 2163, /* VST3qAsm_32 */ 2168, /* VST3qAsm_8 */ 2173, /* VST3qWB_fixed_Asm_16 */ 2178, /* VST3qWB_fixed_Asm_32 */ 2183, /* VST3qWB_fixed_Asm_8 */ 2188, /* VST3qWB_register_Asm_16 */ 2193, /* VST3qWB_register_Asm_32 */ 2199, /* VST3qWB_register_Asm_8 */ 2205, /* VST4LNdAsm_16 */ 2211, /* VST4LNdAsm_32 */ 2217, /* VST4LNdAsm_8 */ 2223, /* VST4LNdWB_fixed_Asm_16 */ 2229, /* VST4LNdWB_fixed_Asm_32 */ 2235, /* VST4LNdWB_fixed_Asm_8 */ 2241, /* VST4LNdWB_register_Asm_16 */ 2247, /* VST4LNdWB_register_Asm_32 */ 2254, /* VST4LNdWB_register_Asm_8 */ 2261, /* VST4LNqAsm_16 */ 2268, /* VST4LNqAsm_32 */ 2274, /* VST4LNqWB_fixed_Asm_16 */ 2280, /* VST4LNqWB_fixed_Asm_32 */ 2286, /* VST4LNqWB_register_Asm_16 */ 2292, /* VST4LNqWB_register_Asm_32 */ 2299, /* VST4dAsm_16 */ 2306, /* VST4dAsm_32 */ 2311, /* VST4dAsm_8 */ 2316, /* VST4dWB_fixed_Asm_16 */ 2321, /* VST4dWB_fixed_Asm_32 */ 2326, /* VST4dWB_fixed_Asm_8 */ 2331, /* VST4dWB_register_Asm_16 */ 2336, /* VST4dWB_register_Asm_32 */ 2342, /* VST4dWB_register_Asm_8 */ 2348, /* VST4qAsm_16 */ 2354, /* VST4qAsm_32 */ 2359, /* VST4qAsm_8 */ 2364, /* VST4qWB_fixed_Asm_16 */ 2369, /* VST4qWB_fixed_Asm_32 */ 2374, /* VST4qWB_fixed_Asm_8 */ 2379, /* VST4qWB_register_Asm_16 */ 2384, /* VST4qWB_register_Asm_32 */ 2390, /* VST4qWB_register_Asm_8 */ 2396, /* WIN__CHKSTK */ 2402, /* WIN__DBZCHK */ 2402, /* t2ABS */ 2403, /* t2ADDSri */ 2405, /* t2ADDSrr */ 2410, /* t2ADDSrs */ 2415, /* t2BF_LabelPseudo */ 2421, /* t2BR_JT */ 2422, /* t2CALL_BTI */ 2425, /* t2DoLoopStart */ 2428, /* t2DoLoopStartTP */ 2430, /* t2LDMIA_RET */ 2433, /* t2LDRBpcrel */ 2438, /* t2LDRConstPool */ 2442, /* t2LDRHpcrel */ 2446, /* t2LDRLIT_ga_pcrel */ 2450, /* t2LDRSBpcrel */ 2452, /* t2LDRSHpcrel */ 2456, /* t2LDR_POST_imm */ 2460, /* t2LDR_PRE_imm */ 2465, /* t2LDRpci_pic */ 2470, /* t2LDRpcrel */ 2473, /* t2LEApcrel */ 2477, /* t2LEApcrelJT */ 2481, /* t2LoopDec */ 2485, /* t2LoopEnd */ 2488, /* t2LoopEndDec */ 2490, /* t2MOVCCasr */ 2493, /* t2MOVCCi */ 2499, /* t2MOVCCi16 */ 2504, /* t2MOVCCi32imm */ 2509, /* t2MOVCClsl */ 2514, /* t2MOVCClsr */ 2520, /* t2MOVCCr */ 2526, /* t2MOVCCror */ 2531, /* t2MOVSsi */ 2537, /* t2MOVSsr */ 2542, /* t2MOVTi16_ga_pcrel */ 2548, /* t2MOV_ga_pcrel */ 2552, /* t2MOVi16_ga_pcrel */ 2554, /* t2MOVi32imm */ 2557, /* t2MOVsi */ 2559, /* t2MOVsr */ 2564, /* t2MVNCCi */ 2570, /* t2RSBSri */ 2575, /* t2RSBSrs */ 2580, /* t2STRB_preidx */ 2586, /* t2STRH_preidx */ 2592, /* t2STR_POST_imm */ 2598, /* t2STR_PRE_imm */ 2603, /* t2STR_preidx */ 2608, /* t2SUBSri */ 2614, /* t2SUBSrr */ 2619, /* t2SUBSrs */ 2624, /* t2SpeculationBarrierISBDSBEndBB */ 2630, /* t2SpeculationBarrierSBEndBB */ 2630, /* t2TBB_JT */ 2630, /* t2TBH_JT */ 2634, /* t2WhileLoopSetup */ 2638, /* t2WhileLoopStart */ 2640, /* t2WhileLoopStartLR */ 2642, /* t2WhileLoopStartTP */ 2645, /* tADCS */ 2649, /* tADDSi3 */ 2652, /* tADDSi8 */ 2655, /* tADDSrr */ 2658, /* tADDframe */ 2661, /* tADJCALLSTACKDOWN */ 2664, /* tADJCALLSTACKUP */ 2666, /* tBLXNS_CALL */ 2668, /* tBLXr_noip */ 2669, /* tBL_PUSHLR */ 2672, /* tBRIND */ 2676, /* tBR_JTr */ 2679, /* tBXNS_RET */ 2681, /* tBX_CALL */ 2681, /* tBX_RET */ 2682, /* tBX_RET_vararg */ 2684, /* tBfar */ 2687, /* tCMP_SWAP_16 */ 2690, /* tCMP_SWAP_32 */ 2695, /* tCMP_SWAP_8 */ 2700, /* tLDMIA_UPD */ 2705, /* tLDRConstPool */ 2710, /* tLDRLIT_ga_abs */ 2714, /* tLDRLIT_ga_pcrel */ 2716, /* tLDR_postidx */ 2718, /* tLDRpci_pic */ 2723, /* tLEApcrel */ 2726, /* tLEApcrelJT */ 2730, /* tLSLSri */ 2734, /* tMOVCCr_pseudo */ 2737, /* tPOP_RET */ 2742, /* tRSBS */ 2745, /* tSBCS */ 2747, /* tSUBSi3 */ 2750, /* tSUBSi8 */ 2753, /* tSUBSrr */ 2756, /* tTAILJMPd */ 2759, /* tTAILJMPdND */ 2762, /* tTAILJMPr */ 2765, /* tTBB_JT */ 2766, /* tTBH_JT */ 2770, /* tTPsoft */ 2774, /* ADCri */ 2774, /* ADCrr */ 2780, /* ADCrsi */ 2786, /* ADCrsr */ 2793, /* ADDri */ 2801, /* ADDrr */ 2807, /* ADDrsi */ 2813, /* ADDrsr */ 2820, /* ADR */ 2828, /* AESD */ 2832, /* AESE */ 2835, /* AESIMC */ 2838, /* AESMC */ 2840, /* ANDri */ 2842, /* ANDrr */ 2848, /* ANDrsi */ 2854, /* ANDrsr */ 2861, /* BF16VDOTI_VDOTD */ 2869, /* BF16VDOTI_VDOTQ */ 2874, /* BF16VDOTS_VDOTD */ 2879, /* BF16VDOTS_VDOTQ */ 2883, /* BF16_VCVT */ 2887, /* BF16_VCVTB */ 2891, /* BF16_VCVTT */ 2896, /* BFC */ 2901, /* BFI */ 2906, /* BICri */ 2912, /* BICrr */ 2918, /* BICrsi */ 2924, /* BICrsr */ 2931, /* BKPT */ 2939, /* BL */ 2940, /* BLX */ 2941, /* BLX_pred */ 2942, /* BLXi */ 2945, /* BL_pred */ 2946, /* BX */ 2949, /* BXJ */ 2950, /* BX_RET */ 2953, /* BX_pred */ 2955, /* Bcc */ 2958, /* CDE_CX1 */ 2961, /* CDE_CX1A */ 2964, /* CDE_CX1D */ 2970, /* CDE_CX1DA */ 2973, /* CDE_CX2 */ 2979, /* CDE_CX2A */ 2983, /* CDE_CX2D */ 2990, /* CDE_CX2DA */ 2994, /* CDE_CX3 */ 3001, /* CDE_CX3A */ 3006, /* CDE_CX3D */ 3014, /* CDE_CX3DA */ 3019, /* CDE_VCX1A_fpdp */ 3027, /* CDE_VCX1A_fpsp */ 3031, /* CDE_VCX1A_vec */ 3035, /* CDE_VCX1_fpdp */ 3042, /* CDE_VCX1_fpsp */ 3045, /* CDE_VCX1_vec */ 3048, /* CDE_VCX2A_fpdp */ 3055, /* CDE_VCX2A_fpsp */ 3060, /* CDE_VCX2A_vec */ 3065, /* CDE_VCX2_fpdp */ 3073, /* CDE_VCX2_fpsp */ 3077, /* CDE_VCX2_vec */ 3081, /* CDE_VCX3A_fpdp */ 3089, /* CDE_VCX3A_fpsp */ 3095, /* CDE_VCX3A_vec */ 3101, /* CDE_VCX3_fpdp */ 3110, /* CDE_VCX3_fpsp */ 3115, /* CDE_VCX3_vec */ 3120, /* CDP */ 3129, /* CDP2 */ 3137, /* CLREX */ 3143, /* CLZ */ 3143, /* CMNri */ 3147, /* CMNzrr */ 3151, /* CMNzrsi */ 3155, /* CMNzrsr */ 3160, /* CMPri */ 3166, /* CMPrr */ 3170, /* CMPrsi */ 3174, /* CMPrsr */ 3179, /* CPS1p */ 3185, /* CPS2p */ 3186, /* CPS3p */ 3188, /* CRC32B */ 3191, /* CRC32CB */ 3194, /* CRC32CH */ 3197, /* CRC32CW */ 3200, /* CRC32H */ 3203, /* CRC32W */ 3206, /* DBG */ 3209, /* DMB */ 3212, /* DSB */ 3213, /* EORri */ 3214, /* EORrr */ 3220, /* EORrsi */ 3226, /* EORrsr */ 3233, /* ERET */ 3241, /* FCONSTD */ 3243, /* FCONSTH */ 3247, /* FCONSTS */ 3251, /* FLDMXDB_UPD */ 3255, /* FLDMXIA */ 3260, /* FLDMXIA_UPD */ 3264, /* FMSTAT */ 3269, /* FSTMXDB_UPD */ 3271, /* FSTMXIA */ 3276, /* FSTMXIA_UPD */ 3280, /* HINT */ 3285, /* HLT */ 3288, /* HVC */ 3289, /* ISB */ 3290, /* LDA */ 3291, /* LDAB */ 3295, /* LDAEX */ 3299, /* LDAEXB */ 3303, /* LDAEXD */ 3307, /* LDAEXH */ 3311, /* LDAH */ 3315, /* LDC2L_OFFSET */ 3319, /* LDC2L_OPTION */ 3323, /* LDC2L_POST */ 3327, /* LDC2L_PRE */ 3331, /* LDC2_OFFSET */ 3335, /* LDC2_OPTION */ 3339, /* LDC2_POST */ 3343, /* LDC2_PRE */ 3347, /* LDCL_OFFSET */ 3351, /* LDCL_OPTION */ 3357, /* LDCL_POST */ 3363, /* LDCL_PRE */ 3369, /* LDC_OFFSET */ 3375, /* LDC_OPTION */ 3381, /* LDC_POST */ 3387, /* LDC_PRE */ 3393, /* LDMDA */ 3399, /* LDMDA_UPD */ 3403, /* LDMDB */ 3408, /* LDMDB_UPD */ 3412, /* LDMIA */ 3417, /* LDMIA_UPD */ 3421, /* LDMIB */ 3426, /* LDMIB_UPD */ 3430, /* LDRBT_POST_IMM */ 3435, /* LDRBT_POST_REG */ 3442, /* LDRB_POST_IMM */ 3449, /* LDRB_POST_REG */ 3456, /* LDRB_PRE_IMM */ 3463, /* LDRB_PRE_REG */ 3469, /* LDRBi12 */ 3476, /* LDRBrs */ 3481, /* LDRD */ 3487, /* LDRD_POST */ 3494, /* LDRD_PRE */ 3502, /* LDREX */ 3510, /* LDREXB */ 3514, /* LDREXD */ 3518, /* LDREXH */ 3522, /* LDRH */ 3526, /* LDRHTi */ 3532, /* LDRHTr */ 3538, /* LDRH_POST */ 3545, /* LDRH_PRE */ 3552, /* LDRSB */ 3559, /* LDRSBTi */ 3565, /* LDRSBTr */ 3571, /* LDRSB_POST */ 3578, /* LDRSB_PRE */ 3585, /* LDRSH */ 3592, /* LDRSHTi */ 3598, /* LDRSHTr */ 3604, /* LDRSH_POST */ 3611, /* LDRSH_PRE */ 3618, /* LDRT_POST_IMM */ 3625, /* LDRT_POST_REG */ 3632, /* LDR_POST_IMM */ 3639, /* LDR_POST_REG */ 3646, /* LDR_PRE_IMM */ 3653, /* LDR_PRE_REG */ 3659, /* LDRcp */ 3666, /* LDRi12 */ 3671, /* LDRrs */ 3676, /* MCR */ 3682, /* MCR2 */ 3690, /* MCRR */ 3696, /* MCRR2 */ 3703, /* MLA */ 3708, /* MLS */ 3715, /* MOVPCLR */ 3721, /* MOVTi16 */ 3723, /* MOVi */ 3728, /* MOVi16 */ 3733, /* MOVr */ 3737, /* MOVr_TC */ 3742, /* MOVsi */ 3747, /* MOVsr */ 3753, /* MRC */ 3760, /* MRC2 */ 3768, /* MRRC */ 3774, /* MRRC2 */ 3781, /* MRS */ 3786, /* MRSbanked */ 3789, /* MRSsys */ 3793, /* MSR */ 3796, /* MSRbanked */ 3800, /* MSRi */ 3804, /* MUL */ 3808, /* MVE_ASRLi */ 3814, /* MVE_ASRLr */ 3821, /* MVE_DLSTP_16 */ 3828, /* MVE_DLSTP_32 */ 3830, /* MVE_DLSTP_64 */ 3832, /* MVE_DLSTP_8 */ 3834, /* MVE_LCTP */ 3836, /* MVE_LETP */ 3838, /* MVE_LSLLi */ 3841, /* MVE_LSLLr */ 3848, /* MVE_LSRL */ 3855, /* MVE_SQRSHR */ 3862, /* MVE_SQRSHRL */ 3867, /* MVE_SQSHL */ 3875, /* MVE_SQSHLL */ 3880, /* MVE_SRSHR */ 3887, /* MVE_SRSHRL */ 3892, /* MVE_UQRSHL */ 3899, /* MVE_UQRSHLL */ 3904, /* MVE_UQSHL */ 3912, /* MVE_UQSHLL */ 3917, /* MVE_URSHR */ 3924, /* MVE_URSHRL */ 3929, /* MVE_VABAVs16 */ 3936, /* MVE_VABAVs32 */ 3943, /* MVE_VABAVs8 */ 3950, /* MVE_VABAVu16 */ 3957, /* MVE_VABAVu32 */ 3964, /* MVE_VABAVu8 */ 3971, /* MVE_VABDf16 */ 3978, /* MVE_VABDf32 */ 3985, /* MVE_VABDs16 */ 3992, /* MVE_VABDs32 */ 3999, /* MVE_VABDs8 */ 4006, /* MVE_VABDu16 */ 4013, /* MVE_VABDu32 */ 4020, /* MVE_VABDu8 */ 4027, /* MVE_VABSf16 */ 4034, /* MVE_VABSf32 */ 4040, /* MVE_VABSs16 */ 4046, /* MVE_VABSs32 */ 4052, /* MVE_VABSs8 */ 4058, /* MVE_VADC */ 4064, /* MVE_VADCI */ 4073, /* MVE_VADDLVs32acc */ 4081, /* MVE_VADDLVs32no_acc */ 4089, /* MVE_VADDLVu32acc */ 4095, /* MVE_VADDLVu32no_acc */ 4103, /* MVE_VADDVs16acc */ 4109, /* MVE_VADDVs16no_acc */ 4115, /* MVE_VADDVs32acc */ 4120, /* MVE_VADDVs32no_acc */ 4126, /* MVE_VADDVs8acc */ 4131, /* MVE_VADDVs8no_acc */ 4137, /* MVE_VADDVu16acc */ 4142, /* MVE_VADDVu16no_acc */ 4148, /* MVE_VADDVu32acc */ 4153, /* MVE_VADDVu32no_acc */ 4159, /* MVE_VADDVu8acc */ 4164, /* MVE_VADDVu8no_acc */ 4170, /* MVE_VADD_qr_f16 */ 4175, /* MVE_VADD_qr_f32 */ 4182, /* MVE_VADD_qr_i16 */ 4189, /* MVE_VADD_qr_i32 */ 4196, /* MVE_VADD_qr_i8 */ 4203, /* MVE_VADDf16 */ 4210, /* MVE_VADDf32 */ 4217, /* MVE_VADDi16 */ 4224, /* MVE_VADDi32 */ 4231, /* MVE_VADDi8 */ 4238, /* MVE_VAND */ 4245, /* MVE_VBIC */ 4252, /* MVE_VBICimmi16 */ 4259, /* MVE_VBICimmi32 */ 4265, /* MVE_VBRSR16 */ 4271, /* MVE_VBRSR32 */ 4278, /* MVE_VBRSR8 */ 4285, /* MVE_VCADDf16 */ 4292, /* MVE_VCADDf32 */ 4300, /* MVE_VCADDi16 */ 4308, /* MVE_VCADDi32 */ 4316, /* MVE_VCADDi8 */ 4324, /* MVE_VCLSs16 */ 4332, /* MVE_VCLSs32 */ 4338, /* MVE_VCLSs8 */ 4344, /* MVE_VCLZs16 */ 4350, /* MVE_VCLZs32 */ 4356, /* MVE_VCLZs8 */ 4362, /* MVE_VCMLAf16 */ 4368, /* MVE_VCMLAf32 */ 4376, /* MVE_VCMPf16 */ 4384, /* MVE_VCMPf16r */ 4391, /* MVE_VCMPf32 */ 4398, /* MVE_VCMPf32r */ 4405, /* MVE_VCMPi16 */ 4412, /* MVE_VCMPi16r */ 4419, /* MVE_VCMPi32 */ 4426, /* MVE_VCMPi32r */ 4433, /* MVE_VCMPi8 */ 4440, /* MVE_VCMPi8r */ 4447, /* MVE_VCMPs16 */ 4454, /* MVE_VCMPs16r */ 4461, /* MVE_VCMPs32 */ 4468, /* MVE_VCMPs32r */ 4475, /* MVE_VCMPs8 */ 4482, /* MVE_VCMPs8r */ 4489, /* MVE_VCMPu16 */ 4496, /* MVE_VCMPu16r */ 4503, /* MVE_VCMPu32 */ 4510, /* MVE_VCMPu32r */ 4517, /* MVE_VCMPu8 */ 4524, /* MVE_VCMPu8r */ 4531, /* MVE_VCMULf16 */ 4538, /* MVE_VCMULf32 */ 4546, /* MVE_VCTP16 */ 4554, /* MVE_VCTP32 */ 4559, /* MVE_VCTP64 */ 4564, /* MVE_VCTP8 */ 4569, /* MVE_VCVTf16f32bh */ 4574, /* MVE_VCVTf16f32th */ 4580, /* MVE_VCVTf16s16_fix */ 4586, /* MVE_VCVTf16s16n */ 4593, /* MVE_VCVTf16u16_fix */ 4599, /* MVE_VCVTf16u16n */ 4606, /* MVE_VCVTf32f16bh */ 4612, /* MVE_VCVTf32f16th */ 4618, /* MVE_VCVTf32s32_fix */ 4624, /* MVE_VCVTf32s32n */ 4631, /* MVE_VCVTf32u32_fix */ 4637, /* MVE_VCVTf32u32n */ 4644, /* MVE_VCVTs16f16_fix */ 4650, /* MVE_VCVTs16f16a */ 4657, /* MVE_VCVTs16f16m */ 4663, /* MVE_VCVTs16f16n */ 4669, /* MVE_VCVTs16f16p */ 4675, /* MVE_VCVTs16f16z */ 4681, /* MVE_VCVTs32f32_fix */ 4687, /* MVE_VCVTs32f32a */ 4694, /* MVE_VCVTs32f32m */ 4700, /* MVE_VCVTs32f32n */ 4706, /* MVE_VCVTs32f32p */ 4712, /* MVE_VCVTs32f32z */ 4718, /* MVE_VCVTu16f16_fix */ 4724, /* MVE_VCVTu16f16a */ 4731, /* MVE_VCVTu16f16m */ 4737, /* MVE_VCVTu16f16n */ 4743, /* MVE_VCVTu16f16p */ 4749, /* MVE_VCVTu16f16z */ 4755, /* MVE_VCVTu32f32_fix */ 4761, /* MVE_VCVTu32f32a */ 4768, /* MVE_VCVTu32f32m */ 4774, /* MVE_VCVTu32f32n */ 4780, /* MVE_VCVTu32f32p */ 4786, /* MVE_VCVTu32f32z */ 4792, /* MVE_VDDUPu16 */ 4798, /* MVE_VDDUPu32 */ 4806, /* MVE_VDDUPu8 */ 4814, /* MVE_VDUP16 */ 4822, /* MVE_VDUP32 */ 4828, /* MVE_VDUP8 */ 4834, /* MVE_VDWDUPu16 */ 4840, /* MVE_VDWDUPu32 */ 4849, /* MVE_VDWDUPu8 */ 4858, /* MVE_VEOR */ 4867, /* MVE_VFMA_qr_Sf16 */ 4874, /* MVE_VFMA_qr_Sf32 */ 4881, /* MVE_VFMA_qr_f16 */ 4888, /* MVE_VFMA_qr_f32 */ 4895, /* MVE_VFMAf16 */ 4902, /* MVE_VFMAf32 */ 4909, /* MVE_VFMSf16 */ 4916, /* MVE_VFMSf32 */ 4923, /* MVE_VHADD_qr_s16 */ 4930, /* MVE_VHADD_qr_s32 */ 4937, /* MVE_VHADD_qr_s8 */ 4944, /* MVE_VHADD_qr_u16 */ 4951, /* MVE_VHADD_qr_u32 */ 4958, /* MVE_VHADD_qr_u8 */ 4965, /* MVE_VHADDs16 */ 4972, /* MVE_VHADDs32 */ 4979, /* MVE_VHADDs8 */ 4986, /* MVE_VHADDu16 */ 4993, /* MVE_VHADDu32 */ 5000, /* MVE_VHADDu8 */ 5007, /* MVE_VHCADDs16 */ 5014, /* MVE_VHCADDs32 */ 5022, /* MVE_VHCADDs8 */ 5030, /* MVE_VHSUB_qr_s16 */ 5038, /* MVE_VHSUB_qr_s32 */ 5045, /* MVE_VHSUB_qr_s8 */ 5052, /* MVE_VHSUB_qr_u16 */ 5059, /* MVE_VHSUB_qr_u32 */ 5066, /* MVE_VHSUB_qr_u8 */ 5073, /* MVE_VHSUBs16 */ 5080, /* MVE_VHSUBs32 */ 5087, /* MVE_VHSUBs8 */ 5094, /* MVE_VHSUBu16 */ 5101, /* MVE_VHSUBu32 */ 5108, /* MVE_VHSUBu8 */ 5115, /* MVE_VIDUPu16 */ 5122, /* MVE_VIDUPu32 */ 5130, /* MVE_VIDUPu8 */ 5138, /* MVE_VIWDUPu16 */ 5146, /* MVE_VIWDUPu32 */ 5155, /* MVE_VIWDUPu8 */ 5164, /* MVE_VLD20_16 */ 5173, /* MVE_VLD20_16_wb */ 5176, /* MVE_VLD20_32 */ 5180, /* MVE_VLD20_32_wb */ 5183, /* MVE_VLD20_8 */ 5187, /* MVE_VLD20_8_wb */ 5190, /* MVE_VLD21_16 */ 5194, /* MVE_VLD21_16_wb */ 5197, /* MVE_VLD21_32 */ 5201, /* MVE_VLD21_32_wb */ 5204, /* MVE_VLD21_8 */ 5208, /* MVE_VLD21_8_wb */ 5211, /* MVE_VLD40_16 */ 5215, /* MVE_VLD40_16_wb */ 5218, /* MVE_VLD40_32 */ 5222, /* MVE_VLD40_32_wb */ 5225, /* MVE_VLD40_8 */ 5229, /* MVE_VLD40_8_wb */ 5232, /* MVE_VLD41_16 */ 5236, /* MVE_VLD41_16_wb */ 5239, /* MVE_VLD41_32 */ 5243, /* MVE_VLD41_32_wb */ 5246, /* MVE_VLD41_8 */ 5250, /* MVE_VLD41_8_wb */ 5253, /* MVE_VLD42_16 */ 5257, /* MVE_VLD42_16_wb */ 5260, /* MVE_VLD42_32 */ 5264, /* MVE_VLD42_32_wb */ 5267, /* MVE_VLD42_8 */ 5271, /* MVE_VLD42_8_wb */ 5274, /* MVE_VLD43_16 */ 5278, /* MVE_VLD43_16_wb */ 5281, /* MVE_VLD43_32 */ 5285, /* MVE_VLD43_32_wb */ 5288, /* MVE_VLD43_8 */ 5292, /* MVE_VLD43_8_wb */ 5295, /* MVE_VLDRBS16 */ 5299, /* MVE_VLDRBS16_post */ 5305, /* MVE_VLDRBS16_pre */ 5312, /* MVE_VLDRBS16_rq */ 5319, /* MVE_VLDRBS32 */ 5325, /* MVE_VLDRBS32_post */ 5331, /* MVE_VLDRBS32_pre */ 5338, /* MVE_VLDRBS32_rq */ 5345, /* MVE_VLDRBU16 */ 5351, /* MVE_VLDRBU16_post */ 5357, /* MVE_VLDRBU16_pre */ 5364, /* MVE_VLDRBU16_rq */ 5371, /* MVE_VLDRBU32 */ 5377, /* MVE_VLDRBU32_post */ 5383, /* MVE_VLDRBU32_pre */ 5390, /* MVE_VLDRBU32_rq */ 5397, /* MVE_VLDRBU8 */ 5403, /* MVE_VLDRBU8_post */ 5409, /* MVE_VLDRBU8_pre */ 5416, /* MVE_VLDRBU8_rq */ 5423, /* MVE_VLDRDU64_qi */ 5429, /* MVE_VLDRDU64_qi_pre */ 5435, /* MVE_VLDRDU64_rq */ 5442, /* MVE_VLDRDU64_rq_u */ 5448, /* MVE_VLDRHS32 */ 5454, /* MVE_VLDRHS32_post */ 5460, /* MVE_VLDRHS32_pre */ 5467, /* MVE_VLDRHS32_rq */ 5474, /* MVE_VLDRHS32_rq_u */ 5480, /* MVE_VLDRHU16 */ 5486, /* MVE_VLDRHU16_post */ 5492, /* MVE_VLDRHU16_pre */ 5499, /* MVE_VLDRHU16_rq */ 5506, /* MVE_VLDRHU16_rq_u */ 5512, /* MVE_VLDRHU32 */ 5518, /* MVE_VLDRHU32_post */ 5524, /* MVE_VLDRHU32_pre */ 5531, /* MVE_VLDRHU32_rq */ 5538, /* MVE_VLDRHU32_rq_u */ 5544, /* MVE_VLDRWU32 */ 5550, /* MVE_VLDRWU32_post */ 5556, /* MVE_VLDRWU32_pre */ 5563, /* MVE_VLDRWU32_qi */ 5570, /* MVE_VLDRWU32_qi_pre */ 5576, /* MVE_VLDRWU32_rq */ 5583, /* MVE_VLDRWU32_rq_u */ 5589, /* MVE_VMAXAVs16 */ 5595, /* MVE_VMAXAVs32 */ 5601, /* MVE_VMAXAVs8 */ 5607, /* MVE_VMAXAs16 */ 5613, /* MVE_VMAXAs32 */ 5619, /* MVE_VMAXAs8 */ 5625, /* MVE_VMAXNMAVf16 */ 5631, /* MVE_VMAXNMAVf32 */ 5637, /* MVE_VMAXNMAf16 */ 5643, /* MVE_VMAXNMAf32 */ 5649, /* MVE_VMAXNMVf16 */ 5655, /* MVE_VMAXNMVf32 */ 5661, /* MVE_VMAXNMf16 */ 5667, /* MVE_VMAXNMf32 */ 5674, /* MVE_VMAXVs16 */ 5681, /* MVE_VMAXVs32 */ 5687, /* MVE_VMAXVs8 */ 5693, /* MVE_VMAXVu16 */ 5699, /* MVE_VMAXVu32 */ 5705, /* MVE_VMAXVu8 */ 5711, /* MVE_VMAXs16 */ 5717, /* MVE_VMAXs32 */ 5724, /* MVE_VMAXs8 */ 5731, /* MVE_VMAXu16 */ 5738, /* MVE_VMAXu32 */ 5745, /* MVE_VMAXu8 */ 5752, /* MVE_VMINAVs16 */ 5759, /* MVE_VMINAVs32 */ 5765, /* MVE_VMINAVs8 */ 5771, /* MVE_VMINAs16 */ 5777, /* MVE_VMINAs32 */ 5783, /* MVE_VMINAs8 */ 5789, /* MVE_VMINNMAVf16 */ 5795, /* MVE_VMINNMAVf32 */ 5801, /* MVE_VMINNMAf16 */ 5807, /* MVE_VMINNMAf32 */ 5813, /* MVE_VMINNMVf16 */ 5819, /* MVE_VMINNMVf32 */ 5825, /* MVE_VMINNMf16 */ 5831, /* MVE_VMINNMf32 */ 5838, /* MVE_VMINVs16 */ 5845, /* MVE_VMINVs32 */ 5851, /* MVE_VMINVs8 */ 5857, /* MVE_VMINVu16 */ 5863, /* MVE_VMINVu32 */ 5869, /* MVE_VMINVu8 */ 5875, /* MVE_VMINs16 */ 5881, /* MVE_VMINs32 */ 5888, /* MVE_VMINs8 */ 5895, /* MVE_VMINu16 */ 5902, /* MVE_VMINu32 */ 5909, /* MVE_VMINu8 */ 5916, /* MVE_VMLADAVas16 */ 5923, /* MVE_VMLADAVas32 */ 5930, /* MVE_VMLADAVas8 */ 5937, /* MVE_VMLADAVau16 */ 5944, /* MVE_VMLADAVau32 */ 5951, /* MVE_VMLADAVau8 */ 5958, /* MVE_VMLADAVaxs16 */ 5965, /* MVE_VMLADAVaxs32 */ 5972, /* MVE_VMLADAVaxs8 */ 5979, /* MVE_VMLADAVs16 */ 5986, /* MVE_VMLADAVs32 */ 5992, /* MVE_VMLADAVs8 */ 5998, /* MVE_VMLADAVu16 */ 6004, /* MVE_VMLADAVu32 */ 6010, /* MVE_VMLADAVu8 */ 6016, /* MVE_VMLADAVxs16 */ 6022, /* MVE_VMLADAVxs32 */ 6028, /* MVE_VMLADAVxs8 */ 6034, /* MVE_VMLALDAVas16 */ 6040, /* MVE_VMLALDAVas32 */ 6049, /* MVE_VMLALDAVau16 */ 6058, /* MVE_VMLALDAVau32 */ 6067, /* MVE_VMLALDAVaxs16 */ 6076, /* MVE_VMLALDAVaxs32 */ 6085, /* MVE_VMLALDAVs16 */ 6094, /* MVE_VMLALDAVs32 */ 6101, /* MVE_VMLALDAVu16 */ 6108, /* MVE_VMLALDAVu32 */ 6115, /* MVE_VMLALDAVxs16 */ 6122, /* MVE_VMLALDAVxs32 */ 6129, /* MVE_VMLAS_qr_i16 */ 6136, /* MVE_VMLAS_qr_i32 */ 6143, /* MVE_VMLAS_qr_i8 */ 6150, /* MVE_VMLA_qr_i16 */ 6157, /* MVE_VMLA_qr_i32 */ 6164, /* MVE_VMLA_qr_i8 */ 6171, /* MVE_VMLSDAVas16 */ 6178, /* MVE_VMLSDAVas32 */ 6185, /* MVE_VMLSDAVas8 */ 6192, /* MVE_VMLSDAVaxs16 */ 6199, /* MVE_VMLSDAVaxs32 */ 6206, /* MVE_VMLSDAVaxs8 */ 6213, /* MVE_VMLSDAVs16 */ 6220, /* MVE_VMLSDAVs32 */ 6226, /* MVE_VMLSDAVs8 */ 6232, /* MVE_VMLSDAVxs16 */ 6238, /* MVE_VMLSDAVxs32 */ 6244, /* MVE_VMLSDAVxs8 */ 6250, /* MVE_VMLSLDAVas16 */ 6256, /* MVE_VMLSLDAVas32 */ 6265, /* MVE_VMLSLDAVaxs16 */ 6274, /* MVE_VMLSLDAVaxs32 */ 6283, /* MVE_VMLSLDAVs16 */ 6292, /* MVE_VMLSLDAVs32 */ 6299, /* MVE_VMLSLDAVxs16 */ 6306, /* MVE_VMLSLDAVxs32 */ 6313, /* MVE_VMOVLs16bh */ 6320, /* MVE_VMOVLs16th */ 6326, /* MVE_VMOVLs8bh */ 6332, /* MVE_VMOVLs8th */ 6338, /* MVE_VMOVLu16bh */ 6344, /* MVE_VMOVLu16th */ 6350, /* MVE_VMOVLu8bh */ 6356, /* MVE_VMOVLu8th */ 6362, /* MVE_VMOVNi16bh */ 6368, /* MVE_VMOVNi16th */ 6374, /* MVE_VMOVNi32bh */ 6380, /* MVE_VMOVNi32th */ 6386, /* MVE_VMOV_from_lane_32 */ 6392, /* MVE_VMOV_from_lane_s16 */ 6397, /* MVE_VMOV_from_lane_s8 */ 6402, /* MVE_VMOV_from_lane_u16 */ 6407, /* MVE_VMOV_from_lane_u8 */ 6412, /* MVE_VMOV_q_rr */ 6417, /* MVE_VMOV_rr_q */ 6425, /* MVE_VMOV_to_lane_16 */ 6432, /* MVE_VMOV_to_lane_32 */ 6438, /* MVE_VMOV_to_lane_8 */ 6444, /* MVE_VMOVimmf32 */ 6450, /* MVE_VMOVimmi16 */ 6456, /* MVE_VMOVimmi32 */ 6462, /* MVE_VMOVimmi64 */ 6468, /* MVE_VMOVimmi8 */ 6474, /* MVE_VMULHs16 */ 6480, /* MVE_VMULHs32 */ 6487, /* MVE_VMULHs8 */ 6494, /* MVE_VMULHu16 */ 6501, /* MVE_VMULHu32 */ 6508, /* MVE_VMULHu8 */ 6515, /* MVE_VMULLBp16 */ 6522, /* MVE_VMULLBp8 */ 6529, /* MVE_VMULLBs16 */ 6536, /* MVE_VMULLBs32 */ 6543, /* MVE_VMULLBs8 */ 6550, /* MVE_VMULLBu16 */ 6557, /* MVE_VMULLBu32 */ 6564, /* MVE_VMULLBu8 */ 6571, /* MVE_VMULLTp16 */ 6578, /* MVE_VMULLTp8 */ 6585, /* MVE_VMULLTs16 */ 6592, /* MVE_VMULLTs32 */ 6599, /* MVE_VMULLTs8 */ 6606, /* MVE_VMULLTu16 */ 6613, /* MVE_VMULLTu32 */ 6620, /* MVE_VMULLTu8 */ 6627, /* MVE_VMUL_qr_f16 */ 6634, /* MVE_VMUL_qr_f32 */ 6641, /* MVE_VMUL_qr_i16 */ 6648, /* MVE_VMUL_qr_i32 */ 6655, /* MVE_VMUL_qr_i8 */ 6662, /* MVE_VMULf16 */ 6669, /* MVE_VMULf32 */ 6676, /* MVE_VMULi16 */ 6683, /* MVE_VMULi32 */ 6690, /* MVE_VMULi8 */ 6697, /* MVE_VMVN */ 6704, /* MVE_VMVNimmi16 */ 6710, /* MVE_VMVNimmi32 */ 6716, /* MVE_VNEGf16 */ 6722, /* MVE_VNEGf32 */ 6728, /* MVE_VNEGs16 */ 6734, /* MVE_VNEGs32 */ 6740, /* MVE_VNEGs8 */ 6746, /* MVE_VORN */ 6752, /* MVE_VORR */ 6759, /* MVE_VORRimmi16 */ 6766, /* MVE_VORRimmi32 */ 6772, /* MVE_VPNOT */ 6778, /* MVE_VPSEL */ 6783, /* MVE_VPST */ 6789, /* MVE_VPTv16i8 */ 6790, /* MVE_VPTv16i8r */ 6794, /* MVE_VPTv16s8 */ 6798, /* MVE_VPTv16s8r */ 6802, /* MVE_VPTv16u8 */ 6806, /* MVE_VPTv16u8r */ 6810, /* MVE_VPTv4f32 */ 6814, /* MVE_VPTv4f32r */ 6818, /* MVE_VPTv4i32 */ 6822, /* MVE_VPTv4i32r */ 6826, /* MVE_VPTv4s32 */ 6830, /* MVE_VPTv4s32r */ 6834, /* MVE_VPTv4u32 */ 6838, /* MVE_VPTv4u32r */ 6842, /* MVE_VPTv8f16 */ 6846, /* MVE_VPTv8f16r */ 6850, /* MVE_VPTv8i16 */ 6854, /* MVE_VPTv8i16r */ 6858, /* MVE_VPTv8s16 */ 6862, /* MVE_VPTv8s16r */ 6866, /* MVE_VPTv8u16 */ 6870, /* MVE_VPTv8u16r */ 6874, /* MVE_VQABSs16 */ 6878, /* MVE_VQABSs32 */ 6884, /* MVE_VQABSs8 */ 6890, /* MVE_VQADD_qr_s16 */ 6896, /* MVE_VQADD_qr_s32 */ 6903, /* MVE_VQADD_qr_s8 */ 6910, /* MVE_VQADD_qr_u16 */ 6917, /* MVE_VQADD_qr_u32 */ 6924, /* MVE_VQADD_qr_u8 */ 6931, /* MVE_VQADDs16 */ 6938, /* MVE_VQADDs32 */ 6945, /* MVE_VQADDs8 */ 6952, /* MVE_VQADDu16 */ 6959, /* MVE_VQADDu32 */ 6966, /* MVE_VQADDu8 */ 6973, /* MVE_VQDMLADHXs16 */ 6980, /* MVE_VQDMLADHXs32 */ 6987, /* MVE_VQDMLADHXs8 */ 6994, /* MVE_VQDMLADHs16 */ 7001, /* MVE_VQDMLADHs32 */ 7008, /* MVE_VQDMLADHs8 */ 7015, /* MVE_VQDMLAH_qrs16 */ 7022, /* MVE_VQDMLAH_qrs32 */ 7029, /* MVE_VQDMLAH_qrs8 */ 7036, /* MVE_VQDMLASH_qrs16 */ 7043, /* MVE_VQDMLASH_qrs32 */ 7050, /* MVE_VQDMLASH_qrs8 */ 7057, /* MVE_VQDMLSDHXs16 */ 7064, /* MVE_VQDMLSDHXs32 */ 7071, /* MVE_VQDMLSDHXs8 */ 7078, /* MVE_VQDMLSDHs16 */ 7085, /* MVE_VQDMLSDHs32 */ 7092, /* MVE_VQDMLSDHs8 */ 7099, /* MVE_VQDMULH_qr_s16 */ 7106, /* MVE_VQDMULH_qr_s32 */ 7113, /* MVE_VQDMULH_qr_s8 */ 7120, /* MVE_VQDMULHi16 */ 7127, /* MVE_VQDMULHi32 */ 7134, /* MVE_VQDMULHi8 */ 7141, /* MVE_VQDMULL_qr_s16bh */ 7148, /* MVE_VQDMULL_qr_s16th */ 7155, /* MVE_VQDMULL_qr_s32bh */ 7162, /* MVE_VQDMULL_qr_s32th */ 7169, /* MVE_VQDMULLs16bh */ 7176, /* MVE_VQDMULLs16th */ 7183, /* MVE_VQDMULLs32bh */ 7190, /* MVE_VQDMULLs32th */ 7197, /* MVE_VQMOVNs16bh */ 7204, /* MVE_VQMOVNs16th */ 7210, /* MVE_VQMOVNs32bh */ 7216, /* MVE_VQMOVNs32th */ 7222, /* MVE_VQMOVNu16bh */ 7228, /* MVE_VQMOVNu16th */ 7234, /* MVE_VQMOVNu32bh */ 7240, /* MVE_VQMOVNu32th */ 7246, /* MVE_VQMOVUNs16bh */ 7252, /* MVE_VQMOVUNs16th */ 7258, /* MVE_VQMOVUNs32bh */ 7264, /* MVE_VQMOVUNs32th */ 7270, /* MVE_VQNEGs16 */ 7276, /* MVE_VQNEGs32 */ 7282, /* MVE_VQNEGs8 */ 7288, /* MVE_VQRDMLADHXs16 */ 7294, /* MVE_VQRDMLADHXs32 */ 7301, /* MVE_VQRDMLADHXs8 */ 7308, /* MVE_VQRDMLADHs16 */ 7315, /* MVE_VQRDMLADHs32 */ 7322, /* MVE_VQRDMLADHs8 */ 7329, /* MVE_VQRDMLAH_qrs16 */ 7336, /* MVE_VQRDMLAH_qrs32 */ 7343, /* MVE_VQRDMLAH_qrs8 */ 7350, /* MVE_VQRDMLASH_qrs16 */ 7357, /* MVE_VQRDMLASH_qrs32 */ 7364, /* MVE_VQRDMLASH_qrs8 */ 7371, /* MVE_VQRDMLSDHXs16 */ 7378, /* MVE_VQRDMLSDHXs32 */ 7385, /* MVE_VQRDMLSDHXs8 */ 7392, /* MVE_VQRDMLSDHs16 */ 7399, /* MVE_VQRDMLSDHs32 */ 7406, /* MVE_VQRDMLSDHs8 */ 7413, /* MVE_VQRDMULH_qr_s16 */ 7420, /* MVE_VQRDMULH_qr_s32 */ 7427, /* MVE_VQRDMULH_qr_s8 */ 7434, /* MVE_VQRDMULHi16 */ 7441, /* MVE_VQRDMULHi32 */ 7448, /* MVE_VQRDMULHi8 */ 7455, /* MVE_VQRSHL_by_vecs16 */ 7462, /* MVE_VQRSHL_by_vecs32 */ 7469, /* MVE_VQRSHL_by_vecs8 */ 7476, /* MVE_VQRSHL_by_vecu16 */ 7483, /* MVE_VQRSHL_by_vecu32 */ 7490, /* MVE_VQRSHL_by_vecu8 */ 7497, /* MVE_VQRSHL_qrs16 */ 7504, /* MVE_VQRSHL_qrs32 */ 7510, /* MVE_VQRSHL_qrs8 */ 7516, /* MVE_VQRSHL_qru16 */ 7522, /* MVE_VQRSHL_qru32 */ 7528, /* MVE_VQRSHL_qru8 */ 7534, /* MVE_VQRSHRNbhs16 */ 7540, /* MVE_VQRSHRNbhs32 */ 7547, /* MVE_VQRSHRNbhu16 */ 7554, /* MVE_VQRSHRNbhu32 */ 7561, /* MVE_VQRSHRNths16 */ 7568, /* MVE_VQRSHRNths32 */ 7575, /* MVE_VQRSHRNthu16 */ 7582, /* MVE_VQRSHRNthu32 */ 7589, /* MVE_VQRSHRUNs16bh */ 7596, /* MVE_VQRSHRUNs16th */ 7603, /* MVE_VQRSHRUNs32bh */ 7610, /* MVE_VQRSHRUNs32th */ 7617, /* MVE_VQSHLU_imms16 */ 7624, /* MVE_VQSHLU_imms32 */ 7631, /* MVE_VQSHLU_imms8 */ 7638, /* MVE_VQSHL_by_vecs16 */ 7645, /* MVE_VQSHL_by_vecs32 */ 7652, /* MVE_VQSHL_by_vecs8 */ 7659, /* MVE_VQSHL_by_vecu16 */ 7666, /* MVE_VQSHL_by_vecu32 */ 7673, /* MVE_VQSHL_by_vecu8 */ 7680, /* MVE_VQSHL_qrs16 */ 7687, /* MVE_VQSHL_qrs32 */ 7693, /* MVE_VQSHL_qrs8 */ 7699, /* MVE_VQSHL_qru16 */ 7705, /* MVE_VQSHL_qru32 */ 7711, /* MVE_VQSHL_qru8 */ 7717, /* MVE_VQSHLimms16 */ 7723, /* MVE_VQSHLimms32 */ 7730, /* MVE_VQSHLimms8 */ 7737, /* MVE_VQSHLimmu16 */ 7744, /* MVE_VQSHLimmu32 */ 7751, /* MVE_VQSHLimmu8 */ 7758, /* MVE_VQSHRNbhs16 */ 7765, /* MVE_VQSHRNbhs32 */ 7772, /* MVE_VQSHRNbhu16 */ 7779, /* MVE_VQSHRNbhu32 */ 7786, /* MVE_VQSHRNths16 */ 7793, /* MVE_VQSHRNths32 */ 7800, /* MVE_VQSHRNthu16 */ 7807, /* MVE_VQSHRNthu32 */ 7814, /* MVE_VQSHRUNs16bh */ 7821, /* MVE_VQSHRUNs16th */ 7828, /* MVE_VQSHRUNs32bh */ 7835, /* MVE_VQSHRUNs32th */ 7842, /* MVE_VQSUB_qr_s16 */ 7849, /* MVE_VQSUB_qr_s32 */ 7856, /* MVE_VQSUB_qr_s8 */ 7863, /* MVE_VQSUB_qr_u16 */ 7870, /* MVE_VQSUB_qr_u32 */ 7877, /* MVE_VQSUB_qr_u8 */ 7884, /* MVE_VQSUBs16 */ 7891, /* MVE_VQSUBs32 */ 7898, /* MVE_VQSUBs8 */ 7905, /* MVE_VQSUBu16 */ 7912, /* MVE_VQSUBu32 */ 7919, /* MVE_VQSUBu8 */ 7926, /* MVE_VREV16_8 */ 7933, /* MVE_VREV32_16 */ 7939, /* MVE_VREV32_8 */ 7945, /* MVE_VREV64_16 */ 7951, /* MVE_VREV64_32 */ 7957, /* MVE_VREV64_8 */ 7963, /* MVE_VRHADDs16 */ 7969, /* MVE_VRHADDs32 */ 7976, /* MVE_VRHADDs8 */ 7983, /* MVE_VRHADDu16 */ 7990, /* MVE_VRHADDu32 */ 7997, /* MVE_VRHADDu8 */ 8004, /* MVE_VRINTf16A */ 8011, /* MVE_VRINTf16M */ 8017, /* MVE_VRINTf16N */ 8023, /* MVE_VRINTf16P */ 8029, /* MVE_VRINTf16X */ 8035, /* MVE_VRINTf16Z */ 8041, /* MVE_VRINTf32A */ 8047, /* MVE_VRINTf32M */ 8053, /* MVE_VRINTf32N */ 8059, /* MVE_VRINTf32P */ 8065, /* MVE_VRINTf32X */ 8071, /* MVE_VRINTf32Z */ 8077, /* MVE_VRMLALDAVHas32 */ 8083, /* MVE_VRMLALDAVHau32 */ 8092, /* MVE_VRMLALDAVHaxs32 */ 8101, /* MVE_VRMLALDAVHs32 */ 8110, /* MVE_VRMLALDAVHu32 */ 8117, /* MVE_VRMLALDAVHxs32 */ 8124, /* MVE_VRMLSLDAVHas32 */ 8131, /* MVE_VRMLSLDAVHaxs32 */ 8140, /* MVE_VRMLSLDAVHs32 */ 8149, /* MVE_VRMLSLDAVHxs32 */ 8156, /* MVE_VRMULHs16 */ 8163, /* MVE_VRMULHs32 */ 8170, /* MVE_VRMULHs8 */ 8177, /* MVE_VRMULHu16 */ 8184, /* MVE_VRMULHu32 */ 8191, /* MVE_VRMULHu8 */ 8198, /* MVE_VRSHL_by_vecs16 */ 8205, /* MVE_VRSHL_by_vecs32 */ 8212, /* MVE_VRSHL_by_vecs8 */ 8219, /* MVE_VRSHL_by_vecu16 */ 8226, /* MVE_VRSHL_by_vecu32 */ 8233, /* MVE_VRSHL_by_vecu8 */ 8240, /* MVE_VRSHL_qrs16 */ 8247, /* MVE_VRSHL_qrs32 */ 8253, /* MVE_VRSHL_qrs8 */ 8259, /* MVE_VRSHL_qru16 */ 8265, /* MVE_VRSHL_qru32 */ 8271, /* MVE_VRSHL_qru8 */ 8277, /* MVE_VRSHRNi16bh */ 8283, /* MVE_VRSHRNi16th */ 8290, /* MVE_VRSHRNi32bh */ 8297, /* MVE_VRSHRNi32th */ 8304, /* MVE_VRSHR_imms16 */ 8311, /* MVE_VRSHR_imms32 */ 8318, /* MVE_VRSHR_imms8 */ 8325, /* MVE_VRSHR_immu16 */ 8332, /* MVE_VRSHR_immu32 */ 8339, /* MVE_VRSHR_immu8 */ 8346, /* MVE_VSBC */ 8353, /* MVE_VSBCI */ 8362, /* MVE_VSHLC */ 8370, /* MVE_VSHLL_imms16bh */ 8378, /* MVE_VSHLL_imms16th */ 8385, /* MVE_VSHLL_imms8bh */ 8392, /* MVE_VSHLL_imms8th */ 8399, /* MVE_VSHLL_immu16bh */ 8406, /* MVE_VSHLL_immu16th */ 8413, /* MVE_VSHLL_immu8bh */ 8420, /* MVE_VSHLL_immu8th */ 8427, /* MVE_VSHLL_lws16bh */ 8434, /* MVE_VSHLL_lws16th */ 8440, /* MVE_VSHLL_lws8bh */ 8446, /* MVE_VSHLL_lws8th */ 8452, /* MVE_VSHLL_lwu16bh */ 8458, /* MVE_VSHLL_lwu16th */ 8464, /* MVE_VSHLL_lwu8bh */ 8470, /* MVE_VSHLL_lwu8th */ 8476, /* MVE_VSHL_by_vecs16 */ 8482, /* MVE_VSHL_by_vecs32 */ 8489, /* MVE_VSHL_by_vecs8 */ 8496, /* MVE_VSHL_by_vecu16 */ 8503, /* MVE_VSHL_by_vecu32 */ 8510, /* MVE_VSHL_by_vecu8 */ 8517, /* MVE_VSHL_immi16 */ 8524, /* MVE_VSHL_immi32 */ 8531, /* MVE_VSHL_immi8 */ 8538, /* MVE_VSHL_qrs16 */ 8545, /* MVE_VSHL_qrs32 */ 8551, /* MVE_VSHL_qrs8 */ 8557, /* MVE_VSHL_qru16 */ 8563, /* MVE_VSHL_qru32 */ 8569, /* MVE_VSHL_qru8 */ 8575, /* MVE_VSHRNi16bh */ 8581, /* MVE_VSHRNi16th */ 8588, /* MVE_VSHRNi32bh */ 8595, /* MVE_VSHRNi32th */ 8602, /* MVE_VSHR_imms16 */ 8609, /* MVE_VSHR_imms32 */ 8616, /* MVE_VSHR_imms8 */ 8623, /* MVE_VSHR_immu16 */ 8630, /* MVE_VSHR_immu32 */ 8637, /* MVE_VSHR_immu8 */ 8644, /* MVE_VSLIimm16 */ 8651, /* MVE_VSLIimm32 */ 8658, /* MVE_VSLIimm8 */ 8665, /* MVE_VSRIimm16 */ 8672, /* MVE_VSRIimm32 */ 8679, /* MVE_VSRIimm8 */ 8686, /* MVE_VST20_16 */ 8693, /* MVE_VST20_16_wb */ 8695, /* MVE_VST20_32 */ 8698, /* MVE_VST20_32_wb */ 8700, /* MVE_VST20_8 */ 8703, /* MVE_VST20_8_wb */ 8705, /* MVE_VST21_16 */ 8708, /* MVE_VST21_16_wb */ 8710, /* MVE_VST21_32 */ 8713, /* MVE_VST21_32_wb */ 8715, /* MVE_VST21_8 */ 8718, /* MVE_VST21_8_wb */ 8720, /* MVE_VST40_16 */ 8723, /* MVE_VST40_16_wb */ 8725, /* MVE_VST40_32 */ 8728, /* MVE_VST40_32_wb */ 8730, /* MVE_VST40_8 */ 8733, /* MVE_VST40_8_wb */ 8735, /* MVE_VST41_16 */ 8738, /* MVE_VST41_16_wb */ 8740, /* MVE_VST41_32 */ 8743, /* MVE_VST41_32_wb */ 8745, /* MVE_VST41_8 */ 8748, /* MVE_VST41_8_wb */ 8750, /* MVE_VST42_16 */ 8753, /* MVE_VST42_16_wb */ 8755, /* MVE_VST42_32 */ 8758, /* MVE_VST42_32_wb */ 8760, /* MVE_VST42_8 */ 8763, /* MVE_VST42_8_wb */ 8765, /* MVE_VST43_16 */ 8768, /* MVE_VST43_16_wb */ 8770, /* MVE_VST43_32 */ 8773, /* MVE_VST43_32_wb */ 8775, /* MVE_VST43_8 */ 8778, /* MVE_VST43_8_wb */ 8780, /* MVE_VSTRB16 */ 8783, /* MVE_VSTRB16_post */ 8789, /* MVE_VSTRB16_pre */ 8796, /* MVE_VSTRB16_rq */ 8803, /* MVE_VSTRB32 */ 8809, /* MVE_VSTRB32_post */ 8815, /* MVE_VSTRB32_pre */ 8822, /* MVE_VSTRB32_rq */ 8829, /* MVE_VSTRB8_rq */ 8835, /* MVE_VSTRBU8 */ 8841, /* MVE_VSTRBU8_post */ 8847, /* MVE_VSTRBU8_pre */ 8854, /* MVE_VSTRD64_qi */ 8861, /* MVE_VSTRD64_qi_pre */ 8867, /* MVE_VSTRD64_rq */ 8874, /* MVE_VSTRD64_rq_u */ 8880, /* MVE_VSTRH16_rq */ 8886, /* MVE_VSTRH16_rq_u */ 8892, /* MVE_VSTRH32 */ 8898, /* MVE_VSTRH32_post */ 8904, /* MVE_VSTRH32_pre */ 8911, /* MVE_VSTRH32_rq */ 8918, /* MVE_VSTRH32_rq_u */ 8924, /* MVE_VSTRHU16 */ 8930, /* MVE_VSTRHU16_post */ 8936, /* MVE_VSTRHU16_pre */ 8943, /* MVE_VSTRW32_qi */ 8950, /* MVE_VSTRW32_qi_pre */ 8956, /* MVE_VSTRW32_rq */ 8963, /* MVE_VSTRW32_rq_u */ 8969, /* MVE_VSTRWU32 */ 8975, /* MVE_VSTRWU32_post */ 8981, /* MVE_VSTRWU32_pre */ 8988, /* MVE_VSUB_qr_f16 */ 8995, /* MVE_VSUB_qr_f32 */ 9002, /* MVE_VSUB_qr_i16 */ 9009, /* MVE_VSUB_qr_i32 */ 9016, /* MVE_VSUB_qr_i8 */ 9023, /* MVE_VSUBf16 */ 9030, /* MVE_VSUBf32 */ 9037, /* MVE_VSUBi16 */ 9044, /* MVE_VSUBi32 */ 9051, /* MVE_VSUBi8 */ 9058, /* MVE_WLSTP_16 */ 9065, /* MVE_WLSTP_32 */ 9068, /* MVE_WLSTP_64 */ 9071, /* MVE_WLSTP_8 */ 9074, /* MVNi */ 9077, /* MVNr */ 9082, /* MVNsi */ 9087, /* MVNsr */ 9093, /* NEON_VMAXNMNDf */ 9100, /* NEON_VMAXNMNDh */ 9103, /* NEON_VMAXNMNQf */ 9106, /* NEON_VMAXNMNQh */ 9109, /* NEON_VMINNMNDf */ 9112, /* NEON_VMINNMNDh */ 9115, /* NEON_VMINNMNQf */ 9118, /* NEON_VMINNMNQh */ 9121, /* ORRri */ 9124, /* ORRrr */ 9130, /* ORRrsi */ 9136, /* ORRrsr */ 9143, /* PKHBT */ 9151, /* PKHTB */ 9157, /* PLDWi12 */ 9163, /* PLDWrs */ 9165, /* PLDi12 */ 9168, /* PLDrs */ 9170, /* PLIi12 */ 9173, /* PLIrs */ 9175, /* QADD */ 9178, /* QADD16 */ 9183, /* QADD8 */ 9188, /* QASX */ 9193, /* QDADD */ 9198, /* QDSUB */ 9203, /* QSAX */ 9208, /* QSUB */ 9213, /* QSUB16 */ 9218, /* QSUB8 */ 9223, /* RBIT */ 9228, /* REV */ 9232, /* REV16 */ 9236, /* REVSH */ 9240, /* RFEDA */ 9244, /* RFEDA_UPD */ 9245, /* RFEDB */ 9246, /* RFEDB_UPD */ 9247, /* RFEIA */ 9248, /* RFEIA_UPD */ 9249, /* RFEIB */ 9250, /* RFEIB_UPD */ 9251, /* RSBri */ 9252, /* RSBrr */ 9258, /* RSBrsi */ 9264, /* RSBrsr */ 9271, /* RSCri */ 9279, /* RSCrr */ 9285, /* RSCrsi */ 9291, /* RSCrsr */ 9298, /* SADD16 */ 9306, /* SADD8 */ 9311, /* SASX */ 9316, /* SB */ 9321, /* SBCri */ 9321, /* SBCrr */ 9327, /* SBCrsi */ 9333, /* SBCrsr */ 9340, /* SBFX */ 9348, /* SDIV */ 9354, /* SEL */ 9359, /* SETEND */ 9364, /* SETPAN */ 9365, /* SHA1C */ 9366, /* SHA1H */ 9370, /* SHA1M */ 9372, /* SHA1P */ 9376, /* SHA1SU0 */ 9380, /* SHA1SU1 */ 9384, /* SHA256H */ 9387, /* SHA256H2 */ 9391, /* SHA256SU0 */ 9395, /* SHA256SU1 */ 9398, /* SHADD16 */ 9402, /* SHADD8 */ 9407, /* SHASX */ 9412, /* SHSAX */ 9417, /* SHSUB16 */ 9422, /* SHSUB8 */ 9427, /* SMC */ 9432, /* SMLABB */ 9435, /* SMLABT */ 9441, /* SMLAD */ 9447, /* SMLADX */ 9453, /* SMLAL */ 9459, /* SMLALBB */ 9468, /* SMLALBT */ 9476, /* SMLALD */ 9484, /* SMLALDX */ 9492, /* SMLALTB */ 9500, /* SMLALTT */ 9508, /* SMLATB */ 9516, /* SMLATT */ 9522, /* SMLAWB */ 9528, /* SMLAWT */ 9534, /* SMLSD */ 9540, /* SMLSDX */ 9546, /* SMLSLD */ 9552, /* SMLSLDX */ 9560, /* SMMLA */ 9568, /* SMMLAR */ 9574, /* SMMLS */ 9580, /* SMMLSR */ 9586, /* SMMUL */ 9592, /* SMMULR */ 9597, /* SMUAD */ 9602, /* SMUADX */ 9607, /* SMULBB */ 9612, /* SMULBT */ 9617, /* SMULL */ 9622, /* SMULTB */ 9629, /* SMULTT */ 9634, /* SMULWB */ 9639, /* SMULWT */ 9644, /* SMUSD */ 9649, /* SMUSDX */ 9654, /* SRSDA */ 9659, /* SRSDA_UPD */ 9660, /* SRSDB */ 9661, /* SRSDB_UPD */ 9662, /* SRSIA */ 9663, /* SRSIA_UPD */ 9664, /* SRSIB */ 9665, /* SRSIB_UPD */ 9666, /* SSAT */ 9667, /* SSAT16 */ 9673, /* SSAX */ 9678, /* SSUB16 */ 9683, /* SSUB8 */ 9688, /* STC2L_OFFSET */ 9693, /* STC2L_OPTION */ 9697, /* STC2L_POST */ 9701, /* STC2L_PRE */ 9705, /* STC2_OFFSET */ 9709, /* STC2_OPTION */ 9713, /* STC2_POST */ 9717, /* STC2_PRE */ 9721, /* STCL_OFFSET */ 9725, /* STCL_OPTION */ 9731, /* STCL_POST */ 9737, /* STCL_PRE */ 9743, /* STC_OFFSET */ 9749, /* STC_OPTION */ 9755, /* STC_POST */ 9761, /* STC_PRE */ 9767, /* STL */ 9773, /* STLB */ 9777, /* STLEX */ 9781, /* STLEXB */ 9786, /* STLEXD */ 9791, /* STLEXH */ 9796, /* STLH */ 9801, /* STMDA */ 9805, /* STMDA_UPD */ 9809, /* STMDB */ 9814, /* STMDB_UPD */ 9818, /* STMIA */ 9823, /* STMIA_UPD */ 9827, /* STMIB */ 9832, /* STMIB_UPD */ 9836, /* STRBT_POST_IMM */ 9841, /* STRBT_POST_REG */ 9848, /* STRB_POST_IMM */ 9855, /* STRB_POST_REG */ 9862, /* STRB_PRE_IMM */ 9869, /* STRB_PRE_REG */ 9875, /* STRBi12 */ 9882, /* STRBrs */ 9887, /* STRD */ 9893, /* STRD_POST */ 9900, /* STRD_PRE */ 9908, /* STREX */ 9916, /* STREXB */ 9921, /* STREXD */ 9926, /* STREXH */ 9931, /* STRH */ 9936, /* STRHTi */ 9942, /* STRHTr */ 9948, /* STRH_POST */ 9955, /* STRH_PRE */ 9962, /* STRT_POST_IMM */ 9969, /* STRT_POST_REG */ 9976, /* STR_POST_IMM */ 9983, /* STR_POST_REG */ 9990, /* STR_PRE_IMM */ 9997, /* STR_PRE_REG */ 10003, /* STRi12 */ 10010, /* STRrs */ 10015, /* SUBri */ 10021, /* SUBrr */ 10027, /* SUBrsi */ 10033, /* SUBrsr */ 10040, /* SVC */ 10048, /* SWP */ 10051, /* SWPB */ 10056, /* SXTAB */ 10061, /* SXTAB16 */ 10067, /* SXTAH */ 10073, /* SXTB */ 10079, /* SXTB16 */ 10084, /* SXTH */ 10089, /* TEQri */ 10094, /* TEQrr */ 10098, /* TEQrsi */ 10102, /* TEQrsr */ 10107, /* TRAP */ 10113, /* TRAPNaCl */ 10113, /* TSB */ 10113, /* TSTri */ 10114, /* TSTrr */ 10118, /* TSTrsi */ 10122, /* TSTrsr */ 10127, /* UADD16 */ 10133, /* UADD8 */ 10138, /* UASX */ 10143, /* UBFX */ 10148, /* UDF */ 10154, /* UDIV */ 10155, /* UHADD16 */ 10160, /* UHADD8 */ 10165, /* UHASX */ 10170, /* UHSAX */ 10175, /* UHSUB16 */ 10180, /* UHSUB8 */ 10185, /* UMAAL */ 10190, /* UMLAL */ 10198, /* UMULL */ 10207, /* UQADD16 */ 10214, /* UQADD8 */ 10219, /* UQASX */ 10224, /* UQSAX */ 10229, /* UQSUB16 */ 10234, /* UQSUB8 */ 10239, /* USAD8 */ 10244, /* USADA8 */ 10249, /* USAT */ 10255, /* USAT16 */ 10261, /* USAX */ 10266, /* USUB16 */ 10271, /* USUB8 */ 10276, /* UXTAB */ 10281, /* UXTAB16 */ 10287, /* UXTAH */ 10293, /* UXTB */ 10299, /* UXTB16 */ 10304, /* UXTH */ 10309, /* VABALsv2i64 */ 10314, /* VABALsv4i32 */ 10320, /* VABALsv8i16 */ 10326, /* VABALuv2i64 */ 10332, /* VABALuv4i32 */ 10338, /* VABALuv8i16 */ 10344, /* VABAsv16i8 */ 10350, /* VABAsv2i32 */ 10356, /* VABAsv4i16 */ 10362, /* VABAsv4i32 */ 10368, /* VABAsv8i16 */ 10374, /* VABAsv8i8 */ 10380, /* VABAuv16i8 */ 10386, /* VABAuv2i32 */ 10392, /* VABAuv4i16 */ 10398, /* VABAuv4i32 */ 10404, /* VABAuv8i16 */ 10410, /* VABAuv8i8 */ 10416, /* VABDLsv2i64 */ 10422, /* VABDLsv4i32 */ 10427, /* VABDLsv8i16 */ 10432, /* VABDLuv2i64 */ 10437, /* VABDLuv4i32 */ 10442, /* VABDLuv8i16 */ 10447, /* VABDfd */ 10452, /* VABDfq */ 10457, /* VABDhd */ 10462, /* VABDhq */ 10467, /* VABDsv16i8 */ 10472, /* VABDsv2i32 */ 10477, /* VABDsv4i16 */ 10482, /* VABDsv4i32 */ 10487, /* VABDsv8i16 */ 10492, /* VABDsv8i8 */ 10497, /* VABDuv16i8 */ 10502, /* VABDuv2i32 */ 10507, /* VABDuv4i16 */ 10512, /* VABDuv4i32 */ 10517, /* VABDuv8i16 */ 10522, /* VABDuv8i8 */ 10527, /* VABSD */ 10532, /* VABSH */ 10536, /* VABSS */ 10540, /* VABSfd */ 10544, /* VABSfq */ 10548, /* VABShd */ 10552, /* VABShq */ 10556, /* VABSv16i8 */ 10560, /* VABSv2i32 */ 10564, /* VABSv4i16 */ 10568, /* VABSv4i32 */ 10572, /* VABSv8i16 */ 10576, /* VABSv8i8 */ 10580, /* VACGEfd */ 10584, /* VACGEfq */ 10589, /* VACGEhd */ 10594, /* VACGEhq */ 10599, /* VACGTfd */ 10604, /* VACGTfq */ 10609, /* VACGThd */ 10614, /* VACGThq */ 10619, /* VADDD */ 10624, /* VADDH */ 10629, /* VADDHNv2i32 */ 10634, /* VADDHNv4i16 */ 10639, /* VADDHNv8i8 */ 10644, /* VADDLsv2i64 */ 10649, /* VADDLsv4i32 */ 10654, /* VADDLsv8i16 */ 10659, /* VADDLuv2i64 */ 10664, /* VADDLuv4i32 */ 10669, /* VADDLuv8i16 */ 10674, /* VADDS */ 10679, /* VADDWsv2i64 */ 10684, /* VADDWsv4i32 */ 10689, /* VADDWsv8i16 */ 10694, /* VADDWuv2i64 */ 10699, /* VADDWuv4i32 */ 10704, /* VADDWuv8i16 */ 10709, /* VADDfd */ 10714, /* VADDfq */ 10719, /* VADDhd */ 10724, /* VADDhq */ 10729, /* VADDv16i8 */ 10734, /* VADDv1i64 */ 10739, /* VADDv2i32 */ 10744, /* VADDv2i64 */ 10749, /* VADDv4i16 */ 10754, /* VADDv4i32 */ 10759, /* VADDv8i16 */ 10764, /* VADDv8i8 */ 10769, /* VANDd */ 10774, /* VANDq */ 10779, /* VBF16MALBQ */ 10784, /* VBF16MALBQI */ 10788, /* VBF16MALTQ */ 10793, /* VBF16MALTQI */ 10797, /* VBICd */ 10802, /* VBICiv2i32 */ 10807, /* VBICiv4i16 */ 10812, /* VBICiv4i32 */ 10817, /* VBICiv8i16 */ 10822, /* VBICq */ 10827, /* VBIFd */ 10832, /* VBIFq */ 10838, /* VBITd */ 10844, /* VBITq */ 10850, /* VBSLd */ 10856, /* VBSLq */ 10862, /* VBSPd */ 10868, /* VBSPq */ 10874, /* VCADDv2f32 */ 10880, /* VCADDv4f16 */ 10884, /* VCADDv4f32 */ 10888, /* VCADDv8f16 */ 10892, /* VCEQfd */ 10896, /* VCEQfq */ 10901, /* VCEQhd */ 10906, /* VCEQhq */ 10911, /* VCEQv16i8 */ 10916, /* VCEQv2i32 */ 10921, /* VCEQv4i16 */ 10926, /* VCEQv4i32 */ 10931, /* VCEQv8i16 */ 10936, /* VCEQv8i8 */ 10941, /* VCEQzv16i8 */ 10946, /* VCEQzv2f32 */ 10950, /* VCEQzv2i32 */ 10954, /* VCEQzv4f16 */ 10958, /* VCEQzv4f32 */ 10962, /* VCEQzv4i16 */ 10966, /* VCEQzv4i32 */ 10970, /* VCEQzv8f16 */ 10974, /* VCEQzv8i16 */ 10978, /* VCEQzv8i8 */ 10982, /* VCGEfd */ 10986, /* VCGEfq */ 10991, /* VCGEhd */ 10996, /* VCGEhq */ 11001, /* VCGEsv16i8 */ 11006, /* VCGEsv2i32 */ 11011, /* VCGEsv4i16 */ 11016, /* VCGEsv4i32 */ 11021, /* VCGEsv8i16 */ 11026, /* VCGEsv8i8 */ 11031, /* VCGEuv16i8 */ 11036, /* VCGEuv2i32 */ 11041, /* VCGEuv4i16 */ 11046, /* VCGEuv4i32 */ 11051, /* VCGEuv8i16 */ 11056, /* VCGEuv8i8 */ 11061, /* VCGEzv16i8 */ 11066, /* VCGEzv2f32 */ 11070, /* VCGEzv2i32 */ 11074, /* VCGEzv4f16 */ 11078, /* VCGEzv4f32 */ 11082, /* VCGEzv4i16 */ 11086, /* VCGEzv4i32 */ 11090, /* VCGEzv8f16 */ 11094, /* VCGEzv8i16 */ 11098, /* VCGEzv8i8 */ 11102, /* VCGTfd */ 11106, /* VCGTfq */ 11111, /* VCGThd */ 11116, /* VCGThq */ 11121, /* VCGTsv16i8 */ 11126, /* VCGTsv2i32 */ 11131, /* VCGTsv4i16 */ 11136, /* VCGTsv4i32 */ 11141, /* VCGTsv8i16 */ 11146, /* VCGTsv8i8 */ 11151, /* VCGTuv16i8 */ 11156, /* VCGTuv2i32 */ 11161, /* VCGTuv4i16 */ 11166, /* VCGTuv4i32 */ 11171, /* VCGTuv8i16 */ 11176, /* VCGTuv8i8 */ 11181, /* VCGTzv16i8 */ 11186, /* VCGTzv2f32 */ 11190, /* VCGTzv2i32 */ 11194, /* VCGTzv4f16 */ 11198, /* VCGTzv4f32 */ 11202, /* VCGTzv4i16 */ 11206, /* VCGTzv4i32 */ 11210, /* VCGTzv8f16 */ 11214, /* VCGTzv8i16 */ 11218, /* VCGTzv8i8 */ 11222, /* VCLEzv16i8 */ 11226, /* VCLEzv2f32 */ 11230, /* VCLEzv2i32 */ 11234, /* VCLEzv4f16 */ 11238, /* VCLEzv4f32 */ 11242, /* VCLEzv4i16 */ 11246, /* VCLEzv4i32 */ 11250, /* VCLEzv8f16 */ 11254, /* VCLEzv8i16 */ 11258, /* VCLEzv8i8 */ 11262, /* VCLSv16i8 */ 11266, /* VCLSv2i32 */ 11270, /* VCLSv4i16 */ 11274, /* VCLSv4i32 */ 11278, /* VCLSv8i16 */ 11282, /* VCLSv8i8 */ 11286, /* VCLTzv16i8 */ 11290, /* VCLTzv2f32 */ 11294, /* VCLTzv2i32 */ 11298, /* VCLTzv4f16 */ 11302, /* VCLTzv4f32 */ 11306, /* VCLTzv4i16 */ 11310, /* VCLTzv4i32 */ 11314, /* VCLTzv8f16 */ 11318, /* VCLTzv8i16 */ 11322, /* VCLTzv8i8 */ 11326, /* VCLZv16i8 */ 11330, /* VCLZv2i32 */ 11334, /* VCLZv4i16 */ 11338, /* VCLZv4i32 */ 11342, /* VCLZv8i16 */ 11346, /* VCLZv8i8 */ 11350, /* VCMLAv2f32 */ 11354, /* VCMLAv2f32_indexed */ 11359, /* VCMLAv4f16 */ 11365, /* VCMLAv4f16_indexed */ 11370, /* VCMLAv4f32 */ 11376, /* VCMLAv4f32_indexed */ 11381, /* VCMLAv8f16 */ 11387, /* VCMLAv8f16_indexed */ 11392, /* VCMPD */ 11398, /* VCMPED */ 11402, /* VCMPEH */ 11406, /* VCMPES */ 11410, /* VCMPEZD */ 11414, /* VCMPEZH */ 11417, /* VCMPEZS */ 11420, /* VCMPH */ 11423, /* VCMPS */ 11427, /* VCMPZD */ 11431, /* VCMPZH */ 11434, /* VCMPZS */ 11437, /* VCNTd */ 11440, /* VCNTq */ 11444, /* VCVTANSDf */ 11448, /* VCVTANSDh */ 11450, /* VCVTANSQf */ 11452, /* VCVTANSQh */ 11454, /* VCVTANUDf */ 11456, /* VCVTANUDh */ 11458, /* VCVTANUQf */ 11460, /* VCVTANUQh */ 11462, /* VCVTASD */ 11464, /* VCVTASH */ 11466, /* VCVTASS */ 11468, /* VCVTAUD */ 11470, /* VCVTAUH */ 11472, /* VCVTAUS */ 11474, /* VCVTBDH */ 11476, /* VCVTBHD */ 11481, /* VCVTBHS */ 11485, /* VCVTBSH */ 11489, /* VCVTDS */ 11494, /* VCVTMNSDf */ 11498, /* VCVTMNSDh */ 11500, /* VCVTMNSQf */ 11502, /* VCVTMNSQh */ 11504, /* VCVTMNUDf */ 11506, /* VCVTMNUDh */ 11508, /* VCVTMNUQf */ 11510, /* VCVTMNUQh */ 11512, /* VCVTMSD */ 11514, /* VCVTMSH */ 11516, /* VCVTMSS */ 11518, /* VCVTMUD */ 11520, /* VCVTMUH */ 11522, /* VCVTMUS */ 11524, /* VCVTNNSDf */ 11526, /* VCVTNNSDh */ 11528, /* VCVTNNSQf */ 11530, /* VCVTNNSQh */ 11532, /* VCVTNNUDf */ 11534, /* VCVTNNUDh */ 11536, /* VCVTNNUQf */ 11538, /* VCVTNNUQh */ 11540, /* VCVTNSD */ 11542, /* VCVTNSH */ 11544, /* VCVTNSS */ 11546, /* VCVTNUD */ 11548, /* VCVTNUH */ 11550, /* VCVTNUS */ 11552, /* VCVTPNSDf */ 11554, /* VCVTPNSDh */ 11556, /* VCVTPNSQf */ 11558, /* VCVTPNSQh */ 11560, /* VCVTPNUDf */ 11562, /* VCVTPNUDh */ 11564, /* VCVTPNUQf */ 11566, /* VCVTPNUQh */ 11568, /* VCVTPSD */ 11570, /* VCVTPSH */ 11572, /* VCVTPSS */ 11574, /* VCVTPUD */ 11576, /* VCVTPUH */ 11578, /* VCVTPUS */ 11580, /* VCVTSD */ 11582, /* VCVTTDH */ 11586, /* VCVTTHD */ 11591, /* VCVTTHS */ 11595, /* VCVTTSH */ 11599, /* VCVTf2h */ 11604, /* VCVTf2sd */ 11608, /* VCVTf2sq */ 11612, /* VCVTf2ud */ 11616, /* VCVTf2uq */ 11620, /* VCVTf2xsd */ 11624, /* VCVTf2xsq */ 11629, /* VCVTf2xud */ 11634, /* VCVTf2xuq */ 11639, /* VCVTh2f */ 11644, /* VCVTh2sd */ 11648, /* VCVTh2sq */ 11652, /* VCVTh2ud */ 11656, /* VCVTh2uq */ 11660, /* VCVTh2xsd */ 11664, /* VCVTh2xsq */ 11669, /* VCVTh2xud */ 11674, /* VCVTh2xuq */ 11679, /* VCVTs2fd */ 11684, /* VCVTs2fq */ 11688, /* VCVTs2hd */ 11692, /* VCVTs2hq */ 11696, /* VCVTu2fd */ 11700, /* VCVTu2fq */ 11704, /* VCVTu2hd */ 11708, /* VCVTu2hq */ 11712, /* VCVTxs2fd */ 11716, /* VCVTxs2fq */ 11721, /* VCVTxs2hd */ 11726, /* VCVTxs2hq */ 11731, /* VCVTxu2fd */ 11736, /* VCVTxu2fq */ 11741, /* VCVTxu2hd */ 11746, /* VCVTxu2hq */ 11751, /* VDIVD */ 11756, /* VDIVH */ 11761, /* VDIVS */ 11766, /* VDUP16d */ 11771, /* VDUP16q */ 11775, /* VDUP32d */ 11779, /* VDUP32q */ 11783, /* VDUP8d */ 11787, /* VDUP8q */ 11791, /* VDUPLN16d */ 11795, /* VDUPLN16q */ 11800, /* VDUPLN32d */ 11805, /* VDUPLN32q */ 11810, /* VDUPLN8d */ 11815, /* VDUPLN8q */ 11820, /* VEORd */ 11825, /* VEORq */ 11830, /* VEXTd16 */ 11835, /* VEXTd32 */ 11841, /* VEXTd8 */ 11847, /* VEXTq16 */ 11853, /* VEXTq32 */ 11859, /* VEXTq64 */ 11865, /* VEXTq8 */ 11871, /* VFMAD */ 11877, /* VFMAH */ 11883, /* VFMALD */ 11889, /* VFMALDI */ 11892, /* VFMALQ */ 11896, /* VFMALQI */ 11899, /* VFMAS */ 11903, /* VFMAfd */ 11909, /* VFMAfq */ 11915, /* VFMAhd */ 11921, /* VFMAhq */ 11927, /* VFMSD */ 11933, /* VFMSH */ 11939, /* VFMSLD */ 11945, /* VFMSLDI */ 11948, /* VFMSLQ */ 11952, /* VFMSLQI */ 11955, /* VFMSS */ 11959, /* VFMSfd */ 11965, /* VFMSfq */ 11971, /* VFMShd */ 11977, /* VFMShq */ 11983, /* VFNMAD */ 11989, /* VFNMAH */ 11995, /* VFNMAS */ 12001, /* VFNMSD */ 12007, /* VFNMSH */ 12013, /* VFNMSS */ 12019, /* VFP_VMAXNMD */ 12025, /* VFP_VMAXNMH */ 12028, /* VFP_VMAXNMS */ 12031, /* VFP_VMINNMD */ 12034, /* VFP_VMINNMH */ 12037, /* VFP_VMINNMS */ 12040, /* VGETLNi32 */ 12043, /* VGETLNs16 */ 12048, /* VGETLNs8 */ 12053, /* VGETLNu16 */ 12058, /* VGETLNu8 */ 12063, /* VHADDsv16i8 */ 12068, /* VHADDsv2i32 */ 12073, /* VHADDsv4i16 */ 12078, /* VHADDsv4i32 */ 12083, /* VHADDsv8i16 */ 12088, /* VHADDsv8i8 */ 12093, /* VHADDuv16i8 */ 12098, /* VHADDuv2i32 */ 12103, /* VHADDuv4i16 */ 12108, /* VHADDuv4i32 */ 12113, /* VHADDuv8i16 */ 12118, /* VHADDuv8i8 */ 12123, /* VHSUBsv16i8 */ 12128, /* VHSUBsv2i32 */ 12133, /* VHSUBsv4i16 */ 12138, /* VHSUBsv4i32 */ 12143, /* VHSUBsv8i16 */ 12148, /* VHSUBsv8i8 */ 12153, /* VHSUBuv16i8 */ 12158, /* VHSUBuv2i32 */ 12163, /* VHSUBuv4i16 */ 12168, /* VHSUBuv4i32 */ 12173, /* VHSUBuv8i16 */ 12178, /* VHSUBuv8i8 */ 12183, /* VINSH */ 12188, /* VJCVT */ 12191, /* VLD1DUPd16 */ 12195, /* VLD1DUPd16wb_fixed */ 12200, /* VLD1DUPd16wb_register */ 12206, /* VLD1DUPd32 */ 12213, /* VLD1DUPd32wb_fixed */ 12218, /* VLD1DUPd32wb_register */ 12224, /* VLD1DUPd8 */ 12231, /* VLD1DUPd8wb_fixed */ 12236, /* VLD1DUPd8wb_register */ 12242, /* VLD1DUPq16 */ 12249, /* VLD1DUPq16wb_fixed */ 12254, /* VLD1DUPq16wb_register */ 12260, /* VLD1DUPq32 */ 12267, /* VLD1DUPq32wb_fixed */ 12272, /* VLD1DUPq32wb_register */ 12278, /* VLD1DUPq8 */ 12285, /* VLD1DUPq8wb_fixed */ 12290, /* VLD1DUPq8wb_register */ 12296, /* VLD1LNd16 */ 12303, /* VLD1LNd16_UPD */ 12310, /* VLD1LNd32 */ 12319, /* VLD1LNd32_UPD */ 12326, /* VLD1LNd8 */ 12335, /* VLD1LNd8_UPD */ 12342, /* VLD1LNq16Pseudo */ 12351, /* VLD1LNq16Pseudo_UPD */ 12358, /* VLD1LNq32Pseudo */ 12367, /* VLD1LNq32Pseudo_UPD */ 12374, /* VLD1LNq8Pseudo */ 12383, /* VLD1LNq8Pseudo_UPD */ 12390, /* VLD1d16 */ 12399, /* VLD1d16Q */ 12404, /* VLD1d16QPseudo */ 12409, /* VLD1d16QPseudoWB_fixed */ 12414, /* VLD1d16QPseudoWB_register */ 12420, /* VLD1d16Qwb_fixed */ 12427, /* VLD1d16Qwb_register */ 12433, /* VLD1d16T */ 12440, /* VLD1d16TPseudo */ 12445, /* VLD1d16TPseudoWB_fixed */ 12450, /* VLD1d16TPseudoWB_register */ 12456, /* VLD1d16Twb_fixed */ 12463, /* VLD1d16Twb_register */ 12469, /* VLD1d16wb_fixed */ 12476, /* VLD1d16wb_register */ 12482, /* VLD1d32 */ 12489, /* VLD1d32Q */ 12494, /* VLD1d32QPseudo */ 12499, /* VLD1d32QPseudoWB_fixed */ 12504, /* VLD1d32QPseudoWB_register */ 12510, /* VLD1d32Qwb_fixed */ 12517, /* VLD1d32Qwb_register */ 12523, /* VLD1d32T */ 12530, /* VLD1d32TPseudo */ 12535, /* VLD1d32TPseudoWB_fixed */ 12540, /* VLD1d32TPseudoWB_register */ 12546, /* VLD1d32Twb_fixed */ 12553, /* VLD1d32Twb_register */ 12559, /* VLD1d32wb_fixed */ 12566, /* VLD1d32wb_register */ 12572, /* VLD1d64 */ 12579, /* VLD1d64Q */ 12584, /* VLD1d64QPseudo */ 12589, /* VLD1d64QPseudoWB_fixed */ 12594, /* VLD1d64QPseudoWB_register */ 12600, /* VLD1d64Qwb_fixed */ 12607, /* VLD1d64Qwb_register */ 12613, /* VLD1d64T */ 12620, /* VLD1d64TPseudo */ 12625, /* VLD1d64TPseudoWB_fixed */ 12630, /* VLD1d64TPseudoWB_register */ 12636, /* VLD1d64Twb_fixed */ 12643, /* VLD1d64Twb_register */ 12649, /* VLD1d64wb_fixed */ 12656, /* VLD1d64wb_register */ 12662, /* VLD1d8 */ 12669, /* VLD1d8Q */ 12674, /* VLD1d8QPseudo */ 12679, /* VLD1d8QPseudoWB_fixed */ 12684, /* VLD1d8QPseudoWB_register */ 12690, /* VLD1d8Qwb_fixed */ 12697, /* VLD1d8Qwb_register */ 12703, /* VLD1d8T */ 12710, /* VLD1d8TPseudo */ 12715, /* VLD1d8TPseudoWB_fixed */ 12720, /* VLD1d8TPseudoWB_register */ 12726, /* VLD1d8Twb_fixed */ 12733, /* VLD1d8Twb_register */ 12739, /* VLD1d8wb_fixed */ 12746, /* VLD1d8wb_register */ 12752, /* VLD1q16 */ 12759, /* VLD1q16HighQPseudo */ 12764, /* VLD1q16HighQPseudo_UPD */ 12770, /* VLD1q16HighTPseudo */ 12778, /* VLD1q16HighTPseudo_UPD */ 12784, /* VLD1q16LowQPseudo_UPD */ 12792, /* VLD1q16LowTPseudo_UPD */ 12800, /* VLD1q16wb_fixed */ 12808, /* VLD1q16wb_register */ 12814, /* VLD1q32 */ 12821, /* VLD1q32HighQPseudo */ 12826, /* VLD1q32HighQPseudo_UPD */ 12832, /* VLD1q32HighTPseudo */ 12840, /* VLD1q32HighTPseudo_UPD */ 12846, /* VLD1q32LowQPseudo_UPD */ 12854, /* VLD1q32LowTPseudo_UPD */ 12862, /* VLD1q32wb_fixed */ 12870, /* VLD1q32wb_register */ 12876, /* VLD1q64 */ 12883, /* VLD1q64HighQPseudo */ 12888, /* VLD1q64HighQPseudo_UPD */ 12894, /* VLD1q64HighTPseudo */ 12902, /* VLD1q64HighTPseudo_UPD */ 12908, /* VLD1q64LowQPseudo_UPD */ 12916, /* VLD1q64LowTPseudo_UPD */ 12924, /* VLD1q64wb_fixed */ 12932, /* VLD1q64wb_register */ 12938, /* VLD1q8 */ 12945, /* VLD1q8HighQPseudo */ 12950, /* VLD1q8HighQPseudo_UPD */ 12956, /* VLD1q8HighTPseudo */ 12964, /* VLD1q8HighTPseudo_UPD */ 12970, /* VLD1q8LowQPseudo_UPD */ 12978, /* VLD1q8LowTPseudo_UPD */ 12986, /* VLD1q8wb_fixed */ 12994, /* VLD1q8wb_register */ 13000, /* VLD2DUPd16 */ 13007, /* VLD2DUPd16wb_fixed */ 13012, /* VLD2DUPd16wb_register */ 13018, /* VLD2DUPd16x2 */ 13025, /* VLD2DUPd16x2wb_fixed */ 13030, /* VLD2DUPd16x2wb_register */ 13036, /* VLD2DUPd32 */ 13043, /* VLD2DUPd32wb_fixed */ 13048, /* VLD2DUPd32wb_register */ 13054, /* VLD2DUPd32x2 */ 13061, /* VLD2DUPd32x2wb_fixed */ 13066, /* VLD2DUPd32x2wb_register */ 13072, /* VLD2DUPd8 */ 13079, /* VLD2DUPd8wb_fixed */ 13084, /* VLD2DUPd8wb_register */ 13090, /* VLD2DUPd8x2 */ 13097, /* VLD2DUPd8x2wb_fixed */ 13102, /* VLD2DUPd8x2wb_register */ 13108, /* VLD2DUPq16EvenPseudo */ 13115, /* VLD2DUPq16OddPseudo */ 13120, /* VLD2DUPq16OddPseudoWB_fixed */ 13125, /* VLD2DUPq16OddPseudoWB_register */ 13131, /* VLD2DUPq32EvenPseudo */ 13138, /* VLD2DUPq32OddPseudo */ 13143, /* VLD2DUPq32OddPseudoWB_fixed */ 13148, /* VLD2DUPq32OddPseudoWB_register */ 13154, /* VLD2DUPq8EvenPseudo */ 13161, /* VLD2DUPq8OddPseudo */ 13166, /* VLD2DUPq8OddPseudoWB_fixed */ 13171, /* VLD2DUPq8OddPseudoWB_register */ 13177, /* VLD2LNd16 */ 13184, /* VLD2LNd16Pseudo */ 13193, /* VLD2LNd16Pseudo_UPD */ 13200, /* VLD2LNd16_UPD */ 13209, /* VLD2LNd32 */ 13220, /* VLD2LNd32Pseudo */ 13229, /* VLD2LNd32Pseudo_UPD */ 13236, /* VLD2LNd32_UPD */ 13245, /* VLD2LNd8 */ 13256, /* VLD2LNd8Pseudo */ 13265, /* VLD2LNd8Pseudo_UPD */ 13272, /* VLD2LNd8_UPD */ 13281, /* VLD2LNq16 */ 13292, /* VLD2LNq16Pseudo */ 13301, /* VLD2LNq16Pseudo_UPD */ 13308, /* VLD2LNq16_UPD */ 13317, /* VLD2LNq32 */ 13328, /* VLD2LNq32Pseudo */ 13337, /* VLD2LNq32Pseudo_UPD */ 13344, /* VLD2LNq32_UPD */ 13353, /* VLD2b16 */ 13364, /* VLD2b16wb_fixed */ 13369, /* VLD2b16wb_register */ 13375, /* VLD2b32 */ 13382, /* VLD2b32wb_fixed */ 13387, /* VLD2b32wb_register */ 13393, /* VLD2b8 */ 13400, /* VLD2b8wb_fixed */ 13405, /* VLD2b8wb_register */ 13411, /* VLD2d16 */ 13418, /* VLD2d16wb_fixed */ 13423, /* VLD2d16wb_register */ 13429, /* VLD2d32 */ 13436, /* VLD2d32wb_fixed */ 13441, /* VLD2d32wb_register */ 13447, /* VLD2d8 */ 13454, /* VLD2d8wb_fixed */ 13459, /* VLD2d8wb_register */ 13465, /* VLD2q16 */ 13472, /* VLD2q16Pseudo */ 13477, /* VLD2q16PseudoWB_fixed */ 13482, /* VLD2q16PseudoWB_register */ 13488, /* VLD2q16wb_fixed */ 13495, /* VLD2q16wb_register */ 13501, /* VLD2q32 */ 13508, /* VLD2q32Pseudo */ 13513, /* VLD2q32PseudoWB_fixed */ 13518, /* VLD2q32PseudoWB_register */ 13524, /* VLD2q32wb_fixed */ 13531, /* VLD2q32wb_register */ 13537, /* VLD2q8 */ 13544, /* VLD2q8Pseudo */ 13549, /* VLD2q8PseudoWB_fixed */ 13554, /* VLD2q8PseudoWB_register */ 13560, /* VLD2q8wb_fixed */ 13567, /* VLD2q8wb_register */ 13573, /* VLD3DUPd16 */ 13580, /* VLD3DUPd16Pseudo */ 13587, /* VLD3DUPd16Pseudo_UPD */ 13592, /* VLD3DUPd16_UPD */ 13599, /* VLD3DUPd32 */ 13608, /* VLD3DUPd32Pseudo */ 13615, /* VLD3DUPd32Pseudo_UPD */ 13620, /* VLD3DUPd32_UPD */ 13627, /* VLD3DUPd8 */ 13636, /* VLD3DUPd8Pseudo */ 13643, /* VLD3DUPd8Pseudo_UPD */ 13648, /* VLD3DUPd8_UPD */ 13655, /* VLD3DUPq16 */ 13664, /* VLD3DUPq16EvenPseudo */ 13671, /* VLD3DUPq16OddPseudo */ 13677, /* VLD3DUPq16OddPseudo_UPD */ 13683, /* VLD3DUPq16_UPD */ 13691, /* VLD3DUPq32 */ 13700, /* VLD3DUPq32EvenPseudo */ 13707, /* VLD3DUPq32OddPseudo */ 13713, /* VLD3DUPq32OddPseudo_UPD */ 13719, /* VLD3DUPq32_UPD */ 13727, /* VLD3DUPq8 */ 13736, /* VLD3DUPq8EvenPseudo */ 13743, /* VLD3DUPq8OddPseudo */ 13749, /* VLD3DUPq8OddPseudo_UPD */ 13755, /* VLD3DUPq8_UPD */ 13763, /* VLD3LNd16 */ 13772, /* VLD3LNd16Pseudo */ 13783, /* VLD3LNd16Pseudo_UPD */ 13790, /* VLD3LNd16_UPD */ 13799, /* VLD3LNd32 */ 13812, /* VLD3LNd32Pseudo */ 13823, /* VLD3LNd32Pseudo_UPD */ 13830, /* VLD3LNd32_UPD */ 13839, /* VLD3LNd8 */ 13852, /* VLD3LNd8Pseudo */ 13863, /* VLD3LNd8Pseudo_UPD */ 13870, /* VLD3LNd8_UPD */ 13879, /* VLD3LNq16 */ 13892, /* VLD3LNq16Pseudo */ 13903, /* VLD3LNq16Pseudo_UPD */ 13910, /* VLD3LNq16_UPD */ 13919, /* VLD3LNq32 */ 13932, /* VLD3LNq32Pseudo */ 13943, /* VLD3LNq32Pseudo_UPD */ 13950, /* VLD3LNq32_UPD */ 13959, /* VLD3d16 */ 13972, /* VLD3d16Pseudo */ 13979, /* VLD3d16Pseudo_UPD */ 13984, /* VLD3d16_UPD */ 13991, /* VLD3d32 */ 14000, /* VLD3d32Pseudo */ 14007, /* VLD3d32Pseudo_UPD */ 14012, /* VLD3d32_UPD */ 14019, /* VLD3d8 */ 14028, /* VLD3d8Pseudo */ 14035, /* VLD3d8Pseudo_UPD */ 14040, /* VLD3d8_UPD */ 14047, /* VLD3q16 */ 14056, /* VLD3q16Pseudo_UPD */ 14063, /* VLD3q16_UPD */ 14071, /* VLD3q16oddPseudo */ 14080, /* VLD3q16oddPseudo_UPD */ 14086, /* VLD3q32 */ 14094, /* VLD3q32Pseudo_UPD */ 14101, /* VLD3q32_UPD */ 14109, /* VLD3q32oddPseudo */ 14118, /* VLD3q32oddPseudo_UPD */ 14124, /* VLD3q8 */ 14132, /* VLD3q8Pseudo_UPD */ 14139, /* VLD3q8_UPD */ 14147, /* VLD3q8oddPseudo */ 14156, /* VLD3q8oddPseudo_UPD */ 14162, /* VLD4DUPd16 */ 14170, /* VLD4DUPd16Pseudo */ 14178, /* VLD4DUPd16Pseudo_UPD */ 14183, /* VLD4DUPd16_UPD */ 14190, /* VLD4DUPd32 */ 14200, /* VLD4DUPd32Pseudo */ 14208, /* VLD4DUPd32Pseudo_UPD */ 14213, /* VLD4DUPd32_UPD */ 14220, /* VLD4DUPd8 */ 14230, /* VLD4DUPd8Pseudo */ 14238, /* VLD4DUPd8Pseudo_UPD */ 14243, /* VLD4DUPd8_UPD */ 14250, /* VLD4DUPq16 */ 14260, /* VLD4DUPq16EvenPseudo */ 14268, /* VLD4DUPq16OddPseudo */ 14274, /* VLD4DUPq16OddPseudo_UPD */ 14280, /* VLD4DUPq16_UPD */ 14288, /* VLD4DUPq32 */ 14298, /* VLD4DUPq32EvenPseudo */ 14306, /* VLD4DUPq32OddPseudo */ 14312, /* VLD4DUPq32OddPseudo_UPD */ 14318, /* VLD4DUPq32_UPD */ 14326, /* VLD4DUPq8 */ 14336, /* VLD4DUPq8EvenPseudo */ 14344, /* VLD4DUPq8OddPseudo */ 14350, /* VLD4DUPq8OddPseudo_UPD */ 14356, /* VLD4DUPq8_UPD */ 14364, /* VLD4LNd16 */ 14374, /* VLD4LNd16Pseudo */ 14387, /* VLD4LNd16Pseudo_UPD */ 14394, /* VLD4LNd16_UPD */ 14403, /* VLD4LNd32 */ 14418, /* VLD4LNd32Pseudo */ 14431, /* VLD4LNd32Pseudo_UPD */ 14438, /* VLD4LNd32_UPD */ 14447, /* VLD4LNd8 */ 14462, /* VLD4LNd8Pseudo */ 14475, /* VLD4LNd8Pseudo_UPD */ 14482, /* VLD4LNd8_UPD */ 14491, /* VLD4LNq16 */ 14506, /* VLD4LNq16Pseudo */ 14519, /* VLD4LNq16Pseudo_UPD */ 14526, /* VLD4LNq16_UPD */ 14535, /* VLD4LNq32 */ 14550, /* VLD4LNq32Pseudo */ 14563, /* VLD4LNq32Pseudo_UPD */ 14570, /* VLD4LNq32_UPD */ 14579, /* VLD4d16 */ 14594, /* VLD4d16Pseudo */ 14602, /* VLD4d16Pseudo_UPD */ 14607, /* VLD4d16_UPD */ 14614, /* VLD4d32 */ 14624, /* VLD4d32Pseudo */ 14632, /* VLD4d32Pseudo_UPD */ 14637, /* VLD4d32_UPD */ 14644, /* VLD4d8 */ 14654, /* VLD4d8Pseudo */ 14662, /* VLD4d8Pseudo_UPD */ 14667, /* VLD4d8_UPD */ 14674, /* VLD4q16 */ 14684, /* VLD4q16Pseudo_UPD */ 14692, /* VLD4q16_UPD */ 14700, /* VLD4q16oddPseudo */ 14710, /* VLD4q16oddPseudo_UPD */ 14716, /* VLD4q32 */ 14724, /* VLD4q32Pseudo_UPD */ 14732, /* VLD4q32_UPD */ 14740, /* VLD4q32oddPseudo */ 14750, /* VLD4q32oddPseudo_UPD */ 14756, /* VLD4q8 */ 14764, /* VLD4q8Pseudo_UPD */ 14772, /* VLD4q8_UPD */ 14780, /* VLD4q8oddPseudo */ 14790, /* VLD4q8oddPseudo_UPD */ 14796, /* VLDMDDB_UPD */ 14804, /* VLDMDIA */ 14809, /* VLDMDIA_UPD */ 14813, /* VLDMQIA */ 14818, /* VLDMSDB_UPD */ 14822, /* VLDMSIA */ 14827, /* VLDMSIA_UPD */ 14831, /* VLDRD */ 14836, /* VLDRH */ 14841, /* VLDRS */ 14846, /* VLDR_FPCXTNS_off */ 14851, /* VLDR_FPCXTNS_post */ 14855, /* VLDR_FPCXTNS_pre */ 14860, /* VLDR_FPCXTS_off */ 14865, /* VLDR_FPCXTS_post */ 14869, /* VLDR_FPCXTS_pre */ 14874, /* VLDR_FPSCR_NZCVQC_off */ 14879, /* VLDR_FPSCR_NZCVQC_post */ 14883, /* VLDR_FPSCR_NZCVQC_pre */ 14888, /* VLDR_FPSCR_off */ 14893, /* VLDR_FPSCR_post */ 14897, /* VLDR_FPSCR_pre */ 14902, /* VLDR_P0_off */ 14907, /* VLDR_P0_post */ 14912, /* VLDR_P0_pre */ 14918, /* VLDR_VPR_off */ 14924, /* VLDR_VPR_post */ 14928, /* VLDR_VPR_pre */ 14933, /* VLLDM */ 14938, /* VLSTM */ 14941, /* VMAXfd */ 14944, /* VMAXfq */ 14949, /* VMAXhd */ 14954, /* VMAXhq */ 14959, /* VMAXsv16i8 */ 14964, /* VMAXsv2i32 */ 14969, /* VMAXsv4i16 */ 14974, /* VMAXsv4i32 */ 14979, /* VMAXsv8i16 */ 14984, /* VMAXsv8i8 */ 14989, /* VMAXuv16i8 */ 14994, /* VMAXuv2i32 */ 14999, /* VMAXuv4i16 */ 15004, /* VMAXuv4i32 */ 15009, /* VMAXuv8i16 */ 15014, /* VMAXuv8i8 */ 15019, /* VMINfd */ 15024, /* VMINfq */ 15029, /* VMINhd */ 15034, /* VMINhq */ 15039, /* VMINsv16i8 */ 15044, /* VMINsv2i32 */ 15049, /* VMINsv4i16 */ 15054, /* VMINsv4i32 */ 15059, /* VMINsv8i16 */ 15064, /* VMINsv8i8 */ 15069, /* VMINuv16i8 */ 15074, /* VMINuv2i32 */ 15079, /* VMINuv4i16 */ 15084, /* VMINuv4i32 */ 15089, /* VMINuv8i16 */ 15094, /* VMINuv8i8 */ 15099, /* VMLAD */ 15104, /* VMLAH */ 15110, /* VMLALslsv2i32 */ 15116, /* VMLALslsv4i16 */ 15123, /* VMLALsluv2i32 */ 15130, /* VMLALsluv4i16 */ 15137, /* VMLALsv2i64 */ 15144, /* VMLALsv4i32 */ 15150, /* VMLALsv8i16 */ 15156, /* VMLALuv2i64 */ 15162, /* VMLALuv4i32 */ 15168, /* VMLALuv8i16 */ 15174, /* VMLAS */ 15180, /* VMLAfd */ 15186, /* VMLAfq */ 15192, /* VMLAhd */ 15198, /* VMLAhq */ 15204, /* VMLAslfd */ 15210, /* VMLAslfq */ 15217, /* VMLAslhd */ 15224, /* VMLAslhq */ 15231, /* VMLAslv2i32 */ 15238, /* VMLAslv4i16 */ 15245, /* VMLAslv4i32 */ 15252, /* VMLAslv8i16 */ 15259, /* VMLAv16i8 */ 15266, /* VMLAv2i32 */ 15272, /* VMLAv4i16 */ 15278, /* VMLAv4i32 */ 15284, /* VMLAv8i16 */ 15290, /* VMLAv8i8 */ 15296, /* VMLSD */ 15302, /* VMLSH */ 15308, /* VMLSLslsv2i32 */ 15314, /* VMLSLslsv4i16 */ 15321, /* VMLSLsluv2i32 */ 15328, /* VMLSLsluv4i16 */ 15335, /* VMLSLsv2i64 */ 15342, /* VMLSLsv4i32 */ 15348, /* VMLSLsv8i16 */ 15354, /* VMLSLuv2i64 */ 15360, /* VMLSLuv4i32 */ 15366, /* VMLSLuv8i16 */ 15372, /* VMLSS */ 15378, /* VMLSfd */ 15384, /* VMLSfq */ 15390, /* VMLShd */ 15396, /* VMLShq */ 15402, /* VMLSslfd */ 15408, /* VMLSslfq */ 15415, /* VMLSslhd */ 15422, /* VMLSslhq */ 15429, /* VMLSslv2i32 */ 15436, /* VMLSslv4i16 */ 15443, /* VMLSslv4i32 */ 15450, /* VMLSslv8i16 */ 15457, /* VMLSv16i8 */ 15464, /* VMLSv2i32 */ 15470, /* VMLSv4i16 */ 15476, /* VMLSv4i32 */ 15482, /* VMLSv8i16 */ 15488, /* VMLSv8i8 */ 15494, /* VMMLA */ 15500, /* VMOVD */ 15504, /* VMOVDRR */ 15508, /* VMOVH */ 15513, /* VMOVHR */ 15515, /* VMOVLsv2i64 */ 15519, /* VMOVLsv4i32 */ 15523, /* VMOVLsv8i16 */ 15527, /* VMOVLuv2i64 */ 15531, /* VMOVLuv4i32 */ 15535, /* VMOVLuv8i16 */ 15539, /* VMOVNv2i32 */ 15543, /* VMOVNv4i16 */ 15547, /* VMOVNv8i8 */ 15551, /* VMOVRH */ 15555, /* VMOVRRD */ 15559, /* VMOVRRS */ 15564, /* VMOVRS */ 15570, /* VMOVS */ 15574, /* VMOVSR */ 15578, /* VMOVSRR */ 15582, /* VMOVv16i8 */ 15588, /* VMOVv1i64 */ 15592, /* VMOVv2f32 */ 15596, /* VMOVv2i32 */ 15600, /* VMOVv2i64 */ 15604, /* VMOVv4f32 */ 15608, /* VMOVv4i16 */ 15612, /* VMOVv4i32 */ 15616, /* VMOVv8i16 */ 15620, /* VMOVv8i8 */ 15624, /* VMRS */ 15628, /* VMRS_FPCXTNS */ 15631, /* VMRS_FPCXTS */ 15634, /* VMRS_FPEXC */ 15637, /* VMRS_FPINST */ 15640, /* VMRS_FPINST2 */ 15643, /* VMRS_FPSCR_NZCVQC */ 15646, /* VMRS_FPSID */ 15650, /* VMRS_MVFR0 */ 15653, /* VMRS_MVFR1 */ 15656, /* VMRS_MVFR2 */ 15659, /* VMRS_P0 */ 15662, /* VMRS_VPR */ 15666, /* VMSR */ 15669, /* VMSR_FPCXTNS */ 15672, /* VMSR_FPCXTS */ 15675, /* VMSR_FPEXC */ 15678, /* VMSR_FPINST */ 15681, /* VMSR_FPINST2 */ 15684, /* VMSR_FPSCR_NZCVQC */ 15687, /* VMSR_FPSID */ 15691, /* VMSR_P0 */ 15694, /* VMSR_VPR */ 15698, /* VMULD */ 15701, /* VMULH */ 15706, /* VMULLp64 */ 15711, /* VMULLp8 */ 15714, /* VMULLslsv2i32 */ 15719, /* VMULLslsv4i16 */ 15725, /* VMULLsluv2i32 */ 15731, /* VMULLsluv4i16 */ 15737, /* VMULLsv2i64 */ 15743, /* VMULLsv4i32 */ 15748, /* VMULLsv8i16 */ 15753, /* VMULLuv2i64 */ 15758, /* VMULLuv4i32 */ 15763, /* VMULLuv8i16 */ 15768, /* VMULS */ 15773, /* VMULfd */ 15778, /* VMULfq */ 15783, /* VMULhd */ 15788, /* VMULhq */ 15793, /* VMULpd */ 15798, /* VMULpq */ 15803, /* VMULslfd */ 15808, /* VMULslfq */ 15814, /* VMULslhd */ 15820, /* VMULslhq */ 15826, /* VMULslv2i32 */ 15832, /* VMULslv4i16 */ 15838, /* VMULslv4i32 */ 15844, /* VMULslv8i16 */ 15850, /* VMULv16i8 */ 15856, /* VMULv2i32 */ 15861, /* VMULv4i16 */ 15866, /* VMULv4i32 */ 15871, /* VMULv8i16 */ 15876, /* VMULv8i8 */ 15881, /* VMVNd */ 15886, /* VMVNq */ 15890, /* VMVNv2i32 */ 15894, /* VMVNv4i16 */ 15898, /* VMVNv4i32 */ 15902, /* VMVNv8i16 */ 15906, /* VNEGD */ 15910, /* VNEGH */ 15914, /* VNEGS */ 15918, /* VNEGf32q */ 15922, /* VNEGfd */ 15926, /* VNEGhd */ 15930, /* VNEGhq */ 15934, /* VNEGs16d */ 15938, /* VNEGs16q */ 15942, /* VNEGs32d */ 15946, /* VNEGs32q */ 15950, /* VNEGs8d */ 15954, /* VNEGs8q */ 15958, /* VNMLAD */ 15962, /* VNMLAH */ 15968, /* VNMLAS */ 15974, /* VNMLSD */ 15980, /* VNMLSH */ 15986, /* VNMLSS */ 15992, /* VNMULD */ 15998, /* VNMULH */ 16003, /* VNMULS */ 16008, /* VORNd */ 16013, /* VORNq */ 16018, /* VORRd */ 16023, /* VORRiv2i32 */ 16028, /* VORRiv4i16 */ 16033, /* VORRiv4i32 */ 16038, /* VORRiv8i16 */ 16043, /* VORRq */ 16048, /* VPADALsv16i8 */ 16053, /* VPADALsv2i32 */ 16058, /* VPADALsv4i16 */ 16063, /* VPADALsv4i32 */ 16068, /* VPADALsv8i16 */ 16073, /* VPADALsv8i8 */ 16078, /* VPADALuv16i8 */ 16083, /* VPADALuv2i32 */ 16088, /* VPADALuv4i16 */ 16093, /* VPADALuv4i32 */ 16098, /* VPADALuv8i16 */ 16103, /* VPADALuv8i8 */ 16108, /* VPADDLsv16i8 */ 16113, /* VPADDLsv2i32 */ 16117, /* VPADDLsv4i16 */ 16121, /* VPADDLsv4i32 */ 16125, /* VPADDLsv8i16 */ 16129, /* VPADDLsv8i8 */ 16133, /* VPADDLuv16i8 */ 16137, /* VPADDLuv2i32 */ 16141, /* VPADDLuv4i16 */ 16145, /* VPADDLuv4i32 */ 16149, /* VPADDLuv8i16 */ 16153, /* VPADDLuv8i8 */ 16157, /* VPADDf */ 16161, /* VPADDh */ 16166, /* VPADDi16 */ 16171, /* VPADDi32 */ 16176, /* VPADDi8 */ 16181, /* VPMAXf */ 16186, /* VPMAXh */ 16191, /* VPMAXs16 */ 16196, /* VPMAXs32 */ 16201, /* VPMAXs8 */ 16206, /* VPMAXu16 */ 16211, /* VPMAXu32 */ 16216, /* VPMAXu8 */ 16221, /* VPMINf */ 16226, /* VPMINh */ 16231, /* VPMINs16 */ 16236, /* VPMINs32 */ 16241, /* VPMINs8 */ 16246, /* VPMINu16 */ 16251, /* VPMINu32 */ 16256, /* VPMINu8 */ 16261, /* VQABSv16i8 */ 16266, /* VQABSv2i32 */ 16270, /* VQABSv4i16 */ 16274, /* VQABSv4i32 */ 16278, /* VQABSv8i16 */ 16282, /* VQABSv8i8 */ 16286, /* VQADDsv16i8 */ 16290, /* VQADDsv1i64 */ 16295, /* VQADDsv2i32 */ 16300, /* VQADDsv2i64 */ 16305, /* VQADDsv4i16 */ 16310, /* VQADDsv4i32 */ 16315, /* VQADDsv8i16 */ 16320, /* VQADDsv8i8 */ 16325, /* VQADDuv16i8 */ 16330, /* VQADDuv1i64 */ 16335, /* VQADDuv2i32 */ 16340, /* VQADDuv2i64 */ 16345, /* VQADDuv4i16 */ 16350, /* VQADDuv4i32 */ 16355, /* VQADDuv8i16 */ 16360, /* VQADDuv8i8 */ 16365, /* VQDMLALslv2i32 */ 16370, /* VQDMLALslv4i16 */ 16377, /* VQDMLALv2i64 */ 16384, /* VQDMLALv4i32 */ 16390, /* VQDMLSLslv2i32 */ 16396, /* VQDMLSLslv4i16 */ 16403, /* VQDMLSLv2i64 */ 16410, /* VQDMLSLv4i32 */ 16416, /* VQDMULHslv2i32 */ 16422, /* VQDMULHslv4i16 */ 16428, /* VQDMULHslv4i32 */ 16434, /* VQDMULHslv8i16 */ 16440, /* VQDMULHv2i32 */ 16446, /* VQDMULHv4i16 */ 16451, /* VQDMULHv4i32 */ 16456, /* VQDMULHv8i16 */ 16461, /* VQDMULLslv2i32 */ 16466, /* VQDMULLslv4i16 */ 16472, /* VQDMULLv2i64 */ 16478, /* VQDMULLv4i32 */ 16483, /* VQMOVNsuv2i32 */ 16488, /* VQMOVNsuv4i16 */ 16492, /* VQMOVNsuv8i8 */ 16496, /* VQMOVNsv2i32 */ 16500, /* VQMOVNsv4i16 */ 16504, /* VQMOVNsv8i8 */ 16508, /* VQMOVNuv2i32 */ 16512, /* VQMOVNuv4i16 */ 16516, /* VQMOVNuv8i8 */ 16520, /* VQNEGv16i8 */ 16524, /* VQNEGv2i32 */ 16528, /* VQNEGv4i16 */ 16532, /* VQNEGv4i32 */ 16536, /* VQNEGv8i16 */ 16540, /* VQNEGv8i8 */ 16544, /* VQRDMLAHslv2i32 */ 16548, /* VQRDMLAHslv4i16 */ 16555, /* VQRDMLAHslv4i32 */ 16562, /* VQRDMLAHslv8i16 */ 16569, /* VQRDMLAHv2i32 */ 16576, /* VQRDMLAHv4i16 */ 16582, /* VQRDMLAHv4i32 */ 16588, /* VQRDMLAHv8i16 */ 16594, /* VQRDMLSHslv2i32 */ 16600, /* VQRDMLSHslv4i16 */ 16607, /* VQRDMLSHslv4i32 */ 16614, /* VQRDMLSHslv8i16 */ 16621, /* VQRDMLSHv2i32 */ 16628, /* VQRDMLSHv4i16 */ 16634, /* VQRDMLSHv4i32 */ 16640, /* VQRDMLSHv8i16 */ 16646, /* VQRDMULHslv2i32 */ 16652, /* VQRDMULHslv4i16 */ 16658, /* VQRDMULHslv4i32 */ 16664, /* VQRDMULHslv8i16 */ 16670, /* VQRDMULHv2i32 */ 16676, /* VQRDMULHv4i16 */ 16681, /* VQRDMULHv4i32 */ 16686, /* VQRDMULHv8i16 */ 16691, /* VQRSHLsv16i8 */ 16696, /* VQRSHLsv1i64 */ 16701, /* VQRSHLsv2i32 */ 16706, /* VQRSHLsv2i64 */ 16711, /* VQRSHLsv4i16 */ 16716, /* VQRSHLsv4i32 */ 16721, /* VQRSHLsv8i16 */ 16726, /* VQRSHLsv8i8 */ 16731, /* VQRSHLuv16i8 */ 16736, /* VQRSHLuv1i64 */ 16741, /* VQRSHLuv2i32 */ 16746, /* VQRSHLuv2i64 */ 16751, /* VQRSHLuv4i16 */ 16756, /* VQRSHLuv4i32 */ 16761, /* VQRSHLuv8i16 */ 16766, /* VQRSHLuv8i8 */ 16771, /* VQRSHRNsv2i32 */ 16776, /* VQRSHRNsv4i16 */ 16781, /* VQRSHRNsv8i8 */ 16786, /* VQRSHRNuv2i32 */ 16791, /* VQRSHRNuv4i16 */ 16796, /* VQRSHRNuv8i8 */ 16801, /* VQRSHRUNv2i32 */ 16806, /* VQRSHRUNv4i16 */ 16811, /* VQRSHRUNv8i8 */ 16816, /* VQSHLsiv16i8 */ 16821, /* VQSHLsiv1i64 */ 16826, /* VQSHLsiv2i32 */ 16831, /* VQSHLsiv2i64 */ 16836, /* VQSHLsiv4i16 */ 16841, /* VQSHLsiv4i32 */ 16846, /* VQSHLsiv8i16 */ 16851, /* VQSHLsiv8i8 */ 16856, /* VQSHLsuv16i8 */ 16861, /* VQSHLsuv1i64 */ 16866, /* VQSHLsuv2i32 */ 16871, /* VQSHLsuv2i64 */ 16876, /* VQSHLsuv4i16 */ 16881, /* VQSHLsuv4i32 */ 16886, /* VQSHLsuv8i16 */ 16891, /* VQSHLsuv8i8 */ 16896, /* VQSHLsv16i8 */ 16901, /* VQSHLsv1i64 */ 16906, /* VQSHLsv2i32 */ 16911, /* VQSHLsv2i64 */ 16916, /* VQSHLsv4i16 */ 16921, /* VQSHLsv4i32 */ 16926, /* VQSHLsv8i16 */ 16931, /* VQSHLsv8i8 */ 16936, /* VQSHLuiv16i8 */ 16941, /* VQSHLuiv1i64 */ 16946, /* VQSHLuiv2i32 */ 16951, /* VQSHLuiv2i64 */ 16956, /* VQSHLuiv4i16 */ 16961, /* VQSHLuiv4i32 */ 16966, /* VQSHLuiv8i16 */ 16971, /* VQSHLuiv8i8 */ 16976, /* VQSHLuv16i8 */ 16981, /* VQSHLuv1i64 */ 16986, /* VQSHLuv2i32 */ 16991, /* VQSHLuv2i64 */ 16996, /* VQSHLuv4i16 */ 17001, /* VQSHLuv4i32 */ 17006, /* VQSHLuv8i16 */ 17011, /* VQSHLuv8i8 */ 17016, /* VQSHRNsv2i32 */ 17021, /* VQSHRNsv4i16 */ 17026, /* VQSHRNsv8i8 */ 17031, /* VQSHRNuv2i32 */ 17036, /* VQSHRNuv4i16 */ 17041, /* VQSHRNuv8i8 */ 17046, /* VQSHRUNv2i32 */ 17051, /* VQSHRUNv4i16 */ 17056, /* VQSHRUNv8i8 */ 17061, /* VQSUBsv16i8 */ 17066, /* VQSUBsv1i64 */ 17071, /* VQSUBsv2i32 */ 17076, /* VQSUBsv2i64 */ 17081, /* VQSUBsv4i16 */ 17086, /* VQSUBsv4i32 */ 17091, /* VQSUBsv8i16 */ 17096, /* VQSUBsv8i8 */ 17101, /* VQSUBuv16i8 */ 17106, /* VQSUBuv1i64 */ 17111, /* VQSUBuv2i32 */ 17116, /* VQSUBuv2i64 */ 17121, /* VQSUBuv4i16 */ 17126, /* VQSUBuv4i32 */ 17131, /* VQSUBuv8i16 */ 17136, /* VQSUBuv8i8 */ 17141, /* VRADDHNv2i32 */ 17146, /* VRADDHNv4i16 */ 17151, /* VRADDHNv8i8 */ 17156, /* VRECPEd */ 17161, /* VRECPEfd */ 17165, /* VRECPEfq */ 17169, /* VRECPEhd */ 17173, /* VRECPEhq */ 17177, /* VRECPEq */ 17181, /* VRECPSfd */ 17185, /* VRECPSfq */ 17190, /* VRECPShd */ 17195, /* VRECPShq */ 17200, /* VREV16d8 */ 17205, /* VREV16q8 */ 17209, /* VREV32d16 */ 17213, /* VREV32d8 */ 17217, /* VREV32q16 */ 17221, /* VREV32q8 */ 17225, /* VREV64d16 */ 17229, /* VREV64d32 */ 17233, /* VREV64d8 */ 17237, /* VREV64q16 */ 17241, /* VREV64q32 */ 17245, /* VREV64q8 */ 17249, /* VRHADDsv16i8 */ 17253, /* VRHADDsv2i32 */ 17258, /* VRHADDsv4i16 */ 17263, /* VRHADDsv4i32 */ 17268, /* VRHADDsv8i16 */ 17273, /* VRHADDsv8i8 */ 17278, /* VRHADDuv16i8 */ 17283, /* VRHADDuv2i32 */ 17288, /* VRHADDuv4i16 */ 17293, /* VRHADDuv4i32 */ 17298, /* VRHADDuv8i16 */ 17303, /* VRHADDuv8i8 */ 17308, /* VRINTAD */ 17313, /* VRINTAH */ 17315, /* VRINTANDf */ 17317, /* VRINTANDh */ 17319, /* VRINTANQf */ 17321, /* VRINTANQh */ 17323, /* VRINTAS */ 17325, /* VRINTMD */ 17327, /* VRINTMH */ 17329, /* VRINTMNDf */ 17331, /* VRINTMNDh */ 17333, /* VRINTMNQf */ 17335, /* VRINTMNQh */ 17337, /* VRINTMS */ 17339, /* VRINTND */ 17341, /* VRINTNH */ 17343, /* VRINTNNDf */ 17345, /* VRINTNNDh */ 17347, /* VRINTNNQf */ 17349, /* VRINTNNQh */ 17351, /* VRINTNS */ 17353, /* VRINTPD */ 17355, /* VRINTPH */ 17357, /* VRINTPNDf */ 17359, /* VRINTPNDh */ 17361, /* VRINTPNQf */ 17363, /* VRINTPNQh */ 17365, /* VRINTPS */ 17367, /* VRINTRD */ 17369, /* VRINTRH */ 17373, /* VRINTRS */ 17377, /* VRINTXD */ 17381, /* VRINTXH */ 17385, /* VRINTXNDf */ 17389, /* VRINTXNDh */ 17391, /* VRINTXNQf */ 17393, /* VRINTXNQh */ 17395, /* VRINTXS */ 17397, /* VRINTZD */ 17401, /* VRINTZH */ 17405, /* VRINTZNDf */ 17409, /* VRINTZNDh */ 17411, /* VRINTZNQf */ 17413, /* VRINTZNQh */ 17415, /* VRINTZS */ 17417, /* VRSHLsv16i8 */ 17421, /* VRSHLsv1i64 */ 17426, /* VRSHLsv2i32 */ 17431, /* VRSHLsv2i64 */ 17436, /* VRSHLsv4i16 */ 17441, /* VRSHLsv4i32 */ 17446, /* VRSHLsv8i16 */ 17451, /* VRSHLsv8i8 */ 17456, /* VRSHLuv16i8 */ 17461, /* VRSHLuv1i64 */ 17466, /* VRSHLuv2i32 */ 17471, /* VRSHLuv2i64 */ 17476, /* VRSHLuv4i16 */ 17481, /* VRSHLuv4i32 */ 17486, /* VRSHLuv8i16 */ 17491, /* VRSHLuv8i8 */ 17496, /* VRSHRNv2i32 */ 17501, /* VRSHRNv4i16 */ 17506, /* VRSHRNv8i8 */ 17511, /* VRSHRsv16i8 */ 17516, /* VRSHRsv1i64 */ 17521, /* VRSHRsv2i32 */ 17526, /* VRSHRsv2i64 */ 17531, /* VRSHRsv4i16 */ 17536, /* VRSHRsv4i32 */ 17541, /* VRSHRsv8i16 */ 17546, /* VRSHRsv8i8 */ 17551, /* VRSHRuv16i8 */ 17556, /* VRSHRuv1i64 */ 17561, /* VRSHRuv2i32 */ 17566, /* VRSHRuv2i64 */ 17571, /* VRSHRuv4i16 */ 17576, /* VRSHRuv4i32 */ 17581, /* VRSHRuv8i16 */ 17586, /* VRSHRuv8i8 */ 17591, /* VRSQRTEd */ 17596, /* VRSQRTEfd */ 17600, /* VRSQRTEfq */ 17604, /* VRSQRTEhd */ 17608, /* VRSQRTEhq */ 17612, /* VRSQRTEq */ 17616, /* VRSQRTSfd */ 17620, /* VRSQRTSfq */ 17625, /* VRSQRTShd */ 17630, /* VRSQRTShq */ 17635, /* VRSRAsv16i8 */ 17640, /* VRSRAsv1i64 */ 17646, /* VRSRAsv2i32 */ 17652, /* VRSRAsv2i64 */ 17658, /* VRSRAsv4i16 */ 17664, /* VRSRAsv4i32 */ 17670, /* VRSRAsv8i16 */ 17676, /* VRSRAsv8i8 */ 17682, /* VRSRAuv16i8 */ 17688, /* VRSRAuv1i64 */ 17694, /* VRSRAuv2i32 */ 17700, /* VRSRAuv2i64 */ 17706, /* VRSRAuv4i16 */ 17712, /* VRSRAuv4i32 */ 17718, /* VRSRAuv8i16 */ 17724, /* VRSRAuv8i8 */ 17730, /* VRSUBHNv2i32 */ 17736, /* VRSUBHNv4i16 */ 17741, /* VRSUBHNv8i8 */ 17746, /* VSCCLRMD */ 17751, /* VSCCLRMS */ 17754, /* VSDOTD */ 17757, /* VSDOTDI */ 17761, /* VSDOTQ */ 17766, /* VSDOTQI */ 17770, /* VSELEQD */ 17775, /* VSELEQH */ 17778, /* VSELEQS */ 17781, /* VSELGED */ 17784, /* VSELGEH */ 17787, /* VSELGES */ 17790, /* VSELGTD */ 17793, /* VSELGTH */ 17796, /* VSELGTS */ 17799, /* VSELVSD */ 17802, /* VSELVSH */ 17805, /* VSELVSS */ 17808, /* VSETLNi16 */ 17811, /* VSETLNi32 */ 17817, /* VSETLNi8 */ 17823, /* VSHLLi16 */ 17829, /* VSHLLi32 */ 17834, /* VSHLLi8 */ 17839, /* VSHLLsv2i64 */ 17844, /* VSHLLsv4i32 */ 17849, /* VSHLLsv8i16 */ 17854, /* VSHLLuv2i64 */ 17859, /* VSHLLuv4i32 */ 17864, /* VSHLLuv8i16 */ 17869, /* VSHLiv16i8 */ 17874, /* VSHLiv1i64 */ 17879, /* VSHLiv2i32 */ 17884, /* VSHLiv2i64 */ 17889, /* VSHLiv4i16 */ 17894, /* VSHLiv4i32 */ 17899, /* VSHLiv8i16 */ 17904, /* VSHLiv8i8 */ 17909, /* VSHLsv16i8 */ 17914, /* VSHLsv1i64 */ 17919, /* VSHLsv2i32 */ 17924, /* VSHLsv2i64 */ 17929, /* VSHLsv4i16 */ 17934, /* VSHLsv4i32 */ 17939, /* VSHLsv8i16 */ 17944, /* VSHLsv8i8 */ 17949, /* VSHLuv16i8 */ 17954, /* VSHLuv1i64 */ 17959, /* VSHLuv2i32 */ 17964, /* VSHLuv2i64 */ 17969, /* VSHLuv4i16 */ 17974, /* VSHLuv4i32 */ 17979, /* VSHLuv8i16 */ 17984, /* VSHLuv8i8 */ 17989, /* VSHRNv2i32 */ 17994, /* VSHRNv4i16 */ 17999, /* VSHRNv8i8 */ 18004, /* VSHRsv16i8 */ 18009, /* VSHRsv1i64 */ 18014, /* VSHRsv2i32 */ 18019, /* VSHRsv2i64 */ 18024, /* VSHRsv4i16 */ 18029, /* VSHRsv4i32 */ 18034, /* VSHRsv8i16 */ 18039, /* VSHRsv8i8 */ 18044, /* VSHRuv16i8 */ 18049, /* VSHRuv1i64 */ 18054, /* VSHRuv2i32 */ 18059, /* VSHRuv2i64 */ 18064, /* VSHRuv4i16 */ 18069, /* VSHRuv4i32 */ 18074, /* VSHRuv8i16 */ 18079, /* VSHRuv8i8 */ 18084, /* VSHTOD */ 18089, /* VSHTOH */ 18094, /* VSHTOS */ 18099, /* VSITOD */ 18104, /* VSITOH */ 18108, /* VSITOS */ 18112, /* VSLIv16i8 */ 18116, /* VSLIv1i64 */ 18122, /* VSLIv2i32 */ 18128, /* VSLIv2i64 */ 18134, /* VSLIv4i16 */ 18140, /* VSLIv4i32 */ 18146, /* VSLIv8i16 */ 18152, /* VSLIv8i8 */ 18158, /* VSLTOD */ 18164, /* VSLTOH */ 18169, /* VSLTOS */ 18174, /* VSMMLA */ 18179, /* VSQRTD */ 18183, /* VSQRTH */ 18187, /* VSQRTS */ 18191, /* VSRAsv16i8 */ 18195, /* VSRAsv1i64 */ 18201, /* VSRAsv2i32 */ 18207, /* VSRAsv2i64 */ 18213, /* VSRAsv4i16 */ 18219, /* VSRAsv4i32 */ 18225, /* VSRAsv8i16 */ 18231, /* VSRAsv8i8 */ 18237, /* VSRAuv16i8 */ 18243, /* VSRAuv1i64 */ 18249, /* VSRAuv2i32 */ 18255, /* VSRAuv2i64 */ 18261, /* VSRAuv4i16 */ 18267, /* VSRAuv4i32 */ 18273, /* VSRAuv8i16 */ 18279, /* VSRAuv8i8 */ 18285, /* VSRIv16i8 */ 18291, /* VSRIv1i64 */ 18297, /* VSRIv2i32 */ 18303, /* VSRIv2i64 */ 18309, /* VSRIv4i16 */ 18315, /* VSRIv4i32 */ 18321, /* VSRIv8i16 */ 18327, /* VSRIv8i8 */ 18333, /* VST1LNd16 */ 18339, /* VST1LNd16_UPD */ 18345, /* VST1LNd32 */ 18353, /* VST1LNd32_UPD */ 18359, /* VST1LNd8 */ 18367, /* VST1LNd8_UPD */ 18373, /* VST1LNq16Pseudo */ 18381, /* VST1LNq16Pseudo_UPD */ 18387, /* VST1LNq32Pseudo */ 18395, /* VST1LNq32Pseudo_UPD */ 18401, /* VST1LNq8Pseudo */ 18409, /* VST1LNq8Pseudo_UPD */ 18415, /* VST1d16 */ 18423, /* VST1d16Q */ 18428, /* VST1d16QPseudo */ 18433, /* VST1d16QPseudoWB_fixed */ 18438, /* VST1d16QPseudoWB_register */ 18444, /* VST1d16Qwb_fixed */ 18451, /* VST1d16Qwb_register */ 18457, /* VST1d16T */ 18464, /* VST1d16TPseudo */ 18469, /* VST1d16TPseudoWB_fixed */ 18474, /* VST1d16TPseudoWB_register */ 18480, /* VST1d16Twb_fixed */ 18487, /* VST1d16Twb_register */ 18493, /* VST1d16wb_fixed */ 18500, /* VST1d16wb_register */ 18506, /* VST1d32 */ 18513, /* VST1d32Q */ 18518, /* VST1d32QPseudo */ 18523, /* VST1d32QPseudoWB_fixed */ 18528, /* VST1d32QPseudoWB_register */ 18534, /* VST1d32Qwb_fixed */ 18541, /* VST1d32Qwb_register */ 18547, /* VST1d32T */ 18554, /* VST1d32TPseudo */ 18559, /* VST1d32TPseudoWB_fixed */ 18564, /* VST1d32TPseudoWB_register */ 18570, /* VST1d32Twb_fixed */ 18577, /* VST1d32Twb_register */ 18583, /* VST1d32wb_fixed */ 18590, /* VST1d32wb_register */ 18596, /* VST1d64 */ 18603, /* VST1d64Q */ 18608, /* VST1d64QPseudo */ 18613, /* VST1d64QPseudoWB_fixed */ 18618, /* VST1d64QPseudoWB_register */ 18624, /* VST1d64Qwb_fixed */ 18631, /* VST1d64Qwb_register */ 18637, /* VST1d64T */ 18644, /* VST1d64TPseudo */ 18649, /* VST1d64TPseudoWB_fixed */ 18654, /* VST1d64TPseudoWB_register */ 18660, /* VST1d64Twb_fixed */ 18667, /* VST1d64Twb_register */ 18673, /* VST1d64wb_fixed */ 18680, /* VST1d64wb_register */ 18686, /* VST1d8 */ 18693, /* VST1d8Q */ 18698, /* VST1d8QPseudo */ 18703, /* VST1d8QPseudoWB_fixed */ 18708, /* VST1d8QPseudoWB_register */ 18714, /* VST1d8Qwb_fixed */ 18721, /* VST1d8Qwb_register */ 18727, /* VST1d8T */ 18734, /* VST1d8TPseudo */ 18739, /* VST1d8TPseudoWB_fixed */ 18744, /* VST1d8TPseudoWB_register */ 18750, /* VST1d8Twb_fixed */ 18757, /* VST1d8Twb_register */ 18763, /* VST1d8wb_fixed */ 18770, /* VST1d8wb_register */ 18776, /* VST1q16 */ 18783, /* VST1q16HighQPseudo */ 18788, /* VST1q16HighQPseudo_UPD */ 18793, /* VST1q16HighTPseudo */ 18800, /* VST1q16HighTPseudo_UPD */ 18805, /* VST1q16LowQPseudo_UPD */ 18812, /* VST1q16LowTPseudo_UPD */ 18819, /* VST1q16wb_fixed */ 18826, /* VST1q16wb_register */ 18832, /* VST1q32 */ 18839, /* VST1q32HighQPseudo */ 18844, /* VST1q32HighQPseudo_UPD */ 18849, /* VST1q32HighTPseudo */ 18856, /* VST1q32HighTPseudo_UPD */ 18861, /* VST1q32LowQPseudo_UPD */ 18868, /* VST1q32LowTPseudo_UPD */ 18875, /* VST1q32wb_fixed */ 18882, /* VST1q32wb_register */ 18888, /* VST1q64 */ 18895, /* VST1q64HighQPseudo */ 18900, /* VST1q64HighQPseudo_UPD */ 18905, /* VST1q64HighTPseudo */ 18912, /* VST1q64HighTPseudo_UPD */ 18917, /* VST1q64LowQPseudo_UPD */ 18924, /* VST1q64LowTPseudo_UPD */ 18931, /* VST1q64wb_fixed */ 18938, /* VST1q64wb_register */ 18944, /* VST1q8 */ 18951, /* VST1q8HighQPseudo */ 18956, /* VST1q8HighQPseudo_UPD */ 18961, /* VST1q8HighTPseudo */ 18968, /* VST1q8HighTPseudo_UPD */ 18973, /* VST1q8LowQPseudo_UPD */ 18980, /* VST1q8LowTPseudo_UPD */ 18987, /* VST1q8wb_fixed */ 18994, /* VST1q8wb_register */ 19000, /* VST2LNd16 */ 19007, /* VST2LNd16Pseudo */ 19014, /* VST2LNd16Pseudo_UPD */ 19020, /* VST2LNd16_UPD */ 19028, /* VST2LNd32 */ 19037, /* VST2LNd32Pseudo */ 19044, /* VST2LNd32Pseudo_UPD */ 19050, /* VST2LNd32_UPD */ 19058, /* VST2LNd8 */ 19067, /* VST2LNd8Pseudo */ 19074, /* VST2LNd8Pseudo_UPD */ 19080, /* VST2LNd8_UPD */ 19088, /* VST2LNq16 */ 19097, /* VST2LNq16Pseudo */ 19104, /* VST2LNq16Pseudo_UPD */ 19110, /* VST2LNq16_UPD */ 19118, /* VST2LNq32 */ 19127, /* VST2LNq32Pseudo */ 19134, /* VST2LNq32Pseudo_UPD */ 19140, /* VST2LNq32_UPD */ 19148, /* VST2b16 */ 19157, /* VST2b16wb_fixed */ 19162, /* VST2b16wb_register */ 19168, /* VST2b32 */ 19175, /* VST2b32wb_fixed */ 19180, /* VST2b32wb_register */ 19186, /* VST2b8 */ 19193, /* VST2b8wb_fixed */ 19198, /* VST2b8wb_register */ 19204, /* VST2d16 */ 19211, /* VST2d16wb_fixed */ 19216, /* VST2d16wb_register */ 19222, /* VST2d32 */ 19229, /* VST2d32wb_fixed */ 19234, /* VST2d32wb_register */ 19240, /* VST2d8 */ 19247, /* VST2d8wb_fixed */ 19252, /* VST2d8wb_register */ 19258, /* VST2q16 */ 19265, /* VST2q16Pseudo */ 19270, /* VST2q16PseudoWB_fixed */ 19275, /* VST2q16PseudoWB_register */ 19281, /* VST2q16wb_fixed */ 19288, /* VST2q16wb_register */ 19294, /* VST2q32 */ 19301, /* VST2q32Pseudo */ 19306, /* VST2q32PseudoWB_fixed */ 19311, /* VST2q32PseudoWB_register */ 19317, /* VST2q32wb_fixed */ 19324, /* VST2q32wb_register */ 19330, /* VST2q8 */ 19337, /* VST2q8Pseudo */ 19342, /* VST2q8PseudoWB_fixed */ 19347, /* VST2q8PseudoWB_register */ 19353, /* VST2q8wb_fixed */ 19360, /* VST2q8wb_register */ 19366, /* VST3LNd16 */ 19373, /* VST3LNd16Pseudo */ 19381, /* VST3LNd16Pseudo_UPD */ 19387, /* VST3LNd16_UPD */ 19395, /* VST3LNd32 */ 19405, /* VST3LNd32Pseudo */ 19413, /* VST3LNd32Pseudo_UPD */ 19419, /* VST3LNd32_UPD */ 19427, /* VST3LNd8 */ 19437, /* VST3LNd8Pseudo */ 19445, /* VST3LNd8Pseudo_UPD */ 19451, /* VST3LNd8_UPD */ 19459, /* VST3LNq16 */ 19469, /* VST3LNq16Pseudo */ 19477, /* VST3LNq16Pseudo_UPD */ 19483, /* VST3LNq16_UPD */ 19491, /* VST3LNq32 */ 19501, /* VST3LNq32Pseudo */ 19509, /* VST3LNq32Pseudo_UPD */ 19515, /* VST3LNq32_UPD */ 19523, /* VST3d16 */ 19533, /* VST3d16Pseudo */ 19540, /* VST3d16Pseudo_UPD */ 19545, /* VST3d16_UPD */ 19552, /* VST3d32 */ 19561, /* VST3d32Pseudo */ 19568, /* VST3d32Pseudo_UPD */ 19573, /* VST3d32_UPD */ 19580, /* VST3d8 */ 19589, /* VST3d8Pseudo */ 19596, /* VST3d8Pseudo_UPD */ 19601, /* VST3d8_UPD */ 19608, /* VST3q16 */ 19617, /* VST3q16Pseudo_UPD */ 19624, /* VST3q16_UPD */ 19631, /* VST3q16oddPseudo */ 19640, /* VST3q16oddPseudo_UPD */ 19645, /* VST3q32 */ 19652, /* VST3q32Pseudo_UPD */ 19659, /* VST3q32_UPD */ 19666, /* VST3q32oddPseudo */ 19675, /* VST3q32oddPseudo_UPD */ 19680, /* VST3q8 */ 19687, /* VST3q8Pseudo_UPD */ 19694, /* VST3q8_UPD */ 19701, /* VST3q8oddPseudo */ 19710, /* VST3q8oddPseudo_UPD */ 19715, /* VST4LNd16 */ 19722, /* VST4LNd16Pseudo */ 19731, /* VST4LNd16Pseudo_UPD */ 19737, /* VST4LNd16_UPD */ 19745, /* VST4LNd32 */ 19756, /* VST4LNd32Pseudo */ 19765, /* VST4LNd32Pseudo_UPD */ 19771, /* VST4LNd32_UPD */ 19779, /* VST4LNd8 */ 19790, /* VST4LNd8Pseudo */ 19799, /* VST4LNd8Pseudo_UPD */ 19805, /* VST4LNd8_UPD */ 19813, /* VST4LNq16 */ 19824, /* VST4LNq16Pseudo */ 19833, /* VST4LNq16Pseudo_UPD */ 19839, /* VST4LNq16_UPD */ 19847, /* VST4LNq32 */ 19858, /* VST4LNq32Pseudo */ 19867, /* VST4LNq32Pseudo_UPD */ 19873, /* VST4LNq32_UPD */ 19881, /* VST4d16 */ 19892, /* VST4d16Pseudo */ 19900, /* VST4d16Pseudo_UPD */ 19905, /* VST4d16_UPD */ 19912, /* VST4d32 */ 19922, /* VST4d32Pseudo */ 19930, /* VST4d32Pseudo_UPD */ 19935, /* VST4d32_UPD */ 19942, /* VST4d8 */ 19952, /* VST4d8Pseudo */ 19960, /* VST4d8Pseudo_UPD */ 19965, /* VST4d8_UPD */ 19972, /* VST4q16 */ 19982, /* VST4q16Pseudo_UPD */ 19990, /* VST4q16_UPD */ 19997, /* VST4q16oddPseudo */ 20007, /* VST4q16oddPseudo_UPD */ 20012, /* VST4q32 */ 20019, /* VST4q32Pseudo_UPD */ 20027, /* VST4q32_UPD */ 20034, /* VST4q32oddPseudo */ 20044, /* VST4q32oddPseudo_UPD */ 20049, /* VST4q8 */ 20056, /* VST4q8Pseudo_UPD */ 20064, /* VST4q8_UPD */ 20071, /* VST4q8oddPseudo */ 20081, /* VST4q8oddPseudo_UPD */ 20086, /* VSTMDDB_UPD */ 20093, /* VSTMDIA */ 20098, /* VSTMDIA_UPD */ 20102, /* VSTMQIA */ 20107, /* VSTMSDB_UPD */ 20111, /* VSTMSIA */ 20116, /* VSTMSIA_UPD */ 20120, /* VSTRD */ 20125, /* VSTRH */ 20130, /* VSTRS */ 20135, /* VSTR_FPCXTNS_off */ 20140, /* VSTR_FPCXTNS_post */ 20144, /* VSTR_FPCXTNS_pre */ 20149, /* VSTR_FPCXTS_off */ 20154, /* VSTR_FPCXTS_post */ 20158, /* VSTR_FPCXTS_pre */ 20163, /* VSTR_FPSCR_NZCVQC_off */ 20168, /* VSTR_FPSCR_NZCVQC_post */ 20172, /* VSTR_FPSCR_NZCVQC_pre */ 20177, /* VSTR_FPSCR_off */ 20182, /* VSTR_FPSCR_post */ 20186, /* VSTR_FPSCR_pre */ 20191, /* VSTR_P0_off */ 20196, /* VSTR_P0_post */ 20201, /* VSTR_P0_pre */ 20207, /* VSTR_VPR_off */ 20213, /* VSTR_VPR_post */ 20217, /* VSTR_VPR_pre */ 20222, /* VSUBD */ 20227, /* VSUBH */ 20232, /* VSUBHNv2i32 */ 20237, /* VSUBHNv4i16 */ 20242, /* VSUBHNv8i8 */ 20247, /* VSUBLsv2i64 */ 20252, /* VSUBLsv4i32 */ 20257, /* VSUBLsv8i16 */ 20262, /* VSUBLuv2i64 */ 20267, /* VSUBLuv4i32 */ 20272, /* VSUBLuv8i16 */ 20277, /* VSUBS */ 20282, /* VSUBWsv2i64 */ 20287, /* VSUBWsv4i32 */ 20292, /* VSUBWsv8i16 */ 20297, /* VSUBWuv2i64 */ 20302, /* VSUBWuv4i32 */ 20307, /* VSUBWuv8i16 */ 20312, /* VSUBfd */ 20317, /* VSUBfq */ 20322, /* VSUBhd */ 20327, /* VSUBhq */ 20332, /* VSUBv16i8 */ 20337, /* VSUBv1i64 */ 20342, /* VSUBv2i32 */ 20347, /* VSUBv2i64 */ 20352, /* VSUBv4i16 */ 20357, /* VSUBv4i32 */ 20362, /* VSUBv8i16 */ 20367, /* VSUBv8i8 */ 20372, /* VSUDOTDI */ 20377, /* VSUDOTQI */ 20382, /* VSWPd */ 20387, /* VSWPq */ 20393, /* VTBL1 */ 20399, /* VTBL2 */ 20404, /* VTBL3 */ 20409, /* VTBL3Pseudo */ 20414, /* VTBL4 */ 20419, /* VTBL4Pseudo */ 20424, /* VTBX1 */ 20429, /* VTBX2 */ 20435, /* VTBX3 */ 20441, /* VTBX3Pseudo */ 20447, /* VTBX4 */ 20453, /* VTBX4Pseudo */ 20459, /* VTOSHD */ 20465, /* VTOSHH */ 20470, /* VTOSHS */ 20475, /* VTOSIRD */ 20480, /* VTOSIRH */ 20484, /* VTOSIRS */ 20488, /* VTOSIZD */ 20492, /* VTOSIZH */ 20496, /* VTOSIZS */ 20500, /* VTOSLD */ 20504, /* VTOSLH */ 20509, /* VTOSLS */ 20514, /* VTOUHD */ 20519, /* VTOUHH */ 20524, /* VTOUHS */ 20529, /* VTOUIRD */ 20534, /* VTOUIRH */ 20538, /* VTOUIRS */ 20542, /* VTOUIZD */ 20546, /* VTOUIZH */ 20550, /* VTOUIZS */ 20554, /* VTOULD */ 20558, /* VTOULH */ 20563, /* VTOULS */ 20568, /* VTRNd16 */ 20573, /* VTRNd32 */ 20579, /* VTRNd8 */ 20585, /* VTRNq16 */ 20591, /* VTRNq32 */ 20597, /* VTRNq8 */ 20603, /* VTSTv16i8 */ 20609, /* VTSTv2i32 */ 20614, /* VTSTv4i16 */ 20619, /* VTSTv4i32 */ 20624, /* VTSTv8i16 */ 20629, /* VTSTv8i8 */ 20634, /* VUDOTD */ 20639, /* VUDOTDI */ 20643, /* VUDOTQ */ 20648, /* VUDOTQI */ 20652, /* VUHTOD */ 20657, /* VUHTOH */ 20662, /* VUHTOS */ 20667, /* VUITOD */ 20672, /* VUITOH */ 20676, /* VUITOS */ 20680, /* VULTOD */ 20684, /* VULTOH */ 20689, /* VULTOS */ 20694, /* VUMMLA */ 20699, /* VUSDOTD */ 20703, /* VUSDOTDI */ 20707, /* VUSDOTQ */ 20712, /* VUSDOTQI */ 20716, /* VUSMMLA */ 20721, /* VUZPd16 */ 20725, /* VUZPd8 */ 20731, /* VUZPq16 */ 20737, /* VUZPq32 */ 20743, /* VUZPq8 */ 20749, /* VZIPd16 */ 20755, /* VZIPd8 */ 20761, /* VZIPq16 */ 20767, /* VZIPq32 */ 20773, /* VZIPq8 */ 20779, /* sysLDMDA */ 20785, /* sysLDMDA_UPD */ 20789, /* sysLDMDB */ 20794, /* sysLDMDB_UPD */ 20798, /* sysLDMIA */ 20803, /* sysLDMIA_UPD */ 20807, /* sysLDMIB */ 20812, /* sysLDMIB_UPD */ 20816, /* sysSTMDA */ 20821, /* sysSTMDA_UPD */ 20825, /* sysSTMDB */ 20830, /* sysSTMDB_UPD */ 20834, /* sysSTMIA */ 20839, /* sysSTMIA_UPD */ 20843, /* sysSTMIB */ 20848, /* sysSTMIB_UPD */ 20852, /* t2ADCri */ 20857, /* t2ADCrr */ 20863, /* t2ADCrs */ 20869, /* t2ADDri */ 20876, /* t2ADDri12 */ 20882, /* t2ADDrr */ 20887, /* t2ADDrs */ 20893, /* t2ADDspImm */ 20900, /* t2ADDspImm12 */ 20906, /* t2ADR */ 20911, /* t2ANDri */ 20915, /* t2ANDrr */ 20921, /* t2ANDrs */ 20927, /* t2ASRri */ 20934, /* t2ASRrr */ 20940, /* t2AUT */ 20946, /* t2AUTG */ 20946, /* t2B */ 20951, /* t2BFC */ 20954, /* t2BFI */ 20959, /* t2BFLi */ 20965, /* t2BFLr */ 20969, /* t2BFi */ 20973, /* t2BFic */ 20977, /* t2BFr */ 20981, /* t2BICri */ 20985, /* t2BICrr */ 20991, /* t2BICrs */ 20997, /* t2BTI */ 21004, /* t2BXAUT */ 21004, /* t2BXJ */ 21009, /* t2Bcc */ 21012, /* t2CDP */ 21015, /* t2CDP2 */ 21023, /* t2CLREX */ 21031, /* t2CLRM */ 21033, /* t2CLZ */ 21036, /* t2CMNri */ 21040, /* t2CMNzrr */ 21044, /* t2CMNzrs */ 21048, /* t2CMPri */ 21053, /* t2CMPrr */ 21057, /* t2CMPrs */ 21061, /* t2CPS1p */ 21066, /* t2CPS2p */ 21067, /* t2CPS3p */ 21069, /* t2CRC32B */ 21072, /* t2CRC32CB */ 21075, /* t2CRC32CH */ 21078, /* t2CRC32CW */ 21081, /* t2CRC32H */ 21084, /* t2CRC32W */ 21087, /* t2CSEL */ 21090, /* t2CSINC */ 21094, /* t2CSINV */ 21098, /* t2CSNEG */ 21102, /* t2DBG */ 21106, /* t2DCPS1 */ 21109, /* t2DCPS2 */ 21111, /* t2DCPS3 */ 21113, /* t2DLS */ 21115, /* t2DMB */ 21117, /* t2DSB */ 21120, /* t2EORri */ 21123, /* t2EORrr */ 21129, /* t2EORrs */ 21135, /* t2HINT */ 21142, /* t2HVC */ 21145, /* t2ISB */ 21146, /* t2IT */ 21149, /* t2Int_eh_sjlj_setjmp */ 21151, /* t2Int_eh_sjlj_setjmp_nofp */ 21153, /* t2LDA */ 21155, /* t2LDAB */ 21159, /* t2LDAEX */ 21163, /* t2LDAEXB */ 21167, /* t2LDAEXD */ 21171, /* t2LDAEXH */ 21176, /* t2LDAH */ 21180, /* t2LDC2L_OFFSET */ 21184, /* t2LDC2L_OPTION */ 21190, /* t2LDC2L_POST */ 21196, /* t2LDC2L_PRE */ 21202, /* t2LDC2_OFFSET */ 21208, /* t2LDC2_OPTION */ 21214, /* t2LDC2_POST */ 21220, /* t2LDC2_PRE */ 21226, /* t2LDCL_OFFSET */ 21232, /* t2LDCL_OPTION */ 21238, /* t2LDCL_POST */ 21244, /* t2LDCL_PRE */ 21250, /* t2LDC_OFFSET */ 21256, /* t2LDC_OPTION */ 21262, /* t2LDC_POST */ 21268, /* t2LDC_PRE */ 21274, /* t2LDMDB */ 21280, /* t2LDMDB_UPD */ 21284, /* t2LDMIA */ 21289, /* t2LDMIA_UPD */ 21293, /* t2LDRBT */ 21298, /* t2LDRB_POST */ 21303, /* t2LDRB_PRE */ 21309, /* t2LDRBi12 */ 21315, /* t2LDRBi8 */ 21320, /* t2LDRBpci */ 21325, /* t2LDRBs */ 21329, /* t2LDRD_POST */ 21335, /* t2LDRD_PRE */ 21342, /* t2LDRDi8 */ 21349, /* t2LDREX */ 21355, /* t2LDREXB */ 21360, /* t2LDREXD */ 21364, /* t2LDREXH */ 21369, /* t2LDRHT */ 21373, /* t2LDRH_POST */ 21378, /* t2LDRH_PRE */ 21384, /* t2LDRHi12 */ 21390, /* t2LDRHi8 */ 21395, /* t2LDRHpci */ 21400, /* t2LDRHs */ 21404, /* t2LDRSBT */ 21410, /* t2LDRSB_POST */ 21415, /* t2LDRSB_PRE */ 21421, /* t2LDRSBi12 */ 21427, /* t2LDRSBi8 */ 21432, /* t2LDRSBpci */ 21437, /* t2LDRSBs */ 21441, /* t2LDRSHT */ 21447, /* t2LDRSH_POST */ 21452, /* t2LDRSH_PRE */ 21458, /* t2LDRSHi12 */ 21464, /* t2LDRSHi8 */ 21469, /* t2LDRSHpci */ 21474, /* t2LDRSHs */ 21478, /* t2LDRT */ 21484, /* t2LDR_POST */ 21489, /* t2LDR_PRE */ 21495, /* t2LDRi12 */ 21501, /* t2LDRi8 */ 21506, /* t2LDRpci */ 21511, /* t2LDRs */ 21515, /* t2LE */ 21521, /* t2LEUpdate */ 21522, /* t2LSLri */ 21525, /* t2LSLrr */ 21531, /* t2LSRri */ 21537, /* t2LSRrr */ 21543, /* t2MCR */ 21549, /* t2MCR2 */ 21557, /* t2MCRR */ 21565, /* t2MCRR2 */ 21572, /* t2MLA */ 21579, /* t2MLS */ 21585, /* t2MOVTi16 */ 21591, /* t2MOVi */ 21596, /* t2MOVi16 */ 21601, /* t2MOVr */ 21605, /* t2MOVsra_flag */ 21610, /* t2MOVsrl_flag */ 21614, /* t2MRC */ 21618, /* t2MRC2 */ 21626, /* t2MRRC */ 21634, /* t2MRRC2 */ 21641, /* t2MRS_AR */ 21648, /* t2MRS_M */ 21651, /* t2MRSbanked */ 21655, /* t2MRSsys_AR */ 21659, /* t2MSR_AR */ 21662, /* t2MSR_M */ 21666, /* t2MSRbanked */ 21670, /* t2MUL */ 21674, /* t2MVNi */ 21679, /* t2MVNr */ 21684, /* t2MVNs */ 21689, /* t2ORNri */ 21695, /* t2ORNrr */ 21701, /* t2ORNrs */ 21707, /* t2ORRri */ 21714, /* t2ORRrr */ 21720, /* t2ORRrs */ 21726, /* t2PAC */ 21733, /* t2PACBTI */ 21733, /* t2PACG */ 21733, /* t2PKHBT */ 21738, /* t2PKHTB */ 21744, /* t2PLDWi12 */ 21750, /* t2PLDWi8 */ 21754, /* t2PLDWs */ 21758, /* t2PLDi12 */ 21763, /* t2PLDi8 */ 21767, /* t2PLDpci */ 21771, /* t2PLDs */ 21774, /* t2PLIi12 */ 21779, /* t2PLIi8 */ 21783, /* t2PLIpci */ 21787, /* t2PLIs */ 21790, /* t2QADD */ 21795, /* t2QADD16 */ 21800, /* t2QADD8 */ 21805, /* t2QASX */ 21810, /* t2QDADD */ 21815, /* t2QDSUB */ 21820, /* t2QSAX */ 21825, /* t2QSUB */ 21830, /* t2QSUB16 */ 21835, /* t2QSUB8 */ 21840, /* t2RBIT */ 21845, /* t2REV */ 21849, /* t2REV16 */ 21853, /* t2REVSH */ 21857, /* t2RFEDB */ 21861, /* t2RFEDBW */ 21864, /* t2RFEIA */ 21867, /* t2RFEIAW */ 21870, /* t2RORri */ 21873, /* t2RORrr */ 21879, /* t2RRX */ 21885, /* t2RSBri */ 21890, /* t2RSBrr */ 21896, /* t2RSBrs */ 21902, /* t2SADD16 */ 21909, /* t2SADD8 */ 21914, /* t2SASX */ 21919, /* t2SB */ 21924, /* t2SBCri */ 21924, /* t2SBCrr */ 21930, /* t2SBCrs */ 21936, /* t2SBFX */ 21943, /* t2SDIV */ 21949, /* t2SEL */ 21954, /* t2SETPAN */ 21959, /* t2SG */ 21960, /* t2SHADD16 */ 21962, /* t2SHADD8 */ 21967, /* t2SHASX */ 21972, /* t2SHSAX */ 21977, /* t2SHSUB16 */ 21982, /* t2SHSUB8 */ 21987, /* t2SMC */ 21992, /* t2SMLABB */ 21995, /* t2SMLABT */ 22001, /* t2SMLAD */ 22007, /* t2SMLADX */ 22013, /* t2SMLAL */ 22019, /* t2SMLALBB */ 22027, /* t2SMLALBT */ 22035, /* t2SMLALD */ 22043, /* t2SMLALDX */ 22051, /* t2SMLALTB */ 22059, /* t2SMLALTT */ 22067, /* t2SMLATB */ 22075, /* t2SMLATT */ 22081, /* t2SMLAWB */ 22087, /* t2SMLAWT */ 22093, /* t2SMLSD */ 22099, /* t2SMLSDX */ 22105, /* t2SMLSLD */ 22111, /* t2SMLSLDX */ 22119, /* t2SMMLA */ 22127, /* t2SMMLAR */ 22133, /* t2SMMLS */ 22139, /* t2SMMLSR */ 22145, /* t2SMMUL */ 22151, /* t2SMMULR */ 22156, /* t2SMUAD */ 22161, /* t2SMUADX */ 22166, /* t2SMULBB */ 22171, /* t2SMULBT */ 22176, /* t2SMULL */ 22181, /* t2SMULTB */ 22187, /* t2SMULTT */ 22192, /* t2SMULWB */ 22197, /* t2SMULWT */ 22202, /* t2SMUSD */ 22207, /* t2SMUSDX */ 22212, /* t2SRSDB */ 22217, /* t2SRSDB_UPD */ 22220, /* t2SRSIA */ 22223, /* t2SRSIA_UPD */ 22226, /* t2SSAT */ 22229, /* t2SSAT16 */ 22235, /* t2SSAX */ 22240, /* t2SSUB16 */ 22245, /* t2SSUB8 */ 22250, /* t2STC2L_OFFSET */ 22255, /* t2STC2L_OPTION */ 22261, /* t2STC2L_POST */ 22267, /* t2STC2L_PRE */ 22273, /* t2STC2_OFFSET */ 22279, /* t2STC2_OPTION */ 22285, /* t2STC2_POST */ 22291, /* t2STC2_PRE */ 22297, /* t2STCL_OFFSET */ 22303, /* t2STCL_OPTION */ 22309, /* t2STCL_POST */ 22315, /* t2STCL_PRE */ 22321, /* t2STC_OFFSET */ 22327, /* t2STC_OPTION */ 22333, /* t2STC_POST */ 22339, /* t2STC_PRE */ 22345, /* t2STL */ 22351, /* t2STLB */ 22355, /* t2STLEX */ 22359, /* t2STLEXB */ 22364, /* t2STLEXD */ 22369, /* t2STLEXH */ 22375, /* t2STLH */ 22380, /* t2STMDB */ 22384, /* t2STMDB_UPD */ 22388, /* t2STMIA */ 22393, /* t2STMIA_UPD */ 22397, /* t2STRBT */ 22402, /* t2STRB_POST */ 22407, /* t2STRB_PRE */ 22413, /* t2STRBi12 */ 22419, /* t2STRBi8 */ 22424, /* t2STRBs */ 22429, /* t2STRD_POST */ 22435, /* t2STRD_PRE */ 22442, /* t2STRDi8 */ 22449, /* t2STREX */ 22455, /* t2STREXB */ 22461, /* t2STREXD */ 22466, /* t2STREXH */ 22472, /* t2STRHT */ 22477, /* t2STRH_POST */ 22482, /* t2STRH_PRE */ 22488, /* t2STRHi12 */ 22494, /* t2STRHi8 */ 22499, /* t2STRHs */ 22504, /* t2STRT */ 22510, /* t2STR_POST */ 22515, /* t2STR_PRE */ 22521, /* t2STRi12 */ 22527, /* t2STRi8 */ 22532, /* t2STRs */ 22537, /* t2SUBS_PC_LR */ 22543, /* t2SUBri */ 22546, /* t2SUBri12 */ 22552, /* t2SUBrr */ 22557, /* t2SUBrs */ 22563, /* t2SUBspImm */ 22570, /* t2SUBspImm12 */ 22576, /* t2SXTAB */ 22581, /* t2SXTAB16 */ 22587, /* t2SXTAH */ 22593, /* t2SXTB */ 22599, /* t2SXTB16 */ 22604, /* t2SXTH */ 22609, /* t2TBB */ 22614, /* t2TBH */ 22618, /* t2TEQri */ 22622, /* t2TEQrr */ 22626, /* t2TEQrs */ 22630, /* t2TSB */ 22635, /* t2TSTri */ 22638, /* t2TSTrr */ 22642, /* t2TSTrs */ 22646, /* t2TT */ 22651, /* t2TTA */ 22655, /* t2TTAT */ 22659, /* t2TTT */ 22663, /* t2UADD16 */ 22667, /* t2UADD8 */ 22672, /* t2UASX */ 22677, /* t2UBFX */ 22682, /* t2UDF */ 22688, /* t2UDIV */ 22689, /* t2UHADD16 */ 22694, /* t2UHADD8 */ 22699, /* t2UHASX */ 22704, /* t2UHSAX */ 22709, /* t2UHSUB16 */ 22714, /* t2UHSUB8 */ 22719, /* t2UMAAL */ 22724, /* t2UMLAL */ 22732, /* t2UMULL */ 22740, /* t2UQADD16 */ 22746, /* t2UQADD8 */ 22751, /* t2UQASX */ 22756, /* t2UQSAX */ 22761, /* t2UQSUB16 */ 22766, /* t2UQSUB8 */ 22771, /* t2USAD8 */ 22776, /* t2USADA8 */ 22781, /* t2USAT */ 22787, /* t2USAT16 */ 22793, /* t2USAX */ 22798, /* t2USUB16 */ 22803, /* t2USUB8 */ 22808, /* t2UXTAB */ 22813, /* t2UXTAB16 */ 22819, /* t2UXTAH */ 22825, /* t2UXTB */ 22831, /* t2UXTB16 */ 22836, /* t2UXTH */ 22841, /* t2WLS */ 22846, /* tADC */ 22849, /* tADDhirr */ 22855, /* tADDi3 */ 22860, /* tADDi8 */ 22866, /* tADDrSP */ 22872, /* tADDrSPi */ 22877, /* tADDrr */ 22882, /* tADDspi */ 22888, /* tADDspr */ 22893, /* tADR */ 22898, /* tAND */ 22902, /* tASRri */ 22908, /* tASRrr */ 22914, /* tB */ 22920, /* tBIC */ 22923, /* tBKPT */ 22929, /* tBL */ 22930, /* tBLXNSr */ 22933, /* tBLXi */ 22936, /* tBLXr */ 22939, /* tBX */ 22942, /* tBXNS */ 22945, /* tBcc */ 22948, /* tCBNZ */ 22951, /* tCBZ */ 22953, /* tCMNz */ 22955, /* tCMPhir */ 22959, /* tCMPi8 */ 22963, /* tCMPr */ 22967, /* tCPS */ 22971, /* tEOR */ 22973, /* tHINT */ 22979, /* tHLT */ 22982, /* tInt_WIN_eh_sjlj_longjmp */ 22983, /* tInt_eh_sjlj_longjmp */ 22985, /* tInt_eh_sjlj_setjmp */ 22987, /* tLDMIA */ 22989, /* tLDRBi */ 22993, /* tLDRBr */ 22998, /* tLDRHi */ 23003, /* tLDRHr */ 23008, /* tLDRSB */ 23013, /* tLDRSH */ 23018, /* tLDRi */ 23023, /* tLDRpci */ 23028, /* tLDRr */ 23032, /* tLDRspi */ 23037, /* tLSLri */ 23042, /* tLSLrr */ 23048, /* tLSRri */ 23054, /* tLSRrr */ 23060, /* tMOVSr */ 23066, /* tMOVi8 */ 23068, /* tMOVr */ 23073, /* tMUL */ 23077, /* tMVN */ 23083, /* tORR */ 23088, /* tPICADD */ 23094, /* tPOP */ 23097, /* tPUSH */ 23100, /* tREV */ 23103, /* tREV16 */ 23107, /* tREVSH */ 23111, /* tROR */ 23115, /* tRSB */ 23121, /* tSBC */ 23126, /* tSETEND */ 23132, /* tSTMIA_UPD */ 23133, /* tSTRBi */ 23138, /* tSTRBr */ 23143, /* tSTRHi */ 23148, /* tSTRHr */ 23153, /* tSTRi */ 23158, /* tSTRr */ 23163, /* tSTRspi */ 23168, /* tSUBi3 */ 23173, /* tSUBi8 */ 23179, /* tSUBrr */ 23185, /* tSUBspi */ 23191, /* tSVC */ 23196, /* tSXTB */ 23199, /* tSXTH */ 23203, /* tTRAP */ 23207, /* tTST */ 23207, /* tUDF */ 23211, /* tUXTB */ 23212, /* tUXTH */ 23216, /* t__brkdiv0 */ 23220, }; using namespace OpTypes; const int16_t OpcodeOperandTypes[] = { /* PHI */ -1, /* INLINEASM */ /* INLINEASM_BR */ /* CFI_INSTRUCTION */ i32imm, /* EH_LABEL */ i32imm, /* GC_LABEL */ i32imm, /* ANNOTATION_LABEL */ i32imm, /* KILL */ /* EXTRACT_SUBREG */ -1, -1, i32imm, /* INSERT_SUBREG */ -1, -1, -1, i32imm, /* IMPLICIT_DEF */ -1, /* SUBREG_TO_REG */ -1, -1, -1, i32imm, /* COPY_TO_REGCLASS */ -1, -1, i32imm, /* DBG_VALUE */ /* DBG_VALUE_LIST */ /* DBG_INSTR_REF */ /* DBG_PHI */ /* DBG_LABEL */ -1, /* REG_SEQUENCE */ -1, -1, /* COPY */ -1, -1, /* BUNDLE */ /* LIFETIME_START */ i32imm, /* LIFETIME_END */ i32imm, /* PSEUDO_PROBE */ i64imm, i64imm, i8imm, i32imm, /* ARITH_FENCE */ -1, -1, /* STACKMAP */ i64imm, i32imm, /* FENTRY_CALL */ /* PATCHPOINT */ -1, i64imm, i32imm, -1, i32imm, i32imm, /* LOAD_STACK_GUARD */ -1, /* PREALLOCATED_SETUP */ i32imm, /* PREALLOCATED_ARG */ -1, i32imm, i32imm, /* STATEPOINT */ /* LOCAL_ESCAPE */ -1, i32imm, /* FAULTING_OP */ -1, /* PATCHABLE_OP */ /* PATCHABLE_FUNCTION_ENTER */ /* PATCHABLE_RET */ /* PATCHABLE_FUNCTION_EXIT */ /* PATCHABLE_TAIL_CALL */ /* PATCHABLE_EVENT_CALL */ -1, -1, /* PATCHABLE_TYPED_EVENT_CALL */ -1, -1, -1, /* ICALL_BRANCH_FUNNEL */ /* MEMBARRIER */ /* G_ASSERT_SEXT */ type0, type0, untyped_imm_0, /* G_ASSERT_ZEXT */ type0, type0, untyped_imm_0, /* G_ASSERT_ALIGN */ type0, type0, untyped_imm_0, /* G_ADD */ type0, type0, type0, /* G_SUB */ type0, type0, type0, /* G_MUL */ type0, type0, type0, /* G_SDIV */ type0, type0, type0, /* G_UDIV */ type0, type0, type0, /* G_SREM */ type0, type0, type0, /* G_UREM */ type0, type0, type0, /* G_SDIVREM */ type0, type0, type0, type0, /* G_UDIVREM */ type0, type0, type0, type0, /* G_AND */ type0, type0, type0, /* G_OR */ type0, type0, type0, /* G_XOR */ type0, type0, type0, /* G_IMPLICIT_DEF */ type0, /* G_PHI */ type0, /* G_FRAME_INDEX */ type0, -1, /* G_GLOBAL_VALUE */ type0, -1, /* G_EXTRACT */ type0, type1, untyped_imm_0, /* G_UNMERGE_VALUES */ type0, type1, /* G_INSERT */ type0, type0, type1, untyped_imm_0, /* G_MERGE_VALUES */ type0, type1, /* G_BUILD_VECTOR */ type0, type1, /* G_BUILD_VECTOR_TRUNC */ type0, type1, /* G_CONCAT_VECTORS */ type0, type1, /* G_PTRTOINT */ type0, type1, /* G_INTTOPTR */ type0, type1, /* G_BITCAST */ type0, type1, /* G_FREEZE */ type0, type0, /* G_INTRINSIC_FPTRUNC_ROUND */ type0, type1, i32imm, /* G_INTRINSIC_TRUNC */ type0, type0, /* G_INTRINSIC_ROUND */ type0, type0, /* G_INTRINSIC_LRINT */ type0, type1, /* G_INTRINSIC_ROUNDEVEN */ type0, type0, /* G_READCYCLECOUNTER */ type0, /* G_LOAD */ type0, ptype1, /* G_SEXTLOAD */ type0, ptype1, /* G_ZEXTLOAD */ type0, ptype1, /* G_INDEXED_LOAD */ type0, ptype1, ptype1, type2, -1, /* G_INDEXED_SEXTLOAD */ type0, ptype1, ptype1, type2, -1, /* G_INDEXED_ZEXTLOAD */ type0, ptype1, ptype1, type2, -1, /* G_STORE */ type0, ptype1, /* G_INDEXED_STORE */ ptype0, type1, ptype0, ptype2, -1, /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ type0, type1, type2, type0, type0, /* G_ATOMIC_CMPXCHG */ type0, ptype1, type0, type0, /* G_ATOMICRMW_XCHG */ type0, ptype1, type0, /* G_ATOMICRMW_ADD */ type0, ptype1, type0, /* G_ATOMICRMW_SUB */ type0, ptype1, type0, /* G_ATOMICRMW_AND */ type0, ptype1, type0, /* G_ATOMICRMW_NAND */ type0, ptype1, type0, /* G_ATOMICRMW_OR */ type0, ptype1, type0, /* G_ATOMICRMW_XOR */ type0, ptype1, type0, /* G_ATOMICRMW_MAX */ type0, ptype1, type0, /* G_ATOMICRMW_MIN */ type0, ptype1, type0, /* G_ATOMICRMW_UMAX */ type0, ptype1, type0, /* G_ATOMICRMW_UMIN */ type0, ptype1, type0, /* G_ATOMICRMW_FADD */ type0, ptype1, type0, /* G_ATOMICRMW_FSUB */ type0, ptype1, type0, /* G_ATOMICRMW_FMAX */ type0, ptype1, type0, /* G_ATOMICRMW_FMIN */ type0, ptype1, type0, /* G_ATOMICRMW_UINC_WRAP */ type0, ptype1, type0, /* G_ATOMICRMW_UDEC_WRAP */ type0, ptype1, type0, /* G_FENCE */ i32imm, i32imm, /* G_BRCOND */ type0, -1, /* G_BRINDIRECT */ type0, /* G_INVOKE_REGION_START */ /* G_INTRINSIC */ -1, /* G_INTRINSIC_W_SIDE_EFFECTS */ -1, /* G_ANYEXT */ type0, type1, /* G_TRUNC */ type0, type1, /* G_CONSTANT */ type0, -1, /* G_FCONSTANT */ type0, -1, /* G_VASTART */ type0, /* G_VAARG */ type0, type1, -1, /* G_SEXT */ type0, type1, /* G_SEXT_INREG */ type0, type0, untyped_imm_0, /* G_ZEXT */ type0, type1, /* G_SHL */ type0, type0, type1, /* G_LSHR */ type0, type0, type1, /* G_ASHR */ type0, type0, type1, /* G_FSHL */ type0, type0, type0, type1, /* G_FSHR */ type0, type0, type0, type1, /* G_ROTR */ type0, type0, type1, /* G_ROTL */ type0, type0, type1, /* G_ICMP */ type0, -1, type1, type1, /* G_FCMP */ type0, -1, type1, type1, /* G_SELECT */ type0, type1, type0, type0, /* G_UADDO */ type0, type1, type0, type0, /* G_UADDE */ type0, type1, type0, type0, type1, /* G_USUBO */ type0, type1, type0, type0, /* G_USUBE */ type0, type1, type0, type0, type1, /* G_SADDO */ type0, type1, type0, type0, /* G_SADDE */ type0, type1, type0, type0, type1, /* G_SSUBO */ type0, type1, type0, type0, /* G_SSUBE */ type0, type1, type0, type0, type1, /* G_UMULO */ type0, type1, type0, type0, /* G_SMULO */ type0, type1, type0, type0, /* G_UMULH */ type0, type0, type0, /* G_SMULH */ type0, type0, type0, /* G_UADDSAT */ type0, type0, type0, /* G_SADDSAT */ type0, type0, type0, /* G_USUBSAT */ type0, type0, type0, /* G_SSUBSAT */ type0, type0, type0, /* G_USHLSAT */ type0, type0, type1, /* G_SSHLSAT */ type0, type0, type1, /* G_SMULFIX */ type0, type0, type0, untyped_imm_0, /* G_UMULFIX */ type0, type0, type0, untyped_imm_0, /* G_SMULFIXSAT */ type0, type0, type0, untyped_imm_0, /* G_UMULFIXSAT */ type0, type0, type0, untyped_imm_0, /* G_SDIVFIX */ type0, type0, type0, untyped_imm_0, /* G_UDIVFIX */ type0, type0, type0, untyped_imm_0, /* G_SDIVFIXSAT */ type0, type0, type0, untyped_imm_0, /* G_UDIVFIXSAT */ type0, type0, type0, untyped_imm_0, /* G_FADD */ type0, type0, type0, /* G_FSUB */ type0, type0, type0, /* G_FMUL */ type0, type0, type0, /* G_FMA */ type0, type0, type0, type0, /* G_FMAD */ type0, type0, type0, type0, /* G_FDIV */ type0, type0, type0, /* G_FREM */ type0, type0, type0, /* G_FPOW */ type0, type0, type0, /* G_FPOWI */ type0, type0, type1, /* G_FEXP */ type0, type0, /* G_FEXP2 */ type0, type0, /* G_FLOG */ type0, type0, /* G_FLOG2 */ type0, type0, /* G_FLOG10 */ type0, type0, /* G_FNEG */ type0, type0, /* G_FPEXT */ type0, type1, /* G_FPTRUNC */ type0, type1, /* G_FPTOSI */ type0, type1, /* G_FPTOUI */ type0, type1, /* G_SITOFP */ type0, type1, /* G_UITOFP */ type0, type1, /* G_FABS */ type0, type0, /* G_FCOPYSIGN */ type0, type0, type1, /* G_IS_FPCLASS */ type0, type1, -1, /* G_FCANONICALIZE */ type0, type0, /* G_FMINNUM */ type0, type0, type0, /* G_FMAXNUM */ type0, type0, type0, /* G_FMINNUM_IEEE */ type0, type0, type0, /* G_FMAXNUM_IEEE */ type0, type0, type0, /* G_FMINIMUM */ type0, type0, type0, /* G_FMAXIMUM */ type0, type0, type0, /* G_PTR_ADD */ ptype0, ptype0, type1, /* G_PTRMASK */ ptype0, ptype0, type1, /* G_SMIN */ type0, type0, type0, /* G_SMAX */ type0, type0, type0, /* G_UMIN */ type0, type0, type0, /* G_UMAX */ type0, type0, type0, /* G_ABS */ type0, type0, /* G_LROUND */ type0, type1, /* G_LLROUND */ type0, type1, /* G_BR */ -1, /* G_BRJT */ ptype0, -1, type1, /* G_INSERT_VECTOR_ELT */ type0, type0, type1, type2, /* G_EXTRACT_VECTOR_ELT */ type0, type1, type2, /* G_SHUFFLE_VECTOR */ type0, type1, type1, -1, /* G_CTTZ */ type0, type1, /* G_CTTZ_ZERO_UNDEF */ type0, type1, /* G_CTLZ */ type0, type1, /* G_CTLZ_ZERO_UNDEF */ type0, type1, /* G_CTPOP */ type0, type1, /* G_BSWAP */ type0, type0, /* G_BITREVERSE */ type0, type0, /* G_FCEIL */ type0, type0, /* G_FCOS */ type0, type0, /* G_FSIN */ type0, type0, /* G_FSQRT */ type0, type0, /* G_FFLOOR */ type0, type0, /* G_FRINT */ type0, type0, /* G_FNEARBYINT */ type0, type0, /* G_ADDRSPACE_CAST */ type0, type1, /* G_BLOCK_ADDR */ type0, -1, /* G_JUMP_TABLE */ type0, -1, /* G_DYN_STACKALLOC */ ptype0, type1, i32imm, /* G_STRICT_FADD */ type0, type0, type0, /* G_STRICT_FSUB */ type0, type0, type0, /* G_STRICT_FMUL */ type0, type0, type0, /* G_STRICT_FDIV */ type0, type0, type0, /* G_STRICT_FREM */ type0, type0, type0, /* G_STRICT_FMA */ type0, type0, type0, type0, /* G_STRICT_FSQRT */ type0, type0, /* G_READ_REGISTER */ type0, -1, /* G_WRITE_REGISTER */ -1, type0, /* G_MEMCPY */ ptype0, ptype1, type2, untyped_imm_0, /* G_MEMCPY_INLINE */ ptype0, ptype1, type2, /* G_MEMMOVE */ ptype0, ptype1, type2, untyped_imm_0, /* G_MEMSET */ ptype0, type1, type2, untyped_imm_0, /* G_BZERO */ ptype0, type1, untyped_imm_0, /* G_VECREDUCE_SEQ_FADD */ type0, type1, type2, /* G_VECREDUCE_SEQ_FMUL */ type0, type1, type2, /* G_VECREDUCE_FADD */ type0, type1, /* G_VECREDUCE_FMUL */ type0, type1, /* G_VECREDUCE_FMAX */ type0, type1, /* G_VECREDUCE_FMIN */ type0, type1, /* G_VECREDUCE_ADD */ type0, type1, /* G_VECREDUCE_MUL */ type0, type1, /* G_VECREDUCE_AND */ type0, type1, /* G_VECREDUCE_OR */ type0, type1, /* G_VECREDUCE_XOR */ type0, type1, /* G_VECREDUCE_SMAX */ type0, type1, /* G_VECREDUCE_SMIN */ type0, type1, /* G_VECREDUCE_UMAX */ type0, type1, /* G_VECREDUCE_UMIN */ type0, type1, /* G_SBFX */ type0, type0, type1, type1, /* G_UBFX */ type0, type0, type1, type1, /* ABS */ GPR, GPR, /* ADDSri */ GPR, GPR, mod_imm, i32imm, i32imm, /* ADDSrr */ GPR, GPR, GPR, i32imm, i32imm, /* ADDSrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* ADDSrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* ADJCALLSTACKDOWN */ i32imm, i32imm, i32imm, i32imm, /* ADJCALLSTACKUP */ i32imm, i32imm, i32imm, i32imm, /* ASRi */ GPR, GPR, imm0_32, i32imm, i32imm, CCR, /* ASRr */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, CCR, /* B */ arm_br_target, /* BCCZi64 */ i32imm, GPR, GPR, brtarget, /* BCCi64 */ i32imm, GPR, GPR, GPR, GPR, brtarget, /* BLX_noip */ GPRnoip, /* BLX_pred_noip */ GPRnoip, /* BL_PUSHLR */ GPRlr, arm_bl_target, /* BMOVPCB_CALL */ arm_bl_target, /* BMOVPCRX_CALL */ tGPR, /* BR_JTadd */ GPR, GPR, i32imm, /* BR_JTm_i12 */ GPR, i32imm, i32imm, /* BR_JTm_rs */ GPR, GPRnopc, i32imm, i32imm, /* BR_JTr */ GPR, i32imm, /* BX_CALL */ tGPR, /* CMP_SWAP_16 */ GPR, GPR, GPR, GPR, GPR, /* CMP_SWAP_32 */ GPR, GPR, GPR, GPR, GPR, /* CMP_SWAP_64 */ GPRPair, GPR, GPR, GPRPair, GPRPair, /* CMP_SWAP_8 */ GPR, GPR, GPR, GPR, GPR, /* CONSTPOOL_ENTRY */ cpinst_operand, cpinst_operand, i32imm, /* COPY_STRUCT_BYVAL_I32 */ GPR, GPR, i32imm, i32imm, /* ITasm */ it_pred, it_mask, /* Int_eh_sjlj_dispatchsetup */ /* Int_eh_sjlj_longjmp */ GPR, GPR, /* Int_eh_sjlj_setjmp */ GPR, GPR, /* Int_eh_sjlj_setjmp_nofp */ GPR, GPR, /* Int_eh_sjlj_setup_dispatch */ /* JUMPTABLE_ADDRS */ cpinst_operand, cpinst_operand, i32imm, /* JUMPTABLE_INSTS */ cpinst_operand, cpinst_operand, i32imm, /* JUMPTABLE_TBB */ cpinst_operand, cpinst_operand, i32imm, /* JUMPTABLE_TBH */ cpinst_operand, cpinst_operand, i32imm, /* LDMIA_RET */ GPR, GPR, i32imm, i32imm, reglist, /* LDRBT_POST */ GPR, GPR, i32imm, i32imm, /* LDRConstPool */ GPR, const_pool_asm_imm, i32imm, i32imm, /* LDRHTii */ GPR, GPR, i32imm, i32imm, /* LDRLIT_ga_abs */ GPR, i32imm, /* LDRLIT_ga_pcrel */ GPR, i32imm, /* LDRLIT_ga_pcrel_ldr */ GPR, i32imm, /* LDRSBTii */ GPR, GPR, i32imm, i32imm, /* LDRSHTii */ GPR, GPR, i32imm, i32imm, /* LDRT_POST */ GPR, GPR, i32imm, i32imm, /* LEApcrel */ GPR, i32imm, i32imm, i32imm, /* LEApcrelJT */ GPR, i32imm, i32imm, i32imm, /* LOADDUAL */ GPRPairOp, GPR, GPR, i32imm, /* LSLi */ GPR, GPR, imm0_31, i32imm, i32imm, CCR, /* LSLr */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, CCR, /* LSRi */ GPR, GPR, imm0_32, i32imm, i32imm, CCR, /* LSRr */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, CCR, /* MEMCPY */ GPR, GPR, GPR, GPR, i32imm, /* MLAv5 */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, CCR, /* MOVCCi */ GPR, GPR, mod_imm, i32imm, i32imm, /* MOVCCi16 */ GPR, GPR, imm0_65535_expr, i32imm, i32imm, /* MOVCCi32imm */ GPR, GPR, i32imm, i32imm, i32imm, /* MOVCCr */ GPR, GPR, GPR, i32imm, i32imm, /* MOVCCsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* MOVCCsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* MOVPCRX */ GPR, /* MOVTi16_ga_pcrel */ GPR, GPR, i32imm, pclabel, /* MOV_ga_pcrel */ GPR, i32imm, /* MOV_ga_pcrel_ldr */ GPR, i32imm, /* MOVi16_ga_pcrel */ GPR, i32imm, pclabel, /* MOVi32imm */ GPR, i32imm, /* MOVsra_flag */ GPR, GPR, /* MOVsrl_flag */ GPR, GPR, /* MQPRCopy */ MQPR, MQPR, /* MQQPRLoad */ MQQPR, GPRnopc, /* MQQPRStore */ MQQPR, GPRnopc, /* MQQQQPRLoad */ MQQQQPR, GPRnopc, /* MQQQQPRStore */ MQQQQPR, GPRnopc, /* MULv5 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, CCR, /* MVE_MEMCPYLOOPINST */ rGPR, rGPR, rGPR, /* MVE_MEMSETLOOPINST */ rGPR, MQPR, rGPR, /* MVNCCi */ GPR, GPR, mod_imm, i32imm, i32imm, /* PICADD */ GPR, GPR, pclabel, i32imm, i32imm, /* PICLDR */ GPR, GPR, i32imm, i32imm, i32imm, /* PICLDRB */ GPR, GPR, i32imm, i32imm, i32imm, /* PICLDRH */ GPR, GPR, i32imm, i32imm, i32imm, /* PICLDRSB */ GPR, GPR, i32imm, i32imm, i32imm, /* PICLDRSH */ GPR, GPR, i32imm, i32imm, i32imm, /* PICSTR */ GPR, GPR, i32imm, i32imm, i32imm, /* PICSTRB */ GPR, GPR, i32imm, i32imm, i32imm, /* PICSTRH */ GPR, GPR, i32imm, i32imm, i32imm, /* RORi */ GPR, GPR, imm0_31, i32imm, i32imm, CCR, /* RORr */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, CCR, /* RRX */ GPR, GPR, /* RRXi */ GPR, GPR, i32imm, i32imm, CCR, /* RSBSri */ GPR, GPR, mod_imm, i32imm, i32imm, /* RSBSrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* RSBSrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* SEH_EpilogEnd */ /* SEH_EpilogStart */ /* SEH_Nop */ i32imm, /* SEH_Nop_Ret */ i32imm, /* SEH_PrologEnd */ /* SEH_SaveFRegs */ i32imm, i32imm, /* SEH_SaveLR */ i32imm, /* SEH_SaveRegs */ i32imm, i32imm, /* SEH_SaveRegs_Ret */ i32imm, i32imm, /* SEH_SaveSP */ i32imm, /* SEH_StackAlloc */ i32imm, i32imm, /* SMLALv5 */ GPR, GPR, GPR, GPR, GPR, GPR, i32imm, i32imm, CCR, /* SMULLv5 */ GPR, GPR, GPR, GPR, i32imm, i32imm, CCR, /* SPACE */ GPR, i32imm, GPR, /* STOREDUAL */ GPRPairOp, GPR, GPR, i32imm, /* STRBT_POST */ GPR, GPR, i32imm, i32imm, /* STRBi_preidx */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRBr_preidx */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRH_preidx */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STRT_POST */ GPR, GPR, i32imm, i32imm, /* STRi_preidx */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRr_preidx */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* SUBS_PC_LR */ i32imm, i32imm, i32imm, /* SUBSri */ GPR, GPR, mod_imm, i32imm, i32imm, /* SUBSrr */ GPR, GPR, GPR, i32imm, i32imm, /* SUBSrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* SUBSrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* SpeculationBarrierISBDSBEndBB */ /* SpeculationBarrierSBEndBB */ /* TAILJMPd */ arm_br_target, /* TAILJMPr */ tcGPR, /* TAILJMPr4 */ GPR, /* TCRETURNdi */ i32imm, i32imm, /* TCRETURNri */ tcGPR, i32imm, /* TPsoft */ /* UMLALv5 */ GPR, GPR, GPR, GPR, GPR, GPR, i32imm, i32imm, CCR, /* UMULLv5 */ GPR, GPR, GPR, GPR, i32imm, i32imm, CCR, /* VLD1LNdAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD1LNdAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD1LNdAsm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD1LNdWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD1LNdWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD1LNdWB_fixed_Asm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD1LNdWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1LNdWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1LNdWB_register_Asm_8 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2LNdAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNdAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNdAsm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNdWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNdWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNdWB_fixed_Asm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNdWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2LNdWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2LNdWB_register_Asm_8 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2LNqAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNqAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNqWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNqWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD2LNqWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2LNqWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3DUPdAsm_16 */ VecListThreeDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPdAsm_32 */ VecListThreeDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPdAsm_8 */ VecListThreeDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPdWB_fixed_Asm_16 */ VecListThreeDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPdWB_fixed_Asm_32 */ VecListThreeDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPdWB_fixed_Asm_8 */ VecListThreeDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPdWB_register_Asm_16 */ VecListThreeDAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3DUPdWB_register_Asm_32 */ VecListThreeDAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3DUPdWB_register_Asm_8 */ VecListThreeDAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3DUPqAsm_16 */ VecListThreeQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPqAsm_32 */ VecListThreeQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPqAsm_8 */ VecListThreeQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPqWB_fixed_Asm_16 */ VecListThreeQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPqWB_fixed_Asm_32 */ VecListThreeQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPqWB_fixed_Asm_8 */ VecListThreeQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD3DUPqWB_register_Asm_16 */ VecListThreeQAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3DUPqWB_register_Asm_32 */ VecListThreeQAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3DUPqWB_register_Asm_8 */ VecListThreeQAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3LNdAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNdAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNdAsm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNdWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNdWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNdWB_fixed_Asm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNdWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3LNdWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3LNdWB_register_Asm_8 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3LNqAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNqAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNqWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNqWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD3LNqWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3LNqWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3dAsm_16 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD3dAsm_32 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD3dAsm_8 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD3dWB_fixed_Asm_16 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD3dWB_fixed_Asm_32 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD3dWB_fixed_Asm_8 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD3dWB_register_Asm_16 */ VecListThreeD, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3dWB_register_Asm_32 */ VecListThreeD, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3dWB_register_Asm_8 */ VecListThreeD, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3qAsm_16 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VLD3qAsm_32 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VLD3qAsm_8 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VLD3qWB_fixed_Asm_16 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VLD3qWB_fixed_Asm_32 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VLD3qWB_fixed_Asm_8 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VLD3qWB_register_Asm_16 */ VecListThreeQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3qWB_register_Asm_32 */ VecListThreeQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3qWB_register_Asm_8 */ VecListThreeQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4DUPdAsm_16 */ VecListFourDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPdAsm_32 */ VecListFourDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPdAsm_8 */ VecListFourDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPdWB_fixed_Asm_16 */ VecListFourDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPdWB_fixed_Asm_32 */ VecListFourDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPdWB_fixed_Asm_8 */ VecListFourDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPdWB_register_Asm_16 */ VecListFourDAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4DUPdWB_register_Asm_32 */ VecListFourDAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4DUPdWB_register_Asm_8 */ VecListFourDAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4DUPqAsm_16 */ VecListFourQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPqAsm_32 */ VecListFourQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPqAsm_8 */ VecListFourQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPqWB_fixed_Asm_16 */ VecListFourQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPqWB_fixed_Asm_32 */ VecListFourQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPqWB_fixed_Asm_8 */ VecListFourQAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD4DUPqWB_register_Asm_16 */ VecListFourQAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4DUPqWB_register_Asm_32 */ VecListFourQAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4DUPqWB_register_Asm_8 */ VecListFourQAllLanes, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4LNdAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNdAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNdAsm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNdWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNdWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNdWB_fixed_Asm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNdWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4LNdWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4LNdWB_register_Asm_8 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4LNqAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNqAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNqWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNqWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VLD4LNqWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4LNqWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4dAsm_16 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD4dAsm_32 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD4dAsm_8 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD4dWB_fixed_Asm_16 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD4dWB_fixed_Asm_32 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD4dWB_fixed_Asm_8 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD4dWB_register_Asm_16 */ VecListFourD, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4dWB_register_Asm_32 */ VecListFourD, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4dWB_register_Asm_8 */ VecListFourD, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4qAsm_16 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VLD4qAsm_32 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VLD4qAsm_8 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VLD4qWB_fixed_Asm_16 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VLD4qWB_fixed_Asm_32 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VLD4qWB_fixed_Asm_8 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VLD4qWB_register_Asm_16 */ VecListFourQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4qWB_register_Asm_32 */ VecListFourQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD4qWB_register_Asm_8 */ VecListFourQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VMOVD0 */ DPR, /* VMOVDcc */ DPR, DPR, DPR, i32imm, i32imm, /* VMOVHcc */ HPR, HPR, HPR, i32imm, i32imm, /* VMOVQ0 */ QPR, /* VMOVScc */ SPR, SPR, SPR, i32imm, i32imm, /* VST1LNdAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST1LNdAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST1LNdAsm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST1LNdWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST1LNdWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST1LNdWB_fixed_Asm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST1LNdWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST1LNdWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST1LNdWB_register_Asm_8 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST2LNdAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNdAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNdAsm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNdWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNdWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNdWB_fixed_Asm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNdWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST2LNdWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST2LNdWB_register_Asm_8 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST2LNqAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNqAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNqWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNqWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST2LNqWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST2LNqWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3LNdAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNdAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNdAsm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNdWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNdWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNdWB_fixed_Asm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNdWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3LNdWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3LNdWB_register_Asm_8 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3LNqAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNqAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNqWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNqWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST3LNqWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3LNqWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3dAsm_16 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VST3dAsm_32 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VST3dAsm_8 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VST3dWB_fixed_Asm_16 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VST3dWB_fixed_Asm_32 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VST3dWB_fixed_Asm_8 */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VST3dWB_register_Asm_16 */ VecListThreeD, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3dWB_register_Asm_32 */ VecListThreeD, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3dWB_register_Asm_8 */ VecListThreeD, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3qAsm_16 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VST3qAsm_32 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VST3qAsm_8 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VST3qWB_fixed_Asm_16 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VST3qWB_fixed_Asm_32 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VST3qWB_fixed_Asm_8 */ VecListThreeQ, GPR, i32imm, i32imm, i32imm, /* VST3qWB_register_Asm_16 */ VecListThreeQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3qWB_register_Asm_32 */ VecListThreeQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VST3qWB_register_Asm_8 */ VecListThreeQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4LNdAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNdAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNdAsm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNdWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNdWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNdWB_fixed_Asm_8 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNdWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4LNdWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4LNdWB_register_Asm_8 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4LNqAsm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNqAsm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNqWB_fixed_Asm_16 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNqWB_fixed_Asm_32 */ DPR, i32imm, GPR, i32imm, i32imm, i32imm, /* VST4LNqWB_register_Asm_16 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4LNqWB_register_Asm_32 */ DPR, i32imm, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4dAsm_16 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VST4dAsm_32 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VST4dAsm_8 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VST4dWB_fixed_Asm_16 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VST4dWB_fixed_Asm_32 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VST4dWB_fixed_Asm_8 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VST4dWB_register_Asm_16 */ VecListFourD, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4dWB_register_Asm_32 */ VecListFourD, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4dWB_register_Asm_8 */ VecListFourD, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4qAsm_16 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VST4qAsm_32 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VST4qAsm_8 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VST4qWB_fixed_Asm_16 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VST4qWB_fixed_Asm_32 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VST4qWB_fixed_Asm_8 */ VecListFourQ, GPR, i32imm, i32imm, i32imm, /* VST4qWB_register_Asm_16 */ VecListFourQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4qWB_register_Asm_32 */ VecListFourQ, GPR, i32imm, rGPR, i32imm, i32imm, /* VST4qWB_register_Asm_8 */ VecListFourQ, GPR, i32imm, rGPR, i32imm, i32imm, /* WIN__CHKSTK */ /* WIN__DBZCHK */ tGPR, /* t2ABS */ rGPR, rGPR, /* t2ADDSri */ rGPR, GPRnopc, t2_so_imm, i32imm, i32imm, /* t2ADDSrr */ rGPR, GPRnopc, rGPR, i32imm, i32imm, /* t2ADDSrs */ rGPR, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2BF_LabelPseudo */ pclabel, /* t2BR_JT */ GPR, GPR, i32imm, /* t2CALL_BTI */ i32imm, i32imm, thumb_bl_target, /* t2DoLoopStart */ GPRlr, rGPR, /* t2DoLoopStartTP */ GPRlr, rGPR, rGPR, /* t2LDMIA_RET */ GPR, GPR, i32imm, i32imm, reglist, /* t2LDRBpcrel */ GPRnopc, t2ldr_pcrel_imm12, i32imm, i32imm, /* t2LDRConstPool */ GPR, const_pool_asm_imm, i32imm, i32imm, /* t2LDRHpcrel */ GPRnopc, t2ldr_pcrel_imm12, i32imm, i32imm, /* t2LDRLIT_ga_pcrel */ rGPR, i32imm, /* t2LDRSBpcrel */ GPRnopc, t2ldr_pcrel_imm12, i32imm, i32imm, /* t2LDRSHpcrel */ GPRnopc, t2ldr_pcrel_imm12, i32imm, i32imm, /* t2LDR_POST_imm */ GPR, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2LDR_PRE_imm */ GPR, GPR, i32imm, i32imm, i32imm, /* t2LDRpci_pic */ rGPR, i32imm, pclabel, /* t2LDRpcrel */ GPR, t2ldr_pcrel_imm12, i32imm, i32imm, /* t2LEApcrel */ rGPR, i32imm, i32imm, i32imm, /* t2LEApcrelJT */ rGPR, i32imm, i32imm, i32imm, /* t2LoopDec */ GPRlr, GPRlr, imm0_7, /* t2LoopEnd */ GPRlr, brtarget, /* t2LoopEndDec */ GPRlr, GPRlr, brtarget, /* t2MOVCCasr */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, /* t2MOVCCi */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, /* t2MOVCCi16 */ rGPR, rGPR, imm0_65535_expr, i32imm, i32imm, /* t2MOVCCi32imm */ rGPR, rGPR, i32imm, i32imm, i32imm, /* t2MOVCClsl */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, /* t2MOVCClsr */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, /* t2MOVCCr */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2MOVCCror */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, /* t2MOVSsi */ rGPR, rGPR, i32imm, i32imm, i32imm, /* t2MOVSsr */ rGPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* t2MOVTi16_ga_pcrel */ rGPR, rGPR, i32imm, pclabel, /* t2MOV_ga_pcrel */ rGPR, i32imm, /* t2MOVi16_ga_pcrel */ rGPR, i32imm, pclabel, /* t2MOVi32imm */ rGPR, i32imm, /* t2MOVsi */ rGPR, rGPR, i32imm, i32imm, i32imm, /* t2MOVsr */ rGPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* t2MVNCCi */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, /* t2RSBSri */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, /* t2RSBSrs */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, /* t2STRB_preidx */ GPRnopc, rGPR, GPRnopc, t2am_imm8_offset, i32imm, i32imm, /* t2STRH_preidx */ GPRnopc, rGPR, GPRnopc, t2am_imm8_offset, i32imm, i32imm, /* t2STR_POST_imm */ GPR, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2STR_PRE_imm */ GPR, GPR, i32imm, i32imm, i32imm, /* t2STR_preidx */ GPRnopc, rGPR, GPRnopc, t2am_imm8_offset, i32imm, i32imm, /* t2SUBSri */ rGPR, GPRnopc, t2_so_imm, i32imm, i32imm, /* t2SUBSrr */ rGPR, GPRnopc, rGPR, i32imm, i32imm, /* t2SUBSrs */ rGPR, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2SpeculationBarrierISBDSBEndBB */ /* t2SpeculationBarrierSBEndBB */ /* t2TBB_JT */ GPR, GPR, i32imm, i32imm, /* t2TBH_JT */ GPR, GPR, i32imm, i32imm, /* t2WhileLoopSetup */ GPRlr, rGPR, /* t2WhileLoopStart */ GPRlr, brtarget, /* t2WhileLoopStartLR */ GPRlr, rGPR, brtarget, /* t2WhileLoopStartTP */ GPRlr, rGPR, rGPR, brtarget, /* tADCS */ tGPR, tGPR, tGPR, /* tADDSi3 */ tGPR, tGPR, imm0_7, /* tADDSi8 */ tGPR, tGPR, imm0_255, /* tADDSrr */ tGPR, tGPR, tGPR, /* tADDframe */ tGPR, i32imm, i32imm, /* tADJCALLSTACKDOWN */ i32imm, i32imm, /* tADJCALLSTACKUP */ i32imm, i32imm, /* tBLXNS_CALL */ GPRnopc, /* tBLXr_noip */ i32imm, i32imm, GPRnoip, /* tBL_PUSHLR */ GPRlr, i32imm, i32imm, thumb_bl_target, /* tBRIND */ GPR, i32imm, i32imm, /* tBR_JTr */ tGPR, i32imm, /* tBXNS_RET */ /* tBX_CALL */ tGPR, /* tBX_RET */ i32imm, i32imm, /* tBX_RET_vararg */ tGPR, i32imm, i32imm, /* tBfar */ thumb_bl_target, i32imm, i32imm, /* tCMP_SWAP_16 */ GPR, tGPR, GPR, tGPR, GPR, /* tCMP_SWAP_32 */ GPR, tGPR, GPR, GPR, GPR, /* tCMP_SWAP_8 */ GPR, tGPR, GPR, tGPR, GPR, /* tLDMIA_UPD */ tGPR, tGPR, i32imm, i32imm, reglist, /* tLDRConstPool */ tGPR, const_pool_asm_imm, i32imm, i32imm, /* tLDRLIT_ga_abs */ tGPR, i32imm, /* tLDRLIT_ga_pcrel */ tGPR, i32imm, /* tLDR_postidx */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tLDRpci_pic */ tGPR, i32imm, pclabel, /* tLEApcrel */ tGPR, i32imm, i32imm, i32imm, /* tLEApcrelJT */ tGPR, i32imm, i32imm, i32imm, /* tLSLSri */ tGPR, tGPR, imm0_31, /* tMOVCCr_pseudo */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tPOP_RET */ i32imm, i32imm, reglist, /* tRSBS */ tGPR, tGPR, /* tSBCS */ tGPR, tGPR, tGPR, /* tSUBSi3 */ tGPR, tGPR, imm0_7, /* tSUBSi8 */ tGPR, tGPR, imm0_255, /* tSUBSrr */ tGPR, tGPR, tGPR, /* tTAILJMPd */ thumb_br_target, i32imm, i32imm, /* tTAILJMPdND */ t_brtarget, i32imm, i32imm, /* tTAILJMPr */ tcGPR, /* tTBB_JT */ tGPRwithpc, tGPR, i32imm, i32imm, /* tTBH_JT */ tGPRwithpc, tGPR, i32imm, i32imm, /* tTPsoft */ /* ADCri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* ADCrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* ADCrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* ADCrsr */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* ADDri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* ADDrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* ADDrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* ADDrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* ADR */ GPR, adrlabel, i32imm, i32imm, /* AESD */ QPR, QPR, QPR, /* AESE */ QPR, QPR, QPR, /* AESIMC */ QPR, QPR, /* AESMC */ QPR, QPR, /* ANDri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* ANDrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* ANDrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* ANDrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* BF16VDOTI_VDOTD */ DPR, DPR, DPR, DPR_VFP2, i32imm, /* BF16VDOTI_VDOTQ */ QPR, QPR, QPR, DPR_VFP2, i32imm, /* BF16VDOTS_VDOTD */ DPR, DPR, DPR, DPR, /* BF16VDOTS_VDOTQ */ QPR, QPR, QPR, QPR, /* BF16_VCVT */ DPR, QPR, i32imm, i32imm, /* BF16_VCVTB */ SPR, SPR, SPR, i32imm, i32imm, /* BF16_VCVTT */ SPR, SPR, SPR, i32imm, i32imm, /* BFC */ GPR, GPR, bf_inv_mask_imm, i32imm, i32imm, /* BFI */ GPRnopc, GPRnopc, GPR, bf_inv_mask_imm, i32imm, i32imm, /* BICri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* BICrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* BICrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* BICrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* BKPT */ imm0_65535, /* BL */ arm_bl_target, /* BLX */ GPR, /* BLX_pred */ GPR, i32imm, i32imm, /* BLXi */ arm_blx_target, /* BL_pred */ arm_bl_target, i32imm, i32imm, /* BX */ GPR, /* BXJ */ GPR, i32imm, i32imm, /* BX_RET */ i32imm, i32imm, /* BX_pred */ GPR, i32imm, i32imm, /* Bcc */ arm_br_target, i32imm, i32imm, /* CDE_CX1 */ GPRwithAPSR_NZCVnosp, p_imm, imm_13b, /* CDE_CX1A */ GPRwithAPSR_NZCVnosp, p_imm, GPRwithAPSR_NZCVnosp, imm_13b, i32imm, i32imm, /* CDE_CX1D */ CDEDualRegOp, p_imm, imm_13b, /* CDE_CX1DA */ CDEDualRegOp, p_imm, CDEDualRegOp, imm_13b, i32imm, i32imm, /* CDE_CX2 */ GPRwithAPSR_NZCVnosp, p_imm, GPRwithAPSR_NZCVnosp, imm_9b, /* CDE_CX2A */ GPRwithAPSR_NZCVnosp, p_imm, GPRwithAPSR_NZCVnosp, GPRwithAPSR_NZCVnosp, imm_9b, i32imm, i32imm, /* CDE_CX2D */ CDEDualRegOp, p_imm, GPRwithAPSR_NZCVnosp, imm_9b, /* CDE_CX2DA */ CDEDualRegOp, p_imm, CDEDualRegOp, GPRwithAPSR_NZCVnosp, imm_9b, i32imm, i32imm, /* CDE_CX3 */ GPRwithAPSR_NZCVnosp, p_imm, GPRwithAPSR_NZCVnosp, GPRwithAPSR_NZCVnosp, imm_6b, /* CDE_CX3A */ GPRwithAPSR_NZCVnosp, p_imm, GPRwithAPSR_NZCVnosp, GPRwithAPSR_NZCVnosp, GPRwithAPSR_NZCVnosp, imm_6b, i32imm, i32imm, /* CDE_CX3D */ CDEDualRegOp, p_imm, GPRwithAPSR_NZCVnosp, GPRwithAPSR_NZCVnosp, imm_6b, /* CDE_CX3DA */ CDEDualRegOp, p_imm, CDEDualRegOp, GPRwithAPSR_NZCVnosp, GPRwithAPSR_NZCVnosp, imm_6b, i32imm, i32imm, /* CDE_VCX1A_fpdp */ DPR_VFP2, p_imm, DPR_VFP2, imm_11b, /* CDE_VCX1A_fpsp */ SPR, p_imm, SPR, imm_11b, /* CDE_VCX1A_vec */ MQPR, p_imm, MQPR, imm_12b, i32imm, VCCR, GPRlr, /* CDE_VCX1_fpdp */ DPR_VFP2, p_imm, imm_11b, /* CDE_VCX1_fpsp */ SPR, p_imm, imm_11b, /* CDE_VCX1_vec */ MQPR, p_imm, imm_12b, i32imm, VCCR, GPRlr, MQPR, /* CDE_VCX2A_fpdp */ DPR_VFP2, p_imm, DPR_VFP2, DPR_VFP2, imm_6b, /* CDE_VCX2A_fpsp */ SPR, p_imm, SPR, SPR, imm_6b, /* CDE_VCX2A_vec */ MQPR, p_imm, MQPR, MQPR, imm_7b, i32imm, VCCR, GPRlr, /* CDE_VCX2_fpdp */ DPR_VFP2, p_imm, DPR_VFP2, imm_6b, /* CDE_VCX2_fpsp */ SPR, p_imm, SPR, imm_6b, /* CDE_VCX2_vec */ MQPR, p_imm, MQPR, imm_7b, i32imm, VCCR, GPRlr, MQPR, /* CDE_VCX3A_fpdp */ DPR_VFP2, p_imm, DPR_VFP2, DPR_VFP2, DPR_VFP2, imm_3b, /* CDE_VCX3A_fpsp */ SPR, p_imm, SPR, SPR, SPR, imm_3b, /* CDE_VCX3A_vec */ MQPR, p_imm, MQPR, MQPR, MQPR, imm_4b, i32imm, VCCR, GPRlr, /* CDE_VCX3_fpdp */ DPR_VFP2, p_imm, DPR_VFP2, DPR_VFP2, imm_3b, /* CDE_VCX3_fpsp */ SPR, p_imm, SPR, SPR, imm_3b, /* CDE_VCX3_vec */ MQPR, p_imm, MQPR, MQPR, imm_4b, i32imm, VCCR, GPRlr, MQPR, /* CDP */ p_imm, imm0_15, c_imm, c_imm, c_imm, imm0_7, i32imm, i32imm, /* CDP2 */ p_imm, imm0_15, c_imm, c_imm, c_imm, imm0_7, /* CLREX */ /* CLZ */ GPR, GPR, i32imm, i32imm, /* CMNri */ GPR, mod_imm, i32imm, i32imm, /* CMNzrr */ GPR, GPR, i32imm, i32imm, /* CMNzrsi */ GPR, GPR, i32imm, i32imm, i32imm, /* CMNzrsr */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* CMPri */ GPR, mod_imm, i32imm, i32imm, /* CMPrr */ GPR, GPR, i32imm, i32imm, /* CMPrsi */ GPR, GPR, i32imm, i32imm, i32imm, /* CMPrsr */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* CPS1p */ imm0_31, /* CPS2p */ imod_op, iflags_op, /* CPS3p */ imod_op, iflags_op, imm0_31, /* CRC32B */ GPRnopc, GPRnopc, GPRnopc, /* CRC32CB */ GPRnopc, GPRnopc, GPRnopc, /* CRC32CH */ GPRnopc, GPRnopc, GPRnopc, /* CRC32CW */ GPRnopc, GPRnopc, GPRnopc, /* CRC32H */ GPRnopc, GPRnopc, GPRnopc, /* CRC32W */ GPRnopc, GPRnopc, GPRnopc, /* DBG */ imm0_15, i32imm, i32imm, /* DMB */ memb_opt, /* DSB */ memb_opt, /* EORri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* EORrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* EORrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* EORrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* ERET */ i32imm, i32imm, /* FCONSTD */ DPR, vfp_f64imm, i32imm, i32imm, /* FCONSTH */ HPR, vfp_f16imm, i32imm, i32imm, /* FCONSTS */ SPR, vfp_f32imm, i32imm, i32imm, /* FLDMXDB_UPD */ GPR, GPR, i32imm, i32imm, dpr_reglist, /* FLDMXIA */ GPR, i32imm, i32imm, dpr_reglist, /* FLDMXIA_UPD */ GPR, GPR, i32imm, i32imm, dpr_reglist, /* FMSTAT */ i32imm, i32imm, /* FSTMXDB_UPD */ GPR, GPR, i32imm, i32imm, dpr_reglist, /* FSTMXIA */ GPR, i32imm, i32imm, dpr_reglist, /* FSTMXIA_UPD */ GPR, GPR, i32imm, i32imm, dpr_reglist, /* HINT */ imm0_239, i32imm, i32imm, /* HLT */ imm0_65535, /* HVC */ imm0_65535, /* ISB */ instsyncb_opt, /* LDA */ GPR, GPR, i32imm, i32imm, /* LDAB */ GPR, GPR, i32imm, i32imm, /* LDAEX */ GPR, GPR, i32imm, i32imm, /* LDAEXB */ GPR, GPR, i32imm, i32imm, /* LDAEXD */ GPRPairOp, GPR, i32imm, i32imm, /* LDAEXH */ GPR, GPR, i32imm, i32imm, /* LDAH */ GPR, GPR, i32imm, i32imm, /* LDC2L_OFFSET */ p_imm, c_imm, GPR, i32imm, /* LDC2L_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, /* LDC2L_POST */ p_imm, c_imm, GPR, i32imm, /* LDC2L_PRE */ p_imm, c_imm, GPR, i32imm, /* LDC2_OFFSET */ p_imm, c_imm, GPR, i32imm, /* LDC2_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, /* LDC2_POST */ p_imm, c_imm, GPR, i32imm, /* LDC2_PRE */ p_imm, c_imm, GPR, i32imm, /* LDCL_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* LDCL_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* LDCL_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* LDCL_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* LDC_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* LDC_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* LDC_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* LDC_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* LDMDA */ GPR, i32imm, i32imm, reglist, /* LDMDA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* LDMDB */ GPR, i32imm, i32imm, reglist, /* LDMDB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* LDMIA */ GPR, i32imm, i32imm, reglist, /* LDMIA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* LDMIB */ GPR, i32imm, i32imm, reglist, /* LDMIB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* LDRBT_POST_IMM */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRBT_POST_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRB_POST_IMM */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRB_POST_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRB_PRE_IMM */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRB_PRE_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRBi12 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* LDRBrs */ GPRnopc, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRD */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRD_POST */ GPR, GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRD_PRE */ GPR, GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDREX */ GPR, GPR, i32imm, i32imm, /* LDREXB */ GPR, GPR, i32imm, i32imm, /* LDREXD */ GPRPairOp, GPR, i32imm, i32imm, /* LDREXH */ GPR, GPR, i32imm, i32imm, /* LDRH */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRHTi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRHTr */ GPRnopc, GPRnopc, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRH_POST */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRH_PRE */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRSB */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRSBTi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRSBTr */ GPRnopc, GPRnopc, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRSB_POST */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRSB_PRE */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRSH */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRSHTi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRSHTr */ GPRnopc, GPRnopc, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRSH_POST */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRSH_PRE */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDRT_POST_IMM */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRT_POST_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDR_POST_IMM */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDR_POST_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDR_PRE_IMM */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* LDR_PRE_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* LDRcp */ GPR, GPR, i32imm, i32imm, i32imm, /* LDRi12 */ GPR, GPR, i32imm, i32imm, i32imm, /* LDRrs */ GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* MCR */ p_imm, imm0_7, GPR, c_imm, c_imm, imm0_7, i32imm, i32imm, /* MCR2 */ p_imm, imm0_7, GPR, c_imm, c_imm, imm0_7, /* MCRR */ p_imm, imm0_15, GPRnopc, GPRnopc, c_imm, i32imm, i32imm, /* MCRR2 */ p_imm, imm0_15, GPRnopc, GPRnopc, c_imm, /* MLA */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, CCR, /* MLS */ GPR, GPR, GPR, GPR, i32imm, i32imm, /* MOVPCLR */ i32imm, i32imm, /* MOVTi16 */ GPRnopc, GPR, imm0_65535_expr, i32imm, i32imm, /* MOVi */ GPR, mod_imm, i32imm, i32imm, CCR, /* MOVi16 */ GPR, imm0_65535_expr, i32imm, i32imm, /* MOVr */ GPR, GPR, i32imm, i32imm, CCR, /* MOVr_TC */ tcGPR, tcGPR, i32imm, i32imm, CCR, /* MOVsi */ GPR, GPR, i32imm, i32imm, i32imm, CCR, /* MOVsr */ GPRnopc, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* MRC */ GPRwithAPSR, p_imm, imm0_7, c_imm, c_imm, imm0_7, i32imm, i32imm, /* MRC2 */ GPRwithAPSR, p_imm, imm0_7, c_imm, c_imm, imm0_7, /* MRRC */ GPRnopc, GPRnopc, p_imm, imm0_15, c_imm, i32imm, i32imm, /* MRRC2 */ GPRnopc, GPRnopc, p_imm, imm0_15, c_imm, /* MRS */ GPRnopc, i32imm, i32imm, /* MRSbanked */ GPRnopc, banked_reg, i32imm, i32imm, /* MRSsys */ GPRnopc, i32imm, i32imm, /* MSR */ msr_mask, GPR, i32imm, i32imm, /* MSRbanked */ banked_reg, GPRnopc, i32imm, i32imm, /* MSRi */ msr_mask, mod_imm, i32imm, i32imm, /* MUL */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, CCR, /* MVE_ASRLi */ tGPREven, tGPROdd, tGPREven, tGPROdd, long_shift, i32imm, i32imm, /* MVE_ASRLr */ tGPREven, tGPROdd, tGPREven, tGPROdd, rGPR, i32imm, i32imm, /* MVE_DLSTP_16 */ GPRlr, rGPR, /* MVE_DLSTP_32 */ GPRlr, rGPR, /* MVE_DLSTP_64 */ GPRlr, rGPR, /* MVE_DLSTP_8 */ GPRlr, rGPR, /* MVE_LCTP */ i32imm, i32imm, /* MVE_LETP */ GPRlr, GPRlr, lelabel_u11, /* MVE_LSLLi */ tGPREven, tGPROdd, tGPREven, tGPROdd, long_shift, i32imm, i32imm, /* MVE_LSLLr */ tGPREven, tGPROdd, tGPREven, tGPROdd, rGPR, i32imm, i32imm, /* MVE_LSRL */ tGPREven, tGPROdd, tGPREven, tGPROdd, long_shift, i32imm, i32imm, /* MVE_SQRSHR */ rGPR, rGPR, rGPR, i32imm, i32imm, /* MVE_SQRSHRL */ tGPREven, tGPROdd, tGPREven, tGPROdd, rGPR, saturateop, i32imm, i32imm, /* MVE_SQSHL */ rGPR, rGPR, long_shift, i32imm, i32imm, /* MVE_SQSHLL */ tGPREven, tGPROdd, tGPREven, tGPROdd, long_shift, i32imm, i32imm, /* MVE_SRSHR */ rGPR, rGPR, long_shift, i32imm, i32imm, /* MVE_SRSHRL */ tGPREven, tGPROdd, tGPREven, tGPROdd, long_shift, i32imm, i32imm, /* MVE_UQRSHL */ rGPR, rGPR, rGPR, i32imm, i32imm, /* MVE_UQRSHLL */ tGPREven, tGPROdd, tGPREven, tGPROdd, rGPR, saturateop, i32imm, i32imm, /* MVE_UQSHL */ rGPR, rGPR, long_shift, i32imm, i32imm, /* MVE_UQSHLL */ tGPREven, tGPROdd, tGPREven, tGPROdd, long_shift, i32imm, i32imm, /* MVE_URSHR */ rGPR, rGPR, long_shift, i32imm, i32imm, /* MVE_URSHRL */ tGPREven, tGPROdd, tGPREven, tGPROdd, long_shift, i32imm, i32imm, /* MVE_VABAVs16 */ rGPR, rGPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VABAVs32 */ rGPR, rGPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VABAVs8 */ rGPR, rGPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VABAVu16 */ rGPR, rGPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VABAVu32 */ rGPR, rGPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VABAVu8 */ rGPR, rGPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VABDf16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABDf32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABDs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABDs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABDs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABDu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABDu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABDu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABSf16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABSf32 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABSs16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABSs32 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VABSs8 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADC */ MQPR, cl_FPSCR_NZCV, MQPR, MQPR, cl_FPSCR_NZCV, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADCI */ MQPR, cl_FPSCR_NZCV, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADDLVs32acc */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDLVs32no_acc */ tGPREven, tGPROdd, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDLVu32acc */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDLVu32no_acc */ tGPREven, tGPROdd, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVs16acc */ tGPREven, tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVs16no_acc */ tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVs32acc */ tGPREven, tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVs32no_acc */ tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVs8acc */ tGPREven, tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVs8no_acc */ tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVu16acc */ tGPREven, tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVu16no_acc */ tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVu32acc */ tGPREven, tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVu32no_acc */ tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVu8acc */ tGPREven, tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADDVu8no_acc */ tGPREven, MQPR, i32imm, VCCR, GPRlr, /* MVE_VADD_qr_f16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADD_qr_f32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADD_qr_i16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADD_qr_i32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADD_qr_i8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADDf16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADDf32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADDi16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADDi32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VADDi8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VAND */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VBIC */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VBICimmi16 */ MQPR, MQPR, nImmSplatI16, i32imm, VCCR, GPRlr, /* MVE_VBICimmi32 */ MQPR, MQPR, nImmSplatI32, i32imm, VCCR, GPRlr, /* MVE_VBRSR16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VBRSR32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VBRSR8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCADDf16 */ MQPR, MQPR, MQPR, complexrotateopodd, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCADDf32 */ MQPR, MQPR, MQPR, complexrotateopodd, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCADDi16 */ MQPR, MQPR, MQPR, complexrotateopodd, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCADDi32 */ MQPR, MQPR, MQPR, complexrotateopodd, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCADDi8 */ MQPR, MQPR, MQPR, complexrotateopodd, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCLSs16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCLSs32 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCLSs8 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCLZs16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCLZs32 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCLZs8 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCMLAf16 */ MQPR, MQPR, MQPR, MQPR, complexrotateop, i32imm, VCCR, GPRlr, /* MVE_VCMLAf32 */ MQPR, MQPR, MQPR, MQPR, complexrotateop, i32imm, VCCR, GPRlr, /* MVE_VCMPf16 */ VCCR, MQPR, MQPR, pred_basic_fp, i32imm, VCCR, GPRlr, /* MVE_VCMPf16r */ VCCR, MQPR, GPRwithZR, pred_basic_fp, i32imm, VCCR, GPRlr, /* MVE_VCMPf32 */ VCCR, MQPR, MQPR, pred_basic_fp, i32imm, VCCR, GPRlr, /* MVE_VCMPf32r */ VCCR, MQPR, GPRwithZR, pred_basic_fp, i32imm, VCCR, GPRlr, /* MVE_VCMPi16 */ VCCR, MQPR, MQPR, pred_basic_i, i32imm, VCCR, GPRlr, /* MVE_VCMPi16r */ VCCR, MQPR, GPRwithZR, pred_basic_i, i32imm, VCCR, GPRlr, /* MVE_VCMPi32 */ VCCR, MQPR, MQPR, pred_basic_i, i32imm, VCCR, GPRlr, /* MVE_VCMPi32r */ VCCR, MQPR, GPRwithZR, pred_basic_i, i32imm, VCCR, GPRlr, /* MVE_VCMPi8 */ VCCR, MQPR, MQPR, pred_basic_i, i32imm, VCCR, GPRlr, /* MVE_VCMPi8r */ VCCR, MQPR, GPRwithZR, pred_basic_i, i32imm, VCCR, GPRlr, /* MVE_VCMPs16 */ VCCR, MQPR, MQPR, pred_basic_s, i32imm, VCCR, GPRlr, /* MVE_VCMPs16r */ VCCR, MQPR, GPRwithZR, pred_basic_s, i32imm, VCCR, GPRlr, /* MVE_VCMPs32 */ VCCR, MQPR, MQPR, pred_basic_s, i32imm, VCCR, GPRlr, /* MVE_VCMPs32r */ VCCR, MQPR, GPRwithZR, pred_basic_s, i32imm, VCCR, GPRlr, /* MVE_VCMPs8 */ VCCR, MQPR, MQPR, pred_basic_s, i32imm, VCCR, GPRlr, /* MVE_VCMPs8r */ VCCR, MQPR, GPRwithZR, pred_basic_s, i32imm, VCCR, GPRlr, /* MVE_VCMPu16 */ VCCR, MQPR, MQPR, pred_basic_u, i32imm, VCCR, GPRlr, /* MVE_VCMPu16r */ VCCR, MQPR, GPRwithZR, pred_basic_u, i32imm, VCCR, GPRlr, /* MVE_VCMPu32 */ VCCR, MQPR, MQPR, pred_basic_u, i32imm, VCCR, GPRlr, /* MVE_VCMPu32r */ VCCR, MQPR, GPRwithZR, pred_basic_u, i32imm, VCCR, GPRlr, /* MVE_VCMPu8 */ VCCR, MQPR, MQPR, pred_basic_u, i32imm, VCCR, GPRlr, /* MVE_VCMPu8r */ VCCR, MQPR, GPRwithZR, pred_basic_u, i32imm, VCCR, GPRlr, /* MVE_VCMULf16 */ MQPR, MQPR, MQPR, complexrotateop, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCMULf32 */ MQPR, MQPR, MQPR, complexrotateop, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCTP16 */ VCCR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VCTP32 */ VCCR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VCTP64 */ VCCR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VCTP8 */ VCCR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VCVTf16f32bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VCVTf16f32th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VCVTf16s16_fix */ MQPR, MQPR, -1, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTf16s16n */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTf16u16_fix */ MQPR, MQPR, -1, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTf16u16n */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTf32f16bh */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTf32f16th */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTf32s32_fix */ MQPR, MQPR, -1, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTf32s32n */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTf32u32_fix */ MQPR, MQPR, -1, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTf32u32n */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs16f16_fix */ MQPR, MQPR, -1, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs16f16a */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs16f16m */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs16f16n */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs16f16p */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs16f16z */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs32f32_fix */ MQPR, MQPR, -1, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs32f32a */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs32f32m */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs32f32n */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs32f32p */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTs32f32z */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu16f16_fix */ MQPR, MQPR, -1, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu16f16a */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu16f16m */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu16f16n */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu16f16p */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu16f16z */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu32f32_fix */ MQPR, MQPR, -1, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu32f32a */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu32f32m */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu32f32n */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu32f32p */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VCVTu32f32z */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VDDUPu16 */ MQPR, tGPREven, tGPREven, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VDDUPu32 */ MQPR, tGPREven, tGPREven, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VDDUPu8 */ MQPR, tGPREven, tGPREven, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VDUP16 */ MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VDUP32 */ MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VDUP8 */ MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VDWDUPu16 */ MQPR, tGPREven, tGPREven, tGPROdd, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VDWDUPu32 */ MQPR, tGPREven, tGPREven, tGPROdd, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VDWDUPu8 */ MQPR, tGPREven, tGPREven, tGPROdd, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VEOR */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VFMA_qr_Sf16 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VFMA_qr_Sf32 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VFMA_qr_f16 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VFMA_qr_f32 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VFMAf16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VFMAf32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VFMSf16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VFMSf32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VHADD_qr_s16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADD_qr_s32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADD_qr_s8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADD_qr_u16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADD_qr_u32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADD_qr_u8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADDs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADDs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADDs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADDu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADDu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHADDu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHCADDs16 */ MQPR, MQPR, MQPR, complexrotateopodd, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHCADDs32 */ MQPR, MQPR, MQPR, complexrotateopodd, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHCADDs8 */ MQPR, MQPR, MQPR, complexrotateopodd, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUB_qr_s16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUB_qr_s32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUB_qr_s8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUB_qr_u16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUB_qr_u32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUB_qr_u8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUBs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUBs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUBs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUBu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUBu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VHSUBu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VIDUPu16 */ MQPR, tGPREven, tGPREven, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VIDUPu32 */ MQPR, tGPREven, tGPREven, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VIDUPu8 */ MQPR, tGPREven, tGPREven, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VIWDUPu16 */ MQPR, tGPREven, tGPREven, tGPROdd, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VIWDUPu32 */ MQPR, tGPREven, tGPREven, tGPROdd, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VIWDUPu8 */ MQPR, tGPREven, tGPREven, tGPROdd, MVE_VIDUP_imm, i32imm, VCCR, GPRlr, MQPR, /* MVE_VLD20_16 */ VecList2Q, VecList2Q, GPRnopc, /* MVE_VLD20_16_wb */ VecList2Q, rGPR, VecList2Q, rGPR, /* MVE_VLD20_32 */ VecList2Q, VecList2Q, GPRnopc, /* MVE_VLD20_32_wb */ VecList2Q, rGPR, VecList2Q, rGPR, /* MVE_VLD20_8 */ VecList2Q, VecList2Q, GPRnopc, /* MVE_VLD20_8_wb */ VecList2Q, rGPR, VecList2Q, rGPR, /* MVE_VLD21_16 */ VecList2Q, VecList2Q, GPRnopc, /* MVE_VLD21_16_wb */ VecList2Q, rGPR, VecList2Q, rGPR, /* MVE_VLD21_32 */ VecList2Q, VecList2Q, GPRnopc, /* MVE_VLD21_32_wb */ VecList2Q, rGPR, VecList2Q, rGPR, /* MVE_VLD21_8 */ VecList2Q, VecList2Q, GPRnopc, /* MVE_VLD21_8_wb */ VecList2Q, rGPR, VecList2Q, rGPR, /* MVE_VLD40_16 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD40_16_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD40_32 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD40_32_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD40_8 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD40_8_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD41_16 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD41_16_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD41_32 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD41_32_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD41_8 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD41_8_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD42_16 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD42_16_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD42_32 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD42_32_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD42_8 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD42_8_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD43_16 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD43_16_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD43_32 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD43_32_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLD43_8 */ VecList4Q, VecList4Q, GPRnopc, /* MVE_VLD43_8_wb */ VecList4Q, rGPR, VecList4Q, rGPR, /* MVE_VLDRBS16 */ MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBS16_post */ tGPR, MQPR, tGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VLDRBS16_pre */ tGPR, MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBS16_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRBS32 */ MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBS32_post */ tGPR, MQPR, tGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VLDRBS32_pre */ tGPR, MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBS32_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRBU16 */ MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBU16_post */ tGPR, MQPR, tGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VLDRBU16_pre */ tGPR, MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBU16_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRBU32 */ MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBU32_post */ tGPR, MQPR, tGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VLDRBU32_pre */ tGPR, MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBU32_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRBU8 */ MQPR, GPRnopc, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBU8_post */ rGPR, MQPR, rGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VLDRBU8_pre */ rGPR, MQPR, rGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRBU8_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRDU64_qi */ MQPR, MQPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRDU64_qi_pre */ MQPR, MQPR, MQPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRDU64_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRDU64_rq_u */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRHS32 */ MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRHS32_post */ tGPR, MQPR, tGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VLDRHS32_pre */ tGPR, MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRHS32_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRHS32_rq_u */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRHU16 */ MQPR, GPRnopc, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRHU16_post */ rGPR, MQPR, rGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VLDRHU16_pre */ rGPR, MQPR, rGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRHU16_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRHU16_rq_u */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRHU32 */ MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRHU32_post */ tGPR, MQPR, tGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VLDRHU32_pre */ tGPR, MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRHU32_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRHU32_rq_u */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRWU32 */ MQPR, GPRnopc, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRWU32_post */ rGPR, MQPR, rGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VLDRWU32_pre */ rGPR, MQPR, rGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRWU32_qi */ MQPR, MQPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRWU32_qi_pre */ MQPR, MQPR, MQPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VLDRWU32_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VLDRWU32_rq_u */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXAVs16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXAVs32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXAVs8 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXAs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXAs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXAs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXNMAVf16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXNMAVf32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXNMAf16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXNMAf32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXNMVf16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXNMVf32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXNMf16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMAXNMf32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMAXVs16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXVs32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXVs8 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXVu16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXVu32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXVu8 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMAXs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMAXs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMAXs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMAXu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMAXu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMAXu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMINAVs16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINAVs32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINAVs8 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINAs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINAs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINAs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINNMAVf16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINNMAVf32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINNMAf16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINNMAf32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINNMVf16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINNMVf32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINNMf16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMINNMf32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMINVs16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINVs32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINVs8 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINVu16 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINVu32 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINVu8 */ rGPR, rGPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMINs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMINs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMINs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMINu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMINu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMINu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMLADAVas16 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVas32 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVas8 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVau16 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVau32 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVau8 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVaxs16 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVaxs32 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVaxs8 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVs16 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVs32 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVs8 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVu16 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVu32 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVu8 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVxs16 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVxs32 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLADAVxs8 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVas16 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVas32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVau16 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVau32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVaxs16 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVaxs32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVs16 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVs32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVu16 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVu32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVxs16 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLALDAVxs32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLAS_qr_i16 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VMLAS_qr_i32 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VMLAS_qr_i8 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VMLA_qr_i16 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VMLA_qr_i32 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VMLA_qr_i8 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVas16 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVas32 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVas8 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVaxs16 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVaxs32 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVaxs8 */ tGPREven, tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVs16 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVs32 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVs8 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVxs16 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVxs32 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSDAVxs8 */ tGPREven, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSLDAVas16 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSLDAVas32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSLDAVaxs16 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSLDAVaxs32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSLDAVs16 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSLDAVs32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSLDAVxs16 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMLSLDAVxs32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMOVLs16bh */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVLs16th */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVLs8bh */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVLs8th */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVLu16bh */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVLu16th */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVLu8bh */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVLu8th */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVNi16bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMOVNi16th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMOVNi32bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMOVNi32th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VMOV_from_lane_32 */ rGPR, MQPR, i32imm, i32imm, i32imm, /* MVE_VMOV_from_lane_s16 */ rGPR, MQPR, i32imm, i32imm, i32imm, /* MVE_VMOV_from_lane_s8 */ rGPR, MQPR, i32imm, i32imm, i32imm, /* MVE_VMOV_from_lane_u16 */ rGPR, MQPR, i32imm, i32imm, i32imm, /* MVE_VMOV_from_lane_u8 */ rGPR, MQPR, i32imm, i32imm, i32imm, /* MVE_VMOV_q_rr */ MQPR, MQPR, rGPR, rGPR, i32imm, i32imm, i32imm, i32imm, /* MVE_VMOV_rr_q */ rGPR, rGPR, MQPR, i32imm, i32imm, i32imm, i32imm, /* MVE_VMOV_to_lane_16 */ MQPR, MQPR, rGPR, i32imm, i32imm, i32imm, /* MVE_VMOV_to_lane_32 */ MQPR, MQPR, rGPR, i32imm, i32imm, i32imm, /* MVE_VMOV_to_lane_8 */ MQPR, MQPR, rGPR, i32imm, i32imm, i32imm, /* MVE_VMOVimmf32 */ MQPR, nImmVMOVF32, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVimmi16 */ MQPR, nImmSplatI16, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVimmi32 */ MQPR, nImmVMOVI32, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVimmi64 */ MQPR, nImmSplatI64, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMOVimmi8 */ MQPR, nImmSplatI8, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULHs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULHs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULHs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULHu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULHu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULHu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLBp16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLBp8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLBs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLBs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLBs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLBu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLBu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLBu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLTp16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLTp8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLTs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLTs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLTs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLTu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLTu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULLTu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMUL_qr_f16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMUL_qr_f32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMUL_qr_i16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMUL_qr_i32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMUL_qr_i8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULf16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULf32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULi16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULi32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMULi8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMVN */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMVNimmi16 */ MQPR, nImmSplatI16, i32imm, VCCR, GPRlr, MQPR, /* MVE_VMVNimmi32 */ MQPR, nImmVMOVI32, i32imm, VCCR, GPRlr, MQPR, /* MVE_VNEGf16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VNEGf32 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VNEGs16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VNEGs32 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VNEGs8 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VORN */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VORR */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VORRimmi16 */ MQPR, MQPR, nImmSplatI16, i32imm, VCCR, GPRlr, /* MVE_VORRimmi32 */ MQPR, MQPR, nImmSplatI32, i32imm, VCCR, GPRlr, /* MVE_VPNOT */ VCCR, VCCR, i32imm, VCCR, GPRlr, /* MVE_VPSEL */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VPST */ vpt_mask, /* MVE_VPTv16i8 */ vpt_mask, MQPR, MQPR, pred_basic_i, /* MVE_VPTv16i8r */ vpt_mask, MQPR, GPRwithZR, pred_basic_i, /* MVE_VPTv16s8 */ vpt_mask, MQPR, MQPR, pred_basic_s, /* MVE_VPTv16s8r */ vpt_mask, MQPR, GPRwithZR, pred_basic_s, /* MVE_VPTv16u8 */ vpt_mask, MQPR, MQPR, pred_basic_u, /* MVE_VPTv16u8r */ vpt_mask, MQPR, GPRwithZR, pred_basic_u, /* MVE_VPTv4f32 */ vpt_mask, MQPR, MQPR, pred_basic_fp, /* MVE_VPTv4f32r */ vpt_mask, MQPR, GPRwithZR, pred_basic_fp, /* MVE_VPTv4i32 */ vpt_mask, MQPR, MQPR, pred_basic_i, /* MVE_VPTv4i32r */ vpt_mask, MQPR, GPRwithZR, pred_basic_i, /* MVE_VPTv4s32 */ vpt_mask, MQPR, MQPR, pred_basic_s, /* MVE_VPTv4s32r */ vpt_mask, MQPR, GPRwithZR, pred_basic_s, /* MVE_VPTv4u32 */ vpt_mask, MQPR, MQPR, pred_basic_u, /* MVE_VPTv4u32r */ vpt_mask, MQPR, GPRwithZR, pred_basic_u, /* MVE_VPTv8f16 */ vpt_mask, MQPR, MQPR, pred_basic_fp, /* MVE_VPTv8f16r */ vpt_mask, MQPR, GPRwithZR, pred_basic_fp, /* MVE_VPTv8i16 */ vpt_mask, MQPR, MQPR, pred_basic_i, /* MVE_VPTv8i16r */ vpt_mask, MQPR, GPRwithZR, pred_basic_i, /* MVE_VPTv8s16 */ vpt_mask, MQPR, MQPR, pred_basic_s, /* MVE_VPTv8s16r */ vpt_mask, MQPR, GPRwithZR, pred_basic_s, /* MVE_VPTv8u16 */ vpt_mask, MQPR, MQPR, pred_basic_u, /* MVE_VPTv8u16r */ vpt_mask, MQPR, GPRwithZR, pred_basic_u, /* MVE_VQABSs16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQABSs32 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQABSs8 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADD_qr_s16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADD_qr_s32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADD_qr_s8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADD_qr_u16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADD_qr_u32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADD_qr_u8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADDs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADDs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADDs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADDu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADDu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQADDu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMLADHXs16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLADHXs32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLADHXs8 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLADHs16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLADHs32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLADHs8 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLAH_qrs16 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLAH_qrs32 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLAH_qrs8 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLASH_qrs16 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLASH_qrs32 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLASH_qrs8 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLSDHXs16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLSDHXs32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLSDHXs8 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLSDHs16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLSDHs32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMLSDHs8 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQDMULH_qr_s16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULH_qr_s32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULH_qr_s8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULHi16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULHi32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULHi8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULL_qr_s16bh */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULL_qr_s16th */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULL_qr_s32bh */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULL_qr_s32th */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULLs16bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULLs16th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULLs32bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQDMULLs32th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQMOVNs16bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVNs16th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVNs32bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVNs32th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVNu16bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVNu16th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVNu32bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVNu32th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVUNs16bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVUNs16th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVUNs32bh */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQMOVUNs32th */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQNEGs16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQNEGs32 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQNEGs8 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRDMLADHXs16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLADHXs32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLADHXs8 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLADHs16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLADHs32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLADHs8 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLAH_qrs16 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLAH_qrs32 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLAH_qrs8 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLASH_qrs16 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLASH_qrs32 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLASH_qrs8 */ MQPR, MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLSDHXs16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLSDHXs32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLSDHXs8 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLSDHs16 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLSDHs32 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMLSDHs8 */ MQPR, MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VQRDMULH_qr_s16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRDMULH_qr_s32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRDMULH_qr_s8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRDMULHi16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRDMULHi32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRDMULHi8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRSHL_by_vecs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRSHL_by_vecs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRSHL_by_vecs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRSHL_by_vecu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRSHL_by_vecu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRSHL_by_vecu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQRSHL_qrs16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRSHL_qrs32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRSHL_qrs8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRSHL_qru16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRSHL_qru32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRSHL_qru8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQRSHRNbhs16 */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQRSHRNbhs32 */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQRSHRNbhu16 */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQRSHRNbhu32 */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQRSHRNths16 */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQRSHRNths32 */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQRSHRNthu16 */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQRSHRNthu32 */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQRSHRUNs16bh */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQRSHRUNs16th */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQRSHRUNs32bh */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQRSHRUNs32th */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQSHLU_imms16 */ MQPR, MQPR, imm0_15, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHLU_imms32 */ MQPR, MQPR, imm0_31, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHLU_imms8 */ MQPR, MQPR, imm0_7, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHL_by_vecs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHL_by_vecs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHL_by_vecs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHL_by_vecu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHL_by_vecu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHL_by_vecu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHL_qrs16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQSHL_qrs32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQSHL_qrs8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQSHL_qru16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQSHL_qru32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQSHL_qru8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VQSHLimms16 */ MQPR, MQPR, imm0_15, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHLimms32 */ MQPR, MQPR, imm0_31, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHLimms8 */ MQPR, MQPR, imm0_7, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHLimmu16 */ MQPR, MQPR, imm0_15, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHLimmu32 */ MQPR, MQPR, imm0_31, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHLimmu8 */ MQPR, MQPR, imm0_7, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSHRNbhs16 */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQSHRNbhs32 */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQSHRNbhu16 */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQSHRNbhu32 */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQSHRNths16 */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQSHRNths32 */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQSHRNthu16 */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQSHRNthu32 */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQSHRUNs16bh */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQSHRUNs16th */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VQSHRUNs32bh */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQSHRUNs32th */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VQSUB_qr_s16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUB_qr_s32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUB_qr_s8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUB_qr_u16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUB_qr_u32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUB_qr_u8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUBs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUBs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUBs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUBu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUBu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VQSUBu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VREV16_8 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VREV32_16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VREV32_8 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VREV64_16 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VREV64_32 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VREV64_8 */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRHADDs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRHADDs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRHADDs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRHADDu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRHADDu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRHADDu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf16A */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf16M */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf16N */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf16P */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf16X */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf16Z */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf32A */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf32M */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf32N */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf32P */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf32X */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRINTf32Z */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRMLALDAVHas32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMLALDAVHau32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMLALDAVHaxs32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMLALDAVHs32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMLALDAVHu32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMLALDAVHxs32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMLSLDAVHas32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMLSLDAVHaxs32 */ tGPREven, tGPROdd, tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMLSLDAVHs32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMLSLDAVHxs32 */ tGPREven, tGPROdd, MQPR, MQPR, i32imm, VCCR, GPRlr, /* MVE_VRMULHs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRMULHs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRMULHs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRMULHu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRMULHu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRMULHu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHL_by_vecs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHL_by_vecs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHL_by_vecs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHL_by_vecu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHL_by_vecu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHL_by_vecu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHL_qrs16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VRSHL_qrs32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VRSHL_qrs8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VRSHL_qru16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VRSHL_qru32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VRSHL_qru8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VRSHRNi16bh */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VRSHRNi16th */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VRSHRNi32bh */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VRSHRNi32th */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VRSHR_imms16 */ MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHR_imms32 */ MQPR, MQPR, shr_imm32, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHR_imms8 */ MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHR_immu16 */ MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHR_immu32 */ MQPR, MQPR, shr_imm32, i32imm, VCCR, GPRlr, MQPR, /* MVE_VRSHR_immu8 */ MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSBC */ MQPR, cl_FPSCR_NZCV, MQPR, MQPR, cl_FPSCR_NZCV, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSBCI */ MQPR, cl_FPSCR_NZCV, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLC */ rGPR, MQPR, MQPR, rGPR, long_shift, i32imm, VCCR, GPRlr, /* MVE_VSHLL_imms16bh */ MQPR, MQPR, mve_shift_imm1_15, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_imms16th */ MQPR, MQPR, mve_shift_imm1_15, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_imms8bh */ MQPR, MQPR, mve_shift_imm1_7, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_imms8th */ MQPR, MQPR, mve_shift_imm1_7, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_immu16bh */ MQPR, MQPR, mve_shift_imm1_15, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_immu16th */ MQPR, MQPR, mve_shift_imm1_15, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_immu8bh */ MQPR, MQPR, mve_shift_imm1_7, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_immu8th */ MQPR, MQPR, mve_shift_imm1_7, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_lws16bh */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_lws16th */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_lws8bh */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_lws8th */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_lwu16bh */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_lwu16th */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_lwu8bh */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHLL_lwu8th */ MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_by_vecs16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_by_vecs32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_by_vecs8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_by_vecu16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_by_vecu32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_by_vecu8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_immi16 */ MQPR, MQPR, imm0_15, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_immi32 */ MQPR, MQPR, imm0_31, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_immi8 */ MQPR, MQPR, imm0_7, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHL_qrs16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VSHL_qrs32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VSHL_qrs8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VSHL_qru16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VSHL_qru32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VSHL_qru8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, /* MVE_VSHRNi16bh */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VSHRNi16th */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VSHRNi32bh */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VSHRNi32th */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VSHR_imms16 */ MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHR_imms32 */ MQPR, MQPR, shr_imm32, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHR_imms8 */ MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHR_immu16 */ MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHR_immu32 */ MQPR, MQPR, shr_imm32, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSHR_immu8 */ MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSLIimm16 */ MQPR, MQPR, MQPR, imm0_15, i32imm, VCCR, GPRlr, /* MVE_VSLIimm32 */ MQPR, MQPR, MQPR, imm0_31, i32imm, VCCR, GPRlr, /* MVE_VSLIimm8 */ MQPR, MQPR, MQPR, imm0_7, i32imm, VCCR, GPRlr, /* MVE_VSRIimm16 */ MQPR, MQPR, MQPR, shr_imm16, i32imm, VCCR, GPRlr, /* MVE_VSRIimm32 */ MQPR, MQPR, MQPR, shr_imm32, i32imm, VCCR, GPRlr, /* MVE_VSRIimm8 */ MQPR, MQPR, MQPR, shr_imm8, i32imm, VCCR, GPRlr, /* MVE_VST20_16 */ VecList2Q, GPRnopc, /* MVE_VST20_16_wb */ rGPR, VecList2Q, rGPR, /* MVE_VST20_32 */ VecList2Q, GPRnopc, /* MVE_VST20_32_wb */ rGPR, VecList2Q, rGPR, /* MVE_VST20_8 */ VecList2Q, GPRnopc, /* MVE_VST20_8_wb */ rGPR, VecList2Q, rGPR, /* MVE_VST21_16 */ VecList2Q, GPRnopc, /* MVE_VST21_16_wb */ rGPR, VecList2Q, rGPR, /* MVE_VST21_32 */ VecList2Q, GPRnopc, /* MVE_VST21_32_wb */ rGPR, VecList2Q, rGPR, /* MVE_VST21_8 */ VecList2Q, GPRnopc, /* MVE_VST21_8_wb */ rGPR, VecList2Q, rGPR, /* MVE_VST40_16 */ VecList4Q, GPRnopc, /* MVE_VST40_16_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST40_32 */ VecList4Q, GPRnopc, /* MVE_VST40_32_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST40_8 */ VecList4Q, GPRnopc, /* MVE_VST40_8_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST41_16 */ VecList4Q, GPRnopc, /* MVE_VST41_16_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST41_32 */ VecList4Q, GPRnopc, /* MVE_VST41_32_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST41_8 */ VecList4Q, GPRnopc, /* MVE_VST41_8_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST42_16 */ VecList4Q, GPRnopc, /* MVE_VST42_16_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST42_32 */ VecList4Q, GPRnopc, /* MVE_VST42_32_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST42_8 */ VecList4Q, GPRnopc, /* MVE_VST42_8_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST43_16 */ VecList4Q, GPRnopc, /* MVE_VST43_16_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST43_32 */ VecList4Q, GPRnopc, /* MVE_VST43_32_wb */ rGPR, VecList4Q, rGPR, /* MVE_VST43_8 */ VecList4Q, GPRnopc, /* MVE_VST43_8_wb */ rGPR, VecList4Q, rGPR, /* MVE_VSTRB16 */ MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRB16_post */ tGPR, MQPR, tGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VSTRB16_pre */ tGPR, MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRB16_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRB32 */ MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRB32_post */ tGPR, MQPR, tGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VSTRB32_pre */ tGPR, MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRB32_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRB8_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRBU8 */ MQPR, GPRnopc, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRBU8_post */ rGPR, MQPR, rGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VSTRBU8_pre */ rGPR, MQPR, rGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRD64_qi */ MQPR, MQPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRD64_qi_pre */ MQPR, MQPR, MQPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRD64_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRD64_rq_u */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRH16_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRH16_rq_u */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRH32 */ MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRH32_post */ tGPR, MQPR, tGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VSTRH32_pre */ tGPR, MQPR, tGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRH32_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRH32_rq_u */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRHU16 */ MQPR, GPRnopc, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRHU16_post */ rGPR, MQPR, rGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VSTRHU16_pre */ rGPR, MQPR, rGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRW32_qi */ MQPR, MQPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRW32_qi_pre */ MQPR, MQPR, MQPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRW32_rq */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRW32_rq_u */ MQPR, GPRnopc, MQPR, i32imm, VCCR, GPRlr, /* MVE_VSTRWU32 */ MQPR, GPRnopc, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSTRWU32_post */ rGPR, MQPR, rGPR, -1, i32imm, VCCR, GPRlr, /* MVE_VSTRWU32_pre */ rGPR, MQPR, rGPR, i32imm, i32imm, VCCR, GPRlr, /* MVE_VSUB_qr_f16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSUB_qr_f32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSUB_qr_i16 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSUB_qr_i32 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSUB_qr_i8 */ MQPR, MQPR, rGPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSUBf16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSUBf32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSUBi16 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSUBi32 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_VSUBi8 */ MQPR, MQPR, MQPR, i32imm, VCCR, GPRlr, MQPR, /* MVE_WLSTP_16 */ GPRlr, rGPR, wlslabel_u11, /* MVE_WLSTP_32 */ GPRlr, rGPR, wlslabel_u11, /* MVE_WLSTP_64 */ GPRlr, rGPR, wlslabel_u11, /* MVE_WLSTP_8 */ GPRlr, rGPR, wlslabel_u11, /* MVNi */ GPR, mod_imm, i32imm, i32imm, CCR, /* MVNr */ GPR, GPR, i32imm, i32imm, CCR, /* MVNsi */ GPR, GPR, i32imm, i32imm, i32imm, CCR, /* MVNsr */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* NEON_VMAXNMNDf */ DPR, DPR, DPR, /* NEON_VMAXNMNDh */ DPR, DPR, DPR, /* NEON_VMAXNMNQf */ QPR, QPR, QPR, /* NEON_VMAXNMNQh */ QPR, QPR, QPR, /* NEON_VMINNMNDf */ DPR, DPR, DPR, /* NEON_VMINNMNDh */ DPR, DPR, DPR, /* NEON_VMINNMNQf */ QPR, QPR, QPR, /* NEON_VMINNMNQh */ QPR, QPR, QPR, /* ORRri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* ORRrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* ORRrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* ORRrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* PKHBT */ GPRnopc, GPRnopc, GPRnopc, pkh_lsl_amt, i32imm, i32imm, /* PKHTB */ GPRnopc, GPRnopc, GPRnopc, pkh_asr_amt, i32imm, i32imm, /* PLDWi12 */ GPR, i32imm, /* PLDWrs */ GPR, GPRnopc, i32imm, /* PLDi12 */ GPR, i32imm, /* PLDrs */ GPR, GPRnopc, i32imm, /* PLIi12 */ GPR, i32imm, /* PLIrs */ GPR, GPRnopc, i32imm, /* QADD */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* QADD16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* QADD8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* QASX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* QDADD */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* QDSUB */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* QSAX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* QSUB */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* QSUB16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* QSUB8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* RBIT */ GPR, GPR, i32imm, i32imm, /* REV */ GPR, GPR, i32imm, i32imm, /* REV16 */ GPR, GPR, i32imm, i32imm, /* REVSH */ GPR, GPR, i32imm, i32imm, /* RFEDA */ GPR, /* RFEDA_UPD */ GPR, /* RFEDB */ GPR, /* RFEDB_UPD */ GPR, /* RFEIA */ GPR, /* RFEIA_UPD */ GPR, /* RFEIB */ GPR, /* RFEIB_UPD */ GPR, /* RSBri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* RSBrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* RSBrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* RSBrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* RSCri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* RSCrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* RSCrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* RSCrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* SADD16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SADD8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SASX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SB */ /* SBCri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* SBCrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* SBCrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* SBCrsr */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* SBFX */ GPRnopc, GPRnopc, imm0_31, imm1_32, i32imm, i32imm, /* SDIV */ GPR, GPR, GPR, i32imm, i32imm, /* SEL */ GPR, GPR, GPR, i32imm, i32imm, /* SETEND */ setend_op, /* SETPAN */ imm0_1, /* SHA1C */ QPR, QPR, QPR, QPR, /* SHA1H */ QPR, QPR, /* SHA1M */ QPR, QPR, QPR, QPR, /* SHA1P */ QPR, QPR, QPR, QPR, /* SHA1SU0 */ QPR, QPR, QPR, QPR, /* SHA1SU1 */ QPR, QPR, QPR, /* SHA256H */ QPR, QPR, QPR, QPR, /* SHA256H2 */ QPR, QPR, QPR, QPR, /* SHA256SU0 */ QPR, QPR, QPR, /* SHA256SU1 */ QPR, QPR, QPR, QPR, /* SHADD16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SHADD8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SHASX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SHSAX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SHSUB16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SHSUB8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMC */ imm0_15, i32imm, i32imm, /* SMLABB */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLABT */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLAD */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLADX */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLAL */ GPR, GPR, GPR, GPR, GPR, GPR, i32imm, i32imm, CCR, /* SMLALBB */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMLALBT */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMLALD */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMLALDX */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMLALTB */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMLALTT */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMLATB */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLATT */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLAWB */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLAWT */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLSD */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLSDX */ GPRnopc, GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SMLSLD */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMLSLDX */ GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMMLA */ GPR, GPR, GPR, GPR, i32imm, i32imm, /* SMMLAR */ GPR, GPR, GPR, GPR, i32imm, i32imm, /* SMMLS */ GPR, GPR, GPR, GPR, i32imm, i32imm, /* SMMLSR */ GPR, GPR, GPR, GPR, i32imm, i32imm, /* SMMUL */ GPR, GPR, GPR, i32imm, i32imm, /* SMMULR */ GPR, GPR, GPR, i32imm, i32imm, /* SMUAD */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMUADX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMULBB */ GPR, GPR, GPR, i32imm, i32imm, /* SMULBT */ GPR, GPR, GPR, i32imm, i32imm, /* SMULL */ GPR, GPR, GPR, GPR, i32imm, i32imm, CCR, /* SMULTB */ GPR, GPR, GPR, i32imm, i32imm, /* SMULTT */ GPR, GPR, GPR, i32imm, i32imm, /* SMULWB */ GPR, GPR, GPR, i32imm, i32imm, /* SMULWT */ GPR, GPR, GPR, i32imm, i32imm, /* SMUSD */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SMUSDX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SRSDA */ imm0_31, /* SRSDA_UPD */ imm0_31, /* SRSDB */ imm0_31, /* SRSDB_UPD */ imm0_31, /* SRSIA */ imm0_31, /* SRSIA_UPD */ imm0_31, /* SRSIB */ imm0_31, /* SRSIB_UPD */ imm0_31, /* SSAT */ GPRnopc, imm1_32, GPRnopc, shift_imm, i32imm, i32imm, /* SSAT16 */ GPRnopc, imm1_16, GPRnopc, i32imm, i32imm, /* SSAX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SSUB16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* SSUB8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* STC2L_OFFSET */ p_imm, c_imm, GPR, i32imm, /* STC2L_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, /* STC2L_POST */ p_imm, c_imm, GPR, i32imm, /* STC2L_PRE */ p_imm, c_imm, GPR, i32imm, /* STC2_OFFSET */ p_imm, c_imm, GPR, i32imm, /* STC2_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, /* STC2_POST */ p_imm, c_imm, GPR, i32imm, /* STC2_PRE */ p_imm, c_imm, GPR, i32imm, /* STCL_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* STCL_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* STCL_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* STCL_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* STC_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* STC_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* STC_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* STC_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* STL */ GPR, GPR, i32imm, i32imm, /* STLB */ GPR, GPR, i32imm, i32imm, /* STLEX */ GPR, GPR, GPR, i32imm, i32imm, /* STLEXB */ GPR, GPR, GPR, i32imm, i32imm, /* STLEXD */ GPR, GPRPairOp, GPR, i32imm, i32imm, /* STLEXH */ GPR, GPR, GPR, i32imm, i32imm, /* STLH */ GPR, GPR, i32imm, i32imm, /* STMDA */ GPR, i32imm, i32imm, reglist, /* STMDA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* STMDB */ GPR, i32imm, i32imm, reglist, /* STMDB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* STMIA */ GPR, i32imm, i32imm, reglist, /* STMIA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* STMIB */ GPR, i32imm, i32imm, reglist, /* STMIB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* STRBT_POST_IMM */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRBT_POST_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRB_POST_IMM */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRB_POST_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRB_PRE_IMM */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STRB_PRE_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRBi12 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* STRBrs */ GPRnopc, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRD */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STRD_POST */ GPR, GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STRD_PRE */ GPR, GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STREX */ GPR, GPR, GPR, i32imm, i32imm, /* STREXB */ GPR, GPR, GPR, i32imm, i32imm, /* STREXD */ GPR, GPRPairOp, GPR, i32imm, i32imm, /* STREXH */ GPR, GPR, GPR, i32imm, i32imm, /* STRH */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STRHTi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STRHTr */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRH_POST */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STRH_PRE */ GPR, GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STRT_POST_IMM */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRT_POST_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STR_POST_IMM */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STR_POST_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STR_PRE_IMM */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* STR_PRE_REG */ GPR, GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* STRi12 */ GPR, GPR, i32imm, i32imm, i32imm, /* STRrs */ GPR, GPR, GPRnopc, i32imm, i32imm, i32imm, /* SUBri */ GPR, GPR, mod_imm, i32imm, i32imm, CCR, /* SUBrr */ GPR, GPR, GPR, i32imm, i32imm, CCR, /* SUBrsi */ GPR, GPR, GPR, i32imm, i32imm, i32imm, CCR, /* SUBrsr */ GPR, GPR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, CCR, /* SVC */ imm24b, i32imm, i32imm, /* SWP */ GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SWPB */ GPRnopc, GPRnopc, GPR, i32imm, i32imm, /* SXTAB */ GPRnopc, GPR, GPRnopc, rot_imm, i32imm, i32imm, /* SXTAB16 */ GPRnopc, GPR, GPRnopc, rot_imm, i32imm, i32imm, /* SXTAH */ GPRnopc, GPR, GPRnopc, rot_imm, i32imm, i32imm, /* SXTB */ GPRnopc, GPRnopc, rot_imm, i32imm, i32imm, /* SXTB16 */ GPRnopc, GPRnopc, rot_imm, i32imm, i32imm, /* SXTH */ GPRnopc, GPRnopc, rot_imm, i32imm, i32imm, /* TEQri */ GPR, mod_imm, i32imm, i32imm, /* TEQrr */ GPR, GPR, i32imm, i32imm, /* TEQrsi */ GPR, GPR, i32imm, i32imm, i32imm, /* TEQrsr */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* TRAP */ /* TRAPNaCl */ /* TSB */ tsb_opt, /* TSTri */ GPR, mod_imm, i32imm, i32imm, /* TSTrr */ GPR, GPR, i32imm, i32imm, /* TSTrsi */ GPR, GPR, i32imm, i32imm, i32imm, /* TSTrsr */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* UADD16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UADD8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UASX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UBFX */ GPRnopc, GPRnopc, imm0_31, imm1_32, i32imm, i32imm, /* UDF */ imm0_65535, /* UDIV */ GPR, GPR, GPR, i32imm, i32imm, /* UHADD16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UHADD8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UHASX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UHSAX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UHSUB16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UHSUB8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UMAAL */ GPR, GPR, GPR, GPR, GPR, GPR, i32imm, i32imm, /* UMLAL */ GPR, GPR, GPR, GPR, GPR, GPR, i32imm, i32imm, CCR, /* UMULL */ GPR, GPR, GPR, GPR, i32imm, i32imm, CCR, /* UQADD16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UQADD8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UQASX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UQSAX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UQSUB16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UQSUB8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* USAD8 */ GPR, GPR, GPR, i32imm, i32imm, /* USADA8 */ GPR, GPR, GPR, GPR, i32imm, i32imm, /* USAT */ GPRnopc, imm0_31, GPRnopc, shift_imm, i32imm, i32imm, /* USAT16 */ GPRnopc, imm0_15, GPRnopc, i32imm, i32imm, /* USAX */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* USUB16 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* USUB8 */ GPRnopc, GPRnopc, GPRnopc, i32imm, i32imm, /* UXTAB */ GPRnopc, GPR, GPRnopc, rot_imm, i32imm, i32imm, /* UXTAB16 */ GPRnopc, GPR, GPRnopc, rot_imm, i32imm, i32imm, /* UXTAH */ GPRnopc, GPR, GPRnopc, rot_imm, i32imm, i32imm, /* UXTB */ GPRnopc, GPRnopc, rot_imm, i32imm, i32imm, /* UXTB16 */ GPRnopc, GPRnopc, rot_imm, i32imm, i32imm, /* UXTH */ GPRnopc, GPRnopc, rot_imm, i32imm, i32imm, /* VABALsv2i64 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VABALsv4i32 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VABALsv8i16 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VABALuv2i64 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VABALuv4i32 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VABALuv8i16 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VABAsv16i8 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VABAsv2i32 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VABAsv4i16 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VABAsv4i32 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VABAsv8i16 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VABAsv8i8 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VABAuv16i8 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VABAuv2i32 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VABAuv4i16 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VABAuv4i32 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VABAuv8i16 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VABAuv8i8 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VABDLsv2i64 */ QPR, DPR, DPR, i32imm, i32imm, /* VABDLsv4i32 */ QPR, DPR, DPR, i32imm, i32imm, /* VABDLsv8i16 */ QPR, DPR, DPR, i32imm, i32imm, /* VABDLuv2i64 */ QPR, DPR, DPR, i32imm, i32imm, /* VABDLuv4i32 */ QPR, DPR, DPR, i32imm, i32imm, /* VABDLuv8i16 */ QPR, DPR, DPR, i32imm, i32imm, /* VABDfd */ DPR, DPR, DPR, i32imm, i32imm, /* VABDfq */ QPR, QPR, QPR, i32imm, i32imm, /* VABDhd */ DPR, DPR, DPR, i32imm, i32imm, /* VABDhq */ QPR, QPR, QPR, i32imm, i32imm, /* VABDsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VABDsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VABDsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VABDsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VABDsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VABDsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VABDuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VABDuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VABDuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VABDuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VABDuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VABDuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VABSD */ DPR, DPR, i32imm, i32imm, /* VABSH */ HPR, HPR, i32imm, i32imm, /* VABSS */ SPR, SPR, i32imm, i32imm, /* VABSfd */ DPR, DPR, i32imm, i32imm, /* VABSfq */ QPR, QPR, i32imm, i32imm, /* VABShd */ DPR, DPR, i32imm, i32imm, /* VABShq */ QPR, QPR, i32imm, i32imm, /* VABSv16i8 */ QPR, QPR, i32imm, i32imm, /* VABSv2i32 */ DPR, DPR, i32imm, i32imm, /* VABSv4i16 */ DPR, DPR, i32imm, i32imm, /* VABSv4i32 */ QPR, QPR, i32imm, i32imm, /* VABSv8i16 */ QPR, QPR, i32imm, i32imm, /* VABSv8i8 */ DPR, DPR, i32imm, i32imm, /* VACGEfd */ DPR, DPR, DPR, i32imm, i32imm, /* VACGEfq */ QPR, QPR, QPR, i32imm, i32imm, /* VACGEhd */ DPR, DPR, DPR, i32imm, i32imm, /* VACGEhq */ QPR, QPR, QPR, i32imm, i32imm, /* VACGTfd */ DPR, DPR, DPR, i32imm, i32imm, /* VACGTfq */ QPR, QPR, QPR, i32imm, i32imm, /* VACGThd */ DPR, DPR, DPR, i32imm, i32imm, /* VACGThq */ QPR, QPR, QPR, i32imm, i32imm, /* VADDD */ DPR, DPR, DPR, i32imm, i32imm, /* VADDH */ HPR, HPR, HPR, i32imm, i32imm, /* VADDHNv2i32 */ DPR, QPR, QPR, i32imm, i32imm, /* VADDHNv4i16 */ DPR, QPR, QPR, i32imm, i32imm, /* VADDHNv8i8 */ DPR, QPR, QPR, i32imm, i32imm, /* VADDLsv2i64 */ QPR, DPR, DPR, i32imm, i32imm, /* VADDLsv4i32 */ QPR, DPR, DPR, i32imm, i32imm, /* VADDLsv8i16 */ QPR, DPR, DPR, i32imm, i32imm, /* VADDLuv2i64 */ QPR, DPR, DPR, i32imm, i32imm, /* VADDLuv4i32 */ QPR, DPR, DPR, i32imm, i32imm, /* VADDLuv8i16 */ QPR, DPR, DPR, i32imm, i32imm, /* VADDS */ SPR, SPR, SPR, i32imm, i32imm, /* VADDWsv2i64 */ QPR, QPR, DPR, i32imm, i32imm, /* VADDWsv4i32 */ QPR, QPR, DPR, i32imm, i32imm, /* VADDWsv8i16 */ QPR, QPR, DPR, i32imm, i32imm, /* VADDWuv2i64 */ QPR, QPR, DPR, i32imm, i32imm, /* VADDWuv4i32 */ QPR, QPR, DPR, i32imm, i32imm, /* VADDWuv8i16 */ QPR, QPR, DPR, i32imm, i32imm, /* VADDfd */ DPR, DPR, DPR, i32imm, i32imm, /* VADDfq */ QPR, QPR, QPR, i32imm, i32imm, /* VADDhd */ DPR, DPR, DPR, i32imm, i32imm, /* VADDhq */ QPR, QPR, QPR, i32imm, i32imm, /* VADDv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VADDv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VADDv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VADDv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VADDv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VADDv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VADDv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VADDv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VANDd */ DPR, DPR, DPR, i32imm, i32imm, /* VANDq */ QPR, QPR, QPR, i32imm, i32imm, /* VBF16MALBQ */ QPR, QPR, QPR, QPR, /* VBF16MALBQI */ QPR, QPR, QPR, DPR_8, i32imm, /* VBF16MALTQ */ QPR, QPR, QPR, QPR, /* VBF16MALTQI */ QPR, QPR, QPR, DPR_8, i32imm, /* VBICd */ DPR, DPR, DPR, i32imm, i32imm, /* VBICiv2i32 */ DPR, nImmSplatI32, DPR, i32imm, i32imm, /* VBICiv4i16 */ DPR, nImmSplatI16, DPR, i32imm, i32imm, /* VBICiv4i32 */ QPR, nImmSplatI32, QPR, i32imm, i32imm, /* VBICiv8i16 */ QPR, nImmSplatI16, QPR, i32imm, i32imm, /* VBICq */ QPR, QPR, QPR, i32imm, i32imm, /* VBIFd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VBIFq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VBITd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VBITq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VBSLd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VBSLq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VBSPd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VBSPq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VCADDv2f32 */ DPR, DPR, DPR, complexrotateopodd, /* VCADDv4f16 */ DPR, DPR, DPR, complexrotateopodd, /* VCADDv4f32 */ QPR, QPR, QPR, complexrotateopodd, /* VCADDv8f16 */ QPR, QPR, QPR, complexrotateopodd, /* VCEQfd */ DPR, DPR, DPR, i32imm, i32imm, /* VCEQfq */ QPR, QPR, QPR, i32imm, i32imm, /* VCEQhd */ DPR, DPR, DPR, i32imm, i32imm, /* VCEQhq */ QPR, QPR, QPR, i32imm, i32imm, /* VCEQv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VCEQv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VCEQv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VCEQv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VCEQv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VCEQv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VCEQzv16i8 */ QPR, QPR, i32imm, i32imm, /* VCEQzv2f32 */ DPR, DPR, i32imm, i32imm, /* VCEQzv2i32 */ DPR, DPR, i32imm, i32imm, /* VCEQzv4f16 */ DPR, DPR, i32imm, i32imm, /* VCEQzv4f32 */ QPR, QPR, i32imm, i32imm, /* VCEQzv4i16 */ DPR, DPR, i32imm, i32imm, /* VCEQzv4i32 */ QPR, QPR, i32imm, i32imm, /* VCEQzv8f16 */ QPR, QPR, i32imm, i32imm, /* VCEQzv8i16 */ QPR, QPR, i32imm, i32imm, /* VCEQzv8i8 */ DPR, DPR, i32imm, i32imm, /* VCGEfd */ DPR, DPR, DPR, i32imm, i32imm, /* VCGEfq */ QPR, QPR, QPR, i32imm, i32imm, /* VCGEhd */ DPR, DPR, DPR, i32imm, i32imm, /* VCGEhq */ QPR, QPR, QPR, i32imm, i32imm, /* VCGEsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGEsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGEsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGEsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGEsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGEsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGEuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGEuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGEuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGEuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGEuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGEuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGEzv16i8 */ QPR, QPR, i32imm, i32imm, /* VCGEzv2f32 */ DPR, DPR, i32imm, i32imm, /* VCGEzv2i32 */ DPR, DPR, i32imm, i32imm, /* VCGEzv4f16 */ DPR, DPR, i32imm, i32imm, /* VCGEzv4f32 */ QPR, QPR, i32imm, i32imm, /* VCGEzv4i16 */ DPR, DPR, i32imm, i32imm, /* VCGEzv4i32 */ QPR, QPR, i32imm, i32imm, /* VCGEzv8f16 */ QPR, QPR, i32imm, i32imm, /* VCGEzv8i16 */ QPR, QPR, i32imm, i32imm, /* VCGEzv8i8 */ DPR, DPR, i32imm, i32imm, /* VCGTfd */ DPR, DPR, DPR, i32imm, i32imm, /* VCGTfq */ QPR, QPR, QPR, i32imm, i32imm, /* VCGThd */ DPR, DPR, DPR, i32imm, i32imm, /* VCGThq */ QPR, QPR, QPR, i32imm, i32imm, /* VCGTsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGTsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGTsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGTsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGTsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGTsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGTuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGTuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGTuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGTuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGTuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VCGTuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VCGTzv16i8 */ QPR, QPR, i32imm, i32imm, /* VCGTzv2f32 */ DPR, DPR, i32imm, i32imm, /* VCGTzv2i32 */ DPR, DPR, i32imm, i32imm, /* VCGTzv4f16 */ DPR, DPR, i32imm, i32imm, /* VCGTzv4f32 */ QPR, QPR, i32imm, i32imm, /* VCGTzv4i16 */ DPR, DPR, i32imm, i32imm, /* VCGTzv4i32 */ QPR, QPR, i32imm, i32imm, /* VCGTzv8f16 */ QPR, QPR, i32imm, i32imm, /* VCGTzv8i16 */ QPR, QPR, i32imm, i32imm, /* VCGTzv8i8 */ DPR, DPR, i32imm, i32imm, /* VCLEzv16i8 */ QPR, QPR, i32imm, i32imm, /* VCLEzv2f32 */ DPR, DPR, i32imm, i32imm, /* VCLEzv2i32 */ DPR, DPR, i32imm, i32imm, /* VCLEzv4f16 */ DPR, DPR, i32imm, i32imm, /* VCLEzv4f32 */ QPR, QPR, i32imm, i32imm, /* VCLEzv4i16 */ DPR, DPR, i32imm, i32imm, /* VCLEzv4i32 */ QPR, QPR, i32imm, i32imm, /* VCLEzv8f16 */ QPR, QPR, i32imm, i32imm, /* VCLEzv8i16 */ QPR, QPR, i32imm, i32imm, /* VCLEzv8i8 */ DPR, DPR, i32imm, i32imm, /* VCLSv16i8 */ QPR, QPR, i32imm, i32imm, /* VCLSv2i32 */ DPR, DPR, i32imm, i32imm, /* VCLSv4i16 */ DPR, DPR, i32imm, i32imm, /* VCLSv4i32 */ QPR, QPR, i32imm, i32imm, /* VCLSv8i16 */ QPR, QPR, i32imm, i32imm, /* VCLSv8i8 */ DPR, DPR, i32imm, i32imm, /* VCLTzv16i8 */ QPR, QPR, i32imm, i32imm, /* VCLTzv2f32 */ DPR, DPR, i32imm, i32imm, /* VCLTzv2i32 */ DPR, DPR, i32imm, i32imm, /* VCLTzv4f16 */ DPR, DPR, i32imm, i32imm, /* VCLTzv4f32 */ QPR, QPR, i32imm, i32imm, /* VCLTzv4i16 */ DPR, DPR, i32imm, i32imm, /* VCLTzv4i32 */ QPR, QPR, i32imm, i32imm, /* VCLTzv8f16 */ QPR, QPR, i32imm, i32imm, /* VCLTzv8i16 */ QPR, QPR, i32imm, i32imm, /* VCLTzv8i8 */ DPR, DPR, i32imm, i32imm, /* VCLZv16i8 */ QPR, QPR, i32imm, i32imm, /* VCLZv2i32 */ DPR, DPR, i32imm, i32imm, /* VCLZv4i16 */ DPR, DPR, i32imm, i32imm, /* VCLZv4i32 */ QPR, QPR, i32imm, i32imm, /* VCLZv8i16 */ QPR, QPR, i32imm, i32imm, /* VCLZv8i8 */ DPR, DPR, i32imm, i32imm, /* VCMLAv2f32 */ DPR, DPR, DPR, DPR, complexrotateop, /* VCMLAv2f32_indexed */ DPR, DPR, DPR, DPR, i32imm, complexrotateop, /* VCMLAv4f16 */ DPR, DPR, DPR, DPR, complexrotateop, /* VCMLAv4f16_indexed */ DPR, DPR, DPR, DPR_VFP2, i32imm, complexrotateop, /* VCMLAv4f32 */ QPR, QPR, QPR, QPR, complexrotateop, /* VCMLAv4f32_indexed */ QPR, QPR, QPR, DPR, i32imm, complexrotateop, /* VCMLAv8f16 */ QPR, QPR, QPR, QPR, complexrotateop, /* VCMLAv8f16_indexed */ QPR, QPR, QPR, DPR_VFP2, i32imm, complexrotateop, /* VCMPD */ DPR, DPR, i32imm, i32imm, /* VCMPED */ DPR, DPR, i32imm, i32imm, /* VCMPEH */ HPR, HPR, i32imm, i32imm, /* VCMPES */ SPR, SPR, i32imm, i32imm, /* VCMPEZD */ DPR, i32imm, i32imm, /* VCMPEZH */ HPR, i32imm, i32imm, /* VCMPEZS */ SPR, i32imm, i32imm, /* VCMPH */ HPR, HPR, i32imm, i32imm, /* VCMPS */ SPR, SPR, i32imm, i32imm, /* VCMPZD */ DPR, i32imm, i32imm, /* VCMPZH */ HPR, i32imm, i32imm, /* VCMPZS */ SPR, i32imm, i32imm, /* VCNTd */ DPR, DPR, i32imm, i32imm, /* VCNTq */ QPR, QPR, i32imm, i32imm, /* VCVTANSDf */ DPR, DPR, /* VCVTANSDh */ DPR, DPR, /* VCVTANSQf */ QPR, QPR, /* VCVTANSQh */ QPR, QPR, /* VCVTANUDf */ DPR, DPR, /* VCVTANUDh */ DPR, DPR, /* VCVTANUQf */ QPR, QPR, /* VCVTANUQh */ QPR, QPR, /* VCVTASD */ SPR, DPR, /* VCVTASH */ SPR, HPR, /* VCVTASS */ SPR, SPR, /* VCVTAUD */ SPR, DPR, /* VCVTAUH */ SPR, HPR, /* VCVTAUS */ SPR, SPR, /* VCVTBDH */ SPR, SPR, DPR, i32imm, i32imm, /* VCVTBHD */ DPR, SPR, i32imm, i32imm, /* VCVTBHS */ SPR, SPR, i32imm, i32imm, /* VCVTBSH */ SPR, SPR, SPR, i32imm, i32imm, /* VCVTDS */ DPR, SPR, i32imm, i32imm, /* VCVTMNSDf */ DPR, DPR, /* VCVTMNSDh */ DPR, DPR, /* VCVTMNSQf */ QPR, QPR, /* VCVTMNSQh */ QPR, QPR, /* VCVTMNUDf */ DPR, DPR, /* VCVTMNUDh */ DPR, DPR, /* VCVTMNUQf */ QPR, QPR, /* VCVTMNUQh */ QPR, QPR, /* VCVTMSD */ SPR, DPR, /* VCVTMSH */ SPR, HPR, /* VCVTMSS */ SPR, SPR, /* VCVTMUD */ SPR, DPR, /* VCVTMUH */ SPR, HPR, /* VCVTMUS */ SPR, SPR, /* VCVTNNSDf */ DPR, DPR, /* VCVTNNSDh */ DPR, DPR, /* VCVTNNSQf */ QPR, QPR, /* VCVTNNSQh */ QPR, QPR, /* VCVTNNUDf */ DPR, DPR, /* VCVTNNUDh */ DPR, DPR, /* VCVTNNUQf */ QPR, QPR, /* VCVTNNUQh */ QPR, QPR, /* VCVTNSD */ SPR, DPR, /* VCVTNSH */ SPR, HPR, /* VCVTNSS */ SPR, SPR, /* VCVTNUD */ SPR, DPR, /* VCVTNUH */ SPR, HPR, /* VCVTNUS */ SPR, SPR, /* VCVTPNSDf */ DPR, DPR, /* VCVTPNSDh */ DPR, DPR, /* VCVTPNSQf */ QPR, QPR, /* VCVTPNSQh */ QPR, QPR, /* VCVTPNUDf */ DPR, DPR, /* VCVTPNUDh */ DPR, DPR, /* VCVTPNUQf */ QPR, QPR, /* VCVTPNUQh */ QPR, QPR, /* VCVTPSD */ SPR, DPR, /* VCVTPSH */ SPR, HPR, /* VCVTPSS */ SPR, SPR, /* VCVTPUD */ SPR, DPR, /* VCVTPUH */ SPR, HPR, /* VCVTPUS */ SPR, SPR, /* VCVTSD */ SPR, DPR, i32imm, i32imm, /* VCVTTDH */ SPR, SPR, DPR, i32imm, i32imm, /* VCVTTHD */ DPR, SPR, i32imm, i32imm, /* VCVTTHS */ SPR, SPR, i32imm, i32imm, /* VCVTTSH */ SPR, SPR, SPR, i32imm, i32imm, /* VCVTf2h */ DPR, QPR, i32imm, i32imm, /* VCVTf2sd */ DPR, DPR, i32imm, i32imm, /* VCVTf2sq */ QPR, QPR, i32imm, i32imm, /* VCVTf2ud */ DPR, DPR, i32imm, i32imm, /* VCVTf2uq */ QPR, QPR, i32imm, i32imm, /* VCVTf2xsd */ DPR, DPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTf2xsq */ QPR, QPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTf2xud */ DPR, DPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTf2xuq */ QPR, QPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTh2f */ QPR, DPR, i32imm, i32imm, /* VCVTh2sd */ DPR, DPR, i32imm, i32imm, /* VCVTh2sq */ QPR, QPR, i32imm, i32imm, /* VCVTh2ud */ DPR, DPR, i32imm, i32imm, /* VCVTh2uq */ QPR, QPR, i32imm, i32imm, /* VCVTh2xsd */ DPR, DPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTh2xsq */ QPR, QPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTh2xud */ DPR, DPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTh2xuq */ QPR, QPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTs2fd */ DPR, DPR, i32imm, i32imm, /* VCVTs2fq */ QPR, QPR, i32imm, i32imm, /* VCVTs2hd */ DPR, DPR, i32imm, i32imm, /* VCVTs2hq */ QPR, QPR, i32imm, i32imm, /* VCVTu2fd */ DPR, DPR, i32imm, i32imm, /* VCVTu2fq */ QPR, QPR, i32imm, i32imm, /* VCVTu2hd */ DPR, DPR, i32imm, i32imm, /* VCVTu2hq */ QPR, QPR, i32imm, i32imm, /* VCVTxs2fd */ DPR, DPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTxs2fq */ QPR, QPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTxs2hd */ DPR, DPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTxs2hq */ QPR, QPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTxu2fd */ DPR, DPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTxu2fq */ QPR, QPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTxu2hd */ DPR, DPR, neon_vcvt_imm32, i32imm, i32imm, /* VCVTxu2hq */ QPR, QPR, neon_vcvt_imm32, i32imm, i32imm, /* VDIVD */ DPR, DPR, DPR, i32imm, i32imm, /* VDIVH */ HPR, HPR, HPR, i32imm, i32imm, /* VDIVS */ SPR, SPR, SPR, i32imm, i32imm, /* VDUP16d */ DPR, GPR, i32imm, i32imm, /* VDUP16q */ QPR, GPR, i32imm, i32imm, /* VDUP32d */ DPR, GPR, i32imm, i32imm, /* VDUP32q */ QPR, GPR, i32imm, i32imm, /* VDUP8d */ DPR, GPR, i32imm, i32imm, /* VDUP8q */ QPR, GPR, i32imm, i32imm, /* VDUPLN16d */ DPR, DPR, i32imm, i32imm, i32imm, /* VDUPLN16q */ QPR, DPR, i32imm, i32imm, i32imm, /* VDUPLN32d */ DPR, DPR, i32imm, i32imm, i32imm, /* VDUPLN32q */ QPR, DPR, i32imm, i32imm, i32imm, /* VDUPLN8d */ DPR, DPR, i32imm, i32imm, i32imm, /* VDUPLN8q */ QPR, DPR, i32imm, i32imm, i32imm, /* VEORd */ DPR, DPR, DPR, i32imm, i32imm, /* VEORq */ QPR, QPR, QPR, i32imm, i32imm, /* VEXTd16 */ DPR, DPR, DPR, imm0_3, i32imm, i32imm, /* VEXTd32 */ DPR, DPR, DPR, imm0_1, i32imm, i32imm, /* VEXTd8 */ DPR, DPR, DPR, imm0_7, i32imm, i32imm, /* VEXTq16 */ QPR, QPR, QPR, imm0_7, i32imm, i32imm, /* VEXTq32 */ QPR, QPR, QPR, imm0_3, i32imm, i32imm, /* VEXTq64 */ QPR, QPR, QPR, imm0_1, i32imm, i32imm, /* VEXTq8 */ QPR, QPR, QPR, imm0_15, i32imm, i32imm, /* VFMAD */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VFMAH */ HPR, HPR, HPR, HPR, i32imm, i32imm, /* VFMALD */ DPR, SPR, SPR, /* VFMALDI */ DPR, SPR, SPR_8, i32imm, /* VFMALQ */ QPR, DPR, DPR, /* VFMALQI */ QPR, DPR, DPR_8, i32imm, /* VFMAS */ SPR, SPR, SPR, SPR, i32imm, i32imm, /* VFMAfd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VFMAfq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VFMAhd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VFMAhq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VFMSD */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VFMSH */ HPR, HPR, HPR, HPR, i32imm, i32imm, /* VFMSLD */ DPR, SPR, SPR, /* VFMSLDI */ DPR, SPR, SPR_8, i32imm, /* VFMSLQ */ QPR, DPR, DPR, /* VFMSLQI */ QPR, DPR, DPR_8, i32imm, /* VFMSS */ SPR, SPR, SPR, SPR, i32imm, i32imm, /* VFMSfd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VFMSfq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VFMShd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VFMShq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VFNMAD */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VFNMAH */ HPR, HPR, HPR, HPR, i32imm, i32imm, /* VFNMAS */ SPR, SPR, SPR, SPR, i32imm, i32imm, /* VFNMSD */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VFNMSH */ HPR, HPR, HPR, HPR, i32imm, i32imm, /* VFNMSS */ SPR, SPR, SPR, SPR, i32imm, i32imm, /* VFP_VMAXNMD */ DPR, DPR, DPR, /* VFP_VMAXNMH */ HPR, HPR, HPR, /* VFP_VMAXNMS */ SPR, SPR, SPR, /* VFP_VMINNMD */ DPR, DPR, DPR, /* VFP_VMINNMH */ HPR, HPR, HPR, /* VFP_VMINNMS */ SPR, SPR, SPR, /* VGETLNi32 */ GPR, DPR, i32imm, i32imm, i32imm, /* VGETLNs16 */ GPR, DPR, i32imm, i32imm, i32imm, /* VGETLNs8 */ GPR, DPR, i32imm, i32imm, i32imm, /* VGETLNu16 */ GPR, DPR, i32imm, i32imm, i32imm, /* VGETLNu8 */ GPR, DPR, i32imm, i32imm, i32imm, /* VHADDsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VHADDsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VHADDsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VHADDsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VHADDsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VHADDsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VHADDuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VHADDuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VHADDuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VHADDuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VHADDuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VHADDuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VHSUBsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VHSUBsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VHSUBsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VHSUBsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VHSUBsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VHSUBsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VHSUBuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VHSUBuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VHSUBuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VHSUBuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VHSUBuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VHSUBuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VINSH */ SPR, SPR, SPR, /* VJCVT */ SPR, DPR, i32imm, i32imm, /* VLD1DUPd16 */ VecListOneDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD1DUPd16wb_fixed */ VecListOneDAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1DUPd16wb_register */ VecListOneDAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1DUPd32 */ VecListOneDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD1DUPd32wb_fixed */ VecListOneDAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1DUPd32wb_register */ VecListOneDAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1DUPd8 */ VecListOneDAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD1DUPd8wb_fixed */ VecListOneDAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1DUPd8wb_register */ VecListOneDAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1DUPq16 */ VecListDPairAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD1DUPq16wb_fixed */ VecListDPairAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1DUPq16wb_register */ VecListDPairAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1DUPq32 */ VecListDPairAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD1DUPq32wb_fixed */ VecListDPairAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1DUPq32wb_register */ VecListDPairAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1DUPq8 */ VecListDPairAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD1DUPq8wb_fixed */ VecListDPairAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1DUPq8wb_register */ VecListDPairAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1LNd16 */ DPR, GPR, i32imm, DPR, nohash_imm, i32imm, i32imm, /* VLD1LNd16_UPD */ DPR, GPR, GPR, i32imm, GPR, DPR, nohash_imm, i32imm, i32imm, /* VLD1LNd32 */ DPR, GPR, i32imm, DPR, nohash_imm, i32imm, i32imm, /* VLD1LNd32_UPD */ DPR, GPR, GPR, i32imm, GPR, DPR, nohash_imm, i32imm, i32imm, /* VLD1LNd8 */ DPR, GPR, i32imm, DPR, nohash_imm, i32imm, i32imm, /* VLD1LNd8_UPD */ DPR, GPR, GPR, i32imm, GPR, DPR, nohash_imm, i32imm, i32imm, /* VLD1LNq16Pseudo */ QPR, GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VLD1LNq16Pseudo_UPD */ QPR, GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VLD1LNq32Pseudo */ QPR, GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VLD1LNq32Pseudo_UPD */ QPR, GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VLD1LNq8Pseudo */ QPR, GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VLD1LNq8Pseudo_UPD */ QPR, GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VLD1d16 */ VecListOneD, GPR, i32imm, i32imm, i32imm, /* VLD1d16Q */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD1d16QPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD1d16QPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d16QPseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d16Qwb_fixed */ VecListFourD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d16Qwb_register */ VecListFourD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d16T */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD1d16TPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD1d16TPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d16TPseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d16Twb_fixed */ VecListThreeD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d16Twb_register */ VecListThreeD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d16wb_fixed */ VecListOneD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d16wb_register */ VecListOneD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d32 */ VecListOneD, GPR, i32imm, i32imm, i32imm, /* VLD1d32Q */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD1d32QPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD1d32QPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d32QPseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d32Qwb_fixed */ VecListFourD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d32Qwb_register */ VecListFourD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d32T */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD1d32TPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD1d32TPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d32TPseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d32Twb_fixed */ VecListThreeD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d32Twb_register */ VecListThreeD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d32wb_fixed */ VecListOneD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d32wb_register */ VecListOneD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d64 */ VecListOneD, GPR, i32imm, i32imm, i32imm, /* VLD1d64Q */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD1d64QPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD1d64QPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d64QPseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d64Qwb_fixed */ VecListFourD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d64Qwb_register */ VecListFourD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d64T */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD1d64TPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD1d64TPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d64TPseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d64Twb_fixed */ VecListThreeD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d64Twb_register */ VecListThreeD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d64wb_fixed */ VecListOneD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d64wb_register */ VecListOneD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d8 */ VecListOneD, GPR, i32imm, i32imm, i32imm, /* VLD1d8Q */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD1d8QPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD1d8QPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d8QPseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d8Qwb_fixed */ VecListFourD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d8Qwb_register */ VecListFourD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d8T */ VecListThreeD, GPR, i32imm, i32imm, i32imm, /* VLD1d8TPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD1d8TPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d8TPseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d8Twb_fixed */ VecListThreeD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d8Twb_register */ VecListThreeD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1d8wb_fixed */ VecListOneD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1d8wb_register */ VecListOneD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1q16 */ VecListDPair, GPR, i32imm, i32imm, i32imm, /* VLD1q16HighQPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD1q16HighQPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q16HighTPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD1q16HighTPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q16LowQPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q16LowTPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q16wb_fixed */ VecListDPair, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1q16wb_register */ VecListDPair, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1q32 */ VecListDPair, GPR, i32imm, i32imm, i32imm, /* VLD1q32HighQPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD1q32HighQPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q32HighTPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD1q32HighTPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q32LowQPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q32LowTPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q32wb_fixed */ VecListDPair, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1q32wb_register */ VecListDPair, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1q64 */ VecListDPair, GPR, i32imm, i32imm, i32imm, /* VLD1q64HighQPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD1q64HighQPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q64HighTPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD1q64HighTPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q64LowQPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q64LowTPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q64wb_fixed */ VecListDPair, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1q64wb_register */ VecListDPair, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD1q8 */ VecListDPair, GPR, i32imm, i32imm, i32imm, /* VLD1q8HighQPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD1q8HighQPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q8HighTPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD1q8HighTPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q8LowQPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q8LowTPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD1q8wb_fixed */ VecListDPair, GPR, GPR, i32imm, i32imm, i32imm, /* VLD1q8wb_register */ VecListDPair, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2DUPd16 */ VecListDPairAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd16wb_fixed */ VecListDPairAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd16wb_register */ VecListDPairAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2DUPd16x2 */ VecListDPairSpacedAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd16x2wb_fixed */ VecListDPairSpacedAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd16x2wb_register */ VecListDPairSpacedAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2DUPd32 */ VecListDPairAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd32wb_fixed */ VecListDPairAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd32wb_register */ VecListDPairAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2DUPd32x2 */ VecListDPairSpacedAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd32x2wb_fixed */ VecListDPairSpacedAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd32x2wb_register */ VecListDPairSpacedAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2DUPd8 */ VecListDPairAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd8wb_fixed */ VecListDPairAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd8wb_register */ VecListDPairAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2DUPd8x2 */ VecListDPairSpacedAllLanes, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd8x2wb_fixed */ VecListDPairSpacedAllLanes, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPd8x2wb_register */ VecListDPairSpacedAllLanes, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2DUPq16EvenPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPq16OddPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPq16OddPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPq16OddPseudoWB_register */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD2DUPq32EvenPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPq32OddPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPq32OddPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPq32OddPseudoWB_register */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD2DUPq8EvenPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPq8OddPseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPq8OddPseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2DUPq8OddPseudoWB_register */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD2LNd16 */ DPR, DPR, GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2LNd16Pseudo */ QPR, GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VLD2LNd16Pseudo_UPD */ QPR, GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VLD2LNd16_UPD */ DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2LNd32 */ DPR, DPR, GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2LNd32Pseudo */ QPR, GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VLD2LNd32Pseudo_UPD */ QPR, GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VLD2LNd32_UPD */ DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2LNd8 */ DPR, DPR, GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2LNd8Pseudo */ QPR, GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VLD2LNd8Pseudo_UPD */ QPR, GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VLD2LNd8_UPD */ DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2LNq16 */ DPR, DPR, GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2LNq16Pseudo */ QQPR, GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VLD2LNq16Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VLD2LNq16_UPD */ DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2LNq32 */ DPR, DPR, GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2LNq32Pseudo */ QQPR, GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VLD2LNq32Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VLD2LNq32_UPD */ DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD2b16 */ VecListDPairSpaced, GPR, i32imm, i32imm, i32imm, /* VLD2b16wb_fixed */ VecListDPairSpaced, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2b16wb_register */ VecListDPairSpaced, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2b32 */ VecListDPairSpaced, GPR, i32imm, i32imm, i32imm, /* VLD2b32wb_fixed */ VecListDPairSpaced, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2b32wb_register */ VecListDPairSpaced, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2b8 */ VecListDPairSpaced, GPR, i32imm, i32imm, i32imm, /* VLD2b8wb_fixed */ VecListDPairSpaced, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2b8wb_register */ VecListDPairSpaced, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2d16 */ VecListDPair, GPR, i32imm, i32imm, i32imm, /* VLD2d16wb_fixed */ VecListDPair, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2d16wb_register */ VecListDPair, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2d32 */ VecListDPair, GPR, i32imm, i32imm, i32imm, /* VLD2d32wb_fixed */ VecListDPair, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2d32wb_register */ VecListDPair, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2d8 */ VecListDPair, GPR, i32imm, i32imm, i32imm, /* VLD2d8wb_fixed */ VecListDPair, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2d8wb_register */ VecListDPair, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2q16 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD2q16Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD2q16PseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2q16PseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2q16wb_fixed */ VecListFourD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2q16wb_register */ VecListFourD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2q32 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD2q32Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD2q32PseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2q32PseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2q32wb_fixed */ VecListFourD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2q32wb_register */ VecListFourD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2q8 */ VecListFourD, GPR, i32imm, i32imm, i32imm, /* VLD2q8Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD2q8PseudoWB_fixed */ QQPR, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2q8PseudoWB_register */ QQPR, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD2q8wb_fixed */ VecListFourD, GPR, GPR, i32imm, i32imm, i32imm, /* VLD2q8wb_register */ VecListFourD, GPR, GPR, i32imm, rGPR, i32imm, i32imm, /* VLD3DUPd16 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3DUPd16Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD3DUPd16Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3DUPd16_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3DUPd32 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3DUPd32Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD3DUPd32Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3DUPd32_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3DUPd8 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3DUPd8Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD3DUPd8Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3DUPd8_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3DUPq16 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3DUPq16EvenPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD3DUPq16OddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD3DUPq16OddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD3DUPq16_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3DUPq32 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3DUPq32EvenPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD3DUPq32OddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD3DUPq32OddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD3DUPq32_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3DUPq8 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3DUPq8EvenPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD3DUPq8OddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD3DUPq8OddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD3DUPq8_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3LNd16 */ DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3LNd16Pseudo */ QQPR, GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VLD3LNd16Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VLD3LNd16_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3LNd32 */ DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3LNd32Pseudo */ QQPR, GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VLD3LNd32Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VLD3LNd32_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3LNd8 */ DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3LNd8Pseudo */ QQPR, GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VLD3LNd8Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VLD3LNd8_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3LNq16 */ DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3LNq16Pseudo */ QQQQPR, GPR, i32imm, QQQQPR, nohash_imm, i32imm, i32imm, /* VLD3LNq16Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, nohash_imm, i32imm, i32imm, /* VLD3LNq16_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3LNq32 */ DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3LNq32Pseudo */ QQQQPR, GPR, i32imm, QQQQPR, nohash_imm, i32imm, i32imm, /* VLD3LNq32Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, nohash_imm, i32imm, i32imm, /* VLD3LNq32_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD3d16 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3d16Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD3d16Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3d16_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3d32 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3d32Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD3d32Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3d32_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3d8 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3d8Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD3d8Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3d8_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3q16 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3q16Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD3q16_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3q16oddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD3q16oddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD3q32 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3q32Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD3q32_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3q32oddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD3q32oddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD3q8 */ DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD3q8Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD3q8_UPD */ DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD3q8oddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD3q8oddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD4DUPd16 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4DUPd16Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD4DUPd16Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4DUPd16_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4DUPd32 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4DUPd32Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD4DUPd32Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4DUPd32_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4DUPd8 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4DUPd8Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD4DUPd8Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4DUPd8_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4DUPq16 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4DUPq16EvenPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD4DUPq16OddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD4DUPq16OddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD4DUPq16_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4DUPq32 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4DUPq32EvenPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD4DUPq32OddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD4DUPq32OddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD4DUPq32_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4DUPq8 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4DUPq8EvenPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD4DUPq8OddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD4DUPq8OddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD4DUPq8_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4LNd16 */ DPR, DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4LNd16Pseudo */ QQPR, GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VLD4LNd16Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VLD4LNd16_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4LNd32 */ DPR, DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4LNd32Pseudo */ QQPR, GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VLD4LNd32Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VLD4LNd32_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4LNd8 */ DPR, DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4LNd8Pseudo */ QQPR, GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VLD4LNd8Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VLD4LNd8_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4LNq16 */ DPR, DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4LNq16Pseudo */ QQQQPR, GPR, i32imm, QQQQPR, nohash_imm, i32imm, i32imm, /* VLD4LNq16Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, nohash_imm, i32imm, i32imm, /* VLD4LNq16_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4LNq32 */ DPR, DPR, DPR, DPR, GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4LNq32Pseudo */ QQQQPR, GPR, i32imm, QQQQPR, nohash_imm, i32imm, i32imm, /* VLD4LNq32Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, nohash_imm, i32imm, i32imm, /* VLD4LNq32_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VLD4d16 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4d16Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD4d16Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4d16_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4d32 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4d32Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD4d32Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4d32_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4d8 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4d8Pseudo */ QQPR, GPR, i32imm, i32imm, i32imm, /* VLD4d8Pseudo_UPD */ QQPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4d8_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4q16 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4q16Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD4q16_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4q16oddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD4q16oddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD4q32 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4q32Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD4q32_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4q32oddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD4q32oddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD4q8 */ DPR, DPR, DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VLD4q8Pseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLD4q8_UPD */ DPR, DPR, DPR, DPR, GPR, GPR, i32imm, GPR, i32imm, i32imm, /* VLD4q8oddPseudo */ QQQQPR, GPR, i32imm, QQQQPR, i32imm, i32imm, /* VLD4q8oddPseudo_UPD */ QQQQPR, GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VLDMDDB_UPD */ GPR, GPR, i32imm, i32imm, dpr_reglist, /* VLDMDIA */ GPR, i32imm, i32imm, dpr_reglist, /* VLDMDIA_UPD */ GPR, GPR, i32imm, i32imm, dpr_reglist, /* VLDMQIA */ DPair, GPR, i32imm, i32imm, /* VLDMSDB_UPD */ GPR, GPR, i32imm, i32imm, spr_reglist, /* VLDMSIA */ GPR, i32imm, i32imm, spr_reglist, /* VLDMSIA_UPD */ GPR, GPR, i32imm, i32imm, spr_reglist, /* VLDRD */ DPR, GPR, i32imm, i32imm, i32imm, /* VLDRH */ HPR, GPR, i32imm, i32imm, i32imm, /* VLDRS */ SPR, GPR, i32imm, i32imm, i32imm, /* VLDR_FPCXTNS_off */ GPRnopc, i32imm, i32imm, i32imm, /* VLDR_FPCXTNS_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VLDR_FPCXTNS_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VLDR_FPCXTS_off */ GPRnopc, i32imm, i32imm, i32imm, /* VLDR_FPCXTS_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VLDR_FPCXTS_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VLDR_FPSCR_NZCVQC_off */ GPRnopc, i32imm, i32imm, i32imm, /* VLDR_FPSCR_NZCVQC_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VLDR_FPSCR_NZCVQC_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VLDR_FPSCR_off */ GPRnopc, i32imm, i32imm, i32imm, /* VLDR_FPSCR_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VLDR_FPSCR_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VLDR_P0_off */ VCCR, GPRnopc, i32imm, i32imm, i32imm, /* VLDR_P0_post */ VCCR, GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VLDR_P0_pre */ VCCR, GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VLDR_VPR_off */ GPRnopc, i32imm, i32imm, i32imm, /* VLDR_VPR_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VLDR_VPR_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VLLDM */ GPRnopc, i32imm, i32imm, /* VLSTM */ GPRnopc, i32imm, i32imm, /* VMAXfd */ DPR, DPR, DPR, i32imm, i32imm, /* VMAXfq */ QPR, QPR, QPR, i32imm, i32imm, /* VMAXhd */ DPR, DPR, DPR, i32imm, i32imm, /* VMAXhq */ QPR, QPR, QPR, i32imm, i32imm, /* VMAXsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VMAXsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VMAXsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VMAXsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VMAXsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VMAXsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VMAXuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VMAXuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VMAXuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VMAXuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VMAXuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VMAXuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VMINfd */ DPR, DPR, DPR, i32imm, i32imm, /* VMINfq */ QPR, QPR, QPR, i32imm, i32imm, /* VMINhd */ DPR, DPR, DPR, i32imm, i32imm, /* VMINhq */ QPR, QPR, QPR, i32imm, i32imm, /* VMINsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VMINsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VMINsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VMINsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VMINsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VMINsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VMINuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VMINuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VMINuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VMINuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VMINuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VMINuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VMLAD */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLAH */ HPR, HPR, HPR, HPR, i32imm, i32imm, /* VMLALslsv2i32 */ QPR, QPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLALslsv4i16 */ QPR, QPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMLALsluv2i32 */ QPR, QPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLALsluv4i16 */ QPR, QPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMLALsv2i64 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLALsv4i32 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLALsv8i16 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLALuv2i64 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLALuv4i32 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLALuv8i16 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLAS */ SPR, SPR, SPR, SPR, i32imm, i32imm, /* VMLAfd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLAfq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLAhd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLAhq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLAslfd */ DPR, DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLAslfq */ QPR, QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLAslhd */ DPR, DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMLAslhq */ QPR, QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VMLAslv2i32 */ DPR, DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLAslv4i16 */ DPR, DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMLAslv4i32 */ QPR, QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLAslv8i16 */ QPR, QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VMLAv16i8 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLAv2i32 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLAv4i16 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLAv4i32 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLAv8i16 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLAv8i8 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLSD */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLSH */ HPR, HPR, HPR, HPR, i32imm, i32imm, /* VMLSLslsv2i32 */ QPR, QPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLSLslsv4i16 */ QPR, QPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMLSLsluv2i32 */ QPR, QPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLSLsluv4i16 */ QPR, QPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMLSLsv2i64 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLSLsv4i32 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLSLsv8i16 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLSLuv2i64 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLSLuv4i32 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLSLuv8i16 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VMLSS */ SPR, SPR, SPR, SPR, i32imm, i32imm, /* VMLSfd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLSfq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLShd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLShq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLSslfd */ DPR, DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLSslfq */ QPR, QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLSslhd */ DPR, DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMLSslhq */ QPR, QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VMLSslv2i32 */ DPR, DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLSslv4i16 */ DPR, DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMLSslv4i32 */ QPR, QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMLSslv8i16 */ QPR, QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VMLSv16i8 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLSv2i32 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLSv4i16 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMLSv4i32 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLSv8i16 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VMLSv8i8 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VMMLA */ QPR, QPR, QPR, QPR, /* VMOVD */ DPR, DPR, i32imm, i32imm, /* VMOVDRR */ DPR, GPR, GPR, i32imm, i32imm, /* VMOVH */ SPR, SPR, /* VMOVHR */ HPR, rGPR, i32imm, i32imm, /* VMOVLsv2i64 */ QPR, DPR, i32imm, i32imm, /* VMOVLsv4i32 */ QPR, DPR, i32imm, i32imm, /* VMOVLsv8i16 */ QPR, DPR, i32imm, i32imm, /* VMOVLuv2i64 */ QPR, DPR, i32imm, i32imm, /* VMOVLuv4i32 */ QPR, DPR, i32imm, i32imm, /* VMOVLuv8i16 */ QPR, DPR, i32imm, i32imm, /* VMOVNv2i32 */ DPR, QPR, i32imm, i32imm, /* VMOVNv4i16 */ DPR, QPR, i32imm, i32imm, /* VMOVNv8i8 */ DPR, QPR, i32imm, i32imm, /* VMOVRH */ rGPR, HPR, i32imm, i32imm, /* VMOVRRD */ GPR, GPR, DPR, i32imm, i32imm, /* VMOVRRS */ GPR, GPR, SPR, SPR, i32imm, i32imm, /* VMOVRS */ GPR, SPR, i32imm, i32imm, /* VMOVS */ SPR, SPR, i32imm, i32imm, /* VMOVSR */ SPR, GPR, i32imm, i32imm, /* VMOVSRR */ SPR, SPR, GPR, GPR, i32imm, i32imm, /* VMOVv16i8 */ QPR, nImmSplatI8, i32imm, i32imm, /* VMOVv1i64 */ DPR, nImmSplatI64, i32imm, i32imm, /* VMOVv2f32 */ DPR, nImmVMOVF32, i32imm, i32imm, /* VMOVv2i32 */ DPR, nImmVMOVI32, i32imm, i32imm, /* VMOVv2i64 */ QPR, nImmSplatI64, i32imm, i32imm, /* VMOVv4f32 */ QPR, nImmVMOVF32, i32imm, i32imm, /* VMOVv4i16 */ DPR, nImmSplatI16, i32imm, i32imm, /* VMOVv4i32 */ QPR, nImmVMOVI32, i32imm, i32imm, /* VMOVv8i16 */ QPR, nImmSplatI16, i32imm, i32imm, /* VMOVv8i8 */ DPR, nImmSplatI8, i32imm, i32imm, /* VMRS */ GPRnopc, i32imm, i32imm, /* VMRS_FPCXTNS */ GPR, i32imm, i32imm, /* VMRS_FPCXTS */ GPR, i32imm, i32imm, /* VMRS_FPEXC */ GPRnopc, i32imm, i32imm, /* VMRS_FPINST */ GPRnopc, i32imm, i32imm, /* VMRS_FPINST2 */ GPRnopc, i32imm, i32imm, /* VMRS_FPSCR_NZCVQC */ GPR, cl_FPSCR_NZCV, i32imm, i32imm, /* VMRS_FPSID */ GPRnopc, i32imm, i32imm, /* VMRS_MVFR0 */ GPRnopc, i32imm, i32imm, /* VMRS_MVFR1 */ GPRnopc, i32imm, i32imm, /* VMRS_MVFR2 */ GPRnopc, i32imm, i32imm, /* VMRS_P0 */ GPR, VCCR, i32imm, i32imm, /* VMRS_VPR */ GPR, i32imm, i32imm, /* VMSR */ GPRnopc, i32imm, i32imm, /* VMSR_FPCXTNS */ GPR, i32imm, i32imm, /* VMSR_FPCXTS */ GPR, i32imm, i32imm, /* VMSR_FPEXC */ GPRnopc, i32imm, i32imm, /* VMSR_FPINST */ GPRnopc, i32imm, i32imm, /* VMSR_FPINST2 */ GPRnopc, i32imm, i32imm, /* VMSR_FPSCR_NZCVQC */ cl_FPSCR_NZCV, GPR, i32imm, i32imm, /* VMSR_FPSID */ GPRnopc, i32imm, i32imm, /* VMSR_P0 */ VCCR, GPR, i32imm, i32imm, /* VMSR_VPR */ GPR, i32imm, i32imm, /* VMULD */ DPR, DPR, DPR, i32imm, i32imm, /* VMULH */ HPR, HPR, HPR, i32imm, i32imm, /* VMULLp64 */ QPR, DPR, DPR, /* VMULLp8 */ QPR, DPR, DPR, i32imm, i32imm, /* VMULLslsv2i32 */ QPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMULLslsv4i16 */ QPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMULLsluv2i32 */ QPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMULLsluv4i16 */ QPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMULLsv2i64 */ QPR, DPR, DPR, i32imm, i32imm, /* VMULLsv4i32 */ QPR, DPR, DPR, i32imm, i32imm, /* VMULLsv8i16 */ QPR, DPR, DPR, i32imm, i32imm, /* VMULLuv2i64 */ QPR, DPR, DPR, i32imm, i32imm, /* VMULLuv4i32 */ QPR, DPR, DPR, i32imm, i32imm, /* VMULLuv8i16 */ QPR, DPR, DPR, i32imm, i32imm, /* VMULS */ SPR, SPR, SPR, i32imm, i32imm, /* VMULfd */ DPR, DPR, DPR, i32imm, i32imm, /* VMULfq */ QPR, QPR, QPR, i32imm, i32imm, /* VMULhd */ DPR, DPR, DPR, i32imm, i32imm, /* VMULhq */ QPR, QPR, QPR, i32imm, i32imm, /* VMULpd */ DPR, DPR, DPR, i32imm, i32imm, /* VMULpq */ QPR, QPR, QPR, i32imm, i32imm, /* VMULslfd */ DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMULslfq */ QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMULslhd */ DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMULslhq */ QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VMULslv2i32 */ DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMULslv4i16 */ DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VMULslv4i32 */ QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VMULslv8i16 */ QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VMULv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VMULv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VMULv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VMULv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VMULv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VMULv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VMVNd */ DPR, DPR, i32imm, i32imm, /* VMVNq */ QPR, QPR, i32imm, i32imm, /* VMVNv2i32 */ DPR, nImmVMOVI32, i32imm, i32imm, /* VMVNv4i16 */ DPR, nImmSplatI16, i32imm, i32imm, /* VMVNv4i32 */ QPR, nImmVMOVI32, i32imm, i32imm, /* VMVNv8i16 */ QPR, nImmSplatI16, i32imm, i32imm, /* VNEGD */ DPR, DPR, i32imm, i32imm, /* VNEGH */ HPR, HPR, i32imm, i32imm, /* VNEGS */ SPR, SPR, i32imm, i32imm, /* VNEGf32q */ QPR, QPR, i32imm, i32imm, /* VNEGfd */ DPR, DPR, i32imm, i32imm, /* VNEGhd */ DPR, DPR, i32imm, i32imm, /* VNEGhq */ QPR, QPR, i32imm, i32imm, /* VNEGs16d */ DPR, DPR, i32imm, i32imm, /* VNEGs16q */ QPR, QPR, i32imm, i32imm, /* VNEGs32d */ DPR, DPR, i32imm, i32imm, /* VNEGs32q */ QPR, QPR, i32imm, i32imm, /* VNEGs8d */ DPR, DPR, i32imm, i32imm, /* VNEGs8q */ QPR, QPR, i32imm, i32imm, /* VNMLAD */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VNMLAH */ HPR, HPR, HPR, HPR, i32imm, i32imm, /* VNMLAS */ SPR, SPR, SPR, SPR, i32imm, i32imm, /* VNMLSD */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VNMLSH */ HPR, HPR, HPR, HPR, i32imm, i32imm, /* VNMLSS */ SPR, SPR, SPR, SPR, i32imm, i32imm, /* VNMULD */ DPR, DPR, DPR, i32imm, i32imm, /* VNMULH */ HPR, HPR, HPR, i32imm, i32imm, /* VNMULS */ SPR, SPR, SPR, i32imm, i32imm, /* VORNd */ DPR, DPR, DPR, i32imm, i32imm, /* VORNq */ QPR, QPR, QPR, i32imm, i32imm, /* VORRd */ DPR, DPR, DPR, i32imm, i32imm, /* VORRiv2i32 */ DPR, nImmSplatI32, DPR, i32imm, i32imm, /* VORRiv4i16 */ DPR, nImmSplatI16, DPR, i32imm, i32imm, /* VORRiv4i32 */ QPR, nImmSplatI32, QPR, i32imm, i32imm, /* VORRiv8i16 */ QPR, nImmSplatI16, QPR, i32imm, i32imm, /* VORRq */ QPR, QPR, QPR, i32imm, i32imm, /* VPADALsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VPADALsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VPADALsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VPADALsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VPADALsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VPADALsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VPADALuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VPADALuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VPADALuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VPADALuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VPADALuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VPADALuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VPADDLsv16i8 */ QPR, QPR, i32imm, i32imm, /* VPADDLsv2i32 */ DPR, DPR, i32imm, i32imm, /* VPADDLsv4i16 */ DPR, DPR, i32imm, i32imm, /* VPADDLsv4i32 */ QPR, QPR, i32imm, i32imm, /* VPADDLsv8i16 */ QPR, QPR, i32imm, i32imm, /* VPADDLsv8i8 */ DPR, DPR, i32imm, i32imm, /* VPADDLuv16i8 */ QPR, QPR, i32imm, i32imm, /* VPADDLuv2i32 */ DPR, DPR, i32imm, i32imm, /* VPADDLuv4i16 */ DPR, DPR, i32imm, i32imm, /* VPADDLuv4i32 */ QPR, QPR, i32imm, i32imm, /* VPADDLuv8i16 */ QPR, QPR, i32imm, i32imm, /* VPADDLuv8i8 */ DPR, DPR, i32imm, i32imm, /* VPADDf */ DPR, DPR, DPR, i32imm, i32imm, /* VPADDh */ DPR, DPR, DPR, i32imm, i32imm, /* VPADDi16 */ DPR, DPR, DPR, i32imm, i32imm, /* VPADDi32 */ DPR, DPR, DPR, i32imm, i32imm, /* VPADDi8 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMAXf */ DPR, DPR, DPR, i32imm, i32imm, /* VPMAXh */ DPR, DPR, DPR, i32imm, i32imm, /* VPMAXs16 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMAXs32 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMAXs8 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMAXu16 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMAXu32 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMAXu8 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMINf */ DPR, DPR, DPR, i32imm, i32imm, /* VPMINh */ DPR, DPR, DPR, i32imm, i32imm, /* VPMINs16 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMINs32 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMINs8 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMINu16 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMINu32 */ DPR, DPR, DPR, i32imm, i32imm, /* VPMINu8 */ DPR, DPR, DPR, i32imm, i32imm, /* VQABSv16i8 */ QPR, QPR, i32imm, i32imm, /* VQABSv2i32 */ DPR, DPR, i32imm, i32imm, /* VQABSv4i16 */ DPR, DPR, i32imm, i32imm, /* VQABSv4i32 */ QPR, QPR, i32imm, i32imm, /* VQABSv8i16 */ QPR, QPR, i32imm, i32imm, /* VQABSv8i8 */ DPR, DPR, i32imm, i32imm, /* VQADDsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VQADDsv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VQADDsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQADDsv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VQADDsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQADDsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQADDsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQADDsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VQADDuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VQADDuv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VQADDuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQADDuv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VQADDuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQADDuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQADDuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQADDuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VQDMLALslv2i32 */ QPR, QPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQDMLALslv4i16 */ QPR, QPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VQDMLALv2i64 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VQDMLALv4i32 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VQDMLSLslv2i32 */ QPR, QPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQDMLSLslv4i16 */ QPR, QPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VQDMLSLv2i64 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VQDMLSLv4i32 */ QPR, QPR, DPR, DPR, i32imm, i32imm, /* VQDMULHslv2i32 */ DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQDMULHslv4i16 */ DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VQDMULHslv4i32 */ QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQDMULHslv8i16 */ QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VQDMULHv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQDMULHv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQDMULHv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQDMULHv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQDMULLslv2i32 */ QPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQDMULLslv4i16 */ QPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VQDMULLv2i64 */ QPR, DPR, DPR, i32imm, i32imm, /* VQDMULLv4i32 */ QPR, DPR, DPR, i32imm, i32imm, /* VQMOVNsuv2i32 */ DPR, QPR, i32imm, i32imm, /* VQMOVNsuv4i16 */ DPR, QPR, i32imm, i32imm, /* VQMOVNsuv8i8 */ DPR, QPR, i32imm, i32imm, /* VQMOVNsv2i32 */ DPR, QPR, i32imm, i32imm, /* VQMOVNsv4i16 */ DPR, QPR, i32imm, i32imm, /* VQMOVNsv8i8 */ DPR, QPR, i32imm, i32imm, /* VQMOVNuv2i32 */ DPR, QPR, i32imm, i32imm, /* VQMOVNuv4i16 */ DPR, QPR, i32imm, i32imm, /* VQMOVNuv8i8 */ DPR, QPR, i32imm, i32imm, /* VQNEGv16i8 */ QPR, QPR, i32imm, i32imm, /* VQNEGv2i32 */ DPR, DPR, i32imm, i32imm, /* VQNEGv4i16 */ DPR, DPR, i32imm, i32imm, /* VQNEGv4i32 */ QPR, QPR, i32imm, i32imm, /* VQNEGv8i16 */ QPR, QPR, i32imm, i32imm, /* VQNEGv8i8 */ DPR, DPR, i32imm, i32imm, /* VQRDMLAHslv2i32 */ DPR, DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQRDMLAHslv4i16 */ DPR, DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VQRDMLAHslv4i32 */ QPR, QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQRDMLAHslv8i16 */ QPR, QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VQRDMLAHv2i32 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VQRDMLAHv4i16 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VQRDMLAHv4i32 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VQRDMLAHv8i16 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VQRDMLSHslv2i32 */ DPR, DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQRDMLSHslv4i16 */ DPR, DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VQRDMLSHslv4i32 */ QPR, QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQRDMLSHslv8i16 */ QPR, QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VQRDMLSHv2i32 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VQRDMLSHv4i16 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VQRDMLSHv4i32 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VQRDMLSHv8i16 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VQRDMULHslv2i32 */ DPR, DPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQRDMULHslv4i16 */ DPR, DPR, DPR_8, i32imm, i32imm, i32imm, /* VQRDMULHslv4i32 */ QPR, QPR, DPR_VFP2, i32imm, i32imm, i32imm, /* VQRDMULHslv8i16 */ QPR, QPR, DPR_8, i32imm, i32imm, i32imm, /* VQRDMULHv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRDMULHv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRDMULHv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRDMULHv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRSHLsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRSHLsv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRSHLsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRSHLsv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRSHLsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRSHLsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRSHLsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRSHLsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRSHLuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRSHLuv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRSHLuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRSHLuv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRSHLuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRSHLuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRSHLuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQRSHLuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VQRSHRNsv2i32 */ DPR, QPR, shr_imm32, i32imm, i32imm, /* VQRSHRNsv4i16 */ DPR, QPR, shr_imm16, i32imm, i32imm, /* VQRSHRNsv8i8 */ DPR, QPR, shr_imm8, i32imm, i32imm, /* VQRSHRNuv2i32 */ DPR, QPR, shr_imm32, i32imm, i32imm, /* VQRSHRNuv4i16 */ DPR, QPR, shr_imm16, i32imm, i32imm, /* VQRSHRNuv8i8 */ DPR, QPR, shr_imm8, i32imm, i32imm, /* VQRSHRUNv2i32 */ DPR, QPR, shr_imm32, i32imm, i32imm, /* VQRSHRUNv4i16 */ DPR, QPR, shr_imm16, i32imm, i32imm, /* VQRSHRUNv8i8 */ DPR, QPR, shr_imm8, i32imm, i32imm, /* VQSHLsiv16i8 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLsiv1i64 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLsiv2i32 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLsiv2i64 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLsiv4i16 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLsiv4i32 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLsiv8i16 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLsiv8i8 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLsuv16i8 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLsuv1i64 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLsuv2i32 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLsuv2i64 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLsuv4i16 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLsuv4i32 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLsuv8i16 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLsuv8i8 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSHLsv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSHLsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSHLsv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSHLsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSHLsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSHLsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSHLsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSHLuiv16i8 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLuiv1i64 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLuiv2i32 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLuiv2i64 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLuiv4i16 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLuiv4i32 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLuiv8i16 */ QPR, QPR, i32imm, i32imm, i32imm, /* VQSHLuiv8i8 */ DPR, DPR, i32imm, i32imm, i32imm, /* VQSHLuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSHLuv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSHLuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSHLuv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSHLuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSHLuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSHLuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSHLuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSHRNsv2i32 */ DPR, QPR, shr_imm32, i32imm, i32imm, /* VQSHRNsv4i16 */ DPR, QPR, shr_imm16, i32imm, i32imm, /* VQSHRNsv8i8 */ DPR, QPR, shr_imm8, i32imm, i32imm, /* VQSHRNuv2i32 */ DPR, QPR, shr_imm32, i32imm, i32imm, /* VQSHRNuv4i16 */ DPR, QPR, shr_imm16, i32imm, i32imm, /* VQSHRNuv8i8 */ DPR, QPR, shr_imm8, i32imm, i32imm, /* VQSHRUNv2i32 */ DPR, QPR, shr_imm32, i32imm, i32imm, /* VQSHRUNv4i16 */ DPR, QPR, shr_imm16, i32imm, i32imm, /* VQSHRUNv8i8 */ DPR, QPR, shr_imm8, i32imm, i32imm, /* VQSUBsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSUBsv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSUBsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSUBsv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSUBsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSUBsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSUBsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSUBsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSUBuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSUBuv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSUBuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSUBuv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSUBuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VQSUBuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSUBuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VQSUBuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VRADDHNv2i32 */ DPR, QPR, QPR, i32imm, i32imm, /* VRADDHNv4i16 */ DPR, QPR, QPR, i32imm, i32imm, /* VRADDHNv8i8 */ DPR, QPR, QPR, i32imm, i32imm, /* VRECPEd */ DPR, DPR, i32imm, i32imm, /* VRECPEfd */ DPR, DPR, i32imm, i32imm, /* VRECPEfq */ QPR, QPR, i32imm, i32imm, /* VRECPEhd */ DPR, DPR, i32imm, i32imm, /* VRECPEhq */ QPR, QPR, i32imm, i32imm, /* VRECPEq */ QPR, QPR, i32imm, i32imm, /* VRECPSfd */ DPR, DPR, DPR, i32imm, i32imm, /* VRECPSfq */ QPR, QPR, QPR, i32imm, i32imm, /* VRECPShd */ DPR, DPR, DPR, i32imm, i32imm, /* VRECPShq */ QPR, QPR, QPR, i32imm, i32imm, /* VREV16d8 */ DPR, DPR, i32imm, i32imm, /* VREV16q8 */ QPR, QPR, i32imm, i32imm, /* VREV32d16 */ DPR, DPR, i32imm, i32imm, /* VREV32d8 */ DPR, DPR, i32imm, i32imm, /* VREV32q16 */ QPR, QPR, i32imm, i32imm, /* VREV32q8 */ QPR, QPR, i32imm, i32imm, /* VREV64d16 */ DPR, DPR, i32imm, i32imm, /* VREV64d32 */ DPR, DPR, i32imm, i32imm, /* VREV64d8 */ DPR, DPR, i32imm, i32imm, /* VREV64q16 */ QPR, QPR, i32imm, i32imm, /* VREV64q32 */ QPR, QPR, i32imm, i32imm, /* VREV64q8 */ QPR, QPR, i32imm, i32imm, /* VRHADDsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VRHADDsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VRHADDsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VRHADDsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VRHADDsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VRHADDsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VRHADDuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VRHADDuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VRHADDuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VRHADDuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VRHADDuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VRHADDuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VRINTAD */ DPR, DPR, /* VRINTAH */ HPR, HPR, /* VRINTANDf */ DPR, DPR, /* VRINTANDh */ DPR, DPR, /* VRINTANQf */ QPR, QPR, /* VRINTANQh */ QPR, QPR, /* VRINTAS */ SPR, SPR, /* VRINTMD */ DPR, DPR, /* VRINTMH */ HPR, HPR, /* VRINTMNDf */ DPR, DPR, /* VRINTMNDh */ DPR, DPR, /* VRINTMNQf */ QPR, QPR, /* VRINTMNQh */ QPR, QPR, /* VRINTMS */ SPR, SPR, /* VRINTND */ DPR, DPR, /* VRINTNH */ HPR, HPR, /* VRINTNNDf */ DPR, DPR, /* VRINTNNDh */ DPR, DPR, /* VRINTNNQf */ QPR, QPR, /* VRINTNNQh */ QPR, QPR, /* VRINTNS */ SPR, SPR, /* VRINTPD */ DPR, DPR, /* VRINTPH */ HPR, HPR, /* VRINTPNDf */ DPR, DPR, /* VRINTPNDh */ DPR, DPR, /* VRINTPNQf */ QPR, QPR, /* VRINTPNQh */ QPR, QPR, /* VRINTPS */ SPR, SPR, /* VRINTRD */ DPR, DPR, i32imm, i32imm, /* VRINTRH */ HPR, HPR, i32imm, i32imm, /* VRINTRS */ SPR, SPR, i32imm, i32imm, /* VRINTXD */ DPR, DPR, i32imm, i32imm, /* VRINTXH */ HPR, HPR, i32imm, i32imm, /* VRINTXNDf */ DPR, DPR, /* VRINTXNDh */ DPR, DPR, /* VRINTXNQf */ QPR, QPR, /* VRINTXNQh */ QPR, QPR, /* VRINTXS */ SPR, SPR, i32imm, i32imm, /* VRINTZD */ DPR, DPR, i32imm, i32imm, /* VRINTZH */ HPR, HPR, i32imm, i32imm, /* VRINTZNDf */ DPR, DPR, /* VRINTZNDh */ DPR, DPR, /* VRINTZNQf */ QPR, QPR, /* VRINTZNQh */ QPR, QPR, /* VRINTZS */ SPR, SPR, i32imm, i32imm, /* VRSHLsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VRSHLsv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VRSHLsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VRSHLsv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VRSHLsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VRSHLsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VRSHLsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VRSHLsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VRSHLuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VRSHLuv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VRSHLuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VRSHLuv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VRSHLuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VRSHLuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VRSHLuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VRSHLuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VRSHRNv2i32 */ DPR, QPR, shr_imm32, i32imm, i32imm, /* VRSHRNv4i16 */ DPR, QPR, shr_imm16, i32imm, i32imm, /* VRSHRNv8i8 */ DPR, QPR, shr_imm8, i32imm, i32imm, /* VRSHRsv16i8 */ QPR, QPR, shr_imm8, i32imm, i32imm, /* VRSHRsv1i64 */ DPR, DPR, shr_imm64, i32imm, i32imm, /* VRSHRsv2i32 */ DPR, DPR, shr_imm32, i32imm, i32imm, /* VRSHRsv2i64 */ QPR, QPR, shr_imm64, i32imm, i32imm, /* VRSHRsv4i16 */ DPR, DPR, shr_imm16, i32imm, i32imm, /* VRSHRsv4i32 */ QPR, QPR, shr_imm32, i32imm, i32imm, /* VRSHRsv8i16 */ QPR, QPR, shr_imm16, i32imm, i32imm, /* VRSHRsv8i8 */ DPR, DPR, shr_imm8, i32imm, i32imm, /* VRSHRuv16i8 */ QPR, QPR, shr_imm8, i32imm, i32imm, /* VRSHRuv1i64 */ DPR, DPR, shr_imm64, i32imm, i32imm, /* VRSHRuv2i32 */ DPR, DPR, shr_imm32, i32imm, i32imm, /* VRSHRuv2i64 */ QPR, QPR, shr_imm64, i32imm, i32imm, /* VRSHRuv4i16 */ DPR, DPR, shr_imm16, i32imm, i32imm, /* VRSHRuv4i32 */ QPR, QPR, shr_imm32, i32imm, i32imm, /* VRSHRuv8i16 */ QPR, QPR, shr_imm16, i32imm, i32imm, /* VRSHRuv8i8 */ DPR, DPR, shr_imm8, i32imm, i32imm, /* VRSQRTEd */ DPR, DPR, i32imm, i32imm, /* VRSQRTEfd */ DPR, DPR, i32imm, i32imm, /* VRSQRTEfq */ QPR, QPR, i32imm, i32imm, /* VRSQRTEhd */ DPR, DPR, i32imm, i32imm, /* VRSQRTEhq */ QPR, QPR, i32imm, i32imm, /* VRSQRTEq */ QPR, QPR, i32imm, i32imm, /* VRSQRTSfd */ DPR, DPR, DPR, i32imm, i32imm, /* VRSQRTSfq */ QPR, QPR, QPR, i32imm, i32imm, /* VRSQRTShd */ DPR, DPR, DPR, i32imm, i32imm, /* VRSQRTShq */ QPR, QPR, QPR, i32imm, i32imm, /* VRSRAsv16i8 */ QPR, QPR, QPR, shr_imm8, i32imm, i32imm, /* VRSRAsv1i64 */ DPR, DPR, DPR, shr_imm64, i32imm, i32imm, /* VRSRAsv2i32 */ DPR, DPR, DPR, shr_imm32, i32imm, i32imm, /* VRSRAsv2i64 */ QPR, QPR, QPR, shr_imm64, i32imm, i32imm, /* VRSRAsv4i16 */ DPR, DPR, DPR, shr_imm16, i32imm, i32imm, /* VRSRAsv4i32 */ QPR, QPR, QPR, shr_imm32, i32imm, i32imm, /* VRSRAsv8i16 */ QPR, QPR, QPR, shr_imm16, i32imm, i32imm, /* VRSRAsv8i8 */ DPR, DPR, DPR, shr_imm8, i32imm, i32imm, /* VRSRAuv16i8 */ QPR, QPR, QPR, shr_imm8, i32imm, i32imm, /* VRSRAuv1i64 */ DPR, DPR, DPR, shr_imm64, i32imm, i32imm, /* VRSRAuv2i32 */ DPR, DPR, DPR, shr_imm32, i32imm, i32imm, /* VRSRAuv2i64 */ QPR, QPR, QPR, shr_imm64, i32imm, i32imm, /* VRSRAuv4i16 */ DPR, DPR, DPR, shr_imm16, i32imm, i32imm, /* VRSRAuv4i32 */ QPR, QPR, QPR, shr_imm32, i32imm, i32imm, /* VRSRAuv8i16 */ QPR, QPR, QPR, shr_imm16, i32imm, i32imm, /* VRSRAuv8i8 */ DPR, DPR, DPR, shr_imm8, i32imm, i32imm, /* VRSUBHNv2i32 */ DPR, QPR, QPR, i32imm, i32imm, /* VRSUBHNv4i16 */ DPR, QPR, QPR, i32imm, i32imm, /* VRSUBHNv8i8 */ DPR, QPR, QPR, i32imm, i32imm, /* VSCCLRMD */ i32imm, i32imm, fp_dreglist_with_vpr, /* VSCCLRMS */ i32imm, i32imm, fp_sreglist_with_vpr, /* VSDOTD */ DPR, DPR, DPR, DPR, /* VSDOTDI */ DPR, DPR, DPR, DPR_VFP2, i32imm, /* VSDOTQ */ QPR, QPR, QPR, QPR, /* VSDOTQI */ QPR, QPR, QPR, DPR_VFP2, i32imm, /* VSELEQD */ DPR, DPR, DPR, /* VSELEQH */ HPR, HPR, HPR, /* VSELEQS */ SPR, SPR, SPR, /* VSELGED */ DPR, DPR, DPR, /* VSELGEH */ HPR, HPR, HPR, /* VSELGES */ SPR, SPR, SPR, /* VSELGTD */ DPR, DPR, DPR, /* VSELGTH */ HPR, HPR, HPR, /* VSELGTS */ SPR, SPR, SPR, /* VSELVSD */ DPR, DPR, DPR, /* VSELVSH */ HPR, HPR, HPR, /* VSELVSS */ SPR, SPR, SPR, /* VSETLNi16 */ DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VSETLNi32 */ DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VSETLNi8 */ DPR, DPR, GPR, i32imm, i32imm, i32imm, /* VSHLLi16 */ QPR, DPR, imm16, i32imm, i32imm, /* VSHLLi32 */ QPR, DPR, imm32, i32imm, i32imm, /* VSHLLi8 */ QPR, DPR, imm8, i32imm, i32imm, /* VSHLLsv2i64 */ QPR, DPR, imm1_31, i32imm, i32imm, /* VSHLLsv4i32 */ QPR, DPR, imm1_15, i32imm, i32imm, /* VSHLLsv8i16 */ QPR, DPR, imm1_7, i32imm, i32imm, /* VSHLLuv2i64 */ QPR, DPR, imm1_31, i32imm, i32imm, /* VSHLLuv4i32 */ QPR, DPR, imm1_15, i32imm, i32imm, /* VSHLLuv8i16 */ QPR, DPR, imm1_7, i32imm, i32imm, /* VSHLiv16i8 */ QPR, QPR, i32imm, i32imm, i32imm, /* VSHLiv1i64 */ DPR, DPR, i32imm, i32imm, i32imm, /* VSHLiv2i32 */ DPR, DPR, i32imm, i32imm, i32imm, /* VSHLiv2i64 */ QPR, QPR, i32imm, i32imm, i32imm, /* VSHLiv4i16 */ DPR, DPR, i32imm, i32imm, i32imm, /* VSHLiv4i32 */ QPR, QPR, i32imm, i32imm, i32imm, /* VSHLiv8i16 */ QPR, QPR, i32imm, i32imm, i32imm, /* VSHLiv8i8 */ DPR, DPR, i32imm, i32imm, i32imm, /* VSHLsv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VSHLsv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VSHLsv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VSHLsv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VSHLsv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VSHLsv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VSHLsv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VSHLsv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VSHLuv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VSHLuv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VSHLuv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VSHLuv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VSHLuv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VSHLuv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VSHLuv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VSHLuv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VSHRNv2i32 */ DPR, QPR, shr_imm32, i32imm, i32imm, /* VSHRNv4i16 */ DPR, QPR, shr_imm16, i32imm, i32imm, /* VSHRNv8i8 */ DPR, QPR, shr_imm8, i32imm, i32imm, /* VSHRsv16i8 */ QPR, QPR, shr_imm8, i32imm, i32imm, /* VSHRsv1i64 */ DPR, DPR, shr_imm64, i32imm, i32imm, /* VSHRsv2i32 */ DPR, DPR, shr_imm32, i32imm, i32imm, /* VSHRsv2i64 */ QPR, QPR, shr_imm64, i32imm, i32imm, /* VSHRsv4i16 */ DPR, DPR, shr_imm16, i32imm, i32imm, /* VSHRsv4i32 */ QPR, QPR, shr_imm32, i32imm, i32imm, /* VSHRsv8i16 */ QPR, QPR, shr_imm16, i32imm, i32imm, /* VSHRsv8i8 */ DPR, DPR, shr_imm8, i32imm, i32imm, /* VSHRuv16i8 */ QPR, QPR, shr_imm8, i32imm, i32imm, /* VSHRuv1i64 */ DPR, DPR, shr_imm64, i32imm, i32imm, /* VSHRuv2i32 */ DPR, DPR, shr_imm32, i32imm, i32imm, /* VSHRuv2i64 */ QPR, QPR, shr_imm64, i32imm, i32imm, /* VSHRuv4i16 */ DPR, DPR, shr_imm16, i32imm, i32imm, /* VSHRuv4i32 */ QPR, QPR, shr_imm32, i32imm, i32imm, /* VSHRuv8i16 */ QPR, QPR, shr_imm16, i32imm, i32imm, /* VSHRuv8i8 */ DPR, DPR, shr_imm8, i32imm, i32imm, /* VSHTOD */ DPR, DPR, fbits16, i32imm, i32imm, /* VSHTOH */ SPR, SPR, fbits16, i32imm, i32imm, /* VSHTOS */ SPR, SPR, fbits16, i32imm, i32imm, /* VSITOD */ DPR, SPR, i32imm, i32imm, /* VSITOH */ HPR, SPR, i32imm, i32imm, /* VSITOS */ SPR, SPR, i32imm, i32imm, /* VSLIv16i8 */ QPR, QPR, QPR, i32imm, i32imm, i32imm, /* VSLIv1i64 */ DPR, DPR, DPR, i32imm, i32imm, i32imm, /* VSLIv2i32 */ DPR, DPR, DPR, i32imm, i32imm, i32imm, /* VSLIv2i64 */ QPR, QPR, QPR, i32imm, i32imm, i32imm, /* VSLIv4i16 */ DPR, DPR, DPR, i32imm, i32imm, i32imm, /* VSLIv4i32 */ QPR, QPR, QPR, i32imm, i32imm, i32imm, /* VSLIv8i16 */ QPR, QPR, QPR, i32imm, i32imm, i32imm, /* VSLIv8i8 */ DPR, DPR, DPR, i32imm, i32imm, i32imm, /* VSLTOD */ DPR, DPR, fbits32, i32imm, i32imm, /* VSLTOH */ SPR, SPR, fbits32, i32imm, i32imm, /* VSLTOS */ SPR, SPR, fbits32, i32imm, i32imm, /* VSMMLA */ QPR, QPR, QPR, QPR, /* VSQRTD */ DPR, DPR, i32imm, i32imm, /* VSQRTH */ HPR, HPR, i32imm, i32imm, /* VSQRTS */ SPR, SPR, i32imm, i32imm, /* VSRAsv16i8 */ QPR, QPR, QPR, shr_imm8, i32imm, i32imm, /* VSRAsv1i64 */ DPR, DPR, DPR, shr_imm64, i32imm, i32imm, /* VSRAsv2i32 */ DPR, DPR, DPR, shr_imm32, i32imm, i32imm, /* VSRAsv2i64 */ QPR, QPR, QPR, shr_imm64, i32imm, i32imm, /* VSRAsv4i16 */ DPR, DPR, DPR, shr_imm16, i32imm, i32imm, /* VSRAsv4i32 */ QPR, QPR, QPR, shr_imm32, i32imm, i32imm, /* VSRAsv8i16 */ QPR, QPR, QPR, shr_imm16, i32imm, i32imm, /* VSRAsv8i8 */ DPR, DPR, DPR, shr_imm8, i32imm, i32imm, /* VSRAuv16i8 */ QPR, QPR, QPR, shr_imm8, i32imm, i32imm, /* VSRAuv1i64 */ DPR, DPR, DPR, shr_imm64, i32imm, i32imm, /* VSRAuv2i32 */ DPR, DPR, DPR, shr_imm32, i32imm, i32imm, /* VSRAuv2i64 */ QPR, QPR, QPR, shr_imm64, i32imm, i32imm, /* VSRAuv4i16 */ DPR, DPR, DPR, shr_imm16, i32imm, i32imm, /* VSRAuv4i32 */ QPR, QPR, QPR, shr_imm32, i32imm, i32imm, /* VSRAuv8i16 */ QPR, QPR, QPR, shr_imm16, i32imm, i32imm, /* VSRAuv8i8 */ DPR, DPR, DPR, shr_imm8, i32imm, i32imm, /* VSRIv16i8 */ QPR, QPR, QPR, shr_imm8, i32imm, i32imm, /* VSRIv1i64 */ DPR, DPR, DPR, shr_imm64, i32imm, i32imm, /* VSRIv2i32 */ DPR, DPR, DPR, shr_imm32, i32imm, i32imm, /* VSRIv2i64 */ QPR, QPR, QPR, shr_imm64, i32imm, i32imm, /* VSRIv4i16 */ DPR, DPR, DPR, shr_imm16, i32imm, i32imm, /* VSRIv4i32 */ QPR, QPR, QPR, shr_imm32, i32imm, i32imm, /* VSRIv8i16 */ QPR, QPR, QPR, shr_imm16, i32imm, i32imm, /* VSRIv8i8 */ DPR, DPR, DPR, shr_imm8, i32imm, i32imm, /* VST1LNd16 */ GPR, i32imm, DPR, nohash_imm, i32imm, i32imm, /* VST1LNd16_UPD */ GPR, GPR, i32imm, GPR, DPR, nohash_imm, i32imm, i32imm, /* VST1LNd32 */ GPR, i32imm, DPR, nohash_imm, i32imm, i32imm, /* VST1LNd32_UPD */ GPR, GPR, i32imm, GPR, DPR, nohash_imm, i32imm, i32imm, /* VST1LNd8 */ GPR, i32imm, DPR, nohash_imm, i32imm, i32imm, /* VST1LNd8_UPD */ GPR, GPR, i32imm, GPR, DPR, nohash_imm, i32imm, i32imm, /* VST1LNq16Pseudo */ GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VST1LNq16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VST1LNq32Pseudo */ GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VST1LNq32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VST1LNq8Pseudo */ GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VST1LNq8Pseudo_UPD */ GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VST1d16 */ GPR, i32imm, VecListOneD, i32imm, i32imm, /* VST1d16Q */ GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST1d16QPseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d16QPseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d16QPseudoWB_register */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST1d16Qwb_fixed */ GPR, GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST1d16Qwb_register */ GPR, GPR, i32imm, rGPR, VecListFourD, i32imm, i32imm, /* VST1d16T */ GPR, i32imm, VecListThreeD, i32imm, i32imm, /* VST1d16TPseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d16TPseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d16TPseudoWB_register */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST1d16Twb_fixed */ GPR, GPR, i32imm, VecListThreeD, i32imm, i32imm, /* VST1d16Twb_register */ GPR, GPR, i32imm, rGPR, VecListThreeD, i32imm, i32imm, /* VST1d16wb_fixed */ GPR, GPR, i32imm, VecListOneD, i32imm, i32imm, /* VST1d16wb_register */ GPR, GPR, i32imm, rGPR, VecListOneD, i32imm, i32imm, /* VST1d32 */ GPR, i32imm, VecListOneD, i32imm, i32imm, /* VST1d32Q */ GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST1d32QPseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d32QPseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d32QPseudoWB_register */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST1d32Qwb_fixed */ GPR, GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST1d32Qwb_register */ GPR, GPR, i32imm, rGPR, VecListFourD, i32imm, i32imm, /* VST1d32T */ GPR, i32imm, VecListThreeD, i32imm, i32imm, /* VST1d32TPseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d32TPseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d32TPseudoWB_register */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST1d32Twb_fixed */ GPR, GPR, i32imm, VecListThreeD, i32imm, i32imm, /* VST1d32Twb_register */ GPR, GPR, i32imm, rGPR, VecListThreeD, i32imm, i32imm, /* VST1d32wb_fixed */ GPR, GPR, i32imm, VecListOneD, i32imm, i32imm, /* VST1d32wb_register */ GPR, GPR, i32imm, rGPR, VecListOneD, i32imm, i32imm, /* VST1d64 */ GPR, i32imm, VecListOneD, i32imm, i32imm, /* VST1d64Q */ GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST1d64QPseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d64QPseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d64QPseudoWB_register */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST1d64Qwb_fixed */ GPR, GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST1d64Qwb_register */ GPR, GPR, i32imm, rGPR, VecListFourD, i32imm, i32imm, /* VST1d64T */ GPR, i32imm, VecListThreeD, i32imm, i32imm, /* VST1d64TPseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d64TPseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d64TPseudoWB_register */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST1d64Twb_fixed */ GPR, GPR, i32imm, VecListThreeD, i32imm, i32imm, /* VST1d64Twb_register */ GPR, GPR, i32imm, rGPR, VecListThreeD, i32imm, i32imm, /* VST1d64wb_fixed */ GPR, GPR, i32imm, VecListOneD, i32imm, i32imm, /* VST1d64wb_register */ GPR, GPR, i32imm, rGPR, VecListOneD, i32imm, i32imm, /* VST1d8 */ GPR, i32imm, VecListOneD, i32imm, i32imm, /* VST1d8Q */ GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST1d8QPseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d8QPseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d8QPseudoWB_register */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST1d8Qwb_fixed */ GPR, GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST1d8Qwb_register */ GPR, GPR, i32imm, rGPR, VecListFourD, i32imm, i32imm, /* VST1d8T */ GPR, i32imm, VecListThreeD, i32imm, i32imm, /* VST1d8TPseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d8TPseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST1d8TPseudoWB_register */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST1d8Twb_fixed */ GPR, GPR, i32imm, VecListThreeD, i32imm, i32imm, /* VST1d8Twb_register */ GPR, GPR, i32imm, rGPR, VecListThreeD, i32imm, i32imm, /* VST1d8wb_fixed */ GPR, GPR, i32imm, VecListOneD, i32imm, i32imm, /* VST1d8wb_register */ GPR, GPR, i32imm, rGPR, VecListOneD, i32imm, i32imm, /* VST1q16 */ GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST1q16HighQPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST1q16HighQPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q16HighTPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST1q16HighTPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q16LowQPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q16LowTPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q16wb_fixed */ GPR, GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST1q16wb_register */ GPR, GPR, i32imm, rGPR, VecListDPair, i32imm, i32imm, /* VST1q32 */ GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST1q32HighQPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST1q32HighQPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q32HighTPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST1q32HighTPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q32LowQPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q32LowTPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q32wb_fixed */ GPR, GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST1q32wb_register */ GPR, GPR, i32imm, rGPR, VecListDPair, i32imm, i32imm, /* VST1q64 */ GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST1q64HighQPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST1q64HighQPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q64HighTPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST1q64HighTPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q64LowQPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q64LowTPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q64wb_fixed */ GPR, GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST1q64wb_register */ GPR, GPR, i32imm, rGPR, VecListDPair, i32imm, i32imm, /* VST1q8 */ GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST1q8HighQPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST1q8HighQPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q8HighTPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST1q8HighTPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q8LowQPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q8LowTPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST1q8wb_fixed */ GPR, GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST1q8wb_register */ GPR, GPR, i32imm, rGPR, VecListDPair, i32imm, i32imm, /* VST2LNd16 */ GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2LNd16Pseudo */ GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VST2LNd16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VST2LNd16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2LNd32 */ GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2LNd32Pseudo */ GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VST2LNd32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VST2LNd32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2LNd8 */ GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2LNd8Pseudo */ GPR, i32imm, QPR, nohash_imm, i32imm, i32imm, /* VST2LNd8Pseudo_UPD */ GPR, GPR, i32imm, GPR, QPR, nohash_imm, i32imm, i32imm, /* VST2LNd8_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2LNq16 */ GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2LNq16Pseudo */ GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VST2LNq16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VST2LNq16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2LNq32 */ GPR, i32imm, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2LNq32Pseudo */ GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VST2LNq32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VST2LNq32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST2b16 */ GPR, i32imm, VecListDPairSpaced, i32imm, i32imm, /* VST2b16wb_fixed */ GPR, GPR, i32imm, VecListDPairSpaced, i32imm, i32imm, /* VST2b16wb_register */ GPR, GPR, i32imm, rGPR, VecListDPairSpaced, i32imm, i32imm, /* VST2b32 */ GPR, i32imm, VecListDPairSpaced, i32imm, i32imm, /* VST2b32wb_fixed */ GPR, GPR, i32imm, VecListDPairSpaced, i32imm, i32imm, /* VST2b32wb_register */ GPR, GPR, i32imm, rGPR, VecListDPairSpaced, i32imm, i32imm, /* VST2b8 */ GPR, i32imm, VecListDPairSpaced, i32imm, i32imm, /* VST2b8wb_fixed */ GPR, GPR, i32imm, VecListDPairSpaced, i32imm, i32imm, /* VST2b8wb_register */ GPR, GPR, i32imm, rGPR, VecListDPairSpaced, i32imm, i32imm, /* VST2d16 */ GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST2d16wb_fixed */ GPR, GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST2d16wb_register */ GPR, GPR, i32imm, rGPR, VecListDPair, i32imm, i32imm, /* VST2d32 */ GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST2d32wb_fixed */ GPR, GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST2d32wb_register */ GPR, GPR, i32imm, rGPR, VecListDPair, i32imm, i32imm, /* VST2d8 */ GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST2d8wb_fixed */ GPR, GPR, i32imm, VecListDPair, i32imm, i32imm, /* VST2d8wb_register */ GPR, GPR, i32imm, rGPR, VecListDPair, i32imm, i32imm, /* VST2q16 */ GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST2q16Pseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST2q16PseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST2q16PseudoWB_register */ GPR, GPR, i32imm, rGPR, QQPR, i32imm, i32imm, /* VST2q16wb_fixed */ GPR, GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST2q16wb_register */ GPR, GPR, i32imm, rGPR, VecListFourD, i32imm, i32imm, /* VST2q32 */ GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST2q32Pseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST2q32PseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST2q32PseudoWB_register */ GPR, GPR, i32imm, rGPR, QQPR, i32imm, i32imm, /* VST2q32wb_fixed */ GPR, GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST2q32wb_register */ GPR, GPR, i32imm, rGPR, VecListFourD, i32imm, i32imm, /* VST2q8 */ GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST2q8Pseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST2q8PseudoWB_fixed */ GPR, GPR, i32imm, QQPR, i32imm, i32imm, /* VST2q8PseudoWB_register */ GPR, GPR, i32imm, rGPR, QQPR, i32imm, i32imm, /* VST2q8wb_fixed */ GPR, GPR, i32imm, VecListFourD, i32imm, i32imm, /* VST2q8wb_register */ GPR, GPR, i32imm, rGPR, VecListFourD, i32imm, i32imm, /* VST3LNd16 */ GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3LNd16Pseudo */ GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VST3LNd16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VST3LNd16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3LNd32 */ GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3LNd32Pseudo */ GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VST3LNd32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VST3LNd32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3LNd8 */ GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3LNd8Pseudo */ GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VST3LNd8Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VST3LNd8_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3LNq16 */ GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3LNq16Pseudo */ GPR, i32imm, QQQQPR, nohash_imm, i32imm, i32imm, /* VST3LNq16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, nohash_imm, i32imm, i32imm, /* VST3LNq16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3LNq32 */ GPR, i32imm, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3LNq32Pseudo */ GPR, i32imm, QQQQPR, nohash_imm, i32imm, i32imm, /* VST3LNq32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, nohash_imm, i32imm, i32imm, /* VST3LNq32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST3d16 */ GPR, i32imm, DPR, DPR, DPR, i32imm, i32imm, /* VST3d16Pseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST3d16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST3d16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, i32imm, i32imm, /* VST3d32 */ GPR, i32imm, DPR, DPR, DPR, i32imm, i32imm, /* VST3d32Pseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST3d32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST3d32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, i32imm, i32imm, /* VST3d8 */ GPR, i32imm, DPR, DPR, DPR, i32imm, i32imm, /* VST3d8Pseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST3d8Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST3d8_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, i32imm, i32imm, /* VST3q16 */ GPR, i32imm, DPR, DPR, DPR, i32imm, i32imm, /* VST3q16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST3q16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, i32imm, i32imm, /* VST3q16oddPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST3q16oddPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST3q32 */ GPR, i32imm, DPR, DPR, DPR, i32imm, i32imm, /* VST3q32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST3q32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, i32imm, i32imm, /* VST3q32oddPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST3q32oddPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST3q8 */ GPR, i32imm, DPR, DPR, DPR, i32imm, i32imm, /* VST3q8Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST3q8_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, i32imm, i32imm, /* VST3q8oddPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST3q8oddPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST4LNd16 */ GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4LNd16Pseudo */ GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VST4LNd16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VST4LNd16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4LNd32 */ GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4LNd32Pseudo */ GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VST4LNd32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VST4LNd32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4LNd8 */ GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4LNd8Pseudo */ GPR, i32imm, QQPR, nohash_imm, i32imm, i32imm, /* VST4LNd8Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, nohash_imm, i32imm, i32imm, /* VST4LNd8_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4LNq16 */ GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4LNq16Pseudo */ GPR, i32imm, QQQQPR, nohash_imm, i32imm, i32imm, /* VST4LNq16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, nohash_imm, i32imm, i32imm, /* VST4LNq16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4LNq32 */ GPR, i32imm, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4LNq32Pseudo */ GPR, i32imm, QQQQPR, nohash_imm, i32imm, i32imm, /* VST4LNq32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, nohash_imm, i32imm, i32imm, /* VST4LNq32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, nohash_imm, i32imm, i32imm, /* VST4d16 */ GPR, i32imm, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4d16Pseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST4d16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST4d16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4d32 */ GPR, i32imm, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4d32Pseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST4d32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST4d32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4d8 */ GPR, i32imm, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4d8Pseudo */ GPR, i32imm, QQPR, i32imm, i32imm, /* VST4d8Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQPR, i32imm, i32imm, /* VST4d8_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4q16 */ GPR, i32imm, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4q16Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST4q16_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4q16oddPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST4q16oddPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST4q32 */ GPR, i32imm, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4q32Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST4q32_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4q32oddPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST4q32oddPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST4q8 */ GPR, i32imm, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4q8Pseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VST4q8_UPD */ GPR, GPR, i32imm, GPR, DPR, DPR, DPR, DPR, i32imm, i32imm, /* VST4q8oddPseudo */ GPR, i32imm, QQQQPR, i32imm, i32imm, /* VST4q8oddPseudo_UPD */ GPR, GPR, i32imm, GPR, QQQQPR, i32imm, i32imm, /* VSTMDDB_UPD */ GPR, GPR, i32imm, i32imm, dpr_reglist, /* VSTMDIA */ GPR, i32imm, i32imm, dpr_reglist, /* VSTMDIA_UPD */ GPR, GPR, i32imm, i32imm, dpr_reglist, /* VSTMQIA */ DPair, GPR, i32imm, i32imm, /* VSTMSDB_UPD */ GPR, GPR, i32imm, i32imm, spr_reglist, /* VSTMSIA */ GPR, i32imm, i32imm, spr_reglist, /* VSTMSIA_UPD */ GPR, GPR, i32imm, i32imm, spr_reglist, /* VSTRD */ DPR, GPR, i32imm, i32imm, i32imm, /* VSTRH */ HPR, GPR, i32imm, i32imm, i32imm, /* VSTRS */ SPR, GPR, i32imm, i32imm, i32imm, /* VSTR_FPCXTNS_off */ GPRnopc, i32imm, i32imm, i32imm, /* VSTR_FPCXTNS_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VSTR_FPCXTNS_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VSTR_FPCXTS_off */ GPRnopc, i32imm, i32imm, i32imm, /* VSTR_FPCXTS_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VSTR_FPCXTS_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VSTR_FPSCR_NZCVQC_off */ GPRnopc, i32imm, i32imm, i32imm, /* VSTR_FPSCR_NZCVQC_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VSTR_FPSCR_NZCVQC_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VSTR_FPSCR_off */ GPRnopc, i32imm, i32imm, i32imm, /* VSTR_FPSCR_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VSTR_FPSCR_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VSTR_P0_off */ VCCR, GPRnopc, i32imm, i32imm, i32imm, /* VSTR_P0_post */ GPRnopc, VCCR, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VSTR_P0_pre */ GPRnopc, VCCR, GPRnopc, i32imm, i32imm, i32imm, /* VSTR_VPR_off */ GPRnopc, i32imm, i32imm, i32imm, /* VSTR_VPR_post */ GPRnopc, GPRnopc, t2am_imm7s4_offset, i32imm, i32imm, /* VSTR_VPR_pre */ GPRnopc, GPRnopc, i32imm, i32imm, i32imm, /* VSUBD */ DPR, DPR, DPR, i32imm, i32imm, /* VSUBH */ HPR, HPR, HPR, i32imm, i32imm, /* VSUBHNv2i32 */ DPR, QPR, QPR, i32imm, i32imm, /* VSUBHNv4i16 */ DPR, QPR, QPR, i32imm, i32imm, /* VSUBHNv8i8 */ DPR, QPR, QPR, i32imm, i32imm, /* VSUBLsv2i64 */ QPR, DPR, DPR, i32imm, i32imm, /* VSUBLsv4i32 */ QPR, DPR, DPR, i32imm, i32imm, /* VSUBLsv8i16 */ QPR, DPR, DPR, i32imm, i32imm, /* VSUBLuv2i64 */ QPR, DPR, DPR, i32imm, i32imm, /* VSUBLuv4i32 */ QPR, DPR, DPR, i32imm, i32imm, /* VSUBLuv8i16 */ QPR, DPR, DPR, i32imm, i32imm, /* VSUBS */ SPR, SPR, SPR, i32imm, i32imm, /* VSUBWsv2i64 */ QPR, QPR, DPR, i32imm, i32imm, /* VSUBWsv4i32 */ QPR, QPR, DPR, i32imm, i32imm, /* VSUBWsv8i16 */ QPR, QPR, DPR, i32imm, i32imm, /* VSUBWuv2i64 */ QPR, QPR, DPR, i32imm, i32imm, /* VSUBWuv4i32 */ QPR, QPR, DPR, i32imm, i32imm, /* VSUBWuv8i16 */ QPR, QPR, DPR, i32imm, i32imm, /* VSUBfd */ DPR, DPR, DPR, i32imm, i32imm, /* VSUBfq */ QPR, QPR, QPR, i32imm, i32imm, /* VSUBhd */ DPR, DPR, DPR, i32imm, i32imm, /* VSUBhq */ QPR, QPR, QPR, i32imm, i32imm, /* VSUBv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VSUBv1i64 */ DPR, DPR, DPR, i32imm, i32imm, /* VSUBv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VSUBv2i64 */ QPR, QPR, QPR, i32imm, i32imm, /* VSUBv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VSUBv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VSUBv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VSUBv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VSUDOTDI */ DPR, DPR, DPR, DPR_VFP2, i32imm, /* VSUDOTQI */ QPR, QPR, QPR, DPR_VFP2, i32imm, /* VSWPd */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VSWPq */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VTBL1 */ DPR, VecListOneD, DPR, i32imm, i32imm, /* VTBL2 */ DPR, VecListDPair, DPR, i32imm, i32imm, /* VTBL3 */ DPR, VecListThreeD, DPR, i32imm, i32imm, /* VTBL3Pseudo */ DPR, QQPR, DPR, i32imm, i32imm, /* VTBL4 */ DPR, VecListFourD, DPR, i32imm, i32imm, /* VTBL4Pseudo */ DPR, QQPR, DPR, i32imm, i32imm, /* VTBX1 */ DPR, DPR, VecListOneD, DPR, i32imm, i32imm, /* VTBX2 */ DPR, DPR, VecListDPair, DPR, i32imm, i32imm, /* VTBX3 */ DPR, DPR, VecListThreeD, DPR, i32imm, i32imm, /* VTBX3Pseudo */ DPR, DPR, QQPR, DPR, i32imm, i32imm, /* VTBX4 */ DPR, DPR, VecListFourD, DPR, i32imm, i32imm, /* VTBX4Pseudo */ DPR, DPR, QQPR, DPR, i32imm, i32imm, /* VTOSHD */ DPR, DPR, fbits16, i32imm, i32imm, /* VTOSHH */ SPR, SPR, fbits16, i32imm, i32imm, /* VTOSHS */ SPR, SPR, fbits16, i32imm, i32imm, /* VTOSIRD */ SPR, DPR, i32imm, i32imm, /* VTOSIRH */ SPR, SPR, i32imm, i32imm, /* VTOSIRS */ SPR, SPR, i32imm, i32imm, /* VTOSIZD */ SPR, DPR, i32imm, i32imm, /* VTOSIZH */ SPR, HPR, i32imm, i32imm, /* VTOSIZS */ SPR, SPR, i32imm, i32imm, /* VTOSLD */ DPR, DPR, fbits32, i32imm, i32imm, /* VTOSLH */ SPR, SPR, fbits32, i32imm, i32imm, /* VTOSLS */ SPR, SPR, fbits32, i32imm, i32imm, /* VTOUHD */ DPR, DPR, fbits16, i32imm, i32imm, /* VTOUHH */ SPR, SPR, fbits16, i32imm, i32imm, /* VTOUHS */ SPR, SPR, fbits16, i32imm, i32imm, /* VTOUIRD */ SPR, DPR, i32imm, i32imm, /* VTOUIRH */ SPR, SPR, i32imm, i32imm, /* VTOUIRS */ SPR, SPR, i32imm, i32imm, /* VTOUIZD */ SPR, DPR, i32imm, i32imm, /* VTOUIZH */ SPR, HPR, i32imm, i32imm, /* VTOUIZS */ SPR, SPR, i32imm, i32imm, /* VTOULD */ DPR, DPR, fbits32, i32imm, i32imm, /* VTOULH */ SPR, SPR, fbits32, i32imm, i32imm, /* VTOULS */ SPR, SPR, fbits32, i32imm, i32imm, /* VTRNd16 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VTRNd32 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VTRNd8 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VTRNq16 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VTRNq32 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VTRNq8 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VTSTv16i8 */ QPR, QPR, QPR, i32imm, i32imm, /* VTSTv2i32 */ DPR, DPR, DPR, i32imm, i32imm, /* VTSTv4i16 */ DPR, DPR, DPR, i32imm, i32imm, /* VTSTv4i32 */ QPR, QPR, QPR, i32imm, i32imm, /* VTSTv8i16 */ QPR, QPR, QPR, i32imm, i32imm, /* VTSTv8i8 */ DPR, DPR, DPR, i32imm, i32imm, /* VUDOTD */ DPR, DPR, DPR, DPR, /* VUDOTDI */ DPR, DPR, DPR, DPR_VFP2, i32imm, /* VUDOTQ */ QPR, QPR, QPR, QPR, /* VUDOTQI */ QPR, QPR, QPR, DPR_VFP2, i32imm, /* VUHTOD */ DPR, DPR, fbits16, i32imm, i32imm, /* VUHTOH */ SPR, SPR, fbits16, i32imm, i32imm, /* VUHTOS */ SPR, SPR, fbits16, i32imm, i32imm, /* VUITOD */ DPR, SPR, i32imm, i32imm, /* VUITOH */ HPR, SPR, i32imm, i32imm, /* VUITOS */ SPR, SPR, i32imm, i32imm, /* VULTOD */ DPR, DPR, fbits32, i32imm, i32imm, /* VULTOH */ SPR, SPR, fbits32, i32imm, i32imm, /* VULTOS */ SPR, SPR, fbits32, i32imm, i32imm, /* VUMMLA */ QPR, QPR, QPR, QPR, /* VUSDOTD */ DPR, DPR, DPR, DPR, /* VUSDOTDI */ DPR, DPR, DPR, DPR_VFP2, i32imm, /* VUSDOTQ */ QPR, QPR, QPR, QPR, /* VUSDOTQI */ QPR, QPR, QPR, DPR_VFP2, i32imm, /* VUSMMLA */ QPR, QPR, QPR, QPR, /* VUZPd16 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VUZPd8 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VUZPq16 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VUZPq32 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VUZPq8 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VZIPd16 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VZIPd8 */ DPR, DPR, DPR, DPR, i32imm, i32imm, /* VZIPq16 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VZIPq32 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* VZIPq8 */ QPR, QPR, QPR, QPR, i32imm, i32imm, /* sysLDMDA */ GPR, i32imm, i32imm, reglist, /* sysLDMDA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* sysLDMDB */ GPR, i32imm, i32imm, reglist, /* sysLDMDB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* sysLDMIA */ GPR, i32imm, i32imm, reglist, /* sysLDMIA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* sysLDMIB */ GPR, i32imm, i32imm, reglist, /* sysLDMIB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* sysSTMDA */ GPR, i32imm, i32imm, reglist, /* sysSTMDA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* sysSTMDB */ GPR, i32imm, i32imm, reglist, /* sysSTMDB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* sysSTMIA */ GPR, i32imm, i32imm, reglist, /* sysSTMIA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* sysSTMIB */ GPR, i32imm, i32imm, reglist, /* sysSTMIB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* t2ADCri */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2ADCrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2ADCrs */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, CCR, /* t2ADDri */ rGPR, GPRnopc, t2_so_imm, i32imm, i32imm, CCR, /* t2ADDri12 */ rGPR, GPR, imm0_4095, i32imm, i32imm, /* t2ADDrr */ GPRnopc, GPRnopc, rGPR, i32imm, i32imm, CCR, /* t2ADDrs */ GPRnopc, GPRnopc, rGPR, i32imm, i32imm, i32imm, CCR, /* t2ADDspImm */ GPRsp, GPRsp, t2_so_imm, i32imm, i32imm, CCR, /* t2ADDspImm12 */ GPRsp, GPRsp, imm0_4095, i32imm, i32imm, /* t2ADR */ rGPR, t2adrlabel, i32imm, i32imm, /* t2ANDri */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2ANDrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2ANDrs */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, CCR, /* t2ASRri */ rGPR, rGPR, imm_sr, i32imm, i32imm, CCR, /* t2ASRrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2AUT */ /* t2AUTG */ i32imm, i32imm, GPRnosp, GPRnopc, GPRnopc, /* t2B */ thumb_br_target, i32imm, i32imm, /* t2BFC */ rGPR, rGPR, bf_inv_mask_imm, i32imm, i32imm, /* t2BFI */ rGPR, rGPR, rGPR, bf_inv_mask_imm, i32imm, i32imm, /* t2BFLi */ bflabel_u4, bflabel_s18, i32imm, i32imm, /* t2BFLr */ bflabel_u4, rGPR, i32imm, i32imm, /* t2BFi */ bflabel_u4, bflabel_s16, i32imm, i32imm, /* t2BFic */ bflabel_u4, bflabel_s12, bfafter_target, pred_noal, /* t2BFr */ bflabel_u4, rGPR, i32imm, i32imm, /* t2BICri */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2BICrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2BICrs */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, CCR, /* t2BTI */ /* t2BXAUT */ i32imm, i32imm, GPRnosp, rGPR, GPRnopc, /* t2BXJ */ GPRnopc, i32imm, i32imm, /* t2Bcc */ brtarget, i32imm, i32imm, /* t2CDP */ p_imm, imm0_15, c_imm, c_imm, c_imm, imm0_7, i32imm, i32imm, /* t2CDP2 */ p_imm, imm0_15, c_imm, c_imm, c_imm, imm0_7, i32imm, i32imm, /* t2CLREX */ i32imm, i32imm, /* t2CLRM */ i32imm, i32imm, reglist_with_apsr, /* t2CLZ */ rGPR, rGPR, i32imm, i32imm, /* t2CMNri */ GPRnopc, t2_so_imm, i32imm, i32imm, /* t2CMNzrr */ GPRnopc, rGPR, i32imm, i32imm, /* t2CMNzrs */ GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2CMPri */ GPRnopc, t2_so_imm, i32imm, i32imm, /* t2CMPrr */ GPRnopc, rGPR, i32imm, i32imm, /* t2CMPrs */ GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2CPS1p */ imm0_31, /* t2CPS2p */ imod_op, iflags_op, /* t2CPS3p */ imod_op, iflags_op, i32imm, /* t2CRC32B */ rGPR, rGPR, rGPR, /* t2CRC32CB */ rGPR, rGPR, rGPR, /* t2CRC32CH */ rGPR, rGPR, rGPR, /* t2CRC32CW */ rGPR, rGPR, rGPR, /* t2CRC32H */ rGPR, rGPR, rGPR, /* t2CRC32W */ rGPR, rGPR, rGPR, /* t2CSEL */ rGPR, GPRwithZRnosp, GPRwithZRnosp, pred_noal, /* t2CSINC */ rGPR, GPRwithZRnosp, GPRwithZRnosp, pred_noal, /* t2CSINV */ rGPR, GPRwithZRnosp, GPRwithZRnosp, pred_noal, /* t2CSNEG */ rGPR, GPRwithZRnosp, GPRwithZRnosp, pred_noal, /* t2DBG */ imm0_15, i32imm, i32imm, /* t2DCPS1 */ i32imm, i32imm, /* t2DCPS2 */ i32imm, i32imm, /* t2DCPS3 */ i32imm, i32imm, /* t2DLS */ GPRlr, rGPR, /* t2DMB */ memb_opt, i32imm, i32imm, /* t2DSB */ memb_opt, i32imm, i32imm, /* t2EORri */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2EORrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2EORrs */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, CCR, /* t2HINT */ imm0_239, i32imm, i32imm, /* t2HVC */ imm0_65535, /* t2ISB */ instsyncb_opt, i32imm, i32imm, /* t2IT */ it_pred, it_mask, /* t2Int_eh_sjlj_setjmp */ tGPR, tGPR, /* t2Int_eh_sjlj_setjmp_nofp */ tGPR, tGPR, /* t2LDA */ rGPR, GPR, i32imm, i32imm, /* t2LDAB */ rGPR, GPR, i32imm, i32imm, /* t2LDAEX */ rGPR, GPR, i32imm, i32imm, /* t2LDAEXB */ rGPR, GPR, i32imm, i32imm, /* t2LDAEXD */ rGPR, rGPR, GPR, i32imm, i32imm, /* t2LDAEXH */ rGPR, GPR, i32imm, i32imm, /* t2LDAH */ rGPR, GPR, i32imm, i32imm, /* t2LDC2L_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDC2L_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* t2LDC2L_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDC2L_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDC2_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDC2_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* t2LDC2_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDC2_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDCL_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDCL_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* t2LDCL_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDCL_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDC_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDC_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* t2LDC_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDC_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2LDMDB */ GPR, i32imm, i32imm, reglist, /* t2LDMDB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* t2LDMIA */ GPR, i32imm, i32imm, reglist, /* t2LDMIA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* t2LDRBT */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2LDRB_POST */ GPR, GPR, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2LDRB_PRE */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* t2LDRBi12 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* t2LDRBi8 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* t2LDRBpci */ GPRnopc, t2ldrlabel, i32imm, i32imm, /* t2LDRBs */ GPRnopc, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2LDRD_POST */ rGPR, rGPR, GPR, GPR, t2am_imm8s4_offset, i32imm, i32imm, /* t2LDRD_PRE */ rGPR, rGPR, GPR, GPR, i32imm, i32imm, i32imm, /* t2LDRDi8 */ rGPR, rGPR, GPR, i32imm, i32imm, i32imm, /* t2LDREX */ rGPR, GPRnopc, i32imm, i32imm, i32imm, /* t2LDREXB */ rGPR, GPR, i32imm, i32imm, /* t2LDREXD */ rGPR, rGPR, GPR, i32imm, i32imm, /* t2LDREXH */ rGPR, GPR, i32imm, i32imm, /* t2LDRHT */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2LDRH_POST */ GPR, GPR, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2LDRH_PRE */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* t2LDRHi12 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* t2LDRHi8 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* t2LDRHpci */ GPRnopc, t2ldrlabel, i32imm, i32imm, /* t2LDRHs */ GPRnopc, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2LDRSBT */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2LDRSB_POST */ GPR, GPR, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2LDRSB_PRE */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* t2LDRSBi12 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* t2LDRSBi8 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* t2LDRSBpci */ GPRnopc, t2ldrlabel, i32imm, i32imm, /* t2LDRSBs */ GPRnopc, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2LDRSHT */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2LDRSH_POST */ GPR, GPR, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2LDRSH_PRE */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* t2LDRSHi12 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* t2LDRSHi8 */ GPRnopc, GPR, i32imm, i32imm, i32imm, /* t2LDRSHpci */ GPRnopc, t2ldrlabel, i32imm, i32imm, /* t2LDRSHs */ GPRnopc, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2LDRT */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2LDR_POST */ GPR, GPR, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2LDR_PRE */ GPR, GPR, GPR, i32imm, i32imm, i32imm, /* t2LDRi12 */ GPR, GPR, i32imm, i32imm, i32imm, /* t2LDRi8 */ GPR, GPR, i32imm, i32imm, i32imm, /* t2LDRpci */ GPR, t2ldrlabel, i32imm, i32imm, /* t2LDRs */ GPR, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2LE */ lelabel_u11, /* t2LEUpdate */ GPRlr, GPRlr, lelabel_u11, /* t2LSLri */ rGPR, rGPR, imm1_31, i32imm, i32imm, CCR, /* t2LSLrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2LSRri */ rGPR, rGPR, imm_sr, i32imm, i32imm, CCR, /* t2LSRrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2MCR */ p_imm, imm0_7, GPR, c_imm, c_imm, imm0_7, i32imm, i32imm, /* t2MCR2 */ p_imm, imm0_7, GPR, c_imm, c_imm, imm0_7, i32imm, i32imm, /* t2MCRR */ p_imm, imm0_15, GPR, GPR, c_imm, i32imm, i32imm, /* t2MCRR2 */ p_imm, imm0_15, GPR, GPR, c_imm, i32imm, i32imm, /* t2MLA */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2MLS */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2MOVTi16 */ rGPR, rGPR, imm0_65535_expr, i32imm, i32imm, /* t2MOVi */ rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2MOVi16 */ rGPR, imm0_65535_expr, i32imm, i32imm, /* t2MOVr */ GPRnopc, GPRnopc, i32imm, i32imm, CCR, /* t2MOVsra_flag */ rGPR, rGPR, i32imm, i32imm, /* t2MOVsrl_flag */ rGPR, rGPR, i32imm, i32imm, /* t2MRC */ GPRwithAPSR, p_imm, imm0_7, c_imm, c_imm, imm0_7, i32imm, i32imm, /* t2MRC2 */ GPRwithAPSR, p_imm, imm0_7, c_imm, c_imm, imm0_7, i32imm, i32imm, /* t2MRRC */ GPR, GPR, p_imm, imm0_15, c_imm, i32imm, i32imm, /* t2MRRC2 */ GPR, GPR, p_imm, imm0_15, c_imm, i32imm, i32imm, /* t2MRS_AR */ GPR, i32imm, i32imm, /* t2MRS_M */ rGPR, msr_mask, i32imm, i32imm, /* t2MRSbanked */ rGPR, banked_reg, i32imm, i32imm, /* t2MRSsys_AR */ GPR, i32imm, i32imm, /* t2MSR_AR */ msr_mask, rGPR, i32imm, i32imm, /* t2MSR_M */ msr_mask, rGPR, i32imm, i32imm, /* t2MSRbanked */ banked_reg, rGPR, i32imm, i32imm, /* t2MUL */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2MVNi */ rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2MVNr */ rGPR, rGPR, i32imm, i32imm, CCR, /* t2MVNs */ rGPR, rGPR, i32imm, i32imm, i32imm, CCR, /* t2ORNri */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2ORNrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2ORNrs */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, CCR, /* t2ORRri */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2ORRrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2ORRrs */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, CCR, /* t2PAC */ /* t2PACBTI */ /* t2PACG */ rGPR, i32imm, i32imm, GPRnopc, GPRnopc, /* t2PKHBT */ rGPR, rGPR, rGPR, pkh_lsl_amt, i32imm, i32imm, /* t2PKHTB */ rGPR, rGPR, rGPR, pkh_asr_amt, i32imm, i32imm, /* t2PLDWi12 */ GPR, i32imm, i32imm, i32imm, /* t2PLDWi8 */ GPR, i32imm, i32imm, i32imm, /* t2PLDWs */ GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2PLDi12 */ GPR, i32imm, i32imm, i32imm, /* t2PLDi8 */ GPR, i32imm, i32imm, i32imm, /* t2PLDpci */ t2ldrlabel, i32imm, i32imm, /* t2PLDs */ GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2PLIi12 */ GPR, i32imm, i32imm, i32imm, /* t2PLIi8 */ GPR, i32imm, i32imm, i32imm, /* t2PLIpci */ t2ldrlabel, i32imm, i32imm, /* t2PLIs */ GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2QADD */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2QADD16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2QADD8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2QASX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2QDADD */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2QDSUB */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2QSAX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2QSUB */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2QSUB16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2QSUB8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2RBIT */ rGPR, rGPR, i32imm, i32imm, /* t2REV */ rGPR, rGPR, i32imm, i32imm, /* t2REV16 */ rGPR, rGPR, i32imm, i32imm, /* t2REVSH */ rGPR, rGPR, i32imm, i32imm, /* t2RFEDB */ GPR, i32imm, i32imm, /* t2RFEDBW */ GPR, i32imm, i32imm, /* t2RFEIA */ GPR, i32imm, i32imm, /* t2RFEIAW */ GPR, i32imm, i32imm, /* t2RORri */ rGPR, rGPR, imm1_31, i32imm, i32imm, CCR, /* t2RORrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2RRX */ rGPR, rGPR, i32imm, i32imm, CCR, /* t2RSBri */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2RSBrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2RSBrs */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, CCR, /* t2SADD16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SADD8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SASX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SB */ /* t2SBCri */ rGPR, rGPR, t2_so_imm, i32imm, i32imm, CCR, /* t2SBCrr */ rGPR, rGPR, rGPR, i32imm, i32imm, CCR, /* t2SBCrs */ rGPR, rGPR, rGPR, i32imm, i32imm, i32imm, CCR, /* t2SBFX */ rGPR, rGPR, imm0_31, imm1_32, i32imm, i32imm, /* t2SDIV */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SEL */ GPR, GPR, GPR, i32imm, i32imm, /* t2SETPAN */ imm0_1, /* t2SG */ i32imm, i32imm, /* t2SHADD16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SHADD8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SHASX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SHSAX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SHSUB16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SHSUB8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMC */ imm0_15, i32imm, i32imm, /* t2SMLABB */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLABT */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLAD */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLADX */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLAL */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLALBB */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLALBT */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLALD */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLALDX */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLALTB */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLALTT */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLATB */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLATT */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLAWB */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLAWT */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLSD */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLSDX */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLSLD */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMLSLDX */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMMLA */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMMLAR */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMMLS */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMMLSR */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMMUL */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMMULR */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMUAD */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMUADX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMULBB */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMULBT */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMULL */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMULTB */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMULTT */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMULWB */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMULWT */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMUSD */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SMUSDX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SRSDB */ imm0_31, i32imm, i32imm, /* t2SRSDB_UPD */ imm0_31, i32imm, i32imm, /* t2SRSIA */ imm0_31, i32imm, i32imm, /* t2SRSIA_UPD */ imm0_31, i32imm, i32imm, /* t2SSAT */ rGPR, imm1_32, rGPR, t2_shift_imm, i32imm, i32imm, /* t2SSAT16 */ rGPR, imm1_16, rGPR, i32imm, i32imm, /* t2SSAX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SSUB16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2SSUB8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2STC2L_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STC2L_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* t2STC2L_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STC2L_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STC2_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STC2_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* t2STC2_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STC2_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STCL_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STCL_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* t2STCL_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STCL_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STC_OFFSET */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STC_OPTION */ p_imm, c_imm, GPR, coproc_option_imm, i32imm, i32imm, /* t2STC_POST */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STC_PRE */ p_imm, c_imm, GPR, i32imm, i32imm, i32imm, /* t2STL */ rGPR, GPR, i32imm, i32imm, /* t2STLB */ rGPR, GPR, i32imm, i32imm, /* t2STLEX */ rGPR, rGPR, GPR, i32imm, i32imm, /* t2STLEXB */ rGPR, rGPR, GPR, i32imm, i32imm, /* t2STLEXD */ rGPR, rGPR, rGPR, GPR, i32imm, i32imm, /* t2STLEXH */ rGPR, rGPR, GPR, i32imm, i32imm, /* t2STLH */ rGPR, GPR, i32imm, i32imm, /* t2STMDB */ GPR, i32imm, i32imm, reglist, /* t2STMDB_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* t2STMIA */ GPR, i32imm, i32imm, reglist, /* t2STMIA_UPD */ GPR, GPR, i32imm, i32imm, reglist, /* t2STRBT */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2STRB_POST */ GPRnopc, rGPR, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2STRB_PRE */ GPRnopc, rGPR, GPR, i32imm, i32imm, i32imm, /* t2STRBi12 */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2STRBi8 */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2STRBs */ rGPR, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2STRD_POST */ GPR, rGPR, rGPR, GPR, t2am_imm8s4_offset, i32imm, i32imm, /* t2STRD_PRE */ GPR, rGPR, rGPR, GPR, i32imm, i32imm, i32imm, /* t2STRDi8 */ rGPR, rGPR, GPR, i32imm, i32imm, i32imm, /* t2STREX */ rGPR, rGPR, GPRnopc, i32imm, i32imm, i32imm, /* t2STREXB */ rGPR, rGPR, GPR, i32imm, i32imm, /* t2STREXD */ rGPR, rGPR, rGPR, GPR, i32imm, i32imm, /* t2STREXH */ rGPR, rGPR, GPR, i32imm, i32imm, /* t2STRHT */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2STRH_POST */ GPRnopc, rGPR, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2STRH_PRE */ GPRnopc, rGPR, GPR, i32imm, i32imm, i32imm, /* t2STRHi12 */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2STRHi8 */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2STRHs */ rGPR, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2STRT */ rGPR, GPR, i32imm, i32imm, i32imm, /* t2STR_POST */ GPRnopc, GPRnopc, GPR, t2am_imm8_offset, i32imm, i32imm, /* t2STR_PRE */ GPRnopc, GPRnopc, GPR, i32imm, i32imm, i32imm, /* t2STRi12 */ GPR, GPR, i32imm, i32imm, i32imm, /* t2STRi8 */ GPR, GPR, i32imm, i32imm, i32imm, /* t2STRs */ GPR, GPRnopc, rGPR, i32imm, i32imm, i32imm, /* t2SUBS_PC_LR */ imm0_255, i32imm, i32imm, /* t2SUBri */ rGPR, GPRnopc, t2_so_imm, i32imm, i32imm, CCR, /* t2SUBri12 */ rGPR, GPR, imm0_4095, i32imm, i32imm, /* t2SUBrr */ GPRnopc, GPRnopc, rGPR, i32imm, i32imm, CCR, /* t2SUBrs */ GPRnopc, GPRnopc, rGPR, i32imm, i32imm, i32imm, CCR, /* t2SUBspImm */ GPRsp, GPRsp, t2_so_imm, i32imm, i32imm, CCR, /* t2SUBspImm12 */ GPRsp, GPRsp, imm0_4095, i32imm, i32imm, /* t2SXTAB */ rGPR, rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2SXTAB16 */ rGPR, rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2SXTAH */ rGPR, rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2SXTB */ rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2SXTB16 */ rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2SXTH */ rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2TBB */ GPR, rGPR, i32imm, i32imm, /* t2TBH */ GPR, rGPR, i32imm, i32imm, /* t2TEQri */ rGPR, t2_so_imm, i32imm, i32imm, /* t2TEQrr */ rGPR, rGPR, i32imm, i32imm, /* t2TEQrs */ rGPR, rGPR, i32imm, i32imm, i32imm, /* t2TSB */ tsb_opt, i32imm, i32imm, /* t2TSTri */ rGPR, t2_so_imm, i32imm, i32imm, /* t2TSTrr */ rGPR, rGPR, i32imm, i32imm, /* t2TSTrs */ rGPR, rGPR, i32imm, i32imm, i32imm, /* t2TT */ rGPR, GPRnopc, i32imm, i32imm, /* t2TTA */ rGPR, GPRnopc, i32imm, i32imm, /* t2TTAT */ rGPR, GPRnopc, i32imm, i32imm, /* t2TTT */ rGPR, GPRnopc, i32imm, i32imm, /* t2UADD16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UADD8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UASX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UBFX */ rGPR, rGPR, imm0_31, imm1_32, i32imm, i32imm, /* t2UDF */ imm0_65535, /* t2UDIV */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UHADD16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UHADD8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UHASX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UHSAX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UHSUB16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UHSUB8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UMAAL */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UMLAL */ rGPR, rGPR, rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UMULL */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UQADD16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UQADD8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UQASX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UQSAX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UQSUB16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UQSUB8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2USAD8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2USADA8 */ rGPR, rGPR, rGPR, rGPR, i32imm, i32imm, /* t2USAT */ rGPR, imm0_31, rGPR, t2_shift_imm, i32imm, i32imm, /* t2USAT16 */ rGPR, imm0_15, rGPR, i32imm, i32imm, /* t2USAX */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2USUB16 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2USUB8 */ rGPR, rGPR, rGPR, i32imm, i32imm, /* t2UXTAB */ rGPR, rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2UXTAB16 */ rGPR, rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2UXTAH */ rGPR, rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2UXTB */ rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2UXTB16 */ rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2UXTH */ rGPR, rGPR, rot_imm, i32imm, i32imm, /* t2WLS */ GPRlr, rGPR, wlslabel_u11, /* tADC */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tADDhirr */ GPR, GPR, GPR, i32imm, i32imm, /* tADDi3 */ tGPR, CCR, tGPR, imm0_7, i32imm, i32imm, /* tADDi8 */ tGPR, CCR, tGPR, imm0_255, i32imm, i32imm, /* tADDrSP */ GPR, GPRsp, GPR, i32imm, i32imm, /* tADDrSPi */ tGPR, GPRsp, t_imm0_1020s4, i32imm, i32imm, /* tADDrr */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tADDspi */ GPRsp, GPRsp, t_imm0_508s4, i32imm, i32imm, /* tADDspr */ GPRsp, GPRsp, GPR, i32imm, i32imm, /* tADR */ tGPR, t_adrlabel, i32imm, i32imm, /* tAND */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tASRri */ tGPR, CCR, tGPR, imm_sr, i32imm, i32imm, /* tASRrr */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tB */ t_brtarget, i32imm, i32imm, /* tBIC */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tBKPT */ imm0_255, /* tBL */ i32imm, i32imm, thumb_bl_target, /* tBLXNSr */ i32imm, i32imm, GPRnopc, /* tBLXi */ i32imm, i32imm, thumb_blx_target, /* tBLXr */ i32imm, i32imm, GPR, /* tBX */ GPR, i32imm, i32imm, /* tBXNS */ GPR, i32imm, i32imm, /* tBcc */ thumb_bcc_target, i32imm, i32imm, /* tCBNZ */ tGPR, thumb_cb_target, /* tCBZ */ tGPR, thumb_cb_target, /* tCMNz */ tGPR, tGPR, i32imm, i32imm, /* tCMPhir */ GPR, GPR, i32imm, i32imm, /* tCMPi8 */ tGPR, imm0_255, i32imm, i32imm, /* tCMPr */ tGPR, tGPR, i32imm, i32imm, /* tCPS */ imod_op, iflags_op, /* tEOR */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tHINT */ imm0_15, i32imm, i32imm, /* tHLT */ imm0_63, /* tInt_WIN_eh_sjlj_longjmp */ GPR, GPR, /* tInt_eh_sjlj_longjmp */ tGPR, tGPR, /* tInt_eh_sjlj_setjmp */ tGPR, tGPR, /* tLDMIA */ tGPR, i32imm, i32imm, reglist, /* tLDRBi */ tGPR, tGPR, i32imm, i32imm, i32imm, /* tLDRBr */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tLDRHi */ tGPR, tGPR, i32imm, i32imm, i32imm, /* tLDRHr */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tLDRSB */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tLDRSH */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tLDRi */ tGPR, tGPR, i32imm, i32imm, i32imm, /* tLDRpci */ tGPR, t_addrmode_pc, i32imm, i32imm, /* tLDRr */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tLDRspi */ tGPR, GPR, i32imm, i32imm, i32imm, /* tLSLri */ tGPR, CCR, tGPR, imm0_31, i32imm, i32imm, /* tLSLrr */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tLSRri */ tGPR, CCR, tGPR, imm_sr, i32imm, i32imm, /* tLSRrr */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tMOVSr */ tGPR, tGPR, /* tMOVi8 */ tGPR, CCR, imm0_255, i32imm, i32imm, /* tMOVr */ GPR, GPR, i32imm, i32imm, /* tMUL */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tMVN */ tGPR, CCR, tGPR, i32imm, i32imm, /* tORR */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tPICADD */ GPR, GPR, pclabel, /* tPOP */ i32imm, i32imm, reglist, /* tPUSH */ i32imm, i32imm, reglist, /* tREV */ tGPR, tGPR, i32imm, i32imm, /* tREV16 */ tGPR, tGPR, i32imm, i32imm, /* tREVSH */ tGPR, tGPR, i32imm, i32imm, /* tROR */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tRSB */ tGPR, CCR, tGPR, i32imm, i32imm, /* tSBC */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tSETEND */ setend_op, /* tSTMIA_UPD */ tGPR, tGPR, i32imm, i32imm, reglist, /* tSTRBi */ tGPR, tGPR, i32imm, i32imm, i32imm, /* tSTRBr */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tSTRHi */ tGPR, tGPR, i32imm, i32imm, i32imm, /* tSTRHr */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tSTRi */ tGPR, tGPR, i32imm, i32imm, i32imm, /* tSTRr */ tGPR, tGPR, tGPR, i32imm, i32imm, /* tSTRspi */ tGPR, GPR, i32imm, i32imm, i32imm, /* tSUBi3 */ tGPR, CCR, tGPR, imm0_7, i32imm, i32imm, /* tSUBi8 */ tGPR, CCR, tGPR, imm0_255, i32imm, i32imm, /* tSUBrr */ tGPR, CCR, tGPR, tGPR, i32imm, i32imm, /* tSUBspi */ GPRsp, GPRsp, t_imm0_508s4, i32imm, i32imm, /* tSVC */ imm0_255, i32imm, i32imm, /* tSXTB */ tGPR, tGPR, i32imm, i32imm, /* tSXTH */ tGPR, tGPR, i32imm, i32imm, /* tTRAP */ /* tTST */ tGPR, tGPR, i32imm, i32imm, /* tUDF */ imm0_255, /* tUXTB */ tGPR, tGPR, i32imm, i32imm, /* tUXTH */ tGPR, tGPR, i32imm, i32imm, }; return OpcodeOperandTypes[Offsets[Opcode] + OpIdx]; } } // end namespace ARM } // end namespace llvm #endif // GET_INSTRINFO_OPERAND_TYPE #ifdef GET_INSTRINFO_MEM_OPERAND_SIZE #undef GET_INSTRINFO_MEM_OPERAND_SIZE namespace llvm { namespace ARM { LLVM_READONLY static int getMemOperandSize(int OpType) { switch (OpType) { default: return 0; } } } // end namespace ARM } // end namespace llvm #endif // GET_INSTRINFO_MEM_OPERAND_SIZE #ifdef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP #undef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP namespace llvm { namespace ARM { LLVM_READONLY static unsigned getLogicalOperandSize(uint16_t Opcode, uint16_t LogicalOpIdx) { return LogicalOpIdx; } LLVM_READONLY static inline unsigned getLogicalOperandIdx(uint16_t Opcode, uint16_t LogicalOpIdx) { auto S = 0U; for (auto i = 0U; i < LogicalOpIdx; ++i) S += getLogicalOperandSize(Opcode, i); return S; } } // end namespace ARM } // end namespace llvm #endif // GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP #ifdef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP #undef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP namespace llvm { namespace ARM { LLVM_READONLY static int getLogicalOperandType(uint16_t Opcode, uint16_t LogicalOpIdx) { return -1; } } // end namespace ARM } // end namespace llvm #endif // GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP #ifdef GET_INSTRINFO_MC_HELPER_DECLS #undef GET_INSTRINFO_MC_HELPER_DECLS namespace llvm { class MCInst; class FeatureBitset; namespace ARM_MC { void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features); } // end namespace ARM_MC } // end namespace llvm #endif // GET_INSTRINFO_MC_HELPER_DECLS #ifdef GET_INSTRINFO_MC_HELPERS #undef GET_INSTRINFO_MC_HELPERS namespace llvm { namespace ARM_MC { } // end namespace ARM_MC } // end namespace llvm #endif // GET_GENISTRINFO_MC_HELPERS #ifdef ENABLE_INSTR_PREDICATE_VERIFIER #undef ENABLE_INSTR_PREDICATE_VERIFIER #include namespace llvm { namespace ARM_MC { // Bits for subtarget features that participate in instruction matching. enum SubtargetFeatureBits : uint8_t { Feature_HasV4TBit = 35, Feature_HasV5TBit = 36, Feature_HasV5TEBit = 37, Feature_HasV6Bit = 38, Feature_HasV6MBit = 40, Feature_HasV8MBaselineBit = 45, Feature_HasV8MMainlineBit = 46, Feature_HasV8_1MMainlineBit = 47, Feature_HasMVEIntBit = 26, Feature_HasMVEFloatBit = 25, Feature_HasCDEBit = 4, Feature_HasFPRegsBit = 18, Feature_HasFPRegs16Bit = 19, Feature_HasNoFPRegs16Bit = 29, Feature_HasFPRegs64Bit = 20, Feature_HasFPRegsV8_1MBit = 21, Feature_HasV6T2Bit = 41, Feature_HasV6KBit = 39, Feature_HasV7Bit = 42, Feature_HasV8Bit = 44, Feature_PreV8Bit = 64, Feature_HasV8_1aBit = 48, Feature_HasV8_2aBit = 49, Feature_HasV8_3aBit = 50, Feature_HasV8_4aBit = 51, Feature_HasV8_5aBit = 52, Feature_HasV8_6aBit = 53, Feature_HasV8_7aBit = 54, Feature_HasVFP2Bit = 55, Feature_HasVFP3Bit = 56, Feature_HasVFP4Bit = 57, Feature_HasDPVFPBit = 10, Feature_HasFPARMv8Bit = 17, Feature_HasNEONBit = 28, Feature_HasSHA2Bit = 33, Feature_HasAESBit = 1, Feature_HasCryptoBit = 7, Feature_HasDotProdBit = 14, Feature_HasCRCBit = 6, Feature_HasRASBit = 31, Feature_HasLOBBit = 23, Feature_HasPACBTIBit = 30, Feature_HasFP16Bit = 15, Feature_HasFullFP16Bit = 22, Feature_HasFP16FMLBit = 16, Feature_HasBF16Bit = 3, Feature_HasMatMulInt8Bit = 27, Feature_HasDivideInThumbBit = 13, Feature_HasDivideInARMBit = 12, Feature_HasDSPBit = 11, Feature_HasDBBit = 8, Feature_HasDFBBit = 9, Feature_HasV7ClrexBit = 43, Feature_HasAcquireReleaseBit = 2, Feature_HasMPBit = 24, Feature_HasVirtualizationBit = 58, Feature_HasTrustZoneBit = 34, Feature_Has8MSecExtBit = 0, Feature_IsThumbBit = 62, Feature_IsThumb2Bit = 63, Feature_IsMClassBit = 60, Feature_IsNotMClassBit = 61, Feature_IsARMBit = 59, Feature_UseNaClTrapBit = 65, Feature_UseNegativeImmediatesBit = 66, Feature_HasSBBit = 32, Feature_HasCLRBHBBit = 5, }; #ifndef NDEBUG static const char *SubtargetFeatureNames[] = { "Feature_Has8MSecExt", "Feature_HasAES", "Feature_HasAcquireRelease", "Feature_HasBF16", "Feature_HasCDE", "Feature_HasCLRBHB", "Feature_HasCRC", "Feature_HasCrypto", "Feature_HasDB", "Feature_HasDFB", "Feature_HasDPVFP", "Feature_HasDSP", "Feature_HasDivideInARM", "Feature_HasDivideInThumb", "Feature_HasDotProd", "Feature_HasFP16", "Feature_HasFP16FML", "Feature_HasFPARMv8", "Feature_HasFPRegs", "Feature_HasFPRegs16", "Feature_HasFPRegs64", "Feature_HasFPRegsV8_1M", "Feature_HasFullFP16", "Feature_HasLOB", "Feature_HasMP", "Feature_HasMVEFloat", "Feature_HasMVEInt", "Feature_HasMatMulInt8", "Feature_HasNEON", "Feature_HasNoFPRegs16", "Feature_HasPACBTI", "Feature_HasRAS", "Feature_HasSB", "Feature_HasSHA2", "Feature_HasTrustZone", "Feature_HasV4T", "Feature_HasV5T", "Feature_HasV5TE", "Feature_HasV6", "Feature_HasV6K", "Feature_HasV6M", "Feature_HasV6T2", "Feature_HasV7", "Feature_HasV7Clrex", "Feature_HasV8", "Feature_HasV8MBaseline", "Feature_HasV8MMainline", "Feature_HasV8_1MMainline", "Feature_HasV8_1a", "Feature_HasV8_2a", "Feature_HasV8_3a", "Feature_HasV8_4a", "Feature_HasV8_5a", "Feature_HasV8_6a", "Feature_HasV8_7a", "Feature_HasVFP2", "Feature_HasVFP3", "Feature_HasVFP4", "Feature_HasVirtualization", "Feature_IsARM", "Feature_IsMClass", "Feature_IsNotMClass", "Feature_IsThumb", "Feature_IsThumb2", "Feature_PreV8", "Feature_UseNaClTrap", "Feature_UseNegativeImmediates", nullptr }; #endif // NDEBUG FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) { FeatureBitset Features; if (FB[ARM::HasV4TOps]) Features.set(Feature_HasV4TBit); if (FB[ARM::HasV5TOps]) Features.set(Feature_HasV5TBit); if (FB[ARM::HasV5TEOps]) Features.set(Feature_HasV5TEBit); if (FB[ARM::HasV6Ops]) Features.set(Feature_HasV6Bit); if (FB[ARM::HasV6MOps]) Features.set(Feature_HasV6MBit); if (FB[ARM::HasV8MBaselineOps]) Features.set(Feature_HasV8MBaselineBit); if (FB[ARM::HasV8MMainlineOps]) Features.set(Feature_HasV8MMainlineBit); if (FB[ARM::HasV8_1MMainlineOps]) Features.set(Feature_HasV8_1MMainlineBit); if (FB[ARM::HasMVEIntegerOps]) Features.set(Feature_HasMVEIntBit); if (FB[ARM::HasMVEFloatOps]) Features.set(Feature_HasMVEFloatBit); if (FB[ARM::HasCDEOps]) Features.set(Feature_HasCDEBit); if (FB[ARM::FeatureFPRegs]) Features.set(Feature_HasFPRegsBit); if (FB[ARM::FeatureFPRegs16]) Features.set(Feature_HasFPRegs16Bit); if (!FB[ARM::FeatureFPRegs16]) Features.set(Feature_HasNoFPRegs16Bit); if (FB[ARM::FeatureFPRegs64]) Features.set(Feature_HasFPRegs64Bit); if (FB[ARM::FeatureFPRegs] && FB[ARM::HasV8_1MMainlineOps]) Features.set(Feature_HasFPRegsV8_1MBit); if (FB[ARM::HasV6T2Ops]) Features.set(Feature_HasV6T2Bit); if (FB[ARM::HasV6KOps]) Features.set(Feature_HasV6KBit); if (FB[ARM::HasV7Ops]) Features.set(Feature_HasV7Bit); if (FB[ARM::HasV8Ops]) Features.set(Feature_HasV8Bit); if (!FB[ARM::HasV8Ops]) Features.set(Feature_PreV8Bit); if (FB[ARM::HasV8_1aOps]) Features.set(Feature_HasV8_1aBit); if (FB[ARM::HasV8_2aOps]) Features.set(Feature_HasV8_2aBit); if (FB[ARM::HasV8_3aOps]) Features.set(Feature_HasV8_3aBit); if (FB[ARM::HasV8_4aOps]) Features.set(Feature_HasV8_4aBit); if (FB[ARM::HasV8_5aOps]) Features.set(Feature_HasV8_5aBit); if (FB[ARM::HasV8_6aOps]) Features.set(Feature_HasV8_6aBit); if (FB[ARM::HasV8_7aOps]) Features.set(Feature_HasV8_7aBit); if (FB[ARM::FeatureVFP2_SP]) Features.set(Feature_HasVFP2Bit); if (FB[ARM::FeatureVFP3_D16_SP]) Features.set(Feature_HasVFP3Bit); if (FB[ARM::FeatureVFP4_D16_SP]) Features.set(Feature_HasVFP4Bit); if (FB[ARM::FeatureFP64]) Features.set(Feature_HasDPVFPBit); if (FB[ARM::FeatureFPARMv8_D16_SP]) Features.set(Feature_HasFPARMv8Bit); if (FB[ARM::FeatureNEON]) Features.set(Feature_HasNEONBit); if (FB[ARM::FeatureSHA2]) Features.set(Feature_HasSHA2Bit); if (FB[ARM::FeatureAES]) Features.set(Feature_HasAESBit); if (FB[ARM::FeatureCrypto]) Features.set(Feature_HasCryptoBit); if (FB[ARM::FeatureDotProd]) Features.set(Feature_HasDotProdBit); if (FB[ARM::FeatureCRC]) Features.set(Feature_HasCRCBit); if (FB[ARM::FeatureRAS]) Features.set(Feature_HasRASBit); if (FB[ARM::FeatureLOB]) Features.set(Feature_HasLOBBit); if (FB[ARM::FeaturePACBTI]) Features.set(Feature_HasPACBTIBit); if (FB[ARM::FeatureFP16]) Features.set(Feature_HasFP16Bit); if (FB[ARM::FeatureFullFP16]) Features.set(Feature_HasFullFP16Bit); if (FB[ARM::FeatureFP16FML]) Features.set(Feature_HasFP16FMLBit); if (FB[ARM::FeatureBF16]) Features.set(Feature_HasBF16Bit); if (FB[ARM::FeatureMatMulInt8]) Features.set(Feature_HasMatMulInt8Bit); if (FB[ARM::FeatureHWDivThumb]) Features.set(Feature_HasDivideInThumbBit); if (FB[ARM::FeatureHWDivARM]) Features.set(Feature_HasDivideInARMBit); if (FB[ARM::FeatureDSP]) Features.set(Feature_HasDSPBit); if (FB[ARM::FeatureDB]) Features.set(Feature_HasDBBit); if (FB[ARM::FeatureDFB]) Features.set(Feature_HasDFBBit); if (FB[ARM::FeatureV7Clrex]) Features.set(Feature_HasV7ClrexBit); if (FB[ARM::FeatureAcquireRelease]) Features.set(Feature_HasAcquireReleaseBit); if (FB[ARM::FeatureMP]) Features.set(Feature_HasMPBit); if (FB[ARM::FeatureVirtualization]) Features.set(Feature_HasVirtualizationBit); if (FB[ARM::FeatureTrustZone]) Features.set(Feature_HasTrustZoneBit); if (FB[ARM::Feature8MSecExt]) Features.set(Feature_Has8MSecExtBit); if (FB[ARM::ModeThumb]) Features.set(Feature_IsThumbBit); if (FB[ARM::ModeThumb] && FB[ARM::FeatureThumb2]) Features.set(Feature_IsThumb2Bit); if (FB[ARM::FeatureMClass]) Features.set(Feature_IsMClassBit); if (!FB[ARM::FeatureMClass]) Features.set(Feature_IsNotMClassBit); if (!FB[ARM::ModeThumb]) Features.set(Feature_IsARMBit); if (FB[ARM::FeatureNaClTrap]) Features.set(Feature_UseNaClTrapBit); if (!FB[ARM::FeatureNoNegativeImmediates]) Features.set(Feature_UseNegativeImmediatesBit); if (FB[ARM::FeatureSB]) Features.set(Feature_HasSBBit); if (FB[ARM::FeatureCLRBHB]) Features.set(Feature_HasCLRBHBBit); return Features; } #ifndef NDEBUG // Feature bitsets. enum : uint8_t { CEFBS_None, CEFBS_Has8MSecExt, CEFBS_HasBF16, CEFBS_HasCDE, CEFBS_HasDotProd, CEFBS_HasFP16, CEFBS_HasFPARMv8, CEFBS_HasFPRegs, CEFBS_HasFPRegs16, CEFBS_HasFPRegs64, CEFBS_HasFPRegsV8_1M, CEFBS_HasFullFP16, CEFBS_HasMVEFloat, CEFBS_HasMVEInt, CEFBS_HasMatMulInt8, CEFBS_HasNEON, CEFBS_HasV8_1MMainline, CEFBS_HasVFP2, CEFBS_HasVFP3, CEFBS_HasVFP4, CEFBS_IsARM, CEFBS_IsThumb, CEFBS_IsThumb2, CEFBS_HasBF16_HasNEON, CEFBS_HasCDE_HasFPRegs, CEFBS_HasCDE_HasMVEInt, CEFBS_HasDSP_IsThumb2, CEFBS_HasFPARMv8_HasDPVFP, CEFBS_HasFPARMv8_HasV8_3a, CEFBS_HasFPRegs_HasV8_1MMainline, CEFBS_HasNEON_HasFP16, CEFBS_HasNEON_HasFP16FML, CEFBS_HasNEON_HasFullFP16, CEFBS_HasNEON_HasV8_1a, CEFBS_HasNEON_HasV8_3a, CEFBS_HasNEON_HasVFP4, CEFBS_HasV7_IsMClass, CEFBS_HasV8_HasAES, CEFBS_HasV8_HasNEON, CEFBS_HasV8_HasSHA2, CEFBS_HasV8MMainline_Has8MSecExt, CEFBS_HasV8_1MMainline_Has8MSecExt, CEFBS_HasV8_1MMainline_HasFPRegs, CEFBS_HasV8_1MMainline_HasMVEInt, CEFBS_HasVFP2_HasDPVFP, CEFBS_HasVFP3_HasDPVFP, CEFBS_HasVFP4_HasDPVFP, CEFBS_IsARM_HasAcquireRelease, CEFBS_IsARM_HasDB, CEFBS_IsARM_HasDivideInARM, CEFBS_IsARM_HasSB, CEFBS_IsARM_HasTrustZone, CEFBS_IsARM_HasV4T, CEFBS_IsARM_HasV5T, CEFBS_IsARM_HasV5TE, CEFBS_IsARM_HasV6, CEFBS_IsARM_HasV6K, CEFBS_IsARM_HasV6T2, CEFBS_IsARM_HasV7, CEFBS_IsARM_HasV8, CEFBS_IsARM_HasV8_4a, CEFBS_IsARM_HasVFP2, CEFBS_IsARM_HasVirtualization, CEFBS_IsARM_PreV8, CEFBS_IsARM_UseNaClTrap, CEFBS_IsThumb_Has8MSecExt, CEFBS_IsThumb_HasAcquireRelease, CEFBS_IsThumb_HasDB, CEFBS_IsThumb_HasV5T, CEFBS_IsThumb_HasV6, CEFBS_IsThumb_HasV6M, CEFBS_IsThumb_HasV7Clrex, CEFBS_IsThumb_HasV8, CEFBS_IsThumb_HasV8MBaseline, CEFBS_IsThumb_HasV8_4a, CEFBS_IsThumb_HasVirtualization, CEFBS_IsThumb_IsMClass, CEFBS_IsThumb_IsNotMClass, CEFBS_IsThumb2_HasDSP, CEFBS_IsThumb2_HasSB, CEFBS_IsThumb2_HasTrustZone, CEFBS_IsThumb2_HasV7, CEFBS_IsThumb2_HasV8, CEFBS_IsThumb2_HasVFP2, CEFBS_IsThumb2_HasVirtualization, CEFBS_IsThumb2_IsNotMClass, CEFBS_IsThumb2_PreV8, CEFBS_PreV8_IsThumb2, CEFBS_HasDivideInThumb_IsThumb_HasV8MBaseline, CEFBS_HasNEON_HasV8_3a_HasFullFP16, CEFBS_HasV8_HasNEON_HasFullFP16, CEFBS_IsARM_HasAcquireRelease_HasV7Clrex, CEFBS_IsARM_HasV7_HasMP, CEFBS_IsARM_HasV8_HasCRC, CEFBS_IsARM_HasV8_HasV8_1a, CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex, CEFBS_IsThumb_HasV5T_IsNotMClass, CEFBS_IsThumb2_HasV7_HasMP, CEFBS_IsThumb2_HasV8_HasCRC, CEFBS_IsThumb2_HasV8_HasV8_1a, CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, CEFBS_IsThumb2_HasV8_1MMainline_HasPACBTI, CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex_IsNotMClass, }; static constexpr FeatureBitset FeatureBitsets[] = { {}, // CEFBS_None {Feature_Has8MSecExtBit, }, {Feature_HasBF16Bit, }, {Feature_HasCDEBit, }, {Feature_HasDotProdBit, }, {Feature_HasFP16Bit, }, {Feature_HasFPARMv8Bit, }, {Feature_HasFPRegsBit, }, {Feature_HasFPRegs16Bit, }, {Feature_HasFPRegs64Bit, }, {Feature_HasFPRegsV8_1MBit, }, {Feature_HasFullFP16Bit, }, {Feature_HasMVEFloatBit, }, {Feature_HasMVEIntBit, }, {Feature_HasMatMulInt8Bit, }, {Feature_HasNEONBit, }, {Feature_HasV8_1MMainlineBit, }, {Feature_HasVFP2Bit, }, {Feature_HasVFP3Bit, }, {Feature_HasVFP4Bit, }, {Feature_IsARMBit, }, {Feature_IsThumbBit, }, {Feature_IsThumb2Bit, }, {Feature_HasBF16Bit, Feature_HasNEONBit, }, {Feature_HasCDEBit, Feature_HasFPRegsBit, }, {Feature_HasCDEBit, Feature_HasMVEIntBit, }, {Feature_HasDSPBit, Feature_IsThumb2Bit, }, {Feature_HasFPARMv8Bit, Feature_HasDPVFPBit, }, {Feature_HasFPARMv8Bit, Feature_HasV8_3aBit, }, {Feature_HasFPRegsBit, Feature_HasV8_1MMainlineBit, }, {Feature_HasNEONBit, Feature_HasFP16Bit, }, {Feature_HasNEONBit, Feature_HasFP16FMLBit, }, {Feature_HasNEONBit, Feature_HasFullFP16Bit, }, {Feature_HasNEONBit, Feature_HasV8_1aBit, }, {Feature_HasNEONBit, Feature_HasV8_3aBit, }, {Feature_HasNEONBit, Feature_HasVFP4Bit, }, {Feature_HasV7Bit, Feature_IsMClassBit, }, {Feature_HasV8Bit, Feature_HasAESBit, }, {Feature_HasV8Bit, Feature_HasNEONBit, }, {Feature_HasV8Bit, Feature_HasSHA2Bit, }, {Feature_HasV8MMainlineBit, Feature_Has8MSecExtBit, }, {Feature_HasV8_1MMainlineBit, Feature_Has8MSecExtBit, }, {Feature_HasV8_1MMainlineBit, Feature_HasFPRegsBit, }, {Feature_HasV8_1MMainlineBit, Feature_HasMVEIntBit, }, {Feature_HasVFP2Bit, Feature_HasDPVFPBit, }, {Feature_HasVFP3Bit, Feature_HasDPVFPBit, }, {Feature_HasVFP4Bit, Feature_HasDPVFPBit, }, {Feature_IsARMBit, Feature_HasAcquireReleaseBit, }, {Feature_IsARMBit, Feature_HasDBBit, }, {Feature_IsARMBit, Feature_HasDivideInARMBit, }, {Feature_IsARMBit, Feature_HasSBBit, }, {Feature_IsARMBit, Feature_HasTrustZoneBit, }, {Feature_IsARMBit, Feature_HasV4TBit, }, {Feature_IsARMBit, Feature_HasV5TBit, }, {Feature_IsARMBit, Feature_HasV5TEBit, }, {Feature_IsARMBit, Feature_HasV6Bit, }, {Feature_IsARMBit, Feature_HasV6KBit, }, {Feature_IsARMBit, Feature_HasV6T2Bit, }, {Feature_IsARMBit, Feature_HasV7Bit, }, {Feature_IsARMBit, Feature_HasV8Bit, }, {Feature_IsARMBit, Feature_HasV8_4aBit, }, {Feature_IsARMBit, Feature_HasVFP2Bit, }, {Feature_IsARMBit, Feature_HasVirtualizationBit, }, {Feature_IsARMBit, Feature_PreV8Bit, }, {Feature_IsARMBit, Feature_UseNaClTrapBit, }, {Feature_IsThumbBit, Feature_Has8MSecExtBit, }, {Feature_IsThumbBit, Feature_HasAcquireReleaseBit, }, {Feature_IsThumbBit, Feature_HasDBBit, }, {Feature_IsThumbBit, Feature_HasV5TBit, }, {Feature_IsThumbBit, Feature_HasV6Bit, }, {Feature_IsThumbBit, Feature_HasV6MBit, }, {Feature_IsThumbBit, Feature_HasV7ClrexBit, }, {Feature_IsThumbBit, Feature_HasV8Bit, }, {Feature_IsThumbBit, Feature_HasV8MBaselineBit, }, {Feature_IsThumbBit, Feature_HasV8_4aBit, }, {Feature_IsThumbBit, Feature_HasVirtualizationBit, }, {Feature_IsThumbBit, Feature_IsMClassBit, }, {Feature_IsThumbBit, Feature_IsNotMClassBit, }, {Feature_IsThumb2Bit, Feature_HasDSPBit, }, {Feature_IsThumb2Bit, Feature_HasSBBit, }, {Feature_IsThumb2Bit, Feature_HasTrustZoneBit, }, {Feature_IsThumb2Bit, Feature_HasV7Bit, }, {Feature_IsThumb2Bit, Feature_HasV8Bit, }, {Feature_IsThumb2Bit, Feature_HasVFP2Bit, }, {Feature_IsThumb2Bit, Feature_HasVirtualizationBit, }, {Feature_IsThumb2Bit, Feature_IsNotMClassBit, }, {Feature_IsThumb2Bit, Feature_PreV8Bit, }, {Feature_PreV8Bit, Feature_IsThumb2Bit, }, {Feature_HasDivideInThumbBit, Feature_IsThumbBit, Feature_HasV8MBaselineBit, }, {Feature_HasNEONBit, Feature_HasV8_3aBit, Feature_HasFullFP16Bit, }, {Feature_HasV8Bit, Feature_HasNEONBit, Feature_HasFullFP16Bit, }, {Feature_IsARMBit, Feature_HasAcquireReleaseBit, Feature_HasV7ClrexBit, }, {Feature_IsARMBit, Feature_HasV7Bit, Feature_HasMPBit, }, {Feature_IsARMBit, Feature_HasV8Bit, Feature_HasCRCBit, }, {Feature_IsARMBit, Feature_HasV8Bit, Feature_HasV8_1aBit, }, {Feature_IsThumbBit, Feature_HasAcquireReleaseBit, Feature_HasV7ClrexBit, }, {Feature_IsThumbBit, Feature_HasV5TBit, Feature_IsNotMClassBit, }, {Feature_IsThumb2Bit, Feature_HasV7Bit, Feature_HasMPBit, }, {Feature_IsThumb2Bit, Feature_HasV8Bit, Feature_HasCRCBit, }, {Feature_IsThumb2Bit, Feature_HasV8Bit, Feature_HasV8_1aBit, }, {Feature_IsThumb2Bit, Feature_HasV8_1MMainlineBit, Feature_HasLOBBit, }, {Feature_IsThumb2Bit, Feature_HasV8_1MMainlineBit, Feature_HasPACBTIBit, }, {Feature_IsThumbBit, Feature_HasAcquireReleaseBit, Feature_HasV7ClrexBit, Feature_IsNotMClassBit, }, }; #endif // NDEBUG void verifyInstructionPredicates( unsigned Opcode, const FeatureBitset &Features) { #ifndef NDEBUG static uint8_t RequiredFeaturesRefs[] = { CEFBS_None, // PHI = 0 CEFBS_None, // INLINEASM = 1 CEFBS_None, // INLINEASM_BR = 2 CEFBS_None, // CFI_INSTRUCTION = 3 CEFBS_None, // EH_LABEL = 4 CEFBS_None, // GC_LABEL = 5 CEFBS_None, // ANNOTATION_LABEL = 6 CEFBS_None, // KILL = 7 CEFBS_None, // EXTRACT_SUBREG = 8 CEFBS_None, // INSERT_SUBREG = 9 CEFBS_None, // IMPLICIT_DEF = 10 CEFBS_None, // SUBREG_TO_REG = 11 CEFBS_None, // COPY_TO_REGCLASS = 12 CEFBS_None, // DBG_VALUE = 13 CEFBS_None, // DBG_VALUE_LIST = 14 CEFBS_None, // DBG_INSTR_REF = 15 CEFBS_None, // DBG_PHI = 16 CEFBS_None, // DBG_LABEL = 17 CEFBS_None, // REG_SEQUENCE = 18 CEFBS_None, // COPY = 19 CEFBS_None, // BUNDLE = 20 CEFBS_None, // LIFETIME_START = 21 CEFBS_None, // LIFETIME_END = 22 CEFBS_None, // PSEUDO_PROBE = 23 CEFBS_None, // ARITH_FENCE = 24 CEFBS_None, // STACKMAP = 25 CEFBS_None, // FENTRY_CALL = 26 CEFBS_None, // PATCHPOINT = 27 CEFBS_None, // LOAD_STACK_GUARD = 28 CEFBS_None, // PREALLOCATED_SETUP = 29 CEFBS_None, // PREALLOCATED_ARG = 30 CEFBS_None, // STATEPOINT = 31 CEFBS_None, // LOCAL_ESCAPE = 32 CEFBS_None, // FAULTING_OP = 33 CEFBS_None, // PATCHABLE_OP = 34 CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 35 CEFBS_None, // PATCHABLE_RET = 36 CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 37 CEFBS_None, // PATCHABLE_TAIL_CALL = 38 CEFBS_None, // PATCHABLE_EVENT_CALL = 39 CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 40 CEFBS_None, // ICALL_BRANCH_FUNNEL = 41 CEFBS_None, // MEMBARRIER = 42 CEFBS_None, // G_ASSERT_SEXT = 43 CEFBS_None, // G_ASSERT_ZEXT = 44 CEFBS_None, // G_ASSERT_ALIGN = 45 CEFBS_None, // G_ADD = 46 CEFBS_None, // G_SUB = 47 CEFBS_None, // G_MUL = 48 CEFBS_None, // G_SDIV = 49 CEFBS_None, // G_UDIV = 50 CEFBS_None, // G_SREM = 51 CEFBS_None, // G_UREM = 52 CEFBS_None, // G_SDIVREM = 53 CEFBS_None, // G_UDIVREM = 54 CEFBS_None, // G_AND = 55 CEFBS_None, // G_OR = 56 CEFBS_None, // G_XOR = 57 CEFBS_None, // G_IMPLICIT_DEF = 58 CEFBS_None, // G_PHI = 59 CEFBS_None, // G_FRAME_INDEX = 60 CEFBS_None, // G_GLOBAL_VALUE = 61 CEFBS_None, // G_EXTRACT = 62 CEFBS_None, // G_UNMERGE_VALUES = 63 CEFBS_None, // G_INSERT = 64 CEFBS_None, // G_MERGE_VALUES = 65 CEFBS_None, // G_BUILD_VECTOR = 66 CEFBS_None, // G_BUILD_VECTOR_TRUNC = 67 CEFBS_None, // G_CONCAT_VECTORS = 68 CEFBS_None, // G_PTRTOINT = 69 CEFBS_None, // G_INTTOPTR = 70 CEFBS_None, // G_BITCAST = 71 CEFBS_None, // G_FREEZE = 72 CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 73 CEFBS_None, // G_INTRINSIC_TRUNC = 74 CEFBS_None, // G_INTRINSIC_ROUND = 75 CEFBS_None, // G_INTRINSIC_LRINT = 76 CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 77 CEFBS_None, // G_READCYCLECOUNTER = 78 CEFBS_None, // G_LOAD = 79 CEFBS_None, // G_SEXTLOAD = 80 CEFBS_None, // G_ZEXTLOAD = 81 CEFBS_None, // G_INDEXED_LOAD = 82 CEFBS_None, // G_INDEXED_SEXTLOAD = 83 CEFBS_None, // G_INDEXED_ZEXTLOAD = 84 CEFBS_None, // G_STORE = 85 CEFBS_None, // G_INDEXED_STORE = 86 CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 87 CEFBS_None, // G_ATOMIC_CMPXCHG = 88 CEFBS_None, // G_ATOMICRMW_XCHG = 89 CEFBS_None, // G_ATOMICRMW_ADD = 90 CEFBS_None, // G_ATOMICRMW_SUB = 91 CEFBS_None, // G_ATOMICRMW_AND = 92 CEFBS_None, // G_ATOMICRMW_NAND = 93 CEFBS_None, // G_ATOMICRMW_OR = 94 CEFBS_None, // G_ATOMICRMW_XOR = 95 CEFBS_None, // G_ATOMICRMW_MAX = 96 CEFBS_None, // G_ATOMICRMW_MIN = 97 CEFBS_None, // G_ATOMICRMW_UMAX = 98 CEFBS_None, // G_ATOMICRMW_UMIN = 99 CEFBS_None, // G_ATOMICRMW_FADD = 100 CEFBS_None, // G_ATOMICRMW_FSUB = 101 CEFBS_None, // G_ATOMICRMW_FMAX = 102 CEFBS_None, // G_ATOMICRMW_FMIN = 103 CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 104 CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 105 CEFBS_None, // G_FENCE = 106 CEFBS_None, // G_BRCOND = 107 CEFBS_None, // G_BRINDIRECT = 108 CEFBS_None, // G_INVOKE_REGION_START = 109 CEFBS_None, // G_INTRINSIC = 110 CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 111 CEFBS_None, // G_ANYEXT = 112 CEFBS_None, // G_TRUNC = 113 CEFBS_None, // G_CONSTANT = 114 CEFBS_None, // G_FCONSTANT = 115 CEFBS_None, // G_VASTART = 116 CEFBS_None, // G_VAARG = 117 CEFBS_None, // G_SEXT = 118 CEFBS_None, // G_SEXT_INREG = 119 CEFBS_None, // G_ZEXT = 120 CEFBS_None, // G_SHL = 121 CEFBS_None, // G_LSHR = 122 CEFBS_None, // G_ASHR = 123 CEFBS_None, // G_FSHL = 124 CEFBS_None, // G_FSHR = 125 CEFBS_None, // G_ROTR = 126 CEFBS_None, // G_ROTL = 127 CEFBS_None, // G_ICMP = 128 CEFBS_None, // G_FCMP = 129 CEFBS_None, // G_SELECT = 130 CEFBS_None, // G_UADDO = 131 CEFBS_None, // G_UADDE = 132 CEFBS_None, // G_USUBO = 133 CEFBS_None, // G_USUBE = 134 CEFBS_None, // G_SADDO = 135 CEFBS_None, // G_SADDE = 136 CEFBS_None, // G_SSUBO = 137 CEFBS_None, // G_SSUBE = 138 CEFBS_None, // G_UMULO = 139 CEFBS_None, // G_SMULO = 140 CEFBS_None, // G_UMULH = 141 CEFBS_None, // G_SMULH = 142 CEFBS_None, // G_UADDSAT = 143 CEFBS_None, // G_SADDSAT = 144 CEFBS_None, // G_USUBSAT = 145 CEFBS_None, // G_SSUBSAT = 146 CEFBS_None, // G_USHLSAT = 147 CEFBS_None, // G_SSHLSAT = 148 CEFBS_None, // G_SMULFIX = 149 CEFBS_None, // G_UMULFIX = 150 CEFBS_None, // G_SMULFIXSAT = 151 CEFBS_None, // G_UMULFIXSAT = 152 CEFBS_None, // G_SDIVFIX = 153 CEFBS_None, // G_UDIVFIX = 154 CEFBS_None, // G_SDIVFIXSAT = 155 CEFBS_None, // G_UDIVFIXSAT = 156 CEFBS_None, // G_FADD = 157 CEFBS_None, // G_FSUB = 158 CEFBS_None, // G_FMUL = 159 CEFBS_None, // G_FMA = 160 CEFBS_None, // G_FMAD = 161 CEFBS_None, // G_FDIV = 162 CEFBS_None, // G_FREM = 163 CEFBS_None, // G_FPOW = 164 CEFBS_None, // G_FPOWI = 165 CEFBS_None, // G_FEXP = 166 CEFBS_None, // G_FEXP2 = 167 CEFBS_None, // G_FLOG = 168 CEFBS_None, // G_FLOG2 = 169 CEFBS_None, // G_FLOG10 = 170 CEFBS_None, // G_FNEG = 171 CEFBS_None, // G_FPEXT = 172 CEFBS_None, // G_FPTRUNC = 173 CEFBS_None, // G_FPTOSI = 174 CEFBS_None, // G_FPTOUI = 175 CEFBS_None, // G_SITOFP = 176 CEFBS_None, // G_UITOFP = 177 CEFBS_None, // G_FABS = 178 CEFBS_None, // G_FCOPYSIGN = 179 CEFBS_None, // G_IS_FPCLASS = 180 CEFBS_None, // G_FCANONICALIZE = 181 CEFBS_None, // G_FMINNUM = 182 CEFBS_None, // G_FMAXNUM = 183 CEFBS_None, // G_FMINNUM_IEEE = 184 CEFBS_None, // G_FMAXNUM_IEEE = 185 CEFBS_None, // G_FMINIMUM = 186 CEFBS_None, // G_FMAXIMUM = 187 CEFBS_None, // G_PTR_ADD = 188 CEFBS_None, // G_PTRMASK = 189 CEFBS_None, // G_SMIN = 190 CEFBS_None, // G_SMAX = 191 CEFBS_None, // G_UMIN = 192 CEFBS_None, // G_UMAX = 193 CEFBS_None, // G_ABS = 194 CEFBS_None, // G_LROUND = 195 CEFBS_None, // G_LLROUND = 196 CEFBS_None, // G_BR = 197 CEFBS_None, // G_BRJT = 198 CEFBS_None, // G_INSERT_VECTOR_ELT = 199 CEFBS_None, // G_EXTRACT_VECTOR_ELT = 200 CEFBS_None, // G_SHUFFLE_VECTOR = 201 CEFBS_None, // G_CTTZ = 202 CEFBS_None, // G_CTTZ_ZERO_UNDEF = 203 CEFBS_None, // G_CTLZ = 204 CEFBS_None, // G_CTLZ_ZERO_UNDEF = 205 CEFBS_None, // G_CTPOP = 206 CEFBS_None, // G_BSWAP = 207 CEFBS_None, // G_BITREVERSE = 208 CEFBS_None, // G_FCEIL = 209 CEFBS_None, // G_FCOS = 210 CEFBS_None, // G_FSIN = 211 CEFBS_None, // G_FSQRT = 212 CEFBS_None, // G_FFLOOR = 213 CEFBS_None, // G_FRINT = 214 CEFBS_None, // G_FNEARBYINT = 215 CEFBS_None, // G_ADDRSPACE_CAST = 216 CEFBS_None, // G_BLOCK_ADDR = 217 CEFBS_None, // G_JUMP_TABLE = 218 CEFBS_None, // G_DYN_STACKALLOC = 219 CEFBS_None, // G_STRICT_FADD = 220 CEFBS_None, // G_STRICT_FSUB = 221 CEFBS_None, // G_STRICT_FMUL = 222 CEFBS_None, // G_STRICT_FDIV = 223 CEFBS_None, // G_STRICT_FREM = 224 CEFBS_None, // G_STRICT_FMA = 225 CEFBS_None, // G_STRICT_FSQRT = 226 CEFBS_None, // G_READ_REGISTER = 227 CEFBS_None, // G_WRITE_REGISTER = 228 CEFBS_None, // G_MEMCPY = 229 CEFBS_None, // G_MEMCPY_INLINE = 230 CEFBS_None, // G_MEMMOVE = 231 CEFBS_None, // G_MEMSET = 232 CEFBS_None, // G_BZERO = 233 CEFBS_None, // G_VECREDUCE_SEQ_FADD = 234 CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 235 CEFBS_None, // G_VECREDUCE_FADD = 236 CEFBS_None, // G_VECREDUCE_FMUL = 237 CEFBS_None, // G_VECREDUCE_FMAX = 238 CEFBS_None, // G_VECREDUCE_FMIN = 239 CEFBS_None, // G_VECREDUCE_ADD = 240 CEFBS_None, // G_VECREDUCE_MUL = 241 CEFBS_None, // G_VECREDUCE_AND = 242 CEFBS_None, // G_VECREDUCE_OR = 243 CEFBS_None, // G_VECREDUCE_XOR = 244 CEFBS_None, // G_VECREDUCE_SMAX = 245 CEFBS_None, // G_VECREDUCE_SMIN = 246 CEFBS_None, // G_VECREDUCE_UMAX = 247 CEFBS_None, // G_VECREDUCE_UMIN = 248 CEFBS_None, // G_SBFX = 249 CEFBS_None, // G_UBFX = 250 CEFBS_IsARM, // ABS = 251 CEFBS_IsARM, // ADDSri = 252 CEFBS_IsARM, // ADDSrr = 253 CEFBS_IsARM, // ADDSrsi = 254 CEFBS_IsARM, // ADDSrsr = 255 CEFBS_None, // ADJCALLSTACKDOWN = 256 CEFBS_None, // ADJCALLSTACKUP = 257 CEFBS_IsARM, // ASRi = 258 CEFBS_IsARM, // ASRr = 259 CEFBS_IsARM, // B = 260 CEFBS_None, // BCCZi64 = 261 CEFBS_None, // BCCi64 = 262 CEFBS_IsARM_HasV5T, // BLX_noip = 263 CEFBS_IsARM_HasV5T, // BLX_pred_noip = 264 CEFBS_IsARM, // BL_PUSHLR = 265 CEFBS_IsARM, // BMOVPCB_CALL = 266 CEFBS_IsARM, // BMOVPCRX_CALL = 267 CEFBS_IsARM, // BR_JTadd = 268 CEFBS_IsARM, // BR_JTm_i12 = 269 CEFBS_IsARM, // BR_JTm_rs = 270 CEFBS_IsARM, // BR_JTr = 271 CEFBS_IsARM_HasV4T, // BX_CALL = 272 CEFBS_None, // CMP_SWAP_16 = 273 CEFBS_None, // CMP_SWAP_32 = 274 CEFBS_None, // CMP_SWAP_64 = 275 CEFBS_None, // CMP_SWAP_8 = 276 CEFBS_None, // CONSTPOOL_ENTRY = 277 CEFBS_None, // COPY_STRUCT_BYVAL_I32 = 278 CEFBS_IsARM, // ITasm = 279 CEFBS_None, // Int_eh_sjlj_dispatchsetup = 280 CEFBS_IsARM, // Int_eh_sjlj_longjmp = 281 CEFBS_IsARM_HasVFP2, // Int_eh_sjlj_setjmp = 282 CEFBS_IsARM, // Int_eh_sjlj_setjmp_nofp = 283 CEFBS_None, // Int_eh_sjlj_setup_dispatch = 284 CEFBS_None, // JUMPTABLE_ADDRS = 285 CEFBS_None, // JUMPTABLE_INSTS = 286 CEFBS_None, // JUMPTABLE_TBB = 287 CEFBS_None, // JUMPTABLE_TBH = 288 CEFBS_IsARM, // LDMIA_RET = 289 CEFBS_IsARM, // LDRBT_POST = 290 CEFBS_IsARM, // LDRConstPool = 291 CEFBS_IsARM, // LDRHTii = 292 CEFBS_IsARM, // LDRLIT_ga_abs = 293 CEFBS_IsARM, // LDRLIT_ga_pcrel = 294 CEFBS_IsARM, // LDRLIT_ga_pcrel_ldr = 295 CEFBS_IsARM, // LDRSBTii = 296 CEFBS_IsARM, // LDRSHTii = 297 CEFBS_IsARM, // LDRT_POST = 298 CEFBS_IsARM, // LEApcrel = 299 CEFBS_IsARM, // LEApcrelJT = 300 CEFBS_IsARM_HasV5TE, // LOADDUAL = 301 CEFBS_IsARM, // LSLi = 302 CEFBS_IsARM, // LSLr = 303 CEFBS_IsARM, // LSRi = 304 CEFBS_IsARM, // LSRr = 305 CEFBS_None, // MEMCPY = 306 CEFBS_IsARM, // MLAv5 = 307 CEFBS_IsARM, // MOVCCi = 308 CEFBS_IsARM_HasV6T2, // MOVCCi16 = 309 CEFBS_IsARM_HasV6T2, // MOVCCi32imm = 310 CEFBS_IsARM, // MOVCCr = 311 CEFBS_IsARM, // MOVCCsi = 312 CEFBS_IsARM, // MOVCCsr = 313 CEFBS_IsARM, // MOVPCRX = 314 CEFBS_None, // MOVTi16_ga_pcrel = 315 CEFBS_IsARM, // MOV_ga_pcrel = 316 CEFBS_IsARM, // MOV_ga_pcrel_ldr = 317 CEFBS_None, // MOVi16_ga_pcrel = 318 CEFBS_IsARM, // MOVi32imm = 319 CEFBS_IsARM, // MOVsra_flag = 320 CEFBS_IsARM, // MOVsrl_flag = 321 CEFBS_HasMVEInt, // MQPRCopy = 322 CEFBS_HasMVEInt, // MQQPRLoad = 323 CEFBS_HasMVEInt, // MQQPRStore = 324 CEFBS_HasMVEInt, // MQQQQPRLoad = 325 CEFBS_HasMVEInt, // MQQQQPRStore = 326 CEFBS_IsARM, // MULv5 = 327 CEFBS_None, // MVE_MEMCPYLOOPINST = 328 CEFBS_None, // MVE_MEMSETLOOPINST = 329 CEFBS_IsARM, // MVNCCi = 330 CEFBS_IsARM, // PICADD = 331 CEFBS_IsARM, // PICLDR = 332 CEFBS_IsARM, // PICLDRB = 333 CEFBS_IsARM, // PICLDRH = 334 CEFBS_IsARM, // PICLDRSB = 335 CEFBS_IsARM, // PICLDRSH = 336 CEFBS_IsARM, // PICSTR = 337 CEFBS_IsARM, // PICSTRB = 338 CEFBS_IsARM, // PICSTRH = 339 CEFBS_IsARM, // RORi = 340 CEFBS_IsARM, // RORr = 341 CEFBS_IsARM, // RRX = 342 CEFBS_IsARM, // RRXi = 343 CEFBS_IsARM, // RSBSri = 344 CEFBS_IsARM, // RSBSrsi = 345 CEFBS_IsARM, // RSBSrsr = 346 CEFBS_None, // SEH_EpilogEnd = 347 CEFBS_None, // SEH_EpilogStart = 348 CEFBS_None, // SEH_Nop = 349 CEFBS_None, // SEH_Nop_Ret = 350 CEFBS_None, // SEH_PrologEnd = 351 CEFBS_None, // SEH_SaveFRegs = 352 CEFBS_None, // SEH_SaveLR = 353 CEFBS_None, // SEH_SaveRegs = 354 CEFBS_None, // SEH_SaveRegs_Ret = 355 CEFBS_None, // SEH_SaveSP = 356 CEFBS_None, // SEH_StackAlloc = 357 CEFBS_IsARM, // SMLALv5 = 358 CEFBS_IsARM, // SMULLv5 = 359 CEFBS_None, // SPACE = 360 CEFBS_IsARM_HasV5TE, // STOREDUAL = 361 CEFBS_IsARM, // STRBT_POST = 362 CEFBS_IsARM, // STRBi_preidx = 363 CEFBS_IsARM, // STRBr_preidx = 364 CEFBS_IsARM, // STRH_preidx = 365 CEFBS_IsARM, // STRT_POST = 366 CEFBS_IsARM, // STRi_preidx = 367 CEFBS_IsARM, // STRr_preidx = 368 CEFBS_IsARM, // SUBS_PC_LR = 369 CEFBS_IsARM, // SUBSri = 370 CEFBS_IsARM, // SUBSrr = 371 CEFBS_IsARM, // SUBSrsi = 372 CEFBS_IsARM, // SUBSrsr = 373 CEFBS_None, // SpeculationBarrierISBDSBEndBB = 374 CEFBS_None, // SpeculationBarrierSBEndBB = 375 CEFBS_IsARM, // TAILJMPd = 376 CEFBS_IsARM_HasV4T, // TAILJMPr = 377 CEFBS_IsARM, // TAILJMPr4 = 378 CEFBS_None, // TCRETURNdi = 379 CEFBS_None, // TCRETURNri = 380 CEFBS_IsARM, // TPsoft = 381 CEFBS_IsARM, // UMLALv5 = 382 CEFBS_IsARM, // UMULLv5 = 383 CEFBS_HasNEON, // VLD1LNdAsm_16 = 384 CEFBS_HasNEON, // VLD1LNdAsm_32 = 385 CEFBS_HasNEON, // VLD1LNdAsm_8 = 386 CEFBS_HasNEON, // VLD1LNdWB_fixed_Asm_16 = 387 CEFBS_HasNEON, // VLD1LNdWB_fixed_Asm_32 = 388 CEFBS_HasNEON, // VLD1LNdWB_fixed_Asm_8 = 389 CEFBS_HasNEON, // VLD1LNdWB_register_Asm_16 = 390 CEFBS_HasNEON, // VLD1LNdWB_register_Asm_32 = 391 CEFBS_HasNEON, // VLD1LNdWB_register_Asm_8 = 392 CEFBS_HasNEON, // VLD2LNdAsm_16 = 393 CEFBS_HasNEON, // VLD2LNdAsm_32 = 394 CEFBS_HasNEON, // VLD2LNdAsm_8 = 395 CEFBS_HasNEON, // VLD2LNdWB_fixed_Asm_16 = 396 CEFBS_HasNEON, // VLD2LNdWB_fixed_Asm_32 = 397 CEFBS_HasNEON, // VLD2LNdWB_fixed_Asm_8 = 398 CEFBS_HasNEON, // VLD2LNdWB_register_Asm_16 = 399 CEFBS_HasNEON, // VLD2LNdWB_register_Asm_32 = 400 CEFBS_HasNEON, // VLD2LNdWB_register_Asm_8 = 401 CEFBS_HasNEON, // VLD2LNqAsm_16 = 402 CEFBS_HasNEON, // VLD2LNqAsm_32 = 403 CEFBS_HasNEON, // VLD2LNqWB_fixed_Asm_16 = 404 CEFBS_HasNEON, // VLD2LNqWB_fixed_Asm_32 = 405 CEFBS_HasNEON, // VLD2LNqWB_register_Asm_16 = 406 CEFBS_HasNEON, // VLD2LNqWB_register_Asm_32 = 407 CEFBS_HasNEON, // VLD3DUPdAsm_16 = 408 CEFBS_HasNEON, // VLD3DUPdAsm_32 = 409 CEFBS_HasNEON, // VLD3DUPdAsm_8 = 410 CEFBS_HasNEON, // VLD3DUPdWB_fixed_Asm_16 = 411 CEFBS_HasNEON, // VLD3DUPdWB_fixed_Asm_32 = 412 CEFBS_HasNEON, // VLD3DUPdWB_fixed_Asm_8 = 413 CEFBS_HasNEON, // VLD3DUPdWB_register_Asm_16 = 414 CEFBS_HasNEON, // VLD3DUPdWB_register_Asm_32 = 415 CEFBS_HasNEON, // VLD3DUPdWB_register_Asm_8 = 416 CEFBS_HasNEON, // VLD3DUPqAsm_16 = 417 CEFBS_HasNEON, // VLD3DUPqAsm_32 = 418 CEFBS_HasNEON, // VLD3DUPqAsm_8 = 419 CEFBS_HasNEON, // VLD3DUPqWB_fixed_Asm_16 = 420 CEFBS_HasNEON, // VLD3DUPqWB_fixed_Asm_32 = 421 CEFBS_HasNEON, // VLD3DUPqWB_fixed_Asm_8 = 422 CEFBS_HasNEON, // VLD3DUPqWB_register_Asm_16 = 423 CEFBS_HasNEON, // VLD3DUPqWB_register_Asm_32 = 424 CEFBS_HasNEON, // VLD3DUPqWB_register_Asm_8 = 425 CEFBS_HasNEON, // VLD3LNdAsm_16 = 426 CEFBS_HasNEON, // VLD3LNdAsm_32 = 427 CEFBS_HasNEON, // VLD3LNdAsm_8 = 428 CEFBS_HasNEON, // VLD3LNdWB_fixed_Asm_16 = 429 CEFBS_HasNEON, // VLD3LNdWB_fixed_Asm_32 = 430 CEFBS_HasNEON, // VLD3LNdWB_fixed_Asm_8 = 431 CEFBS_HasNEON, // VLD3LNdWB_register_Asm_16 = 432 CEFBS_HasNEON, // VLD3LNdWB_register_Asm_32 = 433 CEFBS_HasNEON, // VLD3LNdWB_register_Asm_8 = 434 CEFBS_HasNEON, // VLD3LNqAsm_16 = 435 CEFBS_HasNEON, // VLD3LNqAsm_32 = 436 CEFBS_HasNEON, // VLD3LNqWB_fixed_Asm_16 = 437 CEFBS_HasNEON, // VLD3LNqWB_fixed_Asm_32 = 438 CEFBS_HasNEON, // VLD3LNqWB_register_Asm_16 = 439 CEFBS_HasNEON, // VLD3LNqWB_register_Asm_32 = 440 CEFBS_HasNEON, // VLD3dAsm_16 = 441 CEFBS_HasNEON, // VLD3dAsm_32 = 442 CEFBS_HasNEON, // VLD3dAsm_8 = 443 CEFBS_HasNEON, // VLD3dWB_fixed_Asm_16 = 444 CEFBS_HasNEON, // VLD3dWB_fixed_Asm_32 = 445 CEFBS_HasNEON, // VLD3dWB_fixed_Asm_8 = 446 CEFBS_HasNEON, // VLD3dWB_register_Asm_16 = 447 CEFBS_HasNEON, // VLD3dWB_register_Asm_32 = 448 CEFBS_HasNEON, // VLD3dWB_register_Asm_8 = 449 CEFBS_HasNEON, // VLD3qAsm_16 = 450 CEFBS_HasNEON, // VLD3qAsm_32 = 451 CEFBS_HasNEON, // VLD3qAsm_8 = 452 CEFBS_HasNEON, // VLD3qWB_fixed_Asm_16 = 453 CEFBS_HasNEON, // VLD3qWB_fixed_Asm_32 = 454 CEFBS_HasNEON, // VLD3qWB_fixed_Asm_8 = 455 CEFBS_HasNEON, // VLD3qWB_register_Asm_16 = 456 CEFBS_HasNEON, // VLD3qWB_register_Asm_32 = 457 CEFBS_HasNEON, // VLD3qWB_register_Asm_8 = 458 CEFBS_HasNEON, // VLD4DUPdAsm_16 = 459 CEFBS_HasNEON, // VLD4DUPdAsm_32 = 460 CEFBS_HasNEON, // VLD4DUPdAsm_8 = 461 CEFBS_HasNEON, // VLD4DUPdWB_fixed_Asm_16 = 462 CEFBS_HasNEON, // VLD4DUPdWB_fixed_Asm_32 = 463 CEFBS_HasNEON, // VLD4DUPdWB_fixed_Asm_8 = 464 CEFBS_HasNEON, // VLD4DUPdWB_register_Asm_16 = 465 CEFBS_HasNEON, // VLD4DUPdWB_register_Asm_32 = 466 CEFBS_HasNEON, // VLD4DUPdWB_register_Asm_8 = 467 CEFBS_HasNEON, // VLD4DUPqAsm_16 = 468 CEFBS_HasNEON, // VLD4DUPqAsm_32 = 469 CEFBS_HasNEON, // VLD4DUPqAsm_8 = 470 CEFBS_HasNEON, // VLD4DUPqWB_fixed_Asm_16 = 471 CEFBS_HasNEON, // VLD4DUPqWB_fixed_Asm_32 = 472 CEFBS_HasNEON, // VLD4DUPqWB_fixed_Asm_8 = 473 CEFBS_HasNEON, // VLD4DUPqWB_register_Asm_16 = 474 CEFBS_HasNEON, // VLD4DUPqWB_register_Asm_32 = 475 CEFBS_HasNEON, // VLD4DUPqWB_register_Asm_8 = 476 CEFBS_HasNEON, // VLD4LNdAsm_16 = 477 CEFBS_HasNEON, // VLD4LNdAsm_32 = 478 CEFBS_HasNEON, // VLD4LNdAsm_8 = 479 CEFBS_HasNEON, // VLD4LNdWB_fixed_Asm_16 = 480 CEFBS_HasNEON, // VLD4LNdWB_fixed_Asm_32 = 481 CEFBS_HasNEON, // VLD4LNdWB_fixed_Asm_8 = 482 CEFBS_HasNEON, // VLD4LNdWB_register_Asm_16 = 483 CEFBS_HasNEON, // VLD4LNdWB_register_Asm_32 = 484 CEFBS_HasNEON, // VLD4LNdWB_register_Asm_8 = 485 CEFBS_HasNEON, // VLD4LNqAsm_16 = 486 CEFBS_HasNEON, // VLD4LNqAsm_32 = 487 CEFBS_HasNEON, // VLD4LNqWB_fixed_Asm_16 = 488 CEFBS_HasNEON, // VLD4LNqWB_fixed_Asm_32 = 489 CEFBS_HasNEON, // VLD4LNqWB_register_Asm_16 = 490 CEFBS_HasNEON, // VLD4LNqWB_register_Asm_32 = 491 CEFBS_HasNEON, // VLD4dAsm_16 = 492 CEFBS_HasNEON, // VLD4dAsm_32 = 493 CEFBS_HasNEON, // VLD4dAsm_8 = 494 CEFBS_HasNEON, // VLD4dWB_fixed_Asm_16 = 495 CEFBS_HasNEON, // VLD4dWB_fixed_Asm_32 = 496 CEFBS_HasNEON, // VLD4dWB_fixed_Asm_8 = 497 CEFBS_HasNEON, // VLD4dWB_register_Asm_16 = 498 CEFBS_HasNEON, // VLD4dWB_register_Asm_32 = 499 CEFBS_HasNEON, // VLD4dWB_register_Asm_8 = 500 CEFBS_HasNEON, // VLD4qAsm_16 = 501 CEFBS_HasNEON, // VLD4qAsm_32 = 502 CEFBS_HasNEON, // VLD4qAsm_8 = 503 CEFBS_HasNEON, // VLD4qWB_fixed_Asm_16 = 504 CEFBS_HasNEON, // VLD4qWB_fixed_Asm_32 = 505 CEFBS_HasNEON, // VLD4qWB_fixed_Asm_8 = 506 CEFBS_HasNEON, // VLD4qWB_register_Asm_16 = 507 CEFBS_HasNEON, // VLD4qWB_register_Asm_32 = 508 CEFBS_HasNEON, // VLD4qWB_register_Asm_8 = 509 CEFBS_None, // VMOVD0 = 510 CEFBS_HasFPRegs64, // VMOVDcc = 511 CEFBS_HasFPRegs, // VMOVHcc = 512 CEFBS_None, // VMOVQ0 = 513 CEFBS_HasFPRegs, // VMOVScc = 514 CEFBS_HasNEON, // VST1LNdAsm_16 = 515 CEFBS_HasNEON, // VST1LNdAsm_32 = 516 CEFBS_HasNEON, // VST1LNdAsm_8 = 517 CEFBS_HasNEON, // VST1LNdWB_fixed_Asm_16 = 518 CEFBS_HasNEON, // VST1LNdWB_fixed_Asm_32 = 519 CEFBS_HasNEON, // VST1LNdWB_fixed_Asm_8 = 520 CEFBS_HasNEON, // VST1LNdWB_register_Asm_16 = 521 CEFBS_HasNEON, // VST1LNdWB_register_Asm_32 = 522 CEFBS_HasNEON, // VST1LNdWB_register_Asm_8 = 523 CEFBS_HasNEON, // VST2LNdAsm_16 = 524 CEFBS_HasNEON, // VST2LNdAsm_32 = 525 CEFBS_HasNEON, // VST2LNdAsm_8 = 526 CEFBS_HasNEON, // VST2LNdWB_fixed_Asm_16 = 527 CEFBS_HasNEON, // VST2LNdWB_fixed_Asm_32 = 528 CEFBS_HasNEON, // VST2LNdWB_fixed_Asm_8 = 529 CEFBS_HasNEON, // VST2LNdWB_register_Asm_16 = 530 CEFBS_HasNEON, // VST2LNdWB_register_Asm_32 = 531 CEFBS_HasNEON, // VST2LNdWB_register_Asm_8 = 532 CEFBS_HasNEON, // VST2LNqAsm_16 = 533 CEFBS_HasNEON, // VST2LNqAsm_32 = 534 CEFBS_HasNEON, // VST2LNqWB_fixed_Asm_16 = 535 CEFBS_HasNEON, // VST2LNqWB_fixed_Asm_32 = 536 CEFBS_HasNEON, // VST2LNqWB_register_Asm_16 = 537 CEFBS_HasNEON, // VST2LNqWB_register_Asm_32 = 538 CEFBS_HasNEON, // VST3LNdAsm_16 = 539 CEFBS_HasNEON, // VST3LNdAsm_32 = 540 CEFBS_HasNEON, // VST3LNdAsm_8 = 541 CEFBS_HasNEON, // VST3LNdWB_fixed_Asm_16 = 542 CEFBS_HasNEON, // VST3LNdWB_fixed_Asm_32 = 543 CEFBS_HasNEON, // VST3LNdWB_fixed_Asm_8 = 544 CEFBS_HasNEON, // VST3LNdWB_register_Asm_16 = 545 CEFBS_HasNEON, // VST3LNdWB_register_Asm_32 = 546 CEFBS_HasNEON, // VST3LNdWB_register_Asm_8 = 547 CEFBS_HasNEON, // VST3LNqAsm_16 = 548 CEFBS_HasNEON, // VST3LNqAsm_32 = 549 CEFBS_HasNEON, // VST3LNqWB_fixed_Asm_16 = 550 CEFBS_HasNEON, // VST3LNqWB_fixed_Asm_32 = 551 CEFBS_HasNEON, // VST3LNqWB_register_Asm_16 = 552 CEFBS_HasNEON, // VST3LNqWB_register_Asm_32 = 553 CEFBS_HasNEON, // VST3dAsm_16 = 554 CEFBS_HasNEON, // VST3dAsm_32 = 555 CEFBS_HasNEON, // VST3dAsm_8 = 556 CEFBS_HasNEON, // VST3dWB_fixed_Asm_16 = 557 CEFBS_HasNEON, // VST3dWB_fixed_Asm_32 = 558 CEFBS_HasNEON, // VST3dWB_fixed_Asm_8 = 559 CEFBS_HasNEON, // VST3dWB_register_Asm_16 = 560 CEFBS_HasNEON, // VST3dWB_register_Asm_32 = 561 CEFBS_HasNEON, // VST3dWB_register_Asm_8 = 562 CEFBS_HasNEON, // VST3qAsm_16 = 563 CEFBS_HasNEON, // VST3qAsm_32 = 564 CEFBS_HasNEON, // VST3qAsm_8 = 565 CEFBS_HasNEON, // VST3qWB_fixed_Asm_16 = 566 CEFBS_HasNEON, // VST3qWB_fixed_Asm_32 = 567 CEFBS_HasNEON, // VST3qWB_fixed_Asm_8 = 568 CEFBS_HasNEON, // VST3qWB_register_Asm_16 = 569 CEFBS_HasNEON, // VST3qWB_register_Asm_32 = 570 CEFBS_HasNEON, // VST3qWB_register_Asm_8 = 571 CEFBS_HasNEON, // VST4LNdAsm_16 = 572 CEFBS_HasNEON, // VST4LNdAsm_32 = 573 CEFBS_HasNEON, // VST4LNdAsm_8 = 574 CEFBS_HasNEON, // VST4LNdWB_fixed_Asm_16 = 575 CEFBS_HasNEON, // VST4LNdWB_fixed_Asm_32 = 576 CEFBS_HasNEON, // VST4LNdWB_fixed_Asm_8 = 577 CEFBS_HasNEON, // VST4LNdWB_register_Asm_16 = 578 CEFBS_HasNEON, // VST4LNdWB_register_Asm_32 = 579 CEFBS_HasNEON, // VST4LNdWB_register_Asm_8 = 580 CEFBS_HasNEON, // VST4LNqAsm_16 = 581 CEFBS_HasNEON, // VST4LNqAsm_32 = 582 CEFBS_HasNEON, // VST4LNqWB_fixed_Asm_16 = 583 CEFBS_HasNEON, // VST4LNqWB_fixed_Asm_32 = 584 CEFBS_HasNEON, // VST4LNqWB_register_Asm_16 = 585 CEFBS_HasNEON, // VST4LNqWB_register_Asm_32 = 586 CEFBS_HasNEON, // VST4dAsm_16 = 587 CEFBS_HasNEON, // VST4dAsm_32 = 588 CEFBS_HasNEON, // VST4dAsm_8 = 589 CEFBS_HasNEON, // VST4dWB_fixed_Asm_16 = 590 CEFBS_HasNEON, // VST4dWB_fixed_Asm_32 = 591 CEFBS_HasNEON, // VST4dWB_fixed_Asm_8 = 592 CEFBS_HasNEON, // VST4dWB_register_Asm_16 = 593 CEFBS_HasNEON, // VST4dWB_register_Asm_32 = 594 CEFBS_HasNEON, // VST4dWB_register_Asm_8 = 595 CEFBS_HasNEON, // VST4qAsm_16 = 596 CEFBS_HasNEON, // VST4qAsm_32 = 597 CEFBS_HasNEON, // VST4qAsm_8 = 598 CEFBS_HasNEON, // VST4qWB_fixed_Asm_16 = 599 CEFBS_HasNEON, // VST4qWB_fixed_Asm_32 = 600 CEFBS_HasNEON, // VST4qWB_fixed_Asm_8 = 601 CEFBS_HasNEON, // VST4qWB_register_Asm_16 = 602 CEFBS_HasNEON, // VST4qWB_register_Asm_32 = 603 CEFBS_HasNEON, // VST4qWB_register_Asm_8 = 604 CEFBS_None, // WIN__CHKSTK = 605 CEFBS_None, // WIN__DBZCHK = 606 CEFBS_IsThumb2, // t2ABS = 607 CEFBS_IsThumb2, // t2ADDSri = 608 CEFBS_IsThumb2, // t2ADDSrr = 609 CEFBS_IsThumb2, // t2ADDSrs = 610 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2BF_LabelPseudo = 611 CEFBS_IsThumb_HasV8MBaseline, // t2BR_JT = 612 CEFBS_IsThumb2, // t2CALL_BTI = 613 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2DoLoopStart = 614 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2DoLoopStartTP = 615 CEFBS_IsThumb2, // t2LDMIA_RET = 616 CEFBS_IsThumb2, // t2LDRBpcrel = 617 CEFBS_IsThumb2, // t2LDRConstPool = 618 CEFBS_IsThumb2, // t2LDRHpcrel = 619 CEFBS_IsThumb_HasV8MBaseline, // t2LDRLIT_ga_pcrel = 620 CEFBS_IsThumb2, // t2LDRSBpcrel = 621 CEFBS_IsThumb2, // t2LDRSHpcrel = 622 CEFBS_IsThumb2, // t2LDR_POST_imm = 623 CEFBS_IsThumb2, // t2LDR_PRE_imm = 624 CEFBS_IsThumb2, // t2LDRpci_pic = 625 CEFBS_IsThumb2, // t2LDRpcrel = 626 CEFBS_IsThumb2, // t2LEApcrel = 627 CEFBS_IsThumb2, // t2LEApcrelJT = 628 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2LoopDec = 629 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2LoopEnd = 630 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2LoopEndDec = 631 CEFBS_IsThumb2, // t2MOVCCasr = 632 CEFBS_IsThumb2, // t2MOVCCi = 633 CEFBS_IsThumb2, // t2MOVCCi16 = 634 CEFBS_IsThumb2, // t2MOVCCi32imm = 635 CEFBS_IsThumb2, // t2MOVCClsl = 636 CEFBS_IsThumb2, // t2MOVCClsr = 637 CEFBS_IsThumb2, // t2MOVCCr = 638 CEFBS_IsThumb2, // t2MOVCCror = 639 CEFBS_IsThumb2, // t2MOVSsi = 640 CEFBS_IsThumb2, // t2MOVSsr = 641 CEFBS_IsThumb_HasV8MBaseline, // t2MOVTi16_ga_pcrel = 642 CEFBS_IsThumb_HasV8MBaseline, // t2MOV_ga_pcrel = 643 CEFBS_None, // t2MOVi16_ga_pcrel = 644 CEFBS_IsThumb, // t2MOVi32imm = 645 CEFBS_IsThumb2, // t2MOVsi = 646 CEFBS_IsThumb2, // t2MOVsr = 647 CEFBS_IsThumb2, // t2MVNCCi = 648 CEFBS_IsThumb2, // t2RSBSri = 649 CEFBS_IsThumb2, // t2RSBSrs = 650 CEFBS_IsThumb2, // t2STRB_preidx = 651 CEFBS_IsThumb2, // t2STRH_preidx = 652 CEFBS_IsThumb2, // t2STR_POST_imm = 653 CEFBS_IsThumb2, // t2STR_PRE_imm = 654 CEFBS_IsThumb2, // t2STR_preidx = 655 CEFBS_IsThumb2, // t2SUBSri = 656 CEFBS_IsThumb2, // t2SUBSrr = 657 CEFBS_IsThumb2, // t2SUBSrs = 658 CEFBS_None, // t2SpeculationBarrierISBDSBEndBB = 659 CEFBS_None, // t2SpeculationBarrierSBEndBB = 660 CEFBS_IsThumb2, // t2TBB_JT = 661 CEFBS_IsThumb2, // t2TBH_JT = 662 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2WhileLoopSetup = 663 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2WhileLoopStart = 664 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2WhileLoopStartLR = 665 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2WhileLoopStartTP = 666 CEFBS_None, // tADCS = 667 CEFBS_None, // tADDSi3 = 668 CEFBS_None, // tADDSi8 = 669 CEFBS_None, // tADDSrr = 670 CEFBS_IsThumb, // tADDframe = 671 CEFBS_IsThumb, // tADJCALLSTACKDOWN = 672 CEFBS_IsThumb, // tADJCALLSTACKUP = 673 CEFBS_IsThumb_Has8MSecExt, // tBLXNS_CALL = 674 CEFBS_IsThumb_HasV5T, // tBLXr_noip = 675 CEFBS_IsThumb, // tBL_PUSHLR = 676 CEFBS_IsThumb, // tBRIND = 677 CEFBS_IsThumb, // tBR_JTr = 678 CEFBS_IsThumb, // tBXNS_RET = 679 CEFBS_IsThumb, // tBX_CALL = 680 CEFBS_IsThumb, // tBX_RET = 681 CEFBS_IsThumb, // tBX_RET_vararg = 682 CEFBS_IsThumb, // tBfar = 683 CEFBS_None, // tCMP_SWAP_16 = 684 CEFBS_None, // tCMP_SWAP_32 = 685 CEFBS_None, // tCMP_SWAP_8 = 686 CEFBS_IsThumb, // tLDMIA_UPD = 687 CEFBS_IsThumb, // tLDRConstPool = 688 CEFBS_IsThumb, // tLDRLIT_ga_abs = 689 CEFBS_IsThumb, // tLDRLIT_ga_pcrel = 690 CEFBS_IsThumb, // tLDR_postidx = 691 CEFBS_IsThumb, // tLDRpci_pic = 692 CEFBS_IsThumb, // tLEApcrel = 693 CEFBS_IsThumb, // tLEApcrelJT = 694 CEFBS_None, // tLSLSri = 695 CEFBS_None, // tMOVCCr_pseudo = 696 CEFBS_IsThumb, // tPOP_RET = 697 CEFBS_None, // tRSBS = 698 CEFBS_None, // tSBCS = 699 CEFBS_None, // tSUBSi3 = 700 CEFBS_None, // tSUBSi8 = 701 CEFBS_None, // tSUBSrr = 702 CEFBS_IsThumb2, // tTAILJMPd = 703 CEFBS_IsThumb, // tTAILJMPdND = 704 CEFBS_IsThumb, // tTAILJMPr = 705 CEFBS_IsThumb, // tTBB_JT = 706 CEFBS_IsThumb, // tTBH_JT = 707 CEFBS_IsThumb, // tTPsoft = 708 CEFBS_IsARM, // ADCri = 709 CEFBS_IsARM, // ADCrr = 710 CEFBS_IsARM, // ADCrsi = 711 CEFBS_IsARM, // ADCrsr = 712 CEFBS_IsARM, // ADDri = 713 CEFBS_IsARM, // ADDrr = 714 CEFBS_IsARM, // ADDrsi = 715 CEFBS_IsARM, // ADDrsr = 716 CEFBS_IsARM, // ADR = 717 CEFBS_HasV8_HasAES, // AESD = 718 CEFBS_HasV8_HasAES, // AESE = 719 CEFBS_HasV8_HasAES, // AESIMC = 720 CEFBS_HasV8_HasAES, // AESMC = 721 CEFBS_IsARM, // ANDri = 722 CEFBS_IsARM, // ANDrr = 723 CEFBS_IsARM, // ANDrsi = 724 CEFBS_IsARM, // ANDrsr = 725 CEFBS_HasBF16_HasNEON, // BF16VDOTI_VDOTD = 726 CEFBS_HasBF16_HasNEON, // BF16VDOTI_VDOTQ = 727 CEFBS_HasBF16_HasNEON, // BF16VDOTS_VDOTD = 728 CEFBS_HasBF16_HasNEON, // BF16VDOTS_VDOTQ = 729 CEFBS_HasBF16_HasNEON, // BF16_VCVT = 730 CEFBS_HasBF16, // BF16_VCVTB = 731 CEFBS_HasBF16, // BF16_VCVTT = 732 CEFBS_IsARM_HasV6T2, // BFC = 733 CEFBS_IsARM_HasV6T2, // BFI = 734 CEFBS_IsARM, // BICri = 735 CEFBS_IsARM, // BICrr = 736 CEFBS_IsARM, // BICrsi = 737 CEFBS_IsARM, // BICrsr = 738 CEFBS_IsARM, // BKPT = 739 CEFBS_IsARM, // BL = 740 CEFBS_IsARM_HasV5T, // BLX = 741 CEFBS_IsARM_HasV5T, // BLX_pred = 742 CEFBS_IsARM_HasV5T, // BLXi = 743 CEFBS_IsARM, // BL_pred = 744 CEFBS_IsARM_HasV4T, // BX = 745 CEFBS_IsARM, // BXJ = 746 CEFBS_IsARM_HasV4T, // BX_RET = 747 CEFBS_IsARM_HasV4T, // BX_pred = 748 CEFBS_IsARM, // Bcc = 749 CEFBS_HasCDE, // CDE_CX1 = 750 CEFBS_HasCDE, // CDE_CX1A = 751 CEFBS_HasCDE, // CDE_CX1D = 752 CEFBS_HasCDE, // CDE_CX1DA = 753 CEFBS_HasCDE, // CDE_CX2 = 754 CEFBS_HasCDE, // CDE_CX2A = 755 CEFBS_HasCDE, // CDE_CX2D = 756 CEFBS_HasCDE, // CDE_CX2DA = 757 CEFBS_HasCDE, // CDE_CX3 = 758 CEFBS_HasCDE, // CDE_CX3A = 759 CEFBS_HasCDE, // CDE_CX3D = 760 CEFBS_HasCDE, // CDE_CX3DA = 761 CEFBS_HasCDE_HasFPRegs, // CDE_VCX1A_fpdp = 762 CEFBS_HasCDE_HasFPRegs, // CDE_VCX1A_fpsp = 763 CEFBS_HasCDE_HasMVEInt, // CDE_VCX1A_vec = 764 CEFBS_HasCDE_HasFPRegs, // CDE_VCX1_fpdp = 765 CEFBS_HasCDE_HasFPRegs, // CDE_VCX1_fpsp = 766 CEFBS_HasCDE_HasMVEInt, // CDE_VCX1_vec = 767 CEFBS_HasCDE_HasFPRegs, // CDE_VCX2A_fpdp = 768 CEFBS_HasCDE_HasFPRegs, // CDE_VCX2A_fpsp = 769 CEFBS_HasCDE_HasMVEInt, // CDE_VCX2A_vec = 770 CEFBS_HasCDE_HasFPRegs, // CDE_VCX2_fpdp = 771 CEFBS_HasCDE_HasFPRegs, // CDE_VCX2_fpsp = 772 CEFBS_HasCDE_HasMVEInt, // CDE_VCX2_vec = 773 CEFBS_HasCDE_HasFPRegs, // CDE_VCX3A_fpdp = 774 CEFBS_HasCDE_HasFPRegs, // CDE_VCX3A_fpsp = 775 CEFBS_HasCDE_HasMVEInt, // CDE_VCX3A_vec = 776 CEFBS_HasCDE_HasFPRegs, // CDE_VCX3_fpdp = 777 CEFBS_HasCDE_HasFPRegs, // CDE_VCX3_fpsp = 778 CEFBS_HasCDE_HasMVEInt, // CDE_VCX3_vec = 779 CEFBS_IsARM_PreV8, // CDP = 780 CEFBS_IsARM_PreV8, // CDP2 = 781 CEFBS_IsARM_HasV6K, // CLREX = 782 CEFBS_IsARM_HasV5T, // CLZ = 783 CEFBS_IsARM, // CMNri = 784 CEFBS_IsARM, // CMNzrr = 785 CEFBS_IsARM, // CMNzrsi = 786 CEFBS_IsARM, // CMNzrsr = 787 CEFBS_IsARM, // CMPri = 788 CEFBS_IsARM, // CMPrr = 789 CEFBS_IsARM, // CMPrsi = 790 CEFBS_IsARM, // CMPrsr = 791 CEFBS_IsARM, // CPS1p = 792 CEFBS_IsARM, // CPS2p = 793 CEFBS_IsARM, // CPS3p = 794 CEFBS_IsARM_HasV8_HasCRC, // CRC32B = 795 CEFBS_IsARM_HasV8_HasCRC, // CRC32CB = 796 CEFBS_IsARM_HasV8_HasCRC, // CRC32CH = 797 CEFBS_IsARM_HasV8_HasCRC, // CRC32CW = 798 CEFBS_IsARM_HasV8_HasCRC, // CRC32H = 799 CEFBS_IsARM_HasV8_HasCRC, // CRC32W = 800 CEFBS_IsARM_HasV7, // DBG = 801 CEFBS_IsARM_HasDB, // DMB = 802 CEFBS_IsARM_HasDB, // DSB = 803 CEFBS_IsARM, // EORri = 804 CEFBS_IsARM, // EORrr = 805 CEFBS_IsARM, // EORrsi = 806 CEFBS_IsARM, // EORrsr = 807 CEFBS_IsARM_HasVirtualization, // ERET = 808 CEFBS_HasVFP3_HasDPVFP, // FCONSTD = 809 CEFBS_HasFullFP16, // FCONSTH = 810 CEFBS_HasVFP3, // FCONSTS = 811 CEFBS_HasFPRegs, // FLDMXDB_UPD = 812 CEFBS_HasFPRegs, // FLDMXIA = 813 CEFBS_HasFPRegs, // FLDMXIA_UPD = 814 CEFBS_HasFPRegs, // FMSTAT = 815 CEFBS_HasFPRegs, // FSTMXDB_UPD = 816 CEFBS_HasFPRegs, // FSTMXIA = 817 CEFBS_HasFPRegs, // FSTMXIA_UPD = 818 CEFBS_IsARM_HasV6, // HINT = 819 CEFBS_IsARM_HasV8, // HLT = 820 CEFBS_IsARM_HasVirtualization, // HVC = 821 CEFBS_IsARM_HasDB, // ISB = 822 CEFBS_IsARM_HasAcquireRelease, // LDA = 823 CEFBS_IsARM_HasAcquireRelease, // LDAB = 824 CEFBS_IsARM_HasAcquireRelease_HasV7Clrex, // LDAEX = 825 CEFBS_IsARM_HasAcquireRelease_HasV7Clrex, // LDAEXB = 826 CEFBS_IsARM_HasAcquireRelease_HasV7Clrex, // LDAEXD = 827 CEFBS_IsARM_HasAcquireRelease_HasV7Clrex, // LDAEXH = 828 CEFBS_IsARM_HasAcquireRelease, // LDAH = 829 CEFBS_IsARM_PreV8, // LDC2L_OFFSET = 830 CEFBS_IsARM_PreV8, // LDC2L_OPTION = 831 CEFBS_IsARM_PreV8, // LDC2L_POST = 832 CEFBS_IsARM_PreV8, // LDC2L_PRE = 833 CEFBS_IsARM_PreV8, // LDC2_OFFSET = 834 CEFBS_IsARM_PreV8, // LDC2_OPTION = 835 CEFBS_IsARM_PreV8, // LDC2_POST = 836 CEFBS_IsARM_PreV8, // LDC2_PRE = 837 CEFBS_IsARM, // LDCL_OFFSET = 838 CEFBS_IsARM, // LDCL_OPTION = 839 CEFBS_IsARM, // LDCL_POST = 840 CEFBS_IsARM, // LDCL_PRE = 841 CEFBS_IsARM, // LDC_OFFSET = 842 CEFBS_IsARM, // LDC_OPTION = 843 CEFBS_IsARM, // LDC_POST = 844 CEFBS_IsARM, // LDC_PRE = 845 CEFBS_IsARM, // LDMDA = 846 CEFBS_IsARM, // LDMDA_UPD = 847 CEFBS_IsARM, // LDMDB = 848 CEFBS_IsARM, // LDMDB_UPD = 849 CEFBS_IsARM, // LDMIA = 850 CEFBS_IsARM, // LDMIA_UPD = 851 CEFBS_IsARM, // LDMIB = 852 CEFBS_IsARM, // LDMIB_UPD = 853 CEFBS_IsARM, // LDRBT_POST_IMM = 854 CEFBS_IsARM, // LDRBT_POST_REG = 855 CEFBS_IsARM, // LDRB_POST_IMM = 856 CEFBS_IsARM, // LDRB_POST_REG = 857 CEFBS_IsARM, // LDRB_PRE_IMM = 858 CEFBS_IsARM, // LDRB_PRE_REG = 859 CEFBS_IsARM, // LDRBi12 = 860 CEFBS_IsARM, // LDRBrs = 861 CEFBS_IsARM_HasV5TE, // LDRD = 862 CEFBS_IsARM, // LDRD_POST = 863 CEFBS_IsARM, // LDRD_PRE = 864 CEFBS_IsARM, // LDREX = 865 CEFBS_IsARM, // LDREXB = 866 CEFBS_IsARM, // LDREXD = 867 CEFBS_IsARM, // LDREXH = 868 CEFBS_IsARM, // LDRH = 869 CEFBS_IsARM, // LDRHTi = 870 CEFBS_IsARM, // LDRHTr = 871 CEFBS_IsARM, // LDRH_POST = 872 CEFBS_IsARM, // LDRH_PRE = 873 CEFBS_IsARM, // LDRSB = 874 CEFBS_IsARM, // LDRSBTi = 875 CEFBS_IsARM, // LDRSBTr = 876 CEFBS_IsARM, // LDRSB_POST = 877 CEFBS_IsARM, // LDRSB_PRE = 878 CEFBS_IsARM, // LDRSH = 879 CEFBS_IsARM, // LDRSHTi = 880 CEFBS_IsARM, // LDRSHTr = 881 CEFBS_IsARM, // LDRSH_POST = 882 CEFBS_IsARM, // LDRSH_PRE = 883 CEFBS_IsARM, // LDRT_POST_IMM = 884 CEFBS_IsARM, // LDRT_POST_REG = 885 CEFBS_IsARM, // LDR_POST_IMM = 886 CEFBS_IsARM, // LDR_POST_REG = 887 CEFBS_IsARM, // LDR_PRE_IMM = 888 CEFBS_IsARM, // LDR_PRE_REG = 889 CEFBS_IsARM, // LDRcp = 890 CEFBS_IsARM, // LDRi12 = 891 CEFBS_IsARM, // LDRrs = 892 CEFBS_IsARM, // MCR = 893 CEFBS_IsARM_PreV8, // MCR2 = 894 CEFBS_IsARM, // MCRR = 895 CEFBS_IsARM_PreV8, // MCRR2 = 896 CEFBS_IsARM_HasV6, // MLA = 897 CEFBS_IsARM_HasV6T2, // MLS = 898 CEFBS_IsARM, // MOVPCLR = 899 CEFBS_IsARM_HasV6T2, // MOVTi16 = 900 CEFBS_IsARM, // MOVi = 901 CEFBS_IsARM_HasV6T2, // MOVi16 = 902 CEFBS_IsARM, // MOVr = 903 CEFBS_IsARM, // MOVr_TC = 904 CEFBS_IsARM, // MOVsi = 905 CEFBS_IsARM, // MOVsr = 906 CEFBS_IsARM, // MRC = 907 CEFBS_IsARM_PreV8, // MRC2 = 908 CEFBS_IsARM, // MRRC = 909 CEFBS_IsARM_PreV8, // MRRC2 = 910 CEFBS_IsARM, // MRS = 911 CEFBS_IsARM_HasVirtualization, // MRSbanked = 912 CEFBS_IsARM, // MRSsys = 913 CEFBS_IsARM, // MSR = 914 CEFBS_IsARM_HasVirtualization, // MSRbanked = 915 CEFBS_IsARM, // MSRi = 916 CEFBS_IsARM_HasV6, // MUL = 917 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_ASRLi = 918 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_ASRLr = 919 CEFBS_HasMVEInt, // MVE_DLSTP_16 = 920 CEFBS_HasMVEInt, // MVE_DLSTP_32 = 921 CEFBS_HasMVEInt, // MVE_DLSTP_64 = 922 CEFBS_HasMVEInt, // MVE_DLSTP_8 = 923 CEFBS_HasMVEInt, // MVE_LCTP = 924 CEFBS_HasMVEInt, // MVE_LETP = 925 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_LSLLi = 926 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_LSLLr = 927 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_LSRL = 928 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_SQRSHR = 929 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_SQRSHRL = 930 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_SQSHL = 931 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_SQSHLL = 932 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_SRSHR = 933 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_SRSHRL = 934 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_UQRSHL = 935 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_UQRSHLL = 936 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_UQSHL = 937 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_UQSHLL = 938 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_URSHR = 939 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_URSHRL = 940 CEFBS_HasMVEInt, // MVE_VABAVs16 = 941 CEFBS_HasMVEInt, // MVE_VABAVs32 = 942 CEFBS_HasMVEInt, // MVE_VABAVs8 = 943 CEFBS_HasMVEInt, // MVE_VABAVu16 = 944 CEFBS_HasMVEInt, // MVE_VABAVu32 = 945 CEFBS_HasMVEInt, // MVE_VABAVu8 = 946 CEFBS_HasMVEFloat, // MVE_VABDf16 = 947 CEFBS_HasMVEFloat, // MVE_VABDf32 = 948 CEFBS_HasMVEInt, // MVE_VABDs16 = 949 CEFBS_HasMVEInt, // MVE_VABDs32 = 950 CEFBS_HasMVEInt, // MVE_VABDs8 = 951 CEFBS_HasMVEInt, // MVE_VABDu16 = 952 CEFBS_HasMVEInt, // MVE_VABDu32 = 953 CEFBS_HasMVEInt, // MVE_VABDu8 = 954 CEFBS_HasMVEFloat, // MVE_VABSf16 = 955 CEFBS_HasMVEFloat, // MVE_VABSf32 = 956 CEFBS_HasMVEInt, // MVE_VABSs16 = 957 CEFBS_HasMVEInt, // MVE_VABSs32 = 958 CEFBS_HasMVEInt, // MVE_VABSs8 = 959 CEFBS_HasMVEInt, // MVE_VADC = 960 CEFBS_HasMVEInt, // MVE_VADCI = 961 CEFBS_HasMVEInt, // MVE_VADDLVs32acc = 962 CEFBS_HasMVEInt, // MVE_VADDLVs32no_acc = 963 CEFBS_HasMVEInt, // MVE_VADDLVu32acc = 964 CEFBS_HasMVEInt, // MVE_VADDLVu32no_acc = 965 CEFBS_HasMVEInt, // MVE_VADDVs16acc = 966 CEFBS_HasMVEInt, // MVE_VADDVs16no_acc = 967 CEFBS_HasMVEInt, // MVE_VADDVs32acc = 968 CEFBS_HasMVEInt, // MVE_VADDVs32no_acc = 969 CEFBS_HasMVEInt, // MVE_VADDVs8acc = 970 CEFBS_HasMVEInt, // MVE_VADDVs8no_acc = 971 CEFBS_HasMVEInt, // MVE_VADDVu16acc = 972 CEFBS_HasMVEInt, // MVE_VADDVu16no_acc = 973 CEFBS_HasMVEInt, // MVE_VADDVu32acc = 974 CEFBS_HasMVEInt, // MVE_VADDVu32no_acc = 975 CEFBS_HasMVEInt, // MVE_VADDVu8acc = 976 CEFBS_HasMVEInt, // MVE_VADDVu8no_acc = 977 CEFBS_HasMVEFloat, // MVE_VADD_qr_f16 = 978 CEFBS_HasMVEFloat, // MVE_VADD_qr_f32 = 979 CEFBS_HasMVEInt, // MVE_VADD_qr_i16 = 980 CEFBS_HasMVEInt, // MVE_VADD_qr_i32 = 981 CEFBS_HasMVEInt, // MVE_VADD_qr_i8 = 982 CEFBS_HasMVEFloat, // MVE_VADDf16 = 983 CEFBS_HasMVEFloat, // MVE_VADDf32 = 984 CEFBS_HasMVEInt, // MVE_VADDi16 = 985 CEFBS_HasMVEInt, // MVE_VADDi32 = 986 CEFBS_HasMVEInt, // MVE_VADDi8 = 987 CEFBS_HasMVEInt, // MVE_VAND = 988 CEFBS_HasMVEInt, // MVE_VBIC = 989 CEFBS_HasMVEInt, // MVE_VBICimmi16 = 990 CEFBS_HasMVEInt, // MVE_VBICimmi32 = 991 CEFBS_HasMVEInt, // MVE_VBRSR16 = 992 CEFBS_HasMVEInt, // MVE_VBRSR32 = 993 CEFBS_HasMVEInt, // MVE_VBRSR8 = 994 CEFBS_HasMVEFloat, // MVE_VCADDf16 = 995 CEFBS_HasMVEFloat, // MVE_VCADDf32 = 996 CEFBS_HasMVEInt, // MVE_VCADDi16 = 997 CEFBS_HasMVEInt, // MVE_VCADDi32 = 998 CEFBS_HasMVEInt, // MVE_VCADDi8 = 999 CEFBS_HasMVEInt, // MVE_VCLSs16 = 1000 CEFBS_HasMVEInt, // MVE_VCLSs32 = 1001 CEFBS_HasMVEInt, // MVE_VCLSs8 = 1002 CEFBS_HasMVEInt, // MVE_VCLZs16 = 1003 CEFBS_HasMVEInt, // MVE_VCLZs32 = 1004 CEFBS_HasMVEInt, // MVE_VCLZs8 = 1005 CEFBS_HasMVEFloat, // MVE_VCMLAf16 = 1006 CEFBS_HasMVEFloat, // MVE_VCMLAf32 = 1007 CEFBS_HasMVEFloat, // MVE_VCMPf16 = 1008 CEFBS_HasMVEFloat, // MVE_VCMPf16r = 1009 CEFBS_HasMVEFloat, // MVE_VCMPf32 = 1010 CEFBS_HasMVEFloat, // MVE_VCMPf32r = 1011 CEFBS_HasMVEInt, // MVE_VCMPi16 = 1012 CEFBS_HasMVEInt, // MVE_VCMPi16r = 1013 CEFBS_HasMVEInt, // MVE_VCMPi32 = 1014 CEFBS_HasMVEInt, // MVE_VCMPi32r = 1015 CEFBS_HasMVEInt, // MVE_VCMPi8 = 1016 CEFBS_HasMVEInt, // MVE_VCMPi8r = 1017 CEFBS_HasMVEInt, // MVE_VCMPs16 = 1018 CEFBS_HasMVEInt, // MVE_VCMPs16r = 1019 CEFBS_HasMVEInt, // MVE_VCMPs32 = 1020 CEFBS_HasMVEInt, // MVE_VCMPs32r = 1021 CEFBS_HasMVEInt, // MVE_VCMPs8 = 1022 CEFBS_HasMVEInt, // MVE_VCMPs8r = 1023 CEFBS_HasMVEInt, // MVE_VCMPu16 = 1024 CEFBS_HasMVEInt, // MVE_VCMPu16r = 1025 CEFBS_HasMVEInt, // MVE_VCMPu32 = 1026 CEFBS_HasMVEInt, // MVE_VCMPu32r = 1027 CEFBS_HasMVEInt, // MVE_VCMPu8 = 1028 CEFBS_HasMVEInt, // MVE_VCMPu8r = 1029 CEFBS_HasMVEFloat, // MVE_VCMULf16 = 1030 CEFBS_HasMVEFloat, // MVE_VCMULf32 = 1031 CEFBS_HasMVEInt, // MVE_VCTP16 = 1032 CEFBS_HasMVEInt, // MVE_VCTP32 = 1033 CEFBS_HasMVEInt, // MVE_VCTP64 = 1034 CEFBS_HasMVEInt, // MVE_VCTP8 = 1035 CEFBS_HasMVEFloat, // MVE_VCVTf16f32bh = 1036 CEFBS_HasMVEFloat, // MVE_VCVTf16f32th = 1037 CEFBS_HasMVEFloat, // MVE_VCVTf16s16_fix = 1038 CEFBS_HasMVEFloat, // MVE_VCVTf16s16n = 1039 CEFBS_HasMVEFloat, // MVE_VCVTf16u16_fix = 1040 CEFBS_HasMVEFloat, // MVE_VCVTf16u16n = 1041 CEFBS_HasMVEFloat, // MVE_VCVTf32f16bh = 1042 CEFBS_HasMVEFloat, // MVE_VCVTf32f16th = 1043 CEFBS_HasMVEFloat, // MVE_VCVTf32s32_fix = 1044 CEFBS_HasMVEFloat, // MVE_VCVTf32s32n = 1045 CEFBS_HasMVEFloat, // MVE_VCVTf32u32_fix = 1046 CEFBS_HasMVEFloat, // MVE_VCVTf32u32n = 1047 CEFBS_HasMVEFloat, // MVE_VCVTs16f16_fix = 1048 CEFBS_HasMVEFloat, // MVE_VCVTs16f16a = 1049 CEFBS_HasMVEFloat, // MVE_VCVTs16f16m = 1050 CEFBS_HasMVEFloat, // MVE_VCVTs16f16n = 1051 CEFBS_HasMVEFloat, // MVE_VCVTs16f16p = 1052 CEFBS_HasMVEFloat, // MVE_VCVTs16f16z = 1053 CEFBS_HasMVEFloat, // MVE_VCVTs32f32_fix = 1054 CEFBS_HasMVEFloat, // MVE_VCVTs32f32a = 1055 CEFBS_HasMVEFloat, // MVE_VCVTs32f32m = 1056 CEFBS_HasMVEFloat, // MVE_VCVTs32f32n = 1057 CEFBS_HasMVEFloat, // MVE_VCVTs32f32p = 1058 CEFBS_HasMVEFloat, // MVE_VCVTs32f32z = 1059 CEFBS_HasMVEFloat, // MVE_VCVTu16f16_fix = 1060 CEFBS_HasMVEFloat, // MVE_VCVTu16f16a = 1061 CEFBS_HasMVEFloat, // MVE_VCVTu16f16m = 1062 CEFBS_HasMVEFloat, // MVE_VCVTu16f16n = 1063 CEFBS_HasMVEFloat, // MVE_VCVTu16f16p = 1064 CEFBS_HasMVEFloat, // MVE_VCVTu16f16z = 1065 CEFBS_HasMVEFloat, // MVE_VCVTu32f32_fix = 1066 CEFBS_HasMVEFloat, // MVE_VCVTu32f32a = 1067 CEFBS_HasMVEFloat, // MVE_VCVTu32f32m = 1068 CEFBS_HasMVEFloat, // MVE_VCVTu32f32n = 1069 CEFBS_HasMVEFloat, // MVE_VCVTu32f32p = 1070 CEFBS_HasMVEFloat, // MVE_VCVTu32f32z = 1071 CEFBS_HasMVEInt, // MVE_VDDUPu16 = 1072 CEFBS_HasMVEInt, // MVE_VDDUPu32 = 1073 CEFBS_HasMVEInt, // MVE_VDDUPu8 = 1074 CEFBS_HasMVEInt, // MVE_VDUP16 = 1075 CEFBS_HasMVEInt, // MVE_VDUP32 = 1076 CEFBS_HasMVEInt, // MVE_VDUP8 = 1077 CEFBS_HasMVEInt, // MVE_VDWDUPu16 = 1078 CEFBS_HasMVEInt, // MVE_VDWDUPu32 = 1079 CEFBS_HasMVEInt, // MVE_VDWDUPu8 = 1080 CEFBS_HasMVEInt, // MVE_VEOR = 1081 CEFBS_HasMVEFloat, // MVE_VFMA_qr_Sf16 = 1082 CEFBS_HasMVEFloat, // MVE_VFMA_qr_Sf32 = 1083 CEFBS_HasMVEFloat, // MVE_VFMA_qr_f16 = 1084 CEFBS_HasMVEFloat, // MVE_VFMA_qr_f32 = 1085 CEFBS_HasMVEFloat, // MVE_VFMAf16 = 1086 CEFBS_HasMVEFloat, // MVE_VFMAf32 = 1087 CEFBS_HasMVEFloat, // MVE_VFMSf16 = 1088 CEFBS_HasMVEFloat, // MVE_VFMSf32 = 1089 CEFBS_HasMVEInt, // MVE_VHADD_qr_s16 = 1090 CEFBS_HasMVEInt, // MVE_VHADD_qr_s32 = 1091 CEFBS_HasMVEInt, // MVE_VHADD_qr_s8 = 1092 CEFBS_HasMVEInt, // MVE_VHADD_qr_u16 = 1093 CEFBS_HasMVEInt, // MVE_VHADD_qr_u32 = 1094 CEFBS_HasMVEInt, // MVE_VHADD_qr_u8 = 1095 CEFBS_HasMVEInt, // MVE_VHADDs16 = 1096 CEFBS_HasMVEInt, // MVE_VHADDs32 = 1097 CEFBS_HasMVEInt, // MVE_VHADDs8 = 1098 CEFBS_HasMVEInt, // MVE_VHADDu16 = 1099 CEFBS_HasMVEInt, // MVE_VHADDu32 = 1100 CEFBS_HasMVEInt, // MVE_VHADDu8 = 1101 CEFBS_HasMVEInt, // MVE_VHCADDs16 = 1102 CEFBS_HasMVEInt, // MVE_VHCADDs32 = 1103 CEFBS_HasMVEInt, // MVE_VHCADDs8 = 1104 CEFBS_HasMVEInt, // MVE_VHSUB_qr_s16 = 1105 CEFBS_HasMVEInt, // MVE_VHSUB_qr_s32 = 1106 CEFBS_HasMVEInt, // MVE_VHSUB_qr_s8 = 1107 CEFBS_HasMVEInt, // MVE_VHSUB_qr_u16 = 1108 CEFBS_HasMVEInt, // MVE_VHSUB_qr_u32 = 1109 CEFBS_HasMVEInt, // MVE_VHSUB_qr_u8 = 1110 CEFBS_HasMVEInt, // MVE_VHSUBs16 = 1111 CEFBS_HasMVEInt, // MVE_VHSUBs32 = 1112 CEFBS_HasMVEInt, // MVE_VHSUBs8 = 1113 CEFBS_HasMVEInt, // MVE_VHSUBu16 = 1114 CEFBS_HasMVEInt, // MVE_VHSUBu32 = 1115 CEFBS_HasMVEInt, // MVE_VHSUBu8 = 1116 CEFBS_HasMVEInt, // MVE_VIDUPu16 = 1117 CEFBS_HasMVEInt, // MVE_VIDUPu32 = 1118 CEFBS_HasMVEInt, // MVE_VIDUPu8 = 1119 CEFBS_HasMVEInt, // MVE_VIWDUPu16 = 1120 CEFBS_HasMVEInt, // MVE_VIWDUPu32 = 1121 CEFBS_HasMVEInt, // MVE_VIWDUPu8 = 1122 CEFBS_HasMVEInt, // MVE_VLD20_16 = 1123 CEFBS_HasMVEInt, // MVE_VLD20_16_wb = 1124 CEFBS_HasMVEInt, // MVE_VLD20_32 = 1125 CEFBS_HasMVEInt, // MVE_VLD20_32_wb = 1126 CEFBS_HasMVEInt, // MVE_VLD20_8 = 1127 CEFBS_HasMVEInt, // MVE_VLD20_8_wb = 1128 CEFBS_HasMVEInt, // MVE_VLD21_16 = 1129 CEFBS_HasMVEInt, // MVE_VLD21_16_wb = 1130 CEFBS_HasMVEInt, // MVE_VLD21_32 = 1131 CEFBS_HasMVEInt, // MVE_VLD21_32_wb = 1132 CEFBS_HasMVEInt, // MVE_VLD21_8 = 1133 CEFBS_HasMVEInt, // MVE_VLD21_8_wb = 1134 CEFBS_HasMVEInt, // MVE_VLD40_16 = 1135 CEFBS_HasMVEInt, // MVE_VLD40_16_wb = 1136 CEFBS_HasMVEInt, // MVE_VLD40_32 = 1137 CEFBS_HasMVEInt, // MVE_VLD40_32_wb = 1138 CEFBS_HasMVEInt, // MVE_VLD40_8 = 1139 CEFBS_HasMVEInt, // MVE_VLD40_8_wb = 1140 CEFBS_HasMVEInt, // MVE_VLD41_16 = 1141 CEFBS_HasMVEInt, // MVE_VLD41_16_wb = 1142 CEFBS_HasMVEInt, // MVE_VLD41_32 = 1143 CEFBS_HasMVEInt, // MVE_VLD41_32_wb = 1144 CEFBS_HasMVEInt, // MVE_VLD41_8 = 1145 CEFBS_HasMVEInt, // MVE_VLD41_8_wb = 1146 CEFBS_HasMVEInt, // MVE_VLD42_16 = 1147 CEFBS_HasMVEInt, // MVE_VLD42_16_wb = 1148 CEFBS_HasMVEInt, // MVE_VLD42_32 = 1149 CEFBS_HasMVEInt, // MVE_VLD42_32_wb = 1150 CEFBS_HasMVEInt, // MVE_VLD42_8 = 1151 CEFBS_HasMVEInt, // MVE_VLD42_8_wb = 1152 CEFBS_HasMVEInt, // MVE_VLD43_16 = 1153 CEFBS_HasMVEInt, // MVE_VLD43_16_wb = 1154 CEFBS_HasMVEInt, // MVE_VLD43_32 = 1155 CEFBS_HasMVEInt, // MVE_VLD43_32_wb = 1156 CEFBS_HasMVEInt, // MVE_VLD43_8 = 1157 CEFBS_HasMVEInt, // MVE_VLD43_8_wb = 1158 CEFBS_HasMVEInt, // MVE_VLDRBS16 = 1159 CEFBS_HasMVEInt, // MVE_VLDRBS16_post = 1160 CEFBS_HasMVEInt, // MVE_VLDRBS16_pre = 1161 CEFBS_HasMVEInt, // MVE_VLDRBS16_rq = 1162 CEFBS_HasMVEInt, // MVE_VLDRBS32 = 1163 CEFBS_HasMVEInt, // MVE_VLDRBS32_post = 1164 CEFBS_HasMVEInt, // MVE_VLDRBS32_pre = 1165 CEFBS_HasMVEInt, // MVE_VLDRBS32_rq = 1166 CEFBS_HasMVEInt, // MVE_VLDRBU16 = 1167 CEFBS_HasMVEInt, // MVE_VLDRBU16_post = 1168 CEFBS_HasMVEInt, // MVE_VLDRBU16_pre = 1169 CEFBS_HasMVEInt, // MVE_VLDRBU16_rq = 1170 CEFBS_HasMVEInt, // MVE_VLDRBU32 = 1171 CEFBS_HasMVEInt, // MVE_VLDRBU32_post = 1172 CEFBS_HasMVEInt, // MVE_VLDRBU32_pre = 1173 CEFBS_HasMVEInt, // MVE_VLDRBU32_rq = 1174 CEFBS_HasMVEInt, // MVE_VLDRBU8 = 1175 CEFBS_HasMVEInt, // MVE_VLDRBU8_post = 1176 CEFBS_HasMVEInt, // MVE_VLDRBU8_pre = 1177 CEFBS_HasMVEInt, // MVE_VLDRBU8_rq = 1178 CEFBS_HasMVEInt, // MVE_VLDRDU64_qi = 1179 CEFBS_HasMVEInt, // MVE_VLDRDU64_qi_pre = 1180 CEFBS_HasMVEInt, // MVE_VLDRDU64_rq = 1181 CEFBS_HasMVEInt, // MVE_VLDRDU64_rq_u = 1182 CEFBS_HasMVEInt, // MVE_VLDRHS32 = 1183 CEFBS_HasMVEInt, // MVE_VLDRHS32_post = 1184 CEFBS_HasMVEInt, // MVE_VLDRHS32_pre = 1185 CEFBS_HasMVEInt, // MVE_VLDRHS32_rq = 1186 CEFBS_HasMVEInt, // MVE_VLDRHS32_rq_u = 1187 CEFBS_HasMVEInt, // MVE_VLDRHU16 = 1188 CEFBS_HasMVEInt, // MVE_VLDRHU16_post = 1189 CEFBS_HasMVEInt, // MVE_VLDRHU16_pre = 1190 CEFBS_HasMVEInt, // MVE_VLDRHU16_rq = 1191 CEFBS_HasMVEInt, // MVE_VLDRHU16_rq_u = 1192 CEFBS_HasMVEInt, // MVE_VLDRHU32 = 1193 CEFBS_HasMVEInt, // MVE_VLDRHU32_post = 1194 CEFBS_HasMVEInt, // MVE_VLDRHU32_pre = 1195 CEFBS_HasMVEInt, // MVE_VLDRHU32_rq = 1196 CEFBS_HasMVEInt, // MVE_VLDRHU32_rq_u = 1197 CEFBS_HasMVEInt, // MVE_VLDRWU32 = 1198 CEFBS_HasMVEInt, // MVE_VLDRWU32_post = 1199 CEFBS_HasMVEInt, // MVE_VLDRWU32_pre = 1200 CEFBS_HasMVEInt, // MVE_VLDRWU32_qi = 1201 CEFBS_HasMVEInt, // MVE_VLDRWU32_qi_pre = 1202 CEFBS_HasMVEInt, // MVE_VLDRWU32_rq = 1203 CEFBS_HasMVEInt, // MVE_VLDRWU32_rq_u = 1204 CEFBS_HasMVEInt, // MVE_VMAXAVs16 = 1205 CEFBS_HasMVEInt, // MVE_VMAXAVs32 = 1206 CEFBS_HasMVEInt, // MVE_VMAXAVs8 = 1207 CEFBS_HasMVEInt, // MVE_VMAXAs16 = 1208 CEFBS_HasMVEInt, // MVE_VMAXAs32 = 1209 CEFBS_HasMVEInt, // MVE_VMAXAs8 = 1210 CEFBS_HasMVEFloat, // MVE_VMAXNMAVf16 = 1211 CEFBS_HasMVEFloat, // MVE_VMAXNMAVf32 = 1212 CEFBS_HasMVEFloat, // MVE_VMAXNMAf16 = 1213 CEFBS_HasMVEFloat, // MVE_VMAXNMAf32 = 1214 CEFBS_HasMVEFloat, // MVE_VMAXNMVf16 = 1215 CEFBS_HasMVEFloat, // MVE_VMAXNMVf32 = 1216 CEFBS_HasMVEFloat, // MVE_VMAXNMf16 = 1217 CEFBS_HasMVEFloat, // MVE_VMAXNMf32 = 1218 CEFBS_HasMVEInt, // MVE_VMAXVs16 = 1219 CEFBS_HasMVEInt, // MVE_VMAXVs32 = 1220 CEFBS_HasMVEInt, // MVE_VMAXVs8 = 1221 CEFBS_HasMVEInt, // MVE_VMAXVu16 = 1222 CEFBS_HasMVEInt, // MVE_VMAXVu32 = 1223 CEFBS_HasMVEInt, // MVE_VMAXVu8 = 1224 CEFBS_HasMVEInt, // MVE_VMAXs16 = 1225 CEFBS_HasMVEInt, // MVE_VMAXs32 = 1226 CEFBS_HasMVEInt, // MVE_VMAXs8 = 1227 CEFBS_HasMVEInt, // MVE_VMAXu16 = 1228 CEFBS_HasMVEInt, // MVE_VMAXu32 = 1229 CEFBS_HasMVEInt, // MVE_VMAXu8 = 1230 CEFBS_HasMVEInt, // MVE_VMINAVs16 = 1231 CEFBS_HasMVEInt, // MVE_VMINAVs32 = 1232 CEFBS_HasMVEInt, // MVE_VMINAVs8 = 1233 CEFBS_HasMVEInt, // MVE_VMINAs16 = 1234 CEFBS_HasMVEInt, // MVE_VMINAs32 = 1235 CEFBS_HasMVEInt, // MVE_VMINAs8 = 1236 CEFBS_HasMVEFloat, // MVE_VMINNMAVf16 = 1237 CEFBS_HasMVEFloat, // MVE_VMINNMAVf32 = 1238 CEFBS_HasMVEFloat, // MVE_VMINNMAf16 = 1239 CEFBS_HasMVEFloat, // MVE_VMINNMAf32 = 1240 CEFBS_HasMVEFloat, // MVE_VMINNMVf16 = 1241 CEFBS_HasMVEFloat, // MVE_VMINNMVf32 = 1242 CEFBS_HasMVEFloat, // MVE_VMINNMf16 = 1243 CEFBS_HasMVEFloat, // MVE_VMINNMf32 = 1244 CEFBS_HasMVEInt, // MVE_VMINVs16 = 1245 CEFBS_HasMVEInt, // MVE_VMINVs32 = 1246 CEFBS_HasMVEInt, // MVE_VMINVs8 = 1247 CEFBS_HasMVEInt, // MVE_VMINVu16 = 1248 CEFBS_HasMVEInt, // MVE_VMINVu32 = 1249 CEFBS_HasMVEInt, // MVE_VMINVu8 = 1250 CEFBS_HasMVEInt, // MVE_VMINs16 = 1251 CEFBS_HasMVEInt, // MVE_VMINs32 = 1252 CEFBS_HasMVEInt, // MVE_VMINs8 = 1253 CEFBS_HasMVEInt, // MVE_VMINu16 = 1254 CEFBS_HasMVEInt, // MVE_VMINu32 = 1255 CEFBS_HasMVEInt, // MVE_VMINu8 = 1256 CEFBS_HasMVEInt, // MVE_VMLADAVas16 = 1257 CEFBS_HasMVEInt, // MVE_VMLADAVas32 = 1258 CEFBS_HasMVEInt, // MVE_VMLADAVas8 = 1259 CEFBS_HasMVEInt, // MVE_VMLADAVau16 = 1260 CEFBS_HasMVEInt, // MVE_VMLADAVau32 = 1261 CEFBS_HasMVEInt, // MVE_VMLADAVau8 = 1262 CEFBS_HasMVEInt, // MVE_VMLADAVaxs16 = 1263 CEFBS_HasMVEInt, // MVE_VMLADAVaxs32 = 1264 CEFBS_HasMVEInt, // MVE_VMLADAVaxs8 = 1265 CEFBS_HasMVEInt, // MVE_VMLADAVs16 = 1266 CEFBS_HasMVEInt, // MVE_VMLADAVs32 = 1267 CEFBS_HasMVEInt, // MVE_VMLADAVs8 = 1268 CEFBS_HasMVEInt, // MVE_VMLADAVu16 = 1269 CEFBS_HasMVEInt, // MVE_VMLADAVu32 = 1270 CEFBS_HasMVEInt, // MVE_VMLADAVu8 = 1271 CEFBS_HasMVEInt, // MVE_VMLADAVxs16 = 1272 CEFBS_HasMVEInt, // MVE_VMLADAVxs32 = 1273 CEFBS_HasMVEInt, // MVE_VMLADAVxs8 = 1274 CEFBS_HasMVEInt, // MVE_VMLALDAVas16 = 1275 CEFBS_HasMVEInt, // MVE_VMLALDAVas32 = 1276 CEFBS_HasMVEInt, // MVE_VMLALDAVau16 = 1277 CEFBS_HasMVEInt, // MVE_VMLALDAVau32 = 1278 CEFBS_HasMVEInt, // MVE_VMLALDAVaxs16 = 1279 CEFBS_HasMVEInt, // MVE_VMLALDAVaxs32 = 1280 CEFBS_HasMVEInt, // MVE_VMLALDAVs16 = 1281 CEFBS_HasMVEInt, // MVE_VMLALDAVs32 = 1282 CEFBS_HasMVEInt, // MVE_VMLALDAVu16 = 1283 CEFBS_HasMVEInt, // MVE_VMLALDAVu32 = 1284 CEFBS_HasMVEInt, // MVE_VMLALDAVxs16 = 1285 CEFBS_HasMVEInt, // MVE_VMLALDAVxs32 = 1286 CEFBS_HasMVEInt, // MVE_VMLAS_qr_i16 = 1287 CEFBS_HasMVEInt, // MVE_VMLAS_qr_i32 = 1288 CEFBS_HasMVEInt, // MVE_VMLAS_qr_i8 = 1289 CEFBS_HasMVEInt, // MVE_VMLA_qr_i16 = 1290 CEFBS_HasMVEInt, // MVE_VMLA_qr_i32 = 1291 CEFBS_HasMVEInt, // MVE_VMLA_qr_i8 = 1292 CEFBS_HasMVEInt, // MVE_VMLSDAVas16 = 1293 CEFBS_HasMVEInt, // MVE_VMLSDAVas32 = 1294 CEFBS_HasMVEInt, // MVE_VMLSDAVas8 = 1295 CEFBS_HasMVEInt, // MVE_VMLSDAVaxs16 = 1296 CEFBS_HasMVEInt, // MVE_VMLSDAVaxs32 = 1297 CEFBS_HasMVEInt, // MVE_VMLSDAVaxs8 = 1298 CEFBS_HasMVEInt, // MVE_VMLSDAVs16 = 1299 CEFBS_HasMVEInt, // MVE_VMLSDAVs32 = 1300 CEFBS_HasMVEInt, // MVE_VMLSDAVs8 = 1301 CEFBS_HasMVEInt, // MVE_VMLSDAVxs16 = 1302 CEFBS_HasMVEInt, // MVE_VMLSDAVxs32 = 1303 CEFBS_HasMVEInt, // MVE_VMLSDAVxs8 = 1304 CEFBS_HasMVEInt, // MVE_VMLSLDAVas16 = 1305 CEFBS_HasMVEInt, // MVE_VMLSLDAVas32 = 1306 CEFBS_HasMVEInt, // MVE_VMLSLDAVaxs16 = 1307 CEFBS_HasMVEInt, // MVE_VMLSLDAVaxs32 = 1308 CEFBS_HasMVEInt, // MVE_VMLSLDAVs16 = 1309 CEFBS_HasMVEInt, // MVE_VMLSLDAVs32 = 1310 CEFBS_HasMVEInt, // MVE_VMLSLDAVxs16 = 1311 CEFBS_HasMVEInt, // MVE_VMLSLDAVxs32 = 1312 CEFBS_HasMVEInt, // MVE_VMOVLs16bh = 1313 CEFBS_HasMVEInt, // MVE_VMOVLs16th = 1314 CEFBS_HasMVEInt, // MVE_VMOVLs8bh = 1315 CEFBS_HasMVEInt, // MVE_VMOVLs8th = 1316 CEFBS_HasMVEInt, // MVE_VMOVLu16bh = 1317 CEFBS_HasMVEInt, // MVE_VMOVLu16th = 1318 CEFBS_HasMVEInt, // MVE_VMOVLu8bh = 1319 CEFBS_HasMVEInt, // MVE_VMOVLu8th = 1320 CEFBS_HasMVEInt, // MVE_VMOVNi16bh = 1321 CEFBS_HasMVEInt, // MVE_VMOVNi16th = 1322 CEFBS_HasMVEInt, // MVE_VMOVNi32bh = 1323 CEFBS_HasMVEInt, // MVE_VMOVNi32th = 1324 CEFBS_HasFPRegsV8_1M, // MVE_VMOV_from_lane_32 = 1325 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_VMOV_from_lane_s16 = 1326 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_VMOV_from_lane_s8 = 1327 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_VMOV_from_lane_u16 = 1328 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_VMOV_from_lane_u8 = 1329 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_VMOV_q_rr = 1330 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_VMOV_rr_q = 1331 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_VMOV_to_lane_16 = 1332 CEFBS_HasFPRegsV8_1M, // MVE_VMOV_to_lane_32 = 1333 CEFBS_HasV8_1MMainline_HasMVEInt, // MVE_VMOV_to_lane_8 = 1334 CEFBS_HasMVEInt, // MVE_VMOVimmf32 = 1335 CEFBS_HasMVEInt, // MVE_VMOVimmi16 = 1336 CEFBS_HasMVEInt, // MVE_VMOVimmi32 = 1337 CEFBS_HasMVEInt, // MVE_VMOVimmi64 = 1338 CEFBS_HasMVEInt, // MVE_VMOVimmi8 = 1339 CEFBS_HasMVEInt, // MVE_VMULHs16 = 1340 CEFBS_HasMVEInt, // MVE_VMULHs32 = 1341 CEFBS_HasMVEInt, // MVE_VMULHs8 = 1342 CEFBS_HasMVEInt, // MVE_VMULHu16 = 1343 CEFBS_HasMVEInt, // MVE_VMULHu32 = 1344 CEFBS_HasMVEInt, // MVE_VMULHu8 = 1345 CEFBS_HasMVEInt, // MVE_VMULLBp16 = 1346 CEFBS_HasMVEInt, // MVE_VMULLBp8 = 1347 CEFBS_HasMVEInt, // MVE_VMULLBs16 = 1348 CEFBS_HasMVEInt, // MVE_VMULLBs32 = 1349 CEFBS_HasMVEInt, // MVE_VMULLBs8 = 1350 CEFBS_HasMVEInt, // MVE_VMULLBu16 = 1351 CEFBS_HasMVEInt, // MVE_VMULLBu32 = 1352 CEFBS_HasMVEInt, // MVE_VMULLBu8 = 1353 CEFBS_HasMVEInt, // MVE_VMULLTp16 = 1354 CEFBS_HasMVEInt, // MVE_VMULLTp8 = 1355 CEFBS_HasMVEInt, // MVE_VMULLTs16 = 1356 CEFBS_HasMVEInt, // MVE_VMULLTs32 = 1357 CEFBS_HasMVEInt, // MVE_VMULLTs8 = 1358 CEFBS_HasMVEInt, // MVE_VMULLTu16 = 1359 CEFBS_HasMVEInt, // MVE_VMULLTu32 = 1360 CEFBS_HasMVEInt, // MVE_VMULLTu8 = 1361 CEFBS_HasMVEFloat, // MVE_VMUL_qr_f16 = 1362 CEFBS_HasMVEFloat, // MVE_VMUL_qr_f32 = 1363 CEFBS_HasMVEInt, // MVE_VMUL_qr_i16 = 1364 CEFBS_HasMVEInt, // MVE_VMUL_qr_i32 = 1365 CEFBS_HasMVEInt, // MVE_VMUL_qr_i8 = 1366 CEFBS_HasMVEFloat, // MVE_VMULf16 = 1367 CEFBS_HasMVEFloat, // MVE_VMULf32 = 1368 CEFBS_HasMVEInt, // MVE_VMULi16 = 1369 CEFBS_HasMVEInt, // MVE_VMULi32 = 1370 CEFBS_HasMVEInt, // MVE_VMULi8 = 1371 CEFBS_HasMVEInt, // MVE_VMVN = 1372 CEFBS_HasMVEInt, // MVE_VMVNimmi16 = 1373 CEFBS_HasMVEInt, // MVE_VMVNimmi32 = 1374 CEFBS_HasMVEFloat, // MVE_VNEGf16 = 1375 CEFBS_HasMVEFloat, // MVE_VNEGf32 = 1376 CEFBS_HasMVEInt, // MVE_VNEGs16 = 1377 CEFBS_HasMVEInt, // MVE_VNEGs32 = 1378 CEFBS_HasMVEInt, // MVE_VNEGs8 = 1379 CEFBS_HasMVEInt, // MVE_VORN = 1380 CEFBS_HasMVEInt, // MVE_VORR = 1381 CEFBS_HasMVEInt, // MVE_VORRimmi16 = 1382 CEFBS_HasMVEInt, // MVE_VORRimmi32 = 1383 CEFBS_HasMVEInt, // MVE_VPNOT = 1384 CEFBS_HasMVEInt, // MVE_VPSEL = 1385 CEFBS_HasMVEInt, // MVE_VPST = 1386 CEFBS_HasMVEInt, // MVE_VPTv16i8 = 1387 CEFBS_HasMVEInt, // MVE_VPTv16i8r = 1388 CEFBS_HasMVEInt, // MVE_VPTv16s8 = 1389 CEFBS_HasMVEInt, // MVE_VPTv16s8r = 1390 CEFBS_HasMVEInt, // MVE_VPTv16u8 = 1391 CEFBS_HasMVEInt, // MVE_VPTv16u8r = 1392 CEFBS_HasMVEFloat, // MVE_VPTv4f32 = 1393 CEFBS_HasMVEFloat, // MVE_VPTv4f32r = 1394 CEFBS_HasMVEInt, // MVE_VPTv4i32 = 1395 CEFBS_HasMVEInt, // MVE_VPTv4i32r = 1396 CEFBS_HasMVEInt, // MVE_VPTv4s32 = 1397 CEFBS_HasMVEInt, // MVE_VPTv4s32r = 1398 CEFBS_HasMVEInt, // MVE_VPTv4u32 = 1399 CEFBS_HasMVEInt, // MVE_VPTv4u32r = 1400 CEFBS_HasMVEFloat, // MVE_VPTv8f16 = 1401 CEFBS_HasMVEFloat, // MVE_VPTv8f16r = 1402 CEFBS_HasMVEInt, // MVE_VPTv8i16 = 1403 CEFBS_HasMVEInt, // MVE_VPTv8i16r = 1404 CEFBS_HasMVEInt, // MVE_VPTv8s16 = 1405 CEFBS_HasMVEInt, // MVE_VPTv8s16r = 1406 CEFBS_HasMVEInt, // MVE_VPTv8u16 = 1407 CEFBS_HasMVEInt, // MVE_VPTv8u16r = 1408 CEFBS_HasMVEInt, // MVE_VQABSs16 = 1409 CEFBS_HasMVEInt, // MVE_VQABSs32 = 1410 CEFBS_HasMVEInt, // MVE_VQABSs8 = 1411 CEFBS_HasMVEInt, // MVE_VQADD_qr_s16 = 1412 CEFBS_HasMVEInt, // MVE_VQADD_qr_s32 = 1413 CEFBS_HasMVEInt, // MVE_VQADD_qr_s8 = 1414 CEFBS_HasMVEInt, // MVE_VQADD_qr_u16 = 1415 CEFBS_HasMVEInt, // MVE_VQADD_qr_u32 = 1416 CEFBS_HasMVEInt, // MVE_VQADD_qr_u8 = 1417 CEFBS_HasMVEInt, // MVE_VQADDs16 = 1418 CEFBS_HasMVEInt, // MVE_VQADDs32 = 1419 CEFBS_HasMVEInt, // MVE_VQADDs8 = 1420 CEFBS_HasMVEInt, // MVE_VQADDu16 = 1421 CEFBS_HasMVEInt, // MVE_VQADDu32 = 1422 CEFBS_HasMVEInt, // MVE_VQADDu8 = 1423 CEFBS_HasMVEInt, // MVE_VQDMLADHXs16 = 1424 CEFBS_HasMVEInt, // MVE_VQDMLADHXs32 = 1425 CEFBS_HasMVEInt, // MVE_VQDMLADHXs8 = 1426 CEFBS_HasMVEInt, // MVE_VQDMLADHs16 = 1427 CEFBS_HasMVEInt, // MVE_VQDMLADHs32 = 1428 CEFBS_HasMVEInt, // MVE_VQDMLADHs8 = 1429 CEFBS_HasMVEInt, // MVE_VQDMLAH_qrs16 = 1430 CEFBS_HasMVEInt, // MVE_VQDMLAH_qrs32 = 1431 CEFBS_HasMVEInt, // MVE_VQDMLAH_qrs8 = 1432 CEFBS_HasMVEInt, // MVE_VQDMLASH_qrs16 = 1433 CEFBS_HasMVEInt, // MVE_VQDMLASH_qrs32 = 1434 CEFBS_HasMVEInt, // MVE_VQDMLASH_qrs8 = 1435 CEFBS_HasMVEInt, // MVE_VQDMLSDHXs16 = 1436 CEFBS_HasMVEInt, // MVE_VQDMLSDHXs32 = 1437 CEFBS_HasMVEInt, // MVE_VQDMLSDHXs8 = 1438 CEFBS_HasMVEInt, // MVE_VQDMLSDHs16 = 1439 CEFBS_HasMVEInt, // MVE_VQDMLSDHs32 = 1440 CEFBS_HasMVEInt, // MVE_VQDMLSDHs8 = 1441 CEFBS_HasMVEInt, // MVE_VQDMULH_qr_s16 = 1442 CEFBS_HasMVEInt, // MVE_VQDMULH_qr_s32 = 1443 CEFBS_HasMVEInt, // MVE_VQDMULH_qr_s8 = 1444 CEFBS_HasMVEInt, // MVE_VQDMULHi16 = 1445 CEFBS_HasMVEInt, // MVE_VQDMULHi32 = 1446 CEFBS_HasMVEInt, // MVE_VQDMULHi8 = 1447 CEFBS_HasMVEInt, // MVE_VQDMULL_qr_s16bh = 1448 CEFBS_HasMVEInt, // MVE_VQDMULL_qr_s16th = 1449 CEFBS_HasMVEInt, // MVE_VQDMULL_qr_s32bh = 1450 CEFBS_HasMVEInt, // MVE_VQDMULL_qr_s32th = 1451 CEFBS_HasMVEInt, // MVE_VQDMULLs16bh = 1452 CEFBS_HasMVEInt, // MVE_VQDMULLs16th = 1453 CEFBS_HasMVEInt, // MVE_VQDMULLs32bh = 1454 CEFBS_HasMVEInt, // MVE_VQDMULLs32th = 1455 CEFBS_HasMVEInt, // MVE_VQMOVNs16bh = 1456 CEFBS_HasMVEInt, // MVE_VQMOVNs16th = 1457 CEFBS_HasMVEInt, // MVE_VQMOVNs32bh = 1458 CEFBS_HasMVEInt, // MVE_VQMOVNs32th = 1459 CEFBS_HasMVEInt, // MVE_VQMOVNu16bh = 1460 CEFBS_HasMVEInt, // MVE_VQMOVNu16th = 1461 CEFBS_HasMVEInt, // MVE_VQMOVNu32bh = 1462 CEFBS_HasMVEInt, // MVE_VQMOVNu32th = 1463 CEFBS_HasMVEInt, // MVE_VQMOVUNs16bh = 1464 CEFBS_HasMVEInt, // MVE_VQMOVUNs16th = 1465 CEFBS_HasMVEInt, // MVE_VQMOVUNs32bh = 1466 CEFBS_HasMVEInt, // MVE_VQMOVUNs32th = 1467 CEFBS_HasMVEInt, // MVE_VQNEGs16 = 1468 CEFBS_HasMVEInt, // MVE_VQNEGs32 = 1469 CEFBS_HasMVEInt, // MVE_VQNEGs8 = 1470 CEFBS_HasMVEInt, // MVE_VQRDMLADHXs16 = 1471 CEFBS_HasMVEInt, // MVE_VQRDMLADHXs32 = 1472 CEFBS_HasMVEInt, // MVE_VQRDMLADHXs8 = 1473 CEFBS_HasMVEInt, // MVE_VQRDMLADHs16 = 1474 CEFBS_HasMVEInt, // MVE_VQRDMLADHs32 = 1475 CEFBS_HasMVEInt, // MVE_VQRDMLADHs8 = 1476 CEFBS_HasMVEInt, // MVE_VQRDMLAH_qrs16 = 1477 CEFBS_HasMVEInt, // MVE_VQRDMLAH_qrs32 = 1478 CEFBS_HasMVEInt, // MVE_VQRDMLAH_qrs8 = 1479 CEFBS_HasMVEInt, // MVE_VQRDMLASH_qrs16 = 1480 CEFBS_HasMVEInt, // MVE_VQRDMLASH_qrs32 = 1481 CEFBS_HasMVEInt, // MVE_VQRDMLASH_qrs8 = 1482 CEFBS_HasMVEInt, // MVE_VQRDMLSDHXs16 = 1483 CEFBS_HasMVEInt, // MVE_VQRDMLSDHXs32 = 1484 CEFBS_HasMVEInt, // MVE_VQRDMLSDHXs8 = 1485 CEFBS_HasMVEInt, // MVE_VQRDMLSDHs16 = 1486 CEFBS_HasMVEInt, // MVE_VQRDMLSDHs32 = 1487 CEFBS_HasMVEInt, // MVE_VQRDMLSDHs8 = 1488 CEFBS_HasMVEInt, // MVE_VQRDMULH_qr_s16 = 1489 CEFBS_HasMVEInt, // MVE_VQRDMULH_qr_s32 = 1490 CEFBS_HasMVEInt, // MVE_VQRDMULH_qr_s8 = 1491 CEFBS_HasMVEInt, // MVE_VQRDMULHi16 = 1492 CEFBS_HasMVEInt, // MVE_VQRDMULHi32 = 1493 CEFBS_HasMVEInt, // MVE_VQRDMULHi8 = 1494 CEFBS_HasMVEInt, // MVE_VQRSHL_by_vecs16 = 1495 CEFBS_HasMVEInt, // MVE_VQRSHL_by_vecs32 = 1496 CEFBS_HasMVEInt, // MVE_VQRSHL_by_vecs8 = 1497 CEFBS_HasMVEInt, // MVE_VQRSHL_by_vecu16 = 1498 CEFBS_HasMVEInt, // MVE_VQRSHL_by_vecu32 = 1499 CEFBS_HasMVEInt, // MVE_VQRSHL_by_vecu8 = 1500 CEFBS_HasMVEInt, // MVE_VQRSHL_qrs16 = 1501 CEFBS_HasMVEInt, // MVE_VQRSHL_qrs32 = 1502 CEFBS_HasMVEInt, // MVE_VQRSHL_qrs8 = 1503 CEFBS_HasMVEInt, // MVE_VQRSHL_qru16 = 1504 CEFBS_HasMVEInt, // MVE_VQRSHL_qru32 = 1505 CEFBS_HasMVEInt, // MVE_VQRSHL_qru8 = 1506 CEFBS_HasMVEInt, // MVE_VQRSHRNbhs16 = 1507 CEFBS_HasMVEInt, // MVE_VQRSHRNbhs32 = 1508 CEFBS_HasMVEInt, // MVE_VQRSHRNbhu16 = 1509 CEFBS_HasMVEInt, // MVE_VQRSHRNbhu32 = 1510 CEFBS_HasMVEInt, // MVE_VQRSHRNths16 = 1511 CEFBS_HasMVEInt, // MVE_VQRSHRNths32 = 1512 CEFBS_HasMVEInt, // MVE_VQRSHRNthu16 = 1513 CEFBS_HasMVEInt, // MVE_VQRSHRNthu32 = 1514 CEFBS_HasMVEInt, // MVE_VQRSHRUNs16bh = 1515 CEFBS_HasMVEInt, // MVE_VQRSHRUNs16th = 1516 CEFBS_HasMVEInt, // MVE_VQRSHRUNs32bh = 1517 CEFBS_HasMVEInt, // MVE_VQRSHRUNs32th = 1518 CEFBS_HasMVEInt, // MVE_VQSHLU_imms16 = 1519 CEFBS_HasMVEInt, // MVE_VQSHLU_imms32 = 1520 CEFBS_HasMVEInt, // MVE_VQSHLU_imms8 = 1521 CEFBS_HasMVEInt, // MVE_VQSHL_by_vecs16 = 1522 CEFBS_HasMVEInt, // MVE_VQSHL_by_vecs32 = 1523 CEFBS_HasMVEInt, // MVE_VQSHL_by_vecs8 = 1524 CEFBS_HasMVEInt, // MVE_VQSHL_by_vecu16 = 1525 CEFBS_HasMVEInt, // MVE_VQSHL_by_vecu32 = 1526 CEFBS_HasMVEInt, // MVE_VQSHL_by_vecu8 = 1527 CEFBS_HasMVEInt, // MVE_VQSHL_qrs16 = 1528 CEFBS_HasMVEInt, // MVE_VQSHL_qrs32 = 1529 CEFBS_HasMVEInt, // MVE_VQSHL_qrs8 = 1530 CEFBS_HasMVEInt, // MVE_VQSHL_qru16 = 1531 CEFBS_HasMVEInt, // MVE_VQSHL_qru32 = 1532 CEFBS_HasMVEInt, // MVE_VQSHL_qru8 = 1533 CEFBS_HasMVEInt, // MVE_VQSHLimms16 = 1534 CEFBS_HasMVEInt, // MVE_VQSHLimms32 = 1535 CEFBS_HasMVEInt, // MVE_VQSHLimms8 = 1536 CEFBS_HasMVEInt, // MVE_VQSHLimmu16 = 1537 CEFBS_HasMVEInt, // MVE_VQSHLimmu32 = 1538 CEFBS_HasMVEInt, // MVE_VQSHLimmu8 = 1539 CEFBS_HasMVEInt, // MVE_VQSHRNbhs16 = 1540 CEFBS_HasMVEInt, // MVE_VQSHRNbhs32 = 1541 CEFBS_HasMVEInt, // MVE_VQSHRNbhu16 = 1542 CEFBS_HasMVEInt, // MVE_VQSHRNbhu32 = 1543 CEFBS_HasMVEInt, // MVE_VQSHRNths16 = 1544 CEFBS_HasMVEInt, // MVE_VQSHRNths32 = 1545 CEFBS_HasMVEInt, // MVE_VQSHRNthu16 = 1546 CEFBS_HasMVEInt, // MVE_VQSHRNthu32 = 1547 CEFBS_HasMVEInt, // MVE_VQSHRUNs16bh = 1548 CEFBS_HasMVEInt, // MVE_VQSHRUNs16th = 1549 CEFBS_HasMVEInt, // MVE_VQSHRUNs32bh = 1550 CEFBS_HasMVEInt, // MVE_VQSHRUNs32th = 1551 CEFBS_HasMVEInt, // MVE_VQSUB_qr_s16 = 1552 CEFBS_HasMVEInt, // MVE_VQSUB_qr_s32 = 1553 CEFBS_HasMVEInt, // MVE_VQSUB_qr_s8 = 1554 CEFBS_HasMVEInt, // MVE_VQSUB_qr_u16 = 1555 CEFBS_HasMVEInt, // MVE_VQSUB_qr_u32 = 1556 CEFBS_HasMVEInt, // MVE_VQSUB_qr_u8 = 1557 CEFBS_HasMVEInt, // MVE_VQSUBs16 = 1558 CEFBS_HasMVEInt, // MVE_VQSUBs32 = 1559 CEFBS_HasMVEInt, // MVE_VQSUBs8 = 1560 CEFBS_HasMVEInt, // MVE_VQSUBu16 = 1561 CEFBS_HasMVEInt, // MVE_VQSUBu32 = 1562 CEFBS_HasMVEInt, // MVE_VQSUBu8 = 1563 CEFBS_HasMVEInt, // MVE_VREV16_8 = 1564 CEFBS_HasMVEInt, // MVE_VREV32_16 = 1565 CEFBS_HasMVEInt, // MVE_VREV32_8 = 1566 CEFBS_HasMVEInt, // MVE_VREV64_16 = 1567 CEFBS_HasMVEInt, // MVE_VREV64_32 = 1568 CEFBS_HasMVEInt, // MVE_VREV64_8 = 1569 CEFBS_HasMVEInt, // MVE_VRHADDs16 = 1570 CEFBS_HasMVEInt, // MVE_VRHADDs32 = 1571 CEFBS_HasMVEInt, // MVE_VRHADDs8 = 1572 CEFBS_HasMVEInt, // MVE_VRHADDu16 = 1573 CEFBS_HasMVEInt, // MVE_VRHADDu32 = 1574 CEFBS_HasMVEInt, // MVE_VRHADDu8 = 1575 CEFBS_HasMVEFloat, // MVE_VRINTf16A = 1576 CEFBS_HasMVEFloat, // MVE_VRINTf16M = 1577 CEFBS_HasMVEFloat, // MVE_VRINTf16N = 1578 CEFBS_HasMVEFloat, // MVE_VRINTf16P = 1579 CEFBS_HasMVEFloat, // MVE_VRINTf16X = 1580 CEFBS_HasMVEFloat, // MVE_VRINTf16Z = 1581 CEFBS_HasMVEFloat, // MVE_VRINTf32A = 1582 CEFBS_HasMVEFloat, // MVE_VRINTf32M = 1583 CEFBS_HasMVEFloat, // MVE_VRINTf32N = 1584 CEFBS_HasMVEFloat, // MVE_VRINTf32P = 1585 CEFBS_HasMVEFloat, // MVE_VRINTf32X = 1586 CEFBS_HasMVEFloat, // MVE_VRINTf32Z = 1587 CEFBS_HasMVEInt, // MVE_VRMLALDAVHas32 = 1588 CEFBS_HasMVEInt, // MVE_VRMLALDAVHau32 = 1589 CEFBS_HasMVEInt, // MVE_VRMLALDAVHaxs32 = 1590 CEFBS_HasMVEInt, // MVE_VRMLALDAVHs32 = 1591 CEFBS_HasMVEInt, // MVE_VRMLALDAVHu32 = 1592 CEFBS_HasMVEInt, // MVE_VRMLALDAVHxs32 = 1593 CEFBS_HasMVEInt, // MVE_VRMLSLDAVHas32 = 1594 CEFBS_HasMVEInt, // MVE_VRMLSLDAVHaxs32 = 1595 CEFBS_HasMVEInt, // MVE_VRMLSLDAVHs32 = 1596 CEFBS_HasMVEInt, // MVE_VRMLSLDAVHxs32 = 1597 CEFBS_HasMVEInt, // MVE_VRMULHs16 = 1598 CEFBS_HasMVEInt, // MVE_VRMULHs32 = 1599 CEFBS_HasMVEInt, // MVE_VRMULHs8 = 1600 CEFBS_HasMVEInt, // MVE_VRMULHu16 = 1601 CEFBS_HasMVEInt, // MVE_VRMULHu32 = 1602 CEFBS_HasMVEInt, // MVE_VRMULHu8 = 1603 CEFBS_HasMVEInt, // MVE_VRSHL_by_vecs16 = 1604 CEFBS_HasMVEInt, // MVE_VRSHL_by_vecs32 = 1605 CEFBS_HasMVEInt, // MVE_VRSHL_by_vecs8 = 1606 CEFBS_HasMVEInt, // MVE_VRSHL_by_vecu16 = 1607 CEFBS_HasMVEInt, // MVE_VRSHL_by_vecu32 = 1608 CEFBS_HasMVEInt, // MVE_VRSHL_by_vecu8 = 1609 CEFBS_HasMVEInt, // MVE_VRSHL_qrs16 = 1610 CEFBS_HasMVEInt, // MVE_VRSHL_qrs32 = 1611 CEFBS_HasMVEInt, // MVE_VRSHL_qrs8 = 1612 CEFBS_HasMVEInt, // MVE_VRSHL_qru16 = 1613 CEFBS_HasMVEInt, // MVE_VRSHL_qru32 = 1614 CEFBS_HasMVEInt, // MVE_VRSHL_qru8 = 1615 CEFBS_HasMVEInt, // MVE_VRSHRNi16bh = 1616 CEFBS_HasMVEInt, // MVE_VRSHRNi16th = 1617 CEFBS_HasMVEInt, // MVE_VRSHRNi32bh = 1618 CEFBS_HasMVEInt, // MVE_VRSHRNi32th = 1619 CEFBS_HasMVEInt, // MVE_VRSHR_imms16 = 1620 CEFBS_HasMVEInt, // MVE_VRSHR_imms32 = 1621 CEFBS_HasMVEInt, // MVE_VRSHR_imms8 = 1622 CEFBS_HasMVEInt, // MVE_VRSHR_immu16 = 1623 CEFBS_HasMVEInt, // MVE_VRSHR_immu32 = 1624 CEFBS_HasMVEInt, // MVE_VRSHR_immu8 = 1625 CEFBS_HasMVEInt, // MVE_VSBC = 1626 CEFBS_HasMVEInt, // MVE_VSBCI = 1627 CEFBS_HasMVEInt, // MVE_VSHLC = 1628 CEFBS_HasMVEInt, // MVE_VSHLL_imms16bh = 1629 CEFBS_HasMVEInt, // MVE_VSHLL_imms16th = 1630 CEFBS_HasMVEInt, // MVE_VSHLL_imms8bh = 1631 CEFBS_HasMVEInt, // MVE_VSHLL_imms8th = 1632 CEFBS_HasMVEInt, // MVE_VSHLL_immu16bh = 1633 CEFBS_HasMVEInt, // MVE_VSHLL_immu16th = 1634 CEFBS_HasMVEInt, // MVE_VSHLL_immu8bh = 1635 CEFBS_HasMVEInt, // MVE_VSHLL_immu8th = 1636 CEFBS_HasMVEInt, // MVE_VSHLL_lws16bh = 1637 CEFBS_HasMVEInt, // MVE_VSHLL_lws16th = 1638 CEFBS_HasMVEInt, // MVE_VSHLL_lws8bh = 1639 CEFBS_HasMVEInt, // MVE_VSHLL_lws8th = 1640 CEFBS_HasMVEInt, // MVE_VSHLL_lwu16bh = 1641 CEFBS_HasMVEInt, // MVE_VSHLL_lwu16th = 1642 CEFBS_HasMVEInt, // MVE_VSHLL_lwu8bh = 1643 CEFBS_HasMVEInt, // MVE_VSHLL_lwu8th = 1644 CEFBS_HasMVEInt, // MVE_VSHL_by_vecs16 = 1645 CEFBS_HasMVEInt, // MVE_VSHL_by_vecs32 = 1646 CEFBS_HasMVEInt, // MVE_VSHL_by_vecs8 = 1647 CEFBS_HasMVEInt, // MVE_VSHL_by_vecu16 = 1648 CEFBS_HasMVEInt, // MVE_VSHL_by_vecu32 = 1649 CEFBS_HasMVEInt, // MVE_VSHL_by_vecu8 = 1650 CEFBS_HasMVEInt, // MVE_VSHL_immi16 = 1651 CEFBS_HasMVEInt, // MVE_VSHL_immi32 = 1652 CEFBS_HasMVEInt, // MVE_VSHL_immi8 = 1653 CEFBS_HasMVEInt, // MVE_VSHL_qrs16 = 1654 CEFBS_HasMVEInt, // MVE_VSHL_qrs32 = 1655 CEFBS_HasMVEInt, // MVE_VSHL_qrs8 = 1656 CEFBS_HasMVEInt, // MVE_VSHL_qru16 = 1657 CEFBS_HasMVEInt, // MVE_VSHL_qru32 = 1658 CEFBS_HasMVEInt, // MVE_VSHL_qru8 = 1659 CEFBS_HasMVEInt, // MVE_VSHRNi16bh = 1660 CEFBS_HasMVEInt, // MVE_VSHRNi16th = 1661 CEFBS_HasMVEInt, // MVE_VSHRNi32bh = 1662 CEFBS_HasMVEInt, // MVE_VSHRNi32th = 1663 CEFBS_HasMVEInt, // MVE_VSHR_imms16 = 1664 CEFBS_HasMVEInt, // MVE_VSHR_imms32 = 1665 CEFBS_HasMVEInt, // MVE_VSHR_imms8 = 1666 CEFBS_HasMVEInt, // MVE_VSHR_immu16 = 1667 CEFBS_HasMVEInt, // MVE_VSHR_immu32 = 1668 CEFBS_HasMVEInt, // MVE_VSHR_immu8 = 1669 CEFBS_HasMVEInt, // MVE_VSLIimm16 = 1670 CEFBS_HasMVEInt, // MVE_VSLIimm32 = 1671 CEFBS_HasMVEInt, // MVE_VSLIimm8 = 1672 CEFBS_HasMVEInt, // MVE_VSRIimm16 = 1673 CEFBS_HasMVEInt, // MVE_VSRIimm32 = 1674 CEFBS_HasMVEInt, // MVE_VSRIimm8 = 1675 CEFBS_HasMVEInt, // MVE_VST20_16 = 1676 CEFBS_HasMVEInt, // MVE_VST20_16_wb = 1677 CEFBS_HasMVEInt, // MVE_VST20_32 = 1678 CEFBS_HasMVEInt, // MVE_VST20_32_wb = 1679 CEFBS_HasMVEInt, // MVE_VST20_8 = 1680 CEFBS_HasMVEInt, // MVE_VST20_8_wb = 1681 CEFBS_HasMVEInt, // MVE_VST21_16 = 1682 CEFBS_HasMVEInt, // MVE_VST21_16_wb = 1683 CEFBS_HasMVEInt, // MVE_VST21_32 = 1684 CEFBS_HasMVEInt, // MVE_VST21_32_wb = 1685 CEFBS_HasMVEInt, // MVE_VST21_8 = 1686 CEFBS_HasMVEInt, // MVE_VST21_8_wb = 1687 CEFBS_HasMVEInt, // MVE_VST40_16 = 1688 CEFBS_HasMVEInt, // MVE_VST40_16_wb = 1689 CEFBS_HasMVEInt, // MVE_VST40_32 = 1690 CEFBS_HasMVEInt, // MVE_VST40_32_wb = 1691 CEFBS_HasMVEInt, // MVE_VST40_8 = 1692 CEFBS_HasMVEInt, // MVE_VST40_8_wb = 1693 CEFBS_HasMVEInt, // MVE_VST41_16 = 1694 CEFBS_HasMVEInt, // MVE_VST41_16_wb = 1695 CEFBS_HasMVEInt, // MVE_VST41_32 = 1696 CEFBS_HasMVEInt, // MVE_VST41_32_wb = 1697 CEFBS_HasMVEInt, // MVE_VST41_8 = 1698 CEFBS_HasMVEInt, // MVE_VST41_8_wb = 1699 CEFBS_HasMVEInt, // MVE_VST42_16 = 1700 CEFBS_HasMVEInt, // MVE_VST42_16_wb = 1701 CEFBS_HasMVEInt, // MVE_VST42_32 = 1702 CEFBS_HasMVEInt, // MVE_VST42_32_wb = 1703 CEFBS_HasMVEInt, // MVE_VST42_8 = 1704 CEFBS_HasMVEInt, // MVE_VST42_8_wb = 1705 CEFBS_HasMVEInt, // MVE_VST43_16 = 1706 CEFBS_HasMVEInt, // MVE_VST43_16_wb = 1707 CEFBS_HasMVEInt, // MVE_VST43_32 = 1708 CEFBS_HasMVEInt, // MVE_VST43_32_wb = 1709 CEFBS_HasMVEInt, // MVE_VST43_8 = 1710 CEFBS_HasMVEInt, // MVE_VST43_8_wb = 1711 CEFBS_HasMVEInt, // MVE_VSTRB16 = 1712 CEFBS_HasMVEInt, // MVE_VSTRB16_post = 1713 CEFBS_HasMVEInt, // MVE_VSTRB16_pre = 1714 CEFBS_HasMVEInt, // MVE_VSTRB16_rq = 1715 CEFBS_HasMVEInt, // MVE_VSTRB32 = 1716 CEFBS_HasMVEInt, // MVE_VSTRB32_post = 1717 CEFBS_HasMVEInt, // MVE_VSTRB32_pre = 1718 CEFBS_HasMVEInt, // MVE_VSTRB32_rq = 1719 CEFBS_HasMVEInt, // MVE_VSTRB8_rq = 1720 CEFBS_HasMVEInt, // MVE_VSTRBU8 = 1721 CEFBS_HasMVEInt, // MVE_VSTRBU8_post = 1722 CEFBS_HasMVEInt, // MVE_VSTRBU8_pre = 1723 CEFBS_HasMVEInt, // MVE_VSTRD64_qi = 1724 CEFBS_HasMVEInt, // MVE_VSTRD64_qi_pre = 1725 CEFBS_HasMVEInt, // MVE_VSTRD64_rq = 1726 CEFBS_HasMVEInt, // MVE_VSTRD64_rq_u = 1727 CEFBS_HasMVEInt, // MVE_VSTRH16_rq = 1728 CEFBS_HasMVEInt, // MVE_VSTRH16_rq_u = 1729 CEFBS_HasMVEInt, // MVE_VSTRH32 = 1730 CEFBS_HasMVEInt, // MVE_VSTRH32_post = 1731 CEFBS_HasMVEInt, // MVE_VSTRH32_pre = 1732 CEFBS_HasMVEInt, // MVE_VSTRH32_rq = 1733 CEFBS_HasMVEInt, // MVE_VSTRH32_rq_u = 1734 CEFBS_HasMVEInt, // MVE_VSTRHU16 = 1735 CEFBS_HasMVEInt, // MVE_VSTRHU16_post = 1736 CEFBS_HasMVEInt, // MVE_VSTRHU16_pre = 1737 CEFBS_HasMVEInt, // MVE_VSTRW32_qi = 1738 CEFBS_HasMVEInt, // MVE_VSTRW32_qi_pre = 1739 CEFBS_HasMVEInt, // MVE_VSTRW32_rq = 1740 CEFBS_HasMVEInt, // MVE_VSTRW32_rq_u = 1741 CEFBS_HasMVEInt, // MVE_VSTRWU32 = 1742 CEFBS_HasMVEInt, // MVE_VSTRWU32_post = 1743 CEFBS_HasMVEInt, // MVE_VSTRWU32_pre = 1744 CEFBS_HasMVEFloat, // MVE_VSUB_qr_f16 = 1745 CEFBS_HasMVEFloat, // MVE_VSUB_qr_f32 = 1746 CEFBS_HasMVEInt, // MVE_VSUB_qr_i16 = 1747 CEFBS_HasMVEInt, // MVE_VSUB_qr_i32 = 1748 CEFBS_HasMVEInt, // MVE_VSUB_qr_i8 = 1749 CEFBS_HasMVEFloat, // MVE_VSUBf16 = 1750 CEFBS_HasMVEFloat, // MVE_VSUBf32 = 1751 CEFBS_HasMVEInt, // MVE_VSUBi16 = 1752 CEFBS_HasMVEInt, // MVE_VSUBi32 = 1753 CEFBS_HasMVEInt, // MVE_VSUBi8 = 1754 CEFBS_HasMVEInt, // MVE_WLSTP_16 = 1755 CEFBS_HasMVEInt, // MVE_WLSTP_32 = 1756 CEFBS_HasMVEInt, // MVE_WLSTP_64 = 1757 CEFBS_HasMVEInt, // MVE_WLSTP_8 = 1758 CEFBS_IsARM, // MVNi = 1759 CEFBS_IsARM, // MVNr = 1760 CEFBS_IsARM, // MVNsi = 1761 CEFBS_IsARM, // MVNsr = 1762 CEFBS_HasV8_HasNEON, // NEON_VMAXNMNDf = 1763 CEFBS_HasV8_HasNEON_HasFullFP16, // NEON_VMAXNMNDh = 1764 CEFBS_HasV8_HasNEON, // NEON_VMAXNMNQf = 1765 CEFBS_HasV8_HasNEON_HasFullFP16, // NEON_VMAXNMNQh = 1766 CEFBS_HasV8_HasNEON, // NEON_VMINNMNDf = 1767 CEFBS_HasV8_HasNEON_HasFullFP16, // NEON_VMINNMNDh = 1768 CEFBS_HasV8_HasNEON, // NEON_VMINNMNQf = 1769 CEFBS_HasV8_HasNEON_HasFullFP16, // NEON_VMINNMNQh = 1770 CEFBS_IsARM, // ORRri = 1771 CEFBS_IsARM, // ORRrr = 1772 CEFBS_IsARM, // ORRrsi = 1773 CEFBS_IsARM, // ORRrsr = 1774 CEFBS_IsARM_HasV6, // PKHBT = 1775 CEFBS_IsARM_HasV6, // PKHTB = 1776 CEFBS_IsARM_HasV7_HasMP, // PLDWi12 = 1777 CEFBS_IsARM_HasV7_HasMP, // PLDWrs = 1778 CEFBS_IsARM, // PLDi12 = 1779 CEFBS_IsARM, // PLDrs = 1780 CEFBS_IsARM_HasV7, // PLIi12 = 1781 CEFBS_IsARM_HasV7, // PLIrs = 1782 CEFBS_IsARM, // QADD = 1783 CEFBS_IsARM, // QADD16 = 1784 CEFBS_IsARM, // QADD8 = 1785 CEFBS_IsARM, // QASX = 1786 CEFBS_IsARM, // QDADD = 1787 CEFBS_IsARM, // QDSUB = 1788 CEFBS_IsARM, // QSAX = 1789 CEFBS_IsARM, // QSUB = 1790 CEFBS_IsARM, // QSUB16 = 1791 CEFBS_IsARM, // QSUB8 = 1792 CEFBS_IsARM_HasV6T2, // RBIT = 1793 CEFBS_IsARM_HasV6, // REV = 1794 CEFBS_IsARM_HasV6, // REV16 = 1795 CEFBS_IsARM_HasV6, // REVSH = 1796 CEFBS_IsARM, // RFEDA = 1797 CEFBS_IsARM, // RFEDA_UPD = 1798 CEFBS_IsARM, // RFEDB = 1799 CEFBS_IsARM, // RFEDB_UPD = 1800 CEFBS_IsARM, // RFEIA = 1801 CEFBS_IsARM, // RFEIA_UPD = 1802 CEFBS_IsARM, // RFEIB = 1803 CEFBS_IsARM, // RFEIB_UPD = 1804 CEFBS_IsARM, // RSBri = 1805 CEFBS_IsARM, // RSBrr = 1806 CEFBS_IsARM, // RSBrsi = 1807 CEFBS_IsARM, // RSBrsr = 1808 CEFBS_IsARM, // RSCri = 1809 CEFBS_IsARM, // RSCrr = 1810 CEFBS_IsARM, // RSCrsi = 1811 CEFBS_IsARM, // RSCrsr = 1812 CEFBS_IsARM, // SADD16 = 1813 CEFBS_IsARM, // SADD8 = 1814 CEFBS_IsARM, // SASX = 1815 CEFBS_IsARM_HasSB, // SB = 1816 CEFBS_IsARM, // SBCri = 1817 CEFBS_IsARM, // SBCrr = 1818 CEFBS_IsARM, // SBCrsi = 1819 CEFBS_IsARM, // SBCrsr = 1820 CEFBS_IsARM_HasV6T2, // SBFX = 1821 CEFBS_IsARM_HasDivideInARM, // SDIV = 1822 CEFBS_IsARM_HasV6, // SEL = 1823 CEFBS_IsARM, // SETEND = 1824 CEFBS_IsARM_HasV8_HasV8_1a, // SETPAN = 1825 CEFBS_HasV8_HasSHA2, // SHA1C = 1826 CEFBS_HasV8_HasSHA2, // SHA1H = 1827 CEFBS_HasV8_HasSHA2, // SHA1M = 1828 CEFBS_HasV8_HasSHA2, // SHA1P = 1829 CEFBS_HasV8_HasSHA2, // SHA1SU0 = 1830 CEFBS_HasV8_HasSHA2, // SHA1SU1 = 1831 CEFBS_HasV8_HasSHA2, // SHA256H = 1832 CEFBS_HasV8_HasSHA2, // SHA256H2 = 1833 CEFBS_HasV8_HasSHA2, // SHA256SU0 = 1834 CEFBS_HasV8_HasSHA2, // SHA256SU1 = 1835 CEFBS_IsARM, // SHADD16 = 1836 CEFBS_IsARM, // SHADD8 = 1837 CEFBS_IsARM, // SHASX = 1838 CEFBS_IsARM, // SHSAX = 1839 CEFBS_IsARM, // SHSUB16 = 1840 CEFBS_IsARM, // SHSUB8 = 1841 CEFBS_IsARM_HasTrustZone, // SMC = 1842 CEFBS_IsARM_HasV5TE, // SMLABB = 1843 CEFBS_IsARM_HasV5TE, // SMLABT = 1844 CEFBS_IsARM_HasV6, // SMLAD = 1845 CEFBS_IsARM_HasV6, // SMLADX = 1846 CEFBS_IsARM_HasV6, // SMLAL = 1847 CEFBS_IsARM_HasV5TE, // SMLALBB = 1848 CEFBS_IsARM_HasV5TE, // SMLALBT = 1849 CEFBS_IsARM_HasV6, // SMLALD = 1850 CEFBS_IsARM_HasV6, // SMLALDX = 1851 CEFBS_IsARM_HasV5TE, // SMLALTB = 1852 CEFBS_IsARM_HasV5TE, // SMLALTT = 1853 CEFBS_IsARM_HasV5TE, // SMLATB = 1854 CEFBS_IsARM_HasV5TE, // SMLATT = 1855 CEFBS_IsARM_HasV5TE, // SMLAWB = 1856 CEFBS_IsARM_HasV5TE, // SMLAWT = 1857 CEFBS_IsARM_HasV6, // SMLSD = 1858 CEFBS_IsARM_HasV6, // SMLSDX = 1859 CEFBS_IsARM_HasV6, // SMLSLD = 1860 CEFBS_IsARM_HasV6, // SMLSLDX = 1861 CEFBS_IsARM_HasV6, // SMMLA = 1862 CEFBS_IsARM_HasV6, // SMMLAR = 1863 CEFBS_IsARM_HasV6, // SMMLS = 1864 CEFBS_IsARM_HasV6, // SMMLSR = 1865 CEFBS_IsARM_HasV6, // SMMUL = 1866 CEFBS_IsARM_HasV6, // SMMULR = 1867 CEFBS_IsARM_HasV6, // SMUAD = 1868 CEFBS_IsARM_HasV6, // SMUADX = 1869 CEFBS_IsARM_HasV5TE, // SMULBB = 1870 CEFBS_IsARM_HasV5TE, // SMULBT = 1871 CEFBS_IsARM_HasV6, // SMULL = 1872 CEFBS_IsARM_HasV5TE, // SMULTB = 1873 CEFBS_IsARM_HasV5TE, // SMULTT = 1874 CEFBS_IsARM_HasV5TE, // SMULWB = 1875 CEFBS_IsARM_HasV5TE, // SMULWT = 1876 CEFBS_IsARM_HasV6, // SMUSD = 1877 CEFBS_IsARM_HasV6, // SMUSDX = 1878 CEFBS_IsARM, // SRSDA = 1879 CEFBS_IsARM, // SRSDA_UPD = 1880 CEFBS_IsARM, // SRSDB = 1881 CEFBS_IsARM, // SRSDB_UPD = 1882 CEFBS_IsARM, // SRSIA = 1883 CEFBS_IsARM, // SRSIA_UPD = 1884 CEFBS_IsARM, // SRSIB = 1885 CEFBS_IsARM, // SRSIB_UPD = 1886 CEFBS_IsARM_HasV6, // SSAT = 1887 CEFBS_IsARM_HasV6, // SSAT16 = 1888 CEFBS_IsARM, // SSAX = 1889 CEFBS_IsARM, // SSUB16 = 1890 CEFBS_IsARM, // SSUB8 = 1891 CEFBS_IsARM_PreV8, // STC2L_OFFSET = 1892 CEFBS_IsARM_PreV8, // STC2L_OPTION = 1893 CEFBS_IsARM_PreV8, // STC2L_POST = 1894 CEFBS_IsARM_PreV8, // STC2L_PRE = 1895 CEFBS_IsARM_PreV8, // STC2_OFFSET = 1896 CEFBS_IsARM_PreV8, // STC2_OPTION = 1897 CEFBS_IsARM_PreV8, // STC2_POST = 1898 CEFBS_IsARM_PreV8, // STC2_PRE = 1899 CEFBS_IsARM, // STCL_OFFSET = 1900 CEFBS_IsARM, // STCL_OPTION = 1901 CEFBS_IsARM, // STCL_POST = 1902 CEFBS_IsARM, // STCL_PRE = 1903 CEFBS_IsARM, // STC_OFFSET = 1904 CEFBS_IsARM, // STC_OPTION = 1905 CEFBS_IsARM, // STC_POST = 1906 CEFBS_IsARM, // STC_PRE = 1907 CEFBS_IsARM_HasAcquireRelease, // STL = 1908 CEFBS_IsARM_HasAcquireRelease, // STLB = 1909 CEFBS_IsARM_HasAcquireRelease_HasV7Clrex, // STLEX = 1910 CEFBS_IsARM_HasAcquireRelease_HasV7Clrex, // STLEXB = 1911 CEFBS_IsARM_HasAcquireRelease_HasV7Clrex, // STLEXD = 1912 CEFBS_IsARM_HasAcquireRelease_HasV7Clrex, // STLEXH = 1913 CEFBS_IsARM_HasAcquireRelease, // STLH = 1914 CEFBS_IsARM, // STMDA = 1915 CEFBS_IsARM, // STMDA_UPD = 1916 CEFBS_IsARM, // STMDB = 1917 CEFBS_IsARM, // STMDB_UPD = 1918 CEFBS_IsARM, // STMIA = 1919 CEFBS_IsARM, // STMIA_UPD = 1920 CEFBS_IsARM, // STMIB = 1921 CEFBS_IsARM, // STMIB_UPD = 1922 CEFBS_IsARM, // STRBT_POST_IMM = 1923 CEFBS_IsARM, // STRBT_POST_REG = 1924 CEFBS_IsARM, // STRB_POST_IMM = 1925 CEFBS_IsARM, // STRB_POST_REG = 1926 CEFBS_IsARM, // STRB_PRE_IMM = 1927 CEFBS_IsARM, // STRB_PRE_REG = 1928 CEFBS_IsARM, // STRBi12 = 1929 CEFBS_IsARM, // STRBrs = 1930 CEFBS_IsARM_HasV5TE, // STRD = 1931 CEFBS_IsARM, // STRD_POST = 1932 CEFBS_IsARM, // STRD_PRE = 1933 CEFBS_IsARM, // STREX = 1934 CEFBS_IsARM, // STREXB = 1935 CEFBS_IsARM, // STREXD = 1936 CEFBS_IsARM, // STREXH = 1937 CEFBS_IsARM, // STRH = 1938 CEFBS_IsARM, // STRHTi = 1939 CEFBS_IsARM, // STRHTr = 1940 CEFBS_IsARM, // STRH_POST = 1941 CEFBS_IsARM, // STRH_PRE = 1942 CEFBS_IsARM, // STRT_POST_IMM = 1943 CEFBS_IsARM, // STRT_POST_REG = 1944 CEFBS_IsARM, // STR_POST_IMM = 1945 CEFBS_IsARM, // STR_POST_REG = 1946 CEFBS_IsARM, // STR_PRE_IMM = 1947 CEFBS_IsARM, // STR_PRE_REG = 1948 CEFBS_IsARM, // STRi12 = 1949 CEFBS_IsARM, // STRrs = 1950 CEFBS_IsARM, // SUBri = 1951 CEFBS_IsARM, // SUBrr = 1952 CEFBS_IsARM, // SUBrsi = 1953 CEFBS_IsARM, // SUBrsr = 1954 CEFBS_IsARM, // SVC = 1955 CEFBS_IsARM_PreV8, // SWP = 1956 CEFBS_IsARM_PreV8, // SWPB = 1957 CEFBS_IsARM_HasV6, // SXTAB = 1958 CEFBS_IsARM_HasV6, // SXTAB16 = 1959 CEFBS_IsARM_HasV6, // SXTAH = 1960 CEFBS_IsARM_HasV6, // SXTB = 1961 CEFBS_IsARM_HasV6, // SXTB16 = 1962 CEFBS_IsARM_HasV6, // SXTH = 1963 CEFBS_IsARM, // TEQri = 1964 CEFBS_IsARM, // TEQrr = 1965 CEFBS_IsARM, // TEQrsi = 1966 CEFBS_IsARM, // TEQrsr = 1967 CEFBS_IsARM, // TRAP = 1968 CEFBS_IsARM_UseNaClTrap, // TRAPNaCl = 1969 CEFBS_IsARM_HasV8_4a, // TSB = 1970 CEFBS_IsARM, // TSTri = 1971 CEFBS_IsARM, // TSTrr = 1972 CEFBS_IsARM, // TSTrsi = 1973 CEFBS_IsARM, // TSTrsr = 1974 CEFBS_IsARM, // UADD16 = 1975 CEFBS_IsARM, // UADD8 = 1976 CEFBS_IsARM, // UASX = 1977 CEFBS_IsARM_HasV6T2, // UBFX = 1978 CEFBS_IsARM, // UDF = 1979 CEFBS_IsARM_HasDivideInARM, // UDIV = 1980 CEFBS_IsARM, // UHADD16 = 1981 CEFBS_IsARM, // UHADD8 = 1982 CEFBS_IsARM, // UHASX = 1983 CEFBS_IsARM, // UHSAX = 1984 CEFBS_IsARM, // UHSUB16 = 1985 CEFBS_IsARM, // UHSUB8 = 1986 CEFBS_IsARM_HasV6, // UMAAL = 1987 CEFBS_IsARM_HasV6, // UMLAL = 1988 CEFBS_IsARM_HasV6, // UMULL = 1989 CEFBS_IsARM, // UQADD16 = 1990 CEFBS_IsARM, // UQADD8 = 1991 CEFBS_IsARM, // UQASX = 1992 CEFBS_IsARM, // UQSAX = 1993 CEFBS_IsARM, // UQSUB16 = 1994 CEFBS_IsARM, // UQSUB8 = 1995 CEFBS_IsARM_HasV6, // USAD8 = 1996 CEFBS_IsARM_HasV6, // USADA8 = 1997 CEFBS_IsARM_HasV6, // USAT = 1998 CEFBS_IsARM_HasV6, // USAT16 = 1999 CEFBS_IsARM, // USAX = 2000 CEFBS_IsARM, // USUB16 = 2001 CEFBS_IsARM, // USUB8 = 2002 CEFBS_IsARM_HasV6, // UXTAB = 2003 CEFBS_IsARM_HasV6, // UXTAB16 = 2004 CEFBS_IsARM_HasV6, // UXTAH = 2005 CEFBS_IsARM_HasV6, // UXTB = 2006 CEFBS_IsARM_HasV6, // UXTB16 = 2007 CEFBS_IsARM_HasV6, // UXTH = 2008 CEFBS_HasNEON, // VABALsv2i64 = 2009 CEFBS_HasNEON, // VABALsv4i32 = 2010 CEFBS_HasNEON, // VABALsv8i16 = 2011 CEFBS_HasNEON, // VABALuv2i64 = 2012 CEFBS_HasNEON, // VABALuv4i32 = 2013 CEFBS_HasNEON, // VABALuv8i16 = 2014 CEFBS_HasNEON, // VABAsv16i8 = 2015 CEFBS_HasNEON, // VABAsv2i32 = 2016 CEFBS_HasNEON, // VABAsv4i16 = 2017 CEFBS_HasNEON, // VABAsv4i32 = 2018 CEFBS_HasNEON, // VABAsv8i16 = 2019 CEFBS_HasNEON, // VABAsv8i8 = 2020 CEFBS_HasNEON, // VABAuv16i8 = 2021 CEFBS_HasNEON, // VABAuv2i32 = 2022 CEFBS_HasNEON, // VABAuv4i16 = 2023 CEFBS_HasNEON, // VABAuv4i32 = 2024 CEFBS_HasNEON, // VABAuv8i16 = 2025 CEFBS_HasNEON, // VABAuv8i8 = 2026 CEFBS_HasNEON, // VABDLsv2i64 = 2027 CEFBS_HasNEON, // VABDLsv4i32 = 2028 CEFBS_HasNEON, // VABDLsv8i16 = 2029 CEFBS_HasNEON, // VABDLuv2i64 = 2030 CEFBS_HasNEON, // VABDLuv4i32 = 2031 CEFBS_HasNEON, // VABDLuv8i16 = 2032 CEFBS_HasNEON, // VABDfd = 2033 CEFBS_HasNEON, // VABDfq = 2034 CEFBS_HasNEON_HasFullFP16, // VABDhd = 2035 CEFBS_HasNEON_HasFullFP16, // VABDhq = 2036 CEFBS_HasNEON, // VABDsv16i8 = 2037 CEFBS_HasNEON, // VABDsv2i32 = 2038 CEFBS_HasNEON, // VABDsv4i16 = 2039 CEFBS_HasNEON, // VABDsv4i32 = 2040 CEFBS_HasNEON, // VABDsv8i16 = 2041 CEFBS_HasNEON, // VABDsv8i8 = 2042 CEFBS_HasNEON, // VABDuv16i8 = 2043 CEFBS_HasNEON, // VABDuv2i32 = 2044 CEFBS_HasNEON, // VABDuv4i16 = 2045 CEFBS_HasNEON, // VABDuv4i32 = 2046 CEFBS_HasNEON, // VABDuv8i16 = 2047 CEFBS_HasNEON, // VABDuv8i8 = 2048 CEFBS_HasVFP2_HasDPVFP, // VABSD = 2049 CEFBS_HasFullFP16, // VABSH = 2050 CEFBS_HasVFP2, // VABSS = 2051 CEFBS_HasNEON, // VABSfd = 2052 CEFBS_HasNEON, // VABSfq = 2053 CEFBS_HasNEON_HasFullFP16, // VABShd = 2054 CEFBS_HasNEON_HasFullFP16, // VABShq = 2055 CEFBS_HasNEON, // VABSv16i8 = 2056 CEFBS_HasNEON, // VABSv2i32 = 2057 CEFBS_HasNEON, // VABSv4i16 = 2058 CEFBS_HasNEON, // VABSv4i32 = 2059 CEFBS_HasNEON, // VABSv8i16 = 2060 CEFBS_HasNEON, // VABSv8i8 = 2061 CEFBS_HasNEON, // VACGEfd = 2062 CEFBS_HasNEON, // VACGEfq = 2063 CEFBS_HasNEON_HasFullFP16, // VACGEhd = 2064 CEFBS_HasNEON_HasFullFP16, // VACGEhq = 2065 CEFBS_HasNEON, // VACGTfd = 2066 CEFBS_HasNEON, // VACGTfq = 2067 CEFBS_HasNEON_HasFullFP16, // VACGThd = 2068 CEFBS_HasNEON_HasFullFP16, // VACGThq = 2069 CEFBS_HasVFP2_HasDPVFP, // VADDD = 2070 CEFBS_HasFullFP16, // VADDH = 2071 CEFBS_HasNEON, // VADDHNv2i32 = 2072 CEFBS_HasNEON, // VADDHNv4i16 = 2073 CEFBS_HasNEON, // VADDHNv8i8 = 2074 CEFBS_HasNEON, // VADDLsv2i64 = 2075 CEFBS_HasNEON, // VADDLsv4i32 = 2076 CEFBS_HasNEON, // VADDLsv8i16 = 2077 CEFBS_HasNEON, // VADDLuv2i64 = 2078 CEFBS_HasNEON, // VADDLuv4i32 = 2079 CEFBS_HasNEON, // VADDLuv8i16 = 2080 CEFBS_HasVFP2, // VADDS = 2081 CEFBS_HasNEON, // VADDWsv2i64 = 2082 CEFBS_HasNEON, // VADDWsv4i32 = 2083 CEFBS_HasNEON, // VADDWsv8i16 = 2084 CEFBS_HasNEON, // VADDWuv2i64 = 2085 CEFBS_HasNEON, // VADDWuv4i32 = 2086 CEFBS_HasNEON, // VADDWuv8i16 = 2087 CEFBS_HasNEON, // VADDfd = 2088 CEFBS_HasNEON, // VADDfq = 2089 CEFBS_HasNEON_HasFullFP16, // VADDhd = 2090 CEFBS_HasNEON_HasFullFP16, // VADDhq = 2091 CEFBS_HasNEON, // VADDv16i8 = 2092 CEFBS_HasNEON, // VADDv1i64 = 2093 CEFBS_HasNEON, // VADDv2i32 = 2094 CEFBS_HasNEON, // VADDv2i64 = 2095 CEFBS_HasNEON, // VADDv4i16 = 2096 CEFBS_HasNEON, // VADDv4i32 = 2097 CEFBS_HasNEON, // VADDv8i16 = 2098 CEFBS_HasNEON, // VADDv8i8 = 2099 CEFBS_HasNEON, // VANDd = 2100 CEFBS_HasNEON, // VANDq = 2101 CEFBS_HasBF16_HasNEON, // VBF16MALBQ = 2102 CEFBS_HasBF16_HasNEON, // VBF16MALBQI = 2103 CEFBS_HasBF16_HasNEON, // VBF16MALTQ = 2104 CEFBS_HasBF16_HasNEON, // VBF16MALTQI = 2105 CEFBS_HasNEON, // VBICd = 2106 CEFBS_HasNEON, // VBICiv2i32 = 2107 CEFBS_HasNEON, // VBICiv4i16 = 2108 CEFBS_HasNEON, // VBICiv4i32 = 2109 CEFBS_HasNEON, // VBICiv8i16 = 2110 CEFBS_HasNEON, // VBICq = 2111 CEFBS_HasNEON, // VBIFd = 2112 CEFBS_HasNEON, // VBIFq = 2113 CEFBS_HasNEON, // VBITd = 2114 CEFBS_HasNEON, // VBITq = 2115 CEFBS_HasNEON, // VBSLd = 2116 CEFBS_HasNEON, // VBSLq = 2117 CEFBS_HasNEON, // VBSPd = 2118 CEFBS_HasNEON, // VBSPq = 2119 CEFBS_HasNEON_HasV8_3a, // VCADDv2f32 = 2120 CEFBS_HasNEON_HasV8_3a_HasFullFP16, // VCADDv4f16 = 2121 CEFBS_HasNEON_HasV8_3a, // VCADDv4f32 = 2122 CEFBS_HasNEON_HasV8_3a_HasFullFP16, // VCADDv8f16 = 2123 CEFBS_HasNEON, // VCEQfd = 2124 CEFBS_HasNEON, // VCEQfq = 2125 CEFBS_HasNEON_HasFullFP16, // VCEQhd = 2126 CEFBS_HasNEON_HasFullFP16, // VCEQhq = 2127 CEFBS_HasNEON, // VCEQv16i8 = 2128 CEFBS_HasNEON, // VCEQv2i32 = 2129 CEFBS_HasNEON, // VCEQv4i16 = 2130 CEFBS_HasNEON, // VCEQv4i32 = 2131 CEFBS_HasNEON, // VCEQv8i16 = 2132 CEFBS_HasNEON, // VCEQv8i8 = 2133 CEFBS_HasNEON, // VCEQzv16i8 = 2134 CEFBS_HasNEON, // VCEQzv2f32 = 2135 CEFBS_HasNEON, // VCEQzv2i32 = 2136 CEFBS_HasNEON_HasFullFP16, // VCEQzv4f16 = 2137 CEFBS_HasNEON, // VCEQzv4f32 = 2138 CEFBS_HasNEON, // VCEQzv4i16 = 2139 CEFBS_HasNEON, // VCEQzv4i32 = 2140 CEFBS_HasNEON_HasFullFP16, // VCEQzv8f16 = 2141 CEFBS_HasNEON, // VCEQzv8i16 = 2142 CEFBS_HasNEON, // VCEQzv8i8 = 2143 CEFBS_HasNEON, // VCGEfd = 2144 CEFBS_HasNEON, // VCGEfq = 2145 CEFBS_HasNEON_HasFullFP16, // VCGEhd = 2146 CEFBS_HasNEON_HasFullFP16, // VCGEhq = 2147 CEFBS_HasNEON, // VCGEsv16i8 = 2148 CEFBS_HasNEON, // VCGEsv2i32 = 2149 CEFBS_HasNEON, // VCGEsv4i16 = 2150 CEFBS_HasNEON, // VCGEsv4i32 = 2151 CEFBS_HasNEON, // VCGEsv8i16 = 2152 CEFBS_HasNEON, // VCGEsv8i8 = 2153 CEFBS_HasNEON, // VCGEuv16i8 = 2154 CEFBS_HasNEON, // VCGEuv2i32 = 2155 CEFBS_HasNEON, // VCGEuv4i16 = 2156 CEFBS_HasNEON, // VCGEuv4i32 = 2157 CEFBS_HasNEON, // VCGEuv8i16 = 2158 CEFBS_HasNEON, // VCGEuv8i8 = 2159 CEFBS_HasNEON, // VCGEzv16i8 = 2160 CEFBS_HasNEON, // VCGEzv2f32 = 2161 CEFBS_HasNEON, // VCGEzv2i32 = 2162 CEFBS_HasNEON_HasFullFP16, // VCGEzv4f16 = 2163 CEFBS_HasNEON, // VCGEzv4f32 = 2164 CEFBS_HasNEON, // VCGEzv4i16 = 2165 CEFBS_HasNEON, // VCGEzv4i32 = 2166 CEFBS_HasNEON_HasFullFP16, // VCGEzv8f16 = 2167 CEFBS_HasNEON, // VCGEzv8i16 = 2168 CEFBS_HasNEON, // VCGEzv8i8 = 2169 CEFBS_HasNEON, // VCGTfd = 2170 CEFBS_HasNEON, // VCGTfq = 2171 CEFBS_HasNEON_HasFullFP16, // VCGThd = 2172 CEFBS_HasNEON_HasFullFP16, // VCGThq = 2173 CEFBS_HasNEON, // VCGTsv16i8 = 2174 CEFBS_HasNEON, // VCGTsv2i32 = 2175 CEFBS_HasNEON, // VCGTsv4i16 = 2176 CEFBS_HasNEON, // VCGTsv4i32 = 2177 CEFBS_HasNEON, // VCGTsv8i16 = 2178 CEFBS_HasNEON, // VCGTsv8i8 = 2179 CEFBS_HasNEON, // VCGTuv16i8 = 2180 CEFBS_HasNEON, // VCGTuv2i32 = 2181 CEFBS_HasNEON, // VCGTuv4i16 = 2182 CEFBS_HasNEON, // VCGTuv4i32 = 2183 CEFBS_HasNEON, // VCGTuv8i16 = 2184 CEFBS_HasNEON, // VCGTuv8i8 = 2185 CEFBS_HasNEON, // VCGTzv16i8 = 2186 CEFBS_HasNEON, // VCGTzv2f32 = 2187 CEFBS_HasNEON, // VCGTzv2i32 = 2188 CEFBS_HasNEON_HasFullFP16, // VCGTzv4f16 = 2189 CEFBS_HasNEON, // VCGTzv4f32 = 2190 CEFBS_HasNEON, // VCGTzv4i16 = 2191 CEFBS_HasNEON, // VCGTzv4i32 = 2192 CEFBS_HasNEON_HasFullFP16, // VCGTzv8f16 = 2193 CEFBS_HasNEON, // VCGTzv8i16 = 2194 CEFBS_HasNEON, // VCGTzv8i8 = 2195 CEFBS_HasNEON, // VCLEzv16i8 = 2196 CEFBS_HasNEON, // VCLEzv2f32 = 2197 CEFBS_HasNEON, // VCLEzv2i32 = 2198 CEFBS_HasNEON_HasFullFP16, // VCLEzv4f16 = 2199 CEFBS_HasNEON, // VCLEzv4f32 = 2200 CEFBS_HasNEON, // VCLEzv4i16 = 2201 CEFBS_HasNEON, // VCLEzv4i32 = 2202 CEFBS_HasNEON_HasFullFP16, // VCLEzv8f16 = 2203 CEFBS_HasNEON, // VCLEzv8i16 = 2204 CEFBS_HasNEON, // VCLEzv8i8 = 2205 CEFBS_HasNEON, // VCLSv16i8 = 2206 CEFBS_HasNEON, // VCLSv2i32 = 2207 CEFBS_HasNEON, // VCLSv4i16 = 2208 CEFBS_HasNEON, // VCLSv4i32 = 2209 CEFBS_HasNEON, // VCLSv8i16 = 2210 CEFBS_HasNEON, // VCLSv8i8 = 2211 CEFBS_HasNEON, // VCLTzv16i8 = 2212 CEFBS_HasNEON, // VCLTzv2f32 = 2213 CEFBS_HasNEON, // VCLTzv2i32 = 2214 CEFBS_HasNEON_HasFullFP16, // VCLTzv4f16 = 2215 CEFBS_HasNEON, // VCLTzv4f32 = 2216 CEFBS_HasNEON, // VCLTzv4i16 = 2217 CEFBS_HasNEON, // VCLTzv4i32 = 2218 CEFBS_HasNEON_HasFullFP16, // VCLTzv8f16 = 2219 CEFBS_HasNEON, // VCLTzv8i16 = 2220 CEFBS_HasNEON, // VCLTzv8i8 = 2221 CEFBS_HasNEON, // VCLZv16i8 = 2222 CEFBS_HasNEON, // VCLZv2i32 = 2223 CEFBS_HasNEON, // VCLZv4i16 = 2224 CEFBS_HasNEON, // VCLZv4i32 = 2225 CEFBS_HasNEON, // VCLZv8i16 = 2226 CEFBS_HasNEON, // VCLZv8i8 = 2227 CEFBS_HasNEON_HasV8_3a, // VCMLAv2f32 = 2228 CEFBS_HasNEON_HasV8_3a, // VCMLAv2f32_indexed = 2229 CEFBS_HasNEON_HasV8_3a_HasFullFP16, // VCMLAv4f16 = 2230 CEFBS_HasNEON_HasV8_3a_HasFullFP16, // VCMLAv4f16_indexed = 2231 CEFBS_HasNEON_HasV8_3a, // VCMLAv4f32 = 2232 CEFBS_HasNEON_HasV8_3a, // VCMLAv4f32_indexed = 2233 CEFBS_HasNEON_HasV8_3a_HasFullFP16, // VCMLAv8f16 = 2234 CEFBS_HasNEON_HasV8_3a_HasFullFP16, // VCMLAv8f16_indexed = 2235 CEFBS_HasVFP2_HasDPVFP, // VCMPD = 2236 CEFBS_HasVFP2_HasDPVFP, // VCMPED = 2237 CEFBS_HasFullFP16, // VCMPEH = 2238 CEFBS_HasVFP2, // VCMPES = 2239 CEFBS_HasVFP2_HasDPVFP, // VCMPEZD = 2240 CEFBS_HasFullFP16, // VCMPEZH = 2241 CEFBS_HasVFP2, // VCMPEZS = 2242 CEFBS_HasFullFP16, // VCMPH = 2243 CEFBS_HasVFP2, // VCMPS = 2244 CEFBS_HasVFP2_HasDPVFP, // VCMPZD = 2245 CEFBS_HasFullFP16, // VCMPZH = 2246 CEFBS_HasVFP2, // VCMPZS = 2247 CEFBS_HasNEON, // VCNTd = 2248 CEFBS_HasNEON, // VCNTq = 2249 CEFBS_HasV8_HasNEON, // VCVTANSDf = 2250 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTANSDh = 2251 CEFBS_HasV8_HasNEON, // VCVTANSQf = 2252 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTANSQh = 2253 CEFBS_HasV8_HasNEON, // VCVTANUDf = 2254 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTANUDh = 2255 CEFBS_HasV8_HasNEON, // VCVTANUQf = 2256 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTANUQh = 2257 CEFBS_HasFPARMv8_HasDPVFP, // VCVTASD = 2258 CEFBS_HasFullFP16, // VCVTASH = 2259 CEFBS_HasFPARMv8, // VCVTASS = 2260 CEFBS_HasFPARMv8_HasDPVFP, // VCVTAUD = 2261 CEFBS_HasFullFP16, // VCVTAUH = 2262 CEFBS_HasFPARMv8, // VCVTAUS = 2263 CEFBS_HasFPARMv8_HasDPVFP, // VCVTBDH = 2264 CEFBS_HasFPARMv8_HasDPVFP, // VCVTBHD = 2265 CEFBS_HasFP16, // VCVTBHS = 2266 CEFBS_HasFP16, // VCVTBSH = 2267 CEFBS_HasVFP2_HasDPVFP, // VCVTDS = 2268 CEFBS_HasV8_HasNEON, // VCVTMNSDf = 2269 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTMNSDh = 2270 CEFBS_HasV8_HasNEON, // VCVTMNSQf = 2271 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTMNSQh = 2272 CEFBS_HasV8_HasNEON, // VCVTMNUDf = 2273 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTMNUDh = 2274 CEFBS_HasV8_HasNEON, // VCVTMNUQf = 2275 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTMNUQh = 2276 CEFBS_HasFPARMv8_HasDPVFP, // VCVTMSD = 2277 CEFBS_HasFullFP16, // VCVTMSH = 2278 CEFBS_HasFPARMv8, // VCVTMSS = 2279 CEFBS_HasFPARMv8_HasDPVFP, // VCVTMUD = 2280 CEFBS_HasFullFP16, // VCVTMUH = 2281 CEFBS_HasFPARMv8, // VCVTMUS = 2282 CEFBS_HasV8_HasNEON, // VCVTNNSDf = 2283 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTNNSDh = 2284 CEFBS_HasV8_HasNEON, // VCVTNNSQf = 2285 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTNNSQh = 2286 CEFBS_HasV8_HasNEON, // VCVTNNUDf = 2287 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTNNUDh = 2288 CEFBS_HasV8_HasNEON, // VCVTNNUQf = 2289 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTNNUQh = 2290 CEFBS_HasFPARMv8_HasDPVFP, // VCVTNSD = 2291 CEFBS_HasFullFP16, // VCVTNSH = 2292 CEFBS_HasFPARMv8, // VCVTNSS = 2293 CEFBS_HasFPARMv8_HasDPVFP, // VCVTNUD = 2294 CEFBS_HasFullFP16, // VCVTNUH = 2295 CEFBS_HasFPARMv8, // VCVTNUS = 2296 CEFBS_HasV8_HasNEON, // VCVTPNSDf = 2297 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTPNSDh = 2298 CEFBS_HasV8_HasNEON, // VCVTPNSQf = 2299 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTPNSQh = 2300 CEFBS_HasV8_HasNEON, // VCVTPNUDf = 2301 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTPNUDh = 2302 CEFBS_HasV8_HasNEON, // VCVTPNUQf = 2303 CEFBS_HasV8_HasNEON_HasFullFP16, // VCVTPNUQh = 2304 CEFBS_HasFPARMv8_HasDPVFP, // VCVTPSD = 2305 CEFBS_HasFullFP16, // VCVTPSH = 2306 CEFBS_HasFPARMv8, // VCVTPSS = 2307 CEFBS_HasFPARMv8_HasDPVFP, // VCVTPUD = 2308 CEFBS_HasFullFP16, // VCVTPUH = 2309 CEFBS_HasFPARMv8, // VCVTPUS = 2310 CEFBS_HasVFP2_HasDPVFP, // VCVTSD = 2311 CEFBS_HasFPARMv8_HasDPVFP, // VCVTTDH = 2312 CEFBS_HasFPARMv8_HasDPVFP, // VCVTTHD = 2313 CEFBS_HasFP16, // VCVTTHS = 2314 CEFBS_HasFP16, // VCVTTSH = 2315 CEFBS_HasNEON_HasFP16, // VCVTf2h = 2316 CEFBS_HasNEON, // VCVTf2sd = 2317 CEFBS_HasNEON, // VCVTf2sq = 2318 CEFBS_HasNEON, // VCVTf2ud = 2319 CEFBS_HasNEON, // VCVTf2uq = 2320 CEFBS_HasNEON, // VCVTf2xsd = 2321 CEFBS_HasNEON, // VCVTf2xsq = 2322 CEFBS_HasNEON, // VCVTf2xud = 2323 CEFBS_HasNEON, // VCVTf2xuq = 2324 CEFBS_HasNEON_HasFP16, // VCVTh2f = 2325 CEFBS_HasNEON_HasFullFP16, // VCVTh2sd = 2326 CEFBS_HasNEON_HasFullFP16, // VCVTh2sq = 2327 CEFBS_HasNEON_HasFullFP16, // VCVTh2ud = 2328 CEFBS_HasNEON_HasFullFP16, // VCVTh2uq = 2329 CEFBS_HasNEON_HasFullFP16, // VCVTh2xsd = 2330 CEFBS_HasNEON_HasFullFP16, // VCVTh2xsq = 2331 CEFBS_HasNEON_HasFullFP16, // VCVTh2xud = 2332 CEFBS_HasNEON_HasFullFP16, // VCVTh2xuq = 2333 CEFBS_HasNEON, // VCVTs2fd = 2334 CEFBS_HasNEON, // VCVTs2fq = 2335 CEFBS_HasNEON_HasFullFP16, // VCVTs2hd = 2336 CEFBS_HasNEON_HasFullFP16, // VCVTs2hq = 2337 CEFBS_HasNEON, // VCVTu2fd = 2338 CEFBS_HasNEON, // VCVTu2fq = 2339 CEFBS_HasNEON_HasFullFP16, // VCVTu2hd = 2340 CEFBS_HasNEON_HasFullFP16, // VCVTu2hq = 2341 CEFBS_HasNEON, // VCVTxs2fd = 2342 CEFBS_HasNEON, // VCVTxs2fq = 2343 CEFBS_HasNEON_HasFullFP16, // VCVTxs2hd = 2344 CEFBS_HasNEON_HasFullFP16, // VCVTxs2hq = 2345 CEFBS_HasNEON, // VCVTxu2fd = 2346 CEFBS_HasNEON, // VCVTxu2fq = 2347 CEFBS_HasNEON_HasFullFP16, // VCVTxu2hd = 2348 CEFBS_HasNEON_HasFullFP16, // VCVTxu2hq = 2349 CEFBS_HasVFP2_HasDPVFP, // VDIVD = 2350 CEFBS_HasFullFP16, // VDIVH = 2351 CEFBS_HasVFP2, // VDIVS = 2352 CEFBS_HasNEON, // VDUP16d = 2353 CEFBS_HasNEON, // VDUP16q = 2354 CEFBS_HasNEON, // VDUP32d = 2355 CEFBS_HasNEON, // VDUP32q = 2356 CEFBS_HasNEON, // VDUP8d = 2357 CEFBS_HasNEON, // VDUP8q = 2358 CEFBS_HasNEON, // VDUPLN16d = 2359 CEFBS_HasNEON, // VDUPLN16q = 2360 CEFBS_HasNEON, // VDUPLN32d = 2361 CEFBS_HasNEON, // VDUPLN32q = 2362 CEFBS_HasNEON, // VDUPLN8d = 2363 CEFBS_HasNEON, // VDUPLN8q = 2364 CEFBS_HasNEON, // VEORd = 2365 CEFBS_HasNEON, // VEORq = 2366 CEFBS_HasNEON, // VEXTd16 = 2367 CEFBS_HasNEON, // VEXTd32 = 2368 CEFBS_HasNEON, // VEXTd8 = 2369 CEFBS_HasNEON, // VEXTq16 = 2370 CEFBS_HasNEON, // VEXTq32 = 2371 CEFBS_HasNEON, // VEXTq64 = 2372 CEFBS_HasNEON, // VEXTq8 = 2373 CEFBS_HasVFP4_HasDPVFP, // VFMAD = 2374 CEFBS_HasFullFP16, // VFMAH = 2375 CEFBS_HasNEON_HasFP16FML, // VFMALD = 2376 CEFBS_HasNEON_HasFP16FML, // VFMALDI = 2377 CEFBS_HasNEON_HasFP16FML, // VFMALQ = 2378 CEFBS_HasNEON_HasFP16FML, // VFMALQI = 2379 CEFBS_HasVFP4, // VFMAS = 2380 CEFBS_HasNEON_HasVFP4, // VFMAfd = 2381 CEFBS_HasNEON_HasVFP4, // VFMAfq = 2382 CEFBS_HasNEON_HasFullFP16, // VFMAhd = 2383 CEFBS_HasNEON_HasFullFP16, // VFMAhq = 2384 CEFBS_HasVFP4_HasDPVFP, // VFMSD = 2385 CEFBS_HasFullFP16, // VFMSH = 2386 CEFBS_HasNEON_HasFP16FML, // VFMSLD = 2387 CEFBS_HasNEON_HasFP16FML, // VFMSLDI = 2388 CEFBS_HasNEON_HasFP16FML, // VFMSLQ = 2389 CEFBS_HasNEON_HasFP16FML, // VFMSLQI = 2390 CEFBS_HasVFP4, // VFMSS = 2391 CEFBS_HasNEON_HasVFP4, // VFMSfd = 2392 CEFBS_HasNEON_HasVFP4, // VFMSfq = 2393 CEFBS_HasNEON_HasFullFP16, // VFMShd = 2394 CEFBS_HasNEON_HasFullFP16, // VFMShq = 2395 CEFBS_HasVFP4_HasDPVFP, // VFNMAD = 2396 CEFBS_HasFullFP16, // VFNMAH = 2397 CEFBS_HasVFP4, // VFNMAS = 2398 CEFBS_HasVFP4_HasDPVFP, // VFNMSD = 2399 CEFBS_HasFullFP16, // VFNMSH = 2400 CEFBS_HasVFP4, // VFNMSS = 2401 CEFBS_HasFPARMv8_HasDPVFP, // VFP_VMAXNMD = 2402 CEFBS_HasFullFP16, // VFP_VMAXNMH = 2403 CEFBS_HasFPARMv8, // VFP_VMAXNMS = 2404 CEFBS_HasFPARMv8_HasDPVFP, // VFP_VMINNMD = 2405 CEFBS_HasFullFP16, // VFP_VMINNMH = 2406 CEFBS_HasFPARMv8, // VFP_VMINNMS = 2407 CEFBS_HasFPRegs, // VGETLNi32 = 2408 CEFBS_HasNEON, // VGETLNs16 = 2409 CEFBS_HasNEON, // VGETLNs8 = 2410 CEFBS_HasNEON, // VGETLNu16 = 2411 CEFBS_HasNEON, // VGETLNu8 = 2412 CEFBS_HasNEON, // VHADDsv16i8 = 2413 CEFBS_HasNEON, // VHADDsv2i32 = 2414 CEFBS_HasNEON, // VHADDsv4i16 = 2415 CEFBS_HasNEON, // VHADDsv4i32 = 2416 CEFBS_HasNEON, // VHADDsv8i16 = 2417 CEFBS_HasNEON, // VHADDsv8i8 = 2418 CEFBS_HasNEON, // VHADDuv16i8 = 2419 CEFBS_HasNEON, // VHADDuv2i32 = 2420 CEFBS_HasNEON, // VHADDuv4i16 = 2421 CEFBS_HasNEON, // VHADDuv4i32 = 2422 CEFBS_HasNEON, // VHADDuv8i16 = 2423 CEFBS_HasNEON, // VHADDuv8i8 = 2424 CEFBS_HasNEON, // VHSUBsv16i8 = 2425 CEFBS_HasNEON, // VHSUBsv2i32 = 2426 CEFBS_HasNEON, // VHSUBsv4i16 = 2427 CEFBS_HasNEON, // VHSUBsv4i32 = 2428 CEFBS_HasNEON, // VHSUBsv8i16 = 2429 CEFBS_HasNEON, // VHSUBsv8i8 = 2430 CEFBS_HasNEON, // VHSUBuv16i8 = 2431 CEFBS_HasNEON, // VHSUBuv2i32 = 2432 CEFBS_HasNEON, // VHSUBuv4i16 = 2433 CEFBS_HasNEON, // VHSUBuv4i32 = 2434 CEFBS_HasNEON, // VHSUBuv8i16 = 2435 CEFBS_HasNEON, // VHSUBuv8i8 = 2436 CEFBS_HasFullFP16, // VINSH = 2437 CEFBS_HasFPARMv8_HasV8_3a, // VJCVT = 2438 CEFBS_HasNEON, // VLD1DUPd16 = 2439 CEFBS_HasNEON, // VLD1DUPd16wb_fixed = 2440 CEFBS_HasNEON, // VLD1DUPd16wb_register = 2441 CEFBS_HasNEON, // VLD1DUPd32 = 2442 CEFBS_HasNEON, // VLD1DUPd32wb_fixed = 2443 CEFBS_HasNEON, // VLD1DUPd32wb_register = 2444 CEFBS_HasNEON, // VLD1DUPd8 = 2445 CEFBS_HasNEON, // VLD1DUPd8wb_fixed = 2446 CEFBS_HasNEON, // VLD1DUPd8wb_register = 2447 CEFBS_HasNEON, // VLD1DUPq16 = 2448 CEFBS_HasNEON, // VLD1DUPq16wb_fixed = 2449 CEFBS_HasNEON, // VLD1DUPq16wb_register = 2450 CEFBS_HasNEON, // VLD1DUPq32 = 2451 CEFBS_HasNEON, // VLD1DUPq32wb_fixed = 2452 CEFBS_HasNEON, // VLD1DUPq32wb_register = 2453 CEFBS_HasNEON, // VLD1DUPq8 = 2454 CEFBS_HasNEON, // VLD1DUPq8wb_fixed = 2455 CEFBS_HasNEON, // VLD1DUPq8wb_register = 2456 CEFBS_HasNEON, // VLD1LNd16 = 2457 CEFBS_HasNEON, // VLD1LNd16_UPD = 2458 CEFBS_HasNEON, // VLD1LNd32 = 2459 CEFBS_HasNEON, // VLD1LNd32_UPD = 2460 CEFBS_HasNEON, // VLD1LNd8 = 2461 CEFBS_HasNEON, // VLD1LNd8_UPD = 2462 CEFBS_HasNEON, // VLD1LNq16Pseudo = 2463 CEFBS_HasNEON, // VLD1LNq16Pseudo_UPD = 2464 CEFBS_HasNEON, // VLD1LNq32Pseudo = 2465 CEFBS_HasNEON, // VLD1LNq32Pseudo_UPD = 2466 CEFBS_HasNEON, // VLD1LNq8Pseudo = 2467 CEFBS_HasNEON, // VLD1LNq8Pseudo_UPD = 2468 CEFBS_HasNEON, // VLD1d16 = 2469 CEFBS_HasNEON, // VLD1d16Q = 2470 CEFBS_HasNEON, // VLD1d16QPseudo = 2471 CEFBS_HasNEON, // VLD1d16QPseudoWB_fixed = 2472 CEFBS_HasNEON, // VLD1d16QPseudoWB_register = 2473 CEFBS_HasNEON, // VLD1d16Qwb_fixed = 2474 CEFBS_HasNEON, // VLD1d16Qwb_register = 2475 CEFBS_HasNEON, // VLD1d16T = 2476 CEFBS_HasNEON, // VLD1d16TPseudo = 2477 CEFBS_HasNEON, // VLD1d16TPseudoWB_fixed = 2478 CEFBS_HasNEON, // VLD1d16TPseudoWB_register = 2479 CEFBS_HasNEON, // VLD1d16Twb_fixed = 2480 CEFBS_HasNEON, // VLD1d16Twb_register = 2481 CEFBS_HasNEON, // VLD1d16wb_fixed = 2482 CEFBS_HasNEON, // VLD1d16wb_register = 2483 CEFBS_HasNEON, // VLD1d32 = 2484 CEFBS_HasNEON, // VLD1d32Q = 2485 CEFBS_HasNEON, // VLD1d32QPseudo = 2486 CEFBS_HasNEON, // VLD1d32QPseudoWB_fixed = 2487 CEFBS_HasNEON, // VLD1d32QPseudoWB_register = 2488 CEFBS_HasNEON, // VLD1d32Qwb_fixed = 2489 CEFBS_HasNEON, // VLD1d32Qwb_register = 2490 CEFBS_HasNEON, // VLD1d32T = 2491 CEFBS_HasNEON, // VLD1d32TPseudo = 2492 CEFBS_HasNEON, // VLD1d32TPseudoWB_fixed = 2493 CEFBS_HasNEON, // VLD1d32TPseudoWB_register = 2494 CEFBS_HasNEON, // VLD1d32Twb_fixed = 2495 CEFBS_HasNEON, // VLD1d32Twb_register = 2496 CEFBS_HasNEON, // VLD1d32wb_fixed = 2497 CEFBS_HasNEON, // VLD1d32wb_register = 2498 CEFBS_HasNEON, // VLD1d64 = 2499 CEFBS_HasNEON, // VLD1d64Q = 2500 CEFBS_HasNEON, // VLD1d64QPseudo = 2501 CEFBS_HasNEON, // VLD1d64QPseudoWB_fixed = 2502 CEFBS_HasNEON, // VLD1d64QPseudoWB_register = 2503 CEFBS_HasNEON, // VLD1d64Qwb_fixed = 2504 CEFBS_HasNEON, // VLD1d64Qwb_register = 2505 CEFBS_HasNEON, // VLD1d64T = 2506 CEFBS_HasNEON, // VLD1d64TPseudo = 2507 CEFBS_HasNEON, // VLD1d64TPseudoWB_fixed = 2508 CEFBS_HasNEON, // VLD1d64TPseudoWB_register = 2509 CEFBS_HasNEON, // VLD1d64Twb_fixed = 2510 CEFBS_HasNEON, // VLD1d64Twb_register = 2511 CEFBS_HasNEON, // VLD1d64wb_fixed = 2512 CEFBS_HasNEON, // VLD1d64wb_register = 2513 CEFBS_HasNEON, // VLD1d8 = 2514 CEFBS_HasNEON, // VLD1d8Q = 2515 CEFBS_HasNEON, // VLD1d8QPseudo = 2516 CEFBS_HasNEON, // VLD1d8QPseudoWB_fixed = 2517 CEFBS_HasNEON, // VLD1d8QPseudoWB_register = 2518 CEFBS_HasNEON, // VLD1d8Qwb_fixed = 2519 CEFBS_HasNEON, // VLD1d8Qwb_register = 2520 CEFBS_HasNEON, // VLD1d8T = 2521 CEFBS_HasNEON, // VLD1d8TPseudo = 2522 CEFBS_HasNEON, // VLD1d8TPseudoWB_fixed = 2523 CEFBS_HasNEON, // VLD1d8TPseudoWB_register = 2524 CEFBS_HasNEON, // VLD1d8Twb_fixed = 2525 CEFBS_HasNEON, // VLD1d8Twb_register = 2526 CEFBS_HasNEON, // VLD1d8wb_fixed = 2527 CEFBS_HasNEON, // VLD1d8wb_register = 2528 CEFBS_HasNEON, // VLD1q16 = 2529 CEFBS_HasNEON, // VLD1q16HighQPseudo = 2530 CEFBS_HasNEON, // VLD1q16HighQPseudo_UPD = 2531 CEFBS_HasNEON, // VLD1q16HighTPseudo = 2532 CEFBS_HasNEON, // VLD1q16HighTPseudo_UPD = 2533 CEFBS_HasNEON, // VLD1q16LowQPseudo_UPD = 2534 CEFBS_HasNEON, // VLD1q16LowTPseudo_UPD = 2535 CEFBS_HasNEON, // VLD1q16wb_fixed = 2536 CEFBS_HasNEON, // VLD1q16wb_register = 2537 CEFBS_HasNEON, // VLD1q32 = 2538 CEFBS_HasNEON, // VLD1q32HighQPseudo = 2539 CEFBS_HasNEON, // VLD1q32HighQPseudo_UPD = 2540 CEFBS_HasNEON, // VLD1q32HighTPseudo = 2541 CEFBS_HasNEON, // VLD1q32HighTPseudo_UPD = 2542 CEFBS_HasNEON, // VLD1q32LowQPseudo_UPD = 2543 CEFBS_HasNEON, // VLD1q32LowTPseudo_UPD = 2544 CEFBS_HasNEON, // VLD1q32wb_fixed = 2545 CEFBS_HasNEON, // VLD1q32wb_register = 2546 CEFBS_HasNEON, // VLD1q64 = 2547 CEFBS_HasNEON, // VLD1q64HighQPseudo = 2548 CEFBS_HasNEON, // VLD1q64HighQPseudo_UPD = 2549 CEFBS_HasNEON, // VLD1q64HighTPseudo = 2550 CEFBS_HasNEON, // VLD1q64HighTPseudo_UPD = 2551 CEFBS_HasNEON, // VLD1q64LowQPseudo_UPD = 2552 CEFBS_HasNEON, // VLD1q64LowTPseudo_UPD = 2553 CEFBS_HasNEON, // VLD1q64wb_fixed = 2554 CEFBS_HasNEON, // VLD1q64wb_register = 2555 CEFBS_HasNEON, // VLD1q8 = 2556 CEFBS_HasNEON, // VLD1q8HighQPseudo = 2557 CEFBS_HasNEON, // VLD1q8HighQPseudo_UPD = 2558 CEFBS_HasNEON, // VLD1q8HighTPseudo = 2559 CEFBS_HasNEON, // VLD1q8HighTPseudo_UPD = 2560 CEFBS_HasNEON, // VLD1q8LowQPseudo_UPD = 2561 CEFBS_HasNEON, // VLD1q8LowTPseudo_UPD = 2562 CEFBS_HasNEON, // VLD1q8wb_fixed = 2563 CEFBS_HasNEON, // VLD1q8wb_register = 2564 CEFBS_HasNEON, // VLD2DUPd16 = 2565 CEFBS_HasNEON, // VLD2DUPd16wb_fixed = 2566 CEFBS_HasNEON, // VLD2DUPd16wb_register = 2567 CEFBS_HasNEON, // VLD2DUPd16x2 = 2568 CEFBS_HasNEON, // VLD2DUPd16x2wb_fixed = 2569 CEFBS_HasNEON, // VLD2DUPd16x2wb_register = 2570 CEFBS_HasNEON, // VLD2DUPd32 = 2571 CEFBS_HasNEON, // VLD2DUPd32wb_fixed = 2572 CEFBS_HasNEON, // VLD2DUPd32wb_register = 2573 CEFBS_HasNEON, // VLD2DUPd32x2 = 2574 CEFBS_HasNEON, // VLD2DUPd32x2wb_fixed = 2575 CEFBS_HasNEON, // VLD2DUPd32x2wb_register = 2576 CEFBS_HasNEON, // VLD2DUPd8 = 2577 CEFBS_HasNEON, // VLD2DUPd8wb_fixed = 2578 CEFBS_HasNEON, // VLD2DUPd8wb_register = 2579 CEFBS_HasNEON, // VLD2DUPd8x2 = 2580 CEFBS_HasNEON, // VLD2DUPd8x2wb_fixed = 2581 CEFBS_HasNEON, // VLD2DUPd8x2wb_register = 2582 CEFBS_HasNEON, // VLD2DUPq16EvenPseudo = 2583 CEFBS_HasNEON, // VLD2DUPq16OddPseudo = 2584 CEFBS_HasNEON, // VLD2DUPq16OddPseudoWB_fixed = 2585 CEFBS_HasNEON, // VLD2DUPq16OddPseudoWB_register = 2586 CEFBS_HasNEON, // VLD2DUPq32EvenPseudo = 2587 CEFBS_HasNEON, // VLD2DUPq32OddPseudo = 2588 CEFBS_HasNEON, // VLD2DUPq32OddPseudoWB_fixed = 2589 CEFBS_HasNEON, // VLD2DUPq32OddPseudoWB_register = 2590 CEFBS_HasNEON, // VLD2DUPq8EvenPseudo = 2591 CEFBS_HasNEON, // VLD2DUPq8OddPseudo = 2592 CEFBS_HasNEON, // VLD2DUPq8OddPseudoWB_fixed = 2593 CEFBS_HasNEON, // VLD2DUPq8OddPseudoWB_register = 2594 CEFBS_HasNEON, // VLD2LNd16 = 2595 CEFBS_HasNEON, // VLD2LNd16Pseudo = 2596 CEFBS_HasNEON, // VLD2LNd16Pseudo_UPD = 2597 CEFBS_HasNEON, // VLD2LNd16_UPD = 2598 CEFBS_HasNEON, // VLD2LNd32 = 2599 CEFBS_HasNEON, // VLD2LNd32Pseudo = 2600 CEFBS_HasNEON, // VLD2LNd32Pseudo_UPD = 2601 CEFBS_HasNEON, // VLD2LNd32_UPD = 2602 CEFBS_HasNEON, // VLD2LNd8 = 2603 CEFBS_HasNEON, // VLD2LNd8Pseudo = 2604 CEFBS_HasNEON, // VLD2LNd8Pseudo_UPD = 2605 CEFBS_HasNEON, // VLD2LNd8_UPD = 2606 CEFBS_HasNEON, // VLD2LNq16 = 2607 CEFBS_HasNEON, // VLD2LNq16Pseudo = 2608 CEFBS_HasNEON, // VLD2LNq16Pseudo_UPD = 2609 CEFBS_HasNEON, // VLD2LNq16_UPD = 2610 CEFBS_HasNEON, // VLD2LNq32 = 2611 CEFBS_HasNEON, // VLD2LNq32Pseudo = 2612 CEFBS_HasNEON, // VLD2LNq32Pseudo_UPD = 2613 CEFBS_HasNEON, // VLD2LNq32_UPD = 2614 CEFBS_HasNEON, // VLD2b16 = 2615 CEFBS_HasNEON, // VLD2b16wb_fixed = 2616 CEFBS_HasNEON, // VLD2b16wb_register = 2617 CEFBS_HasNEON, // VLD2b32 = 2618 CEFBS_HasNEON, // VLD2b32wb_fixed = 2619 CEFBS_HasNEON, // VLD2b32wb_register = 2620 CEFBS_HasNEON, // VLD2b8 = 2621 CEFBS_HasNEON, // VLD2b8wb_fixed = 2622 CEFBS_HasNEON, // VLD2b8wb_register = 2623 CEFBS_HasNEON, // VLD2d16 = 2624 CEFBS_HasNEON, // VLD2d16wb_fixed = 2625 CEFBS_HasNEON, // VLD2d16wb_register = 2626 CEFBS_HasNEON, // VLD2d32 = 2627 CEFBS_HasNEON, // VLD2d32wb_fixed = 2628 CEFBS_HasNEON, // VLD2d32wb_register = 2629 CEFBS_HasNEON, // VLD2d8 = 2630 CEFBS_HasNEON, // VLD2d8wb_fixed = 2631 CEFBS_HasNEON, // VLD2d8wb_register = 2632 CEFBS_HasNEON, // VLD2q16 = 2633 CEFBS_HasNEON, // VLD2q16Pseudo = 2634 CEFBS_HasNEON, // VLD2q16PseudoWB_fixed = 2635 CEFBS_HasNEON, // VLD2q16PseudoWB_register = 2636 CEFBS_HasNEON, // VLD2q16wb_fixed = 2637 CEFBS_HasNEON, // VLD2q16wb_register = 2638 CEFBS_HasNEON, // VLD2q32 = 2639 CEFBS_HasNEON, // VLD2q32Pseudo = 2640 CEFBS_HasNEON, // VLD2q32PseudoWB_fixed = 2641 CEFBS_HasNEON, // VLD2q32PseudoWB_register = 2642 CEFBS_HasNEON, // VLD2q32wb_fixed = 2643 CEFBS_HasNEON, // VLD2q32wb_register = 2644 CEFBS_HasNEON, // VLD2q8 = 2645 CEFBS_HasNEON, // VLD2q8Pseudo = 2646 CEFBS_HasNEON, // VLD2q8PseudoWB_fixed = 2647 CEFBS_HasNEON, // VLD2q8PseudoWB_register = 2648 CEFBS_HasNEON, // VLD2q8wb_fixed = 2649 CEFBS_HasNEON, // VLD2q8wb_register = 2650 CEFBS_HasNEON, // VLD3DUPd16 = 2651 CEFBS_HasNEON, // VLD3DUPd16Pseudo = 2652 CEFBS_HasNEON, // VLD3DUPd16Pseudo_UPD = 2653 CEFBS_HasNEON, // VLD3DUPd16_UPD = 2654 CEFBS_HasNEON, // VLD3DUPd32 = 2655 CEFBS_HasNEON, // VLD3DUPd32Pseudo = 2656 CEFBS_HasNEON, // VLD3DUPd32Pseudo_UPD = 2657 CEFBS_HasNEON, // VLD3DUPd32_UPD = 2658 CEFBS_HasNEON, // VLD3DUPd8 = 2659 CEFBS_HasNEON, // VLD3DUPd8Pseudo = 2660 CEFBS_HasNEON, // VLD3DUPd8Pseudo_UPD = 2661 CEFBS_HasNEON, // VLD3DUPd8_UPD = 2662 CEFBS_HasNEON, // VLD3DUPq16 = 2663 CEFBS_HasNEON, // VLD3DUPq16EvenPseudo = 2664 CEFBS_HasNEON, // VLD3DUPq16OddPseudo = 2665 CEFBS_HasNEON, // VLD3DUPq16OddPseudo_UPD = 2666 CEFBS_HasNEON, // VLD3DUPq16_UPD = 2667 CEFBS_HasNEON, // VLD3DUPq32 = 2668 CEFBS_HasNEON, // VLD3DUPq32EvenPseudo = 2669 CEFBS_HasNEON, // VLD3DUPq32OddPseudo = 2670 CEFBS_HasNEON, // VLD3DUPq32OddPseudo_UPD = 2671 CEFBS_HasNEON, // VLD3DUPq32_UPD = 2672 CEFBS_HasNEON, // VLD3DUPq8 = 2673 CEFBS_HasNEON, // VLD3DUPq8EvenPseudo = 2674 CEFBS_HasNEON, // VLD3DUPq8OddPseudo = 2675 CEFBS_HasNEON, // VLD3DUPq8OddPseudo_UPD = 2676 CEFBS_HasNEON, // VLD3DUPq8_UPD = 2677 CEFBS_HasNEON, // VLD3LNd16 = 2678 CEFBS_HasNEON, // VLD3LNd16Pseudo = 2679 CEFBS_HasNEON, // VLD3LNd16Pseudo_UPD = 2680 CEFBS_HasNEON, // VLD3LNd16_UPD = 2681 CEFBS_HasNEON, // VLD3LNd32 = 2682 CEFBS_HasNEON, // VLD3LNd32Pseudo = 2683 CEFBS_HasNEON, // VLD3LNd32Pseudo_UPD = 2684 CEFBS_HasNEON, // VLD3LNd32_UPD = 2685 CEFBS_HasNEON, // VLD3LNd8 = 2686 CEFBS_HasNEON, // VLD3LNd8Pseudo = 2687 CEFBS_HasNEON, // VLD3LNd8Pseudo_UPD = 2688 CEFBS_HasNEON, // VLD3LNd8_UPD = 2689 CEFBS_HasNEON, // VLD3LNq16 = 2690 CEFBS_HasNEON, // VLD3LNq16Pseudo = 2691 CEFBS_HasNEON, // VLD3LNq16Pseudo_UPD = 2692 CEFBS_HasNEON, // VLD3LNq16_UPD = 2693 CEFBS_HasNEON, // VLD3LNq32 = 2694 CEFBS_HasNEON, // VLD3LNq32Pseudo = 2695 CEFBS_HasNEON, // VLD3LNq32Pseudo_UPD = 2696 CEFBS_HasNEON, // VLD3LNq32_UPD = 2697 CEFBS_HasNEON, // VLD3d16 = 2698 CEFBS_HasNEON, // VLD3d16Pseudo = 2699 CEFBS_HasNEON, // VLD3d16Pseudo_UPD = 2700 CEFBS_HasNEON, // VLD3d16_UPD = 2701 CEFBS_HasNEON, // VLD3d32 = 2702 CEFBS_HasNEON, // VLD3d32Pseudo = 2703 CEFBS_HasNEON, // VLD3d32Pseudo_UPD = 2704 CEFBS_HasNEON, // VLD3d32_UPD = 2705 CEFBS_HasNEON, // VLD3d8 = 2706 CEFBS_HasNEON, // VLD3d8Pseudo = 2707 CEFBS_HasNEON, // VLD3d8Pseudo_UPD = 2708 CEFBS_HasNEON, // VLD3d8_UPD = 2709 CEFBS_HasNEON, // VLD3q16 = 2710 CEFBS_HasNEON, // VLD3q16Pseudo_UPD = 2711 CEFBS_HasNEON, // VLD3q16_UPD = 2712 CEFBS_HasNEON, // VLD3q16oddPseudo = 2713 CEFBS_HasNEON, // VLD3q16oddPseudo_UPD = 2714 CEFBS_HasNEON, // VLD3q32 = 2715 CEFBS_HasNEON, // VLD3q32Pseudo_UPD = 2716 CEFBS_HasNEON, // VLD3q32_UPD = 2717 CEFBS_HasNEON, // VLD3q32oddPseudo = 2718 CEFBS_HasNEON, // VLD3q32oddPseudo_UPD = 2719 CEFBS_HasNEON, // VLD3q8 = 2720 CEFBS_HasNEON, // VLD3q8Pseudo_UPD = 2721 CEFBS_HasNEON, // VLD3q8_UPD = 2722 CEFBS_HasNEON, // VLD3q8oddPseudo = 2723 CEFBS_HasNEON, // VLD3q8oddPseudo_UPD = 2724 CEFBS_HasNEON, // VLD4DUPd16 = 2725 CEFBS_HasNEON, // VLD4DUPd16Pseudo = 2726 CEFBS_HasNEON, // VLD4DUPd16Pseudo_UPD = 2727 CEFBS_HasNEON, // VLD4DUPd16_UPD = 2728 CEFBS_HasNEON, // VLD4DUPd32 = 2729 CEFBS_HasNEON, // VLD4DUPd32Pseudo = 2730 CEFBS_HasNEON, // VLD4DUPd32Pseudo_UPD = 2731 CEFBS_HasNEON, // VLD4DUPd32_UPD = 2732 CEFBS_HasNEON, // VLD4DUPd8 = 2733 CEFBS_HasNEON, // VLD4DUPd8Pseudo = 2734 CEFBS_HasNEON, // VLD4DUPd8Pseudo_UPD = 2735 CEFBS_HasNEON, // VLD4DUPd8_UPD = 2736 CEFBS_HasNEON, // VLD4DUPq16 = 2737 CEFBS_HasNEON, // VLD4DUPq16EvenPseudo = 2738 CEFBS_HasNEON, // VLD4DUPq16OddPseudo = 2739 CEFBS_HasNEON, // VLD4DUPq16OddPseudo_UPD = 2740 CEFBS_HasNEON, // VLD4DUPq16_UPD = 2741 CEFBS_HasNEON, // VLD4DUPq32 = 2742 CEFBS_HasNEON, // VLD4DUPq32EvenPseudo = 2743 CEFBS_HasNEON, // VLD4DUPq32OddPseudo = 2744 CEFBS_HasNEON, // VLD4DUPq32OddPseudo_UPD = 2745 CEFBS_HasNEON, // VLD4DUPq32_UPD = 2746 CEFBS_HasNEON, // VLD4DUPq8 = 2747 CEFBS_HasNEON, // VLD4DUPq8EvenPseudo = 2748 CEFBS_HasNEON, // VLD4DUPq8OddPseudo = 2749 CEFBS_HasNEON, // VLD4DUPq8OddPseudo_UPD = 2750 CEFBS_HasNEON, // VLD4DUPq8_UPD = 2751 CEFBS_HasNEON, // VLD4LNd16 = 2752 CEFBS_HasNEON, // VLD4LNd16Pseudo = 2753 CEFBS_HasNEON, // VLD4LNd16Pseudo_UPD = 2754 CEFBS_HasNEON, // VLD4LNd16_UPD = 2755 CEFBS_HasNEON, // VLD4LNd32 = 2756 CEFBS_HasNEON, // VLD4LNd32Pseudo = 2757 CEFBS_HasNEON, // VLD4LNd32Pseudo_UPD = 2758 CEFBS_HasNEON, // VLD4LNd32_UPD = 2759 CEFBS_HasNEON, // VLD4LNd8 = 2760 CEFBS_HasNEON, // VLD4LNd8Pseudo = 2761 CEFBS_HasNEON, // VLD4LNd8Pseudo_UPD = 2762 CEFBS_HasNEON, // VLD4LNd8_UPD = 2763 CEFBS_HasNEON, // VLD4LNq16 = 2764 CEFBS_HasNEON, // VLD4LNq16Pseudo = 2765 CEFBS_HasNEON, // VLD4LNq16Pseudo_UPD = 2766 CEFBS_HasNEON, // VLD4LNq16_UPD = 2767 CEFBS_HasNEON, // VLD4LNq32 = 2768 CEFBS_HasNEON, // VLD4LNq32Pseudo = 2769 CEFBS_HasNEON, // VLD4LNq32Pseudo_UPD = 2770 CEFBS_HasNEON, // VLD4LNq32_UPD = 2771 CEFBS_HasNEON, // VLD4d16 = 2772 CEFBS_HasNEON, // VLD4d16Pseudo = 2773 CEFBS_HasNEON, // VLD4d16Pseudo_UPD = 2774 CEFBS_HasNEON, // VLD4d16_UPD = 2775 CEFBS_HasNEON, // VLD4d32 = 2776 CEFBS_HasNEON, // VLD4d32Pseudo = 2777 CEFBS_HasNEON, // VLD4d32Pseudo_UPD = 2778 CEFBS_HasNEON, // VLD4d32_UPD = 2779 CEFBS_HasNEON, // VLD4d8 = 2780 CEFBS_HasNEON, // VLD4d8Pseudo = 2781 CEFBS_HasNEON, // VLD4d8Pseudo_UPD = 2782 CEFBS_HasNEON, // VLD4d8_UPD = 2783 CEFBS_HasNEON, // VLD4q16 = 2784 CEFBS_HasNEON, // VLD4q16Pseudo_UPD = 2785 CEFBS_HasNEON, // VLD4q16_UPD = 2786 CEFBS_HasNEON, // VLD4q16oddPseudo = 2787 CEFBS_HasNEON, // VLD4q16oddPseudo_UPD = 2788 CEFBS_HasNEON, // VLD4q32 = 2789 CEFBS_HasNEON, // VLD4q32Pseudo_UPD = 2790 CEFBS_HasNEON, // VLD4q32_UPD = 2791 CEFBS_HasNEON, // VLD4q32oddPseudo = 2792 CEFBS_HasNEON, // VLD4q32oddPseudo_UPD = 2793 CEFBS_HasNEON, // VLD4q8 = 2794 CEFBS_HasNEON, // VLD4q8Pseudo_UPD = 2795 CEFBS_HasNEON, // VLD4q8_UPD = 2796 CEFBS_HasNEON, // VLD4q8oddPseudo = 2797 CEFBS_HasNEON, // VLD4q8oddPseudo_UPD = 2798 CEFBS_HasFPRegs, // VLDMDDB_UPD = 2799 CEFBS_HasFPRegs, // VLDMDIA = 2800 CEFBS_HasFPRegs, // VLDMDIA_UPD = 2801 CEFBS_HasVFP2, // VLDMQIA = 2802 CEFBS_HasFPRegs, // VLDMSDB_UPD = 2803 CEFBS_HasFPRegs, // VLDMSIA = 2804 CEFBS_HasFPRegs, // VLDMSIA_UPD = 2805 CEFBS_HasFPRegs, // VLDRD = 2806 CEFBS_HasFPRegs16, // VLDRH = 2807 CEFBS_HasFPRegs, // VLDRS = 2808 CEFBS_HasV8_1MMainline_Has8MSecExt, // VLDR_FPCXTNS_off = 2809 CEFBS_HasV8_1MMainline_Has8MSecExt, // VLDR_FPCXTNS_post = 2810 CEFBS_HasV8_1MMainline_Has8MSecExt, // VLDR_FPCXTNS_pre = 2811 CEFBS_HasV8_1MMainline_Has8MSecExt, // VLDR_FPCXTS_off = 2812 CEFBS_HasV8_1MMainline_Has8MSecExt, // VLDR_FPCXTS_post = 2813 CEFBS_HasV8_1MMainline_Has8MSecExt, // VLDR_FPCXTS_pre = 2814 CEFBS_HasFPRegs_HasV8_1MMainline, // VLDR_FPSCR_NZCVQC_off = 2815 CEFBS_HasFPRegs_HasV8_1MMainline, // VLDR_FPSCR_NZCVQC_post = 2816 CEFBS_HasFPRegs_HasV8_1MMainline, // VLDR_FPSCR_NZCVQC_pre = 2817 CEFBS_HasFPRegs_HasV8_1MMainline, // VLDR_FPSCR_off = 2818 CEFBS_HasFPRegs_HasV8_1MMainline, // VLDR_FPSCR_post = 2819 CEFBS_HasFPRegs_HasV8_1MMainline, // VLDR_FPSCR_pre = 2820 CEFBS_HasV8_1MMainline_HasMVEInt, // VLDR_P0_off = 2821 CEFBS_HasV8_1MMainline_HasMVEInt, // VLDR_P0_post = 2822 CEFBS_HasV8_1MMainline_HasMVEInt, // VLDR_P0_pre = 2823 CEFBS_HasV8_1MMainline_HasMVEInt, // VLDR_VPR_off = 2824 CEFBS_HasV8_1MMainline_HasMVEInt, // VLDR_VPR_post = 2825 CEFBS_HasV8_1MMainline_HasMVEInt, // VLDR_VPR_pre = 2826 CEFBS_HasV8MMainline_Has8MSecExt, // VLLDM = 2827 CEFBS_HasV8MMainline_Has8MSecExt, // VLSTM = 2828 CEFBS_HasNEON, // VMAXfd = 2829 CEFBS_HasNEON, // VMAXfq = 2830 CEFBS_HasNEON_HasFullFP16, // VMAXhd = 2831 CEFBS_HasNEON_HasFullFP16, // VMAXhq = 2832 CEFBS_HasNEON, // VMAXsv16i8 = 2833 CEFBS_HasNEON, // VMAXsv2i32 = 2834 CEFBS_HasNEON, // VMAXsv4i16 = 2835 CEFBS_HasNEON, // VMAXsv4i32 = 2836 CEFBS_HasNEON, // VMAXsv8i16 = 2837 CEFBS_HasNEON, // VMAXsv8i8 = 2838 CEFBS_HasNEON, // VMAXuv16i8 = 2839 CEFBS_HasNEON, // VMAXuv2i32 = 2840 CEFBS_HasNEON, // VMAXuv4i16 = 2841 CEFBS_HasNEON, // VMAXuv4i32 = 2842 CEFBS_HasNEON, // VMAXuv8i16 = 2843 CEFBS_HasNEON, // VMAXuv8i8 = 2844 CEFBS_HasNEON, // VMINfd = 2845 CEFBS_HasNEON, // VMINfq = 2846 CEFBS_HasNEON_HasFullFP16, // VMINhd = 2847 CEFBS_HasNEON_HasFullFP16, // VMINhq = 2848 CEFBS_HasNEON, // VMINsv16i8 = 2849 CEFBS_HasNEON, // VMINsv2i32 = 2850 CEFBS_HasNEON, // VMINsv4i16 = 2851 CEFBS_HasNEON, // VMINsv4i32 = 2852 CEFBS_HasNEON, // VMINsv8i16 = 2853 CEFBS_HasNEON, // VMINsv8i8 = 2854 CEFBS_HasNEON, // VMINuv16i8 = 2855 CEFBS_HasNEON, // VMINuv2i32 = 2856 CEFBS_HasNEON, // VMINuv4i16 = 2857 CEFBS_HasNEON, // VMINuv4i32 = 2858 CEFBS_HasNEON, // VMINuv8i16 = 2859 CEFBS_HasNEON, // VMINuv8i8 = 2860 CEFBS_HasVFP2_HasDPVFP, // VMLAD = 2861 CEFBS_HasFullFP16, // VMLAH = 2862 CEFBS_HasNEON, // VMLALslsv2i32 = 2863 CEFBS_HasNEON, // VMLALslsv4i16 = 2864 CEFBS_HasNEON, // VMLALsluv2i32 = 2865 CEFBS_HasNEON, // VMLALsluv4i16 = 2866 CEFBS_HasNEON, // VMLALsv2i64 = 2867 CEFBS_HasNEON, // VMLALsv4i32 = 2868 CEFBS_HasNEON, // VMLALsv8i16 = 2869 CEFBS_HasNEON, // VMLALuv2i64 = 2870 CEFBS_HasNEON, // VMLALuv4i32 = 2871 CEFBS_HasNEON, // VMLALuv8i16 = 2872 CEFBS_HasVFP2, // VMLAS = 2873 CEFBS_HasNEON, // VMLAfd = 2874 CEFBS_HasNEON, // VMLAfq = 2875 CEFBS_HasNEON_HasFullFP16, // VMLAhd = 2876 CEFBS_HasNEON_HasFullFP16, // VMLAhq = 2877 CEFBS_HasNEON, // VMLAslfd = 2878 CEFBS_HasNEON, // VMLAslfq = 2879 CEFBS_HasNEON_HasFullFP16, // VMLAslhd = 2880 CEFBS_HasNEON_HasFullFP16, // VMLAslhq = 2881 CEFBS_HasNEON, // VMLAslv2i32 = 2882 CEFBS_HasNEON, // VMLAslv4i16 = 2883 CEFBS_HasNEON, // VMLAslv4i32 = 2884 CEFBS_HasNEON, // VMLAslv8i16 = 2885 CEFBS_HasNEON, // VMLAv16i8 = 2886 CEFBS_HasNEON, // VMLAv2i32 = 2887 CEFBS_HasNEON, // VMLAv4i16 = 2888 CEFBS_HasNEON, // VMLAv4i32 = 2889 CEFBS_HasNEON, // VMLAv8i16 = 2890 CEFBS_HasNEON, // VMLAv8i8 = 2891 CEFBS_HasVFP2_HasDPVFP, // VMLSD = 2892 CEFBS_HasFullFP16, // VMLSH = 2893 CEFBS_HasNEON, // VMLSLslsv2i32 = 2894 CEFBS_HasNEON, // VMLSLslsv4i16 = 2895 CEFBS_HasNEON, // VMLSLsluv2i32 = 2896 CEFBS_HasNEON, // VMLSLsluv4i16 = 2897 CEFBS_HasNEON, // VMLSLsv2i64 = 2898 CEFBS_HasNEON, // VMLSLsv4i32 = 2899 CEFBS_HasNEON, // VMLSLsv8i16 = 2900 CEFBS_HasNEON, // VMLSLuv2i64 = 2901 CEFBS_HasNEON, // VMLSLuv4i32 = 2902 CEFBS_HasNEON, // VMLSLuv8i16 = 2903 CEFBS_HasVFP2, // VMLSS = 2904 CEFBS_HasNEON, // VMLSfd = 2905 CEFBS_HasNEON, // VMLSfq = 2906 CEFBS_HasNEON_HasFullFP16, // VMLShd = 2907 CEFBS_HasNEON_HasFullFP16, // VMLShq = 2908 CEFBS_HasNEON, // VMLSslfd = 2909 CEFBS_HasNEON, // VMLSslfq = 2910 CEFBS_HasNEON_HasFullFP16, // VMLSslhd = 2911 CEFBS_HasNEON_HasFullFP16, // VMLSslhq = 2912 CEFBS_HasNEON, // VMLSslv2i32 = 2913 CEFBS_HasNEON, // VMLSslv4i16 = 2914 CEFBS_HasNEON, // VMLSslv4i32 = 2915 CEFBS_HasNEON, // VMLSslv8i16 = 2916 CEFBS_HasNEON, // VMLSv16i8 = 2917 CEFBS_HasNEON, // VMLSv2i32 = 2918 CEFBS_HasNEON, // VMLSv4i16 = 2919 CEFBS_HasNEON, // VMLSv4i32 = 2920 CEFBS_HasNEON, // VMLSv8i16 = 2921 CEFBS_HasNEON, // VMLSv8i8 = 2922 CEFBS_HasBF16_HasNEON, // VMMLA = 2923 CEFBS_HasFPRegs64, // VMOVD = 2924 CEFBS_HasFPRegs, // VMOVDRR = 2925 CEFBS_HasFullFP16, // VMOVH = 2926 CEFBS_HasFPRegs16, // VMOVHR = 2927 CEFBS_HasNEON, // VMOVLsv2i64 = 2928 CEFBS_HasNEON, // VMOVLsv4i32 = 2929 CEFBS_HasNEON, // VMOVLsv8i16 = 2930 CEFBS_HasNEON, // VMOVLuv2i64 = 2931 CEFBS_HasNEON, // VMOVLuv4i32 = 2932 CEFBS_HasNEON, // VMOVLuv8i16 = 2933 CEFBS_HasNEON, // VMOVNv2i32 = 2934 CEFBS_HasNEON, // VMOVNv4i16 = 2935 CEFBS_HasNEON, // VMOVNv8i8 = 2936 CEFBS_HasFPRegs16, // VMOVRH = 2937 CEFBS_HasFPRegs, // VMOVRRD = 2938 CEFBS_HasFPRegs, // VMOVRRS = 2939 CEFBS_HasFPRegs, // VMOVRS = 2940 CEFBS_HasFPRegs, // VMOVS = 2941 CEFBS_HasFPRegs, // VMOVSR = 2942 CEFBS_HasFPRegs, // VMOVSRR = 2943 CEFBS_HasNEON, // VMOVv16i8 = 2944 CEFBS_HasNEON, // VMOVv1i64 = 2945 CEFBS_HasNEON, // VMOVv2f32 = 2946 CEFBS_HasNEON, // VMOVv2i32 = 2947 CEFBS_HasNEON, // VMOVv2i64 = 2948 CEFBS_HasNEON, // VMOVv4f32 = 2949 CEFBS_HasNEON, // VMOVv4i16 = 2950 CEFBS_HasNEON, // VMOVv4i32 = 2951 CEFBS_HasNEON, // VMOVv8i16 = 2952 CEFBS_HasNEON, // VMOVv8i8 = 2953 CEFBS_HasFPRegs, // VMRS = 2954 CEFBS_HasV8_1MMainline_Has8MSecExt, // VMRS_FPCXTNS = 2955 CEFBS_HasV8_1MMainline_Has8MSecExt, // VMRS_FPCXTS = 2956 CEFBS_HasVFP2, // VMRS_FPEXC = 2957 CEFBS_HasVFP2, // VMRS_FPINST = 2958 CEFBS_HasVFP2, // VMRS_FPINST2 = 2959 CEFBS_HasV8_1MMainline_HasFPRegs, // VMRS_FPSCR_NZCVQC = 2960 CEFBS_HasVFP2, // VMRS_FPSID = 2961 CEFBS_HasVFP2, // VMRS_MVFR0 = 2962 CEFBS_HasVFP2, // VMRS_MVFR1 = 2963 CEFBS_HasFPARMv8, // VMRS_MVFR2 = 2964 CEFBS_HasV8_1MMainline_HasMVEInt, // VMRS_P0 = 2965 CEFBS_HasV8_1MMainline_HasMVEInt, // VMRS_VPR = 2966 CEFBS_HasFPRegs, // VMSR = 2967 CEFBS_HasV8_1MMainline_Has8MSecExt, // VMSR_FPCXTNS = 2968 CEFBS_HasV8_1MMainline_Has8MSecExt, // VMSR_FPCXTS = 2969 CEFBS_HasVFP2, // VMSR_FPEXC = 2970 CEFBS_HasVFP2, // VMSR_FPINST = 2971 CEFBS_HasVFP2, // VMSR_FPINST2 = 2972 CEFBS_HasV8_1MMainline_HasFPRegs, // VMSR_FPSCR_NZCVQC = 2973 CEFBS_HasVFP2, // VMSR_FPSID = 2974 CEFBS_HasV8_1MMainline_HasMVEInt, // VMSR_P0 = 2975 CEFBS_HasV8_1MMainline_HasMVEInt, // VMSR_VPR = 2976 CEFBS_HasVFP2_HasDPVFP, // VMULD = 2977 CEFBS_HasFullFP16, // VMULH = 2978 CEFBS_HasV8_HasAES, // VMULLp64 = 2979 CEFBS_HasNEON, // VMULLp8 = 2980 CEFBS_HasNEON, // VMULLslsv2i32 = 2981 CEFBS_HasNEON, // VMULLslsv4i16 = 2982 CEFBS_HasNEON, // VMULLsluv2i32 = 2983 CEFBS_HasNEON, // VMULLsluv4i16 = 2984 CEFBS_HasNEON, // VMULLsv2i64 = 2985 CEFBS_HasNEON, // VMULLsv4i32 = 2986 CEFBS_HasNEON, // VMULLsv8i16 = 2987 CEFBS_HasNEON, // VMULLuv2i64 = 2988 CEFBS_HasNEON, // VMULLuv4i32 = 2989 CEFBS_HasNEON, // VMULLuv8i16 = 2990 CEFBS_HasVFP2, // VMULS = 2991 CEFBS_HasNEON, // VMULfd = 2992 CEFBS_HasNEON, // VMULfq = 2993 CEFBS_HasNEON_HasFullFP16, // VMULhd = 2994 CEFBS_HasNEON_HasFullFP16, // VMULhq = 2995 CEFBS_HasNEON, // VMULpd = 2996 CEFBS_HasNEON, // VMULpq = 2997 CEFBS_HasNEON, // VMULslfd = 2998 CEFBS_HasNEON, // VMULslfq = 2999 CEFBS_HasNEON_HasFullFP16, // VMULslhd = 3000 CEFBS_HasNEON_HasFullFP16, // VMULslhq = 3001 CEFBS_HasNEON, // VMULslv2i32 = 3002 CEFBS_HasNEON, // VMULslv4i16 = 3003 CEFBS_HasNEON, // VMULslv4i32 = 3004 CEFBS_HasNEON, // VMULslv8i16 = 3005 CEFBS_HasNEON, // VMULv16i8 = 3006 CEFBS_HasNEON, // VMULv2i32 = 3007 CEFBS_HasNEON, // VMULv4i16 = 3008 CEFBS_HasNEON, // VMULv4i32 = 3009 CEFBS_HasNEON, // VMULv8i16 = 3010 CEFBS_HasNEON, // VMULv8i8 = 3011 CEFBS_HasNEON, // VMVNd = 3012 CEFBS_HasNEON, // VMVNq = 3013 CEFBS_HasNEON, // VMVNv2i32 = 3014 CEFBS_HasNEON, // VMVNv4i16 = 3015 CEFBS_HasNEON, // VMVNv4i32 = 3016 CEFBS_HasNEON, // VMVNv8i16 = 3017 CEFBS_HasVFP2_HasDPVFP, // VNEGD = 3018 CEFBS_HasFullFP16, // VNEGH = 3019 CEFBS_HasVFP2, // VNEGS = 3020 CEFBS_HasNEON, // VNEGf32q = 3021 CEFBS_HasNEON, // VNEGfd = 3022 CEFBS_HasNEON_HasFullFP16, // VNEGhd = 3023 CEFBS_HasNEON_HasFullFP16, // VNEGhq = 3024 CEFBS_HasNEON, // VNEGs16d = 3025 CEFBS_HasNEON, // VNEGs16q = 3026 CEFBS_HasNEON, // VNEGs32d = 3027 CEFBS_HasNEON, // VNEGs32q = 3028 CEFBS_HasNEON, // VNEGs8d = 3029 CEFBS_HasNEON, // VNEGs8q = 3030 CEFBS_HasVFP2_HasDPVFP, // VNMLAD = 3031 CEFBS_HasFullFP16, // VNMLAH = 3032 CEFBS_HasVFP2, // VNMLAS = 3033 CEFBS_HasVFP2_HasDPVFP, // VNMLSD = 3034 CEFBS_HasFullFP16, // VNMLSH = 3035 CEFBS_HasVFP2, // VNMLSS = 3036 CEFBS_HasVFP2_HasDPVFP, // VNMULD = 3037 CEFBS_HasFullFP16, // VNMULH = 3038 CEFBS_HasVFP2, // VNMULS = 3039 CEFBS_HasNEON, // VORNd = 3040 CEFBS_HasNEON, // VORNq = 3041 CEFBS_HasNEON, // VORRd = 3042 CEFBS_HasNEON, // VORRiv2i32 = 3043 CEFBS_HasNEON, // VORRiv4i16 = 3044 CEFBS_HasNEON, // VORRiv4i32 = 3045 CEFBS_HasNEON, // VORRiv8i16 = 3046 CEFBS_HasNEON, // VORRq = 3047 CEFBS_HasNEON, // VPADALsv16i8 = 3048 CEFBS_HasNEON, // VPADALsv2i32 = 3049 CEFBS_HasNEON, // VPADALsv4i16 = 3050 CEFBS_HasNEON, // VPADALsv4i32 = 3051 CEFBS_HasNEON, // VPADALsv8i16 = 3052 CEFBS_HasNEON, // VPADALsv8i8 = 3053 CEFBS_HasNEON, // VPADALuv16i8 = 3054 CEFBS_HasNEON, // VPADALuv2i32 = 3055 CEFBS_HasNEON, // VPADALuv4i16 = 3056 CEFBS_HasNEON, // VPADALuv4i32 = 3057 CEFBS_HasNEON, // VPADALuv8i16 = 3058 CEFBS_HasNEON, // VPADALuv8i8 = 3059 CEFBS_HasNEON, // VPADDLsv16i8 = 3060 CEFBS_HasNEON, // VPADDLsv2i32 = 3061 CEFBS_HasNEON, // VPADDLsv4i16 = 3062 CEFBS_HasNEON, // VPADDLsv4i32 = 3063 CEFBS_HasNEON, // VPADDLsv8i16 = 3064 CEFBS_HasNEON, // VPADDLsv8i8 = 3065 CEFBS_HasNEON, // VPADDLuv16i8 = 3066 CEFBS_HasNEON, // VPADDLuv2i32 = 3067 CEFBS_HasNEON, // VPADDLuv4i16 = 3068 CEFBS_HasNEON, // VPADDLuv4i32 = 3069 CEFBS_HasNEON, // VPADDLuv8i16 = 3070 CEFBS_HasNEON, // VPADDLuv8i8 = 3071 CEFBS_HasNEON, // VPADDf = 3072 CEFBS_HasNEON_HasFullFP16, // VPADDh = 3073 CEFBS_HasNEON, // VPADDi16 = 3074 CEFBS_HasNEON, // VPADDi32 = 3075 CEFBS_HasNEON, // VPADDi8 = 3076 CEFBS_HasNEON, // VPMAXf = 3077 CEFBS_HasNEON_HasFullFP16, // VPMAXh = 3078 CEFBS_HasNEON, // VPMAXs16 = 3079 CEFBS_HasNEON, // VPMAXs32 = 3080 CEFBS_HasNEON, // VPMAXs8 = 3081 CEFBS_HasNEON, // VPMAXu16 = 3082 CEFBS_HasNEON, // VPMAXu32 = 3083 CEFBS_HasNEON, // VPMAXu8 = 3084 CEFBS_HasNEON, // VPMINf = 3085 CEFBS_HasNEON_HasFullFP16, // VPMINh = 3086 CEFBS_HasNEON, // VPMINs16 = 3087 CEFBS_HasNEON, // VPMINs32 = 3088 CEFBS_HasNEON, // VPMINs8 = 3089 CEFBS_HasNEON, // VPMINu16 = 3090 CEFBS_HasNEON, // VPMINu32 = 3091 CEFBS_HasNEON, // VPMINu8 = 3092 CEFBS_HasNEON, // VQABSv16i8 = 3093 CEFBS_HasNEON, // VQABSv2i32 = 3094 CEFBS_HasNEON, // VQABSv4i16 = 3095 CEFBS_HasNEON, // VQABSv4i32 = 3096 CEFBS_HasNEON, // VQABSv8i16 = 3097 CEFBS_HasNEON, // VQABSv8i8 = 3098 CEFBS_HasNEON, // VQADDsv16i8 = 3099 CEFBS_HasNEON, // VQADDsv1i64 = 3100 CEFBS_HasNEON, // VQADDsv2i32 = 3101 CEFBS_HasNEON, // VQADDsv2i64 = 3102 CEFBS_HasNEON, // VQADDsv4i16 = 3103 CEFBS_HasNEON, // VQADDsv4i32 = 3104 CEFBS_HasNEON, // VQADDsv8i16 = 3105 CEFBS_HasNEON, // VQADDsv8i8 = 3106 CEFBS_HasNEON, // VQADDuv16i8 = 3107 CEFBS_HasNEON, // VQADDuv1i64 = 3108 CEFBS_HasNEON, // VQADDuv2i32 = 3109 CEFBS_HasNEON, // VQADDuv2i64 = 3110 CEFBS_HasNEON, // VQADDuv4i16 = 3111 CEFBS_HasNEON, // VQADDuv4i32 = 3112 CEFBS_HasNEON, // VQADDuv8i16 = 3113 CEFBS_HasNEON, // VQADDuv8i8 = 3114 CEFBS_HasNEON, // VQDMLALslv2i32 = 3115 CEFBS_HasNEON, // VQDMLALslv4i16 = 3116 CEFBS_HasNEON, // VQDMLALv2i64 = 3117 CEFBS_HasNEON, // VQDMLALv4i32 = 3118 CEFBS_HasNEON, // VQDMLSLslv2i32 = 3119 CEFBS_HasNEON, // VQDMLSLslv4i16 = 3120 CEFBS_HasNEON, // VQDMLSLv2i64 = 3121 CEFBS_HasNEON, // VQDMLSLv4i32 = 3122 CEFBS_HasNEON, // VQDMULHslv2i32 = 3123 CEFBS_HasNEON, // VQDMULHslv4i16 = 3124 CEFBS_HasNEON, // VQDMULHslv4i32 = 3125 CEFBS_HasNEON, // VQDMULHslv8i16 = 3126 CEFBS_HasNEON, // VQDMULHv2i32 = 3127 CEFBS_HasNEON, // VQDMULHv4i16 = 3128 CEFBS_HasNEON, // VQDMULHv4i32 = 3129 CEFBS_HasNEON, // VQDMULHv8i16 = 3130 CEFBS_HasNEON, // VQDMULLslv2i32 = 3131 CEFBS_HasNEON, // VQDMULLslv4i16 = 3132 CEFBS_HasNEON, // VQDMULLv2i64 = 3133 CEFBS_HasNEON, // VQDMULLv4i32 = 3134 CEFBS_HasNEON, // VQMOVNsuv2i32 = 3135 CEFBS_HasNEON, // VQMOVNsuv4i16 = 3136 CEFBS_HasNEON, // VQMOVNsuv8i8 = 3137 CEFBS_HasNEON, // VQMOVNsv2i32 = 3138 CEFBS_HasNEON, // VQMOVNsv4i16 = 3139 CEFBS_HasNEON, // VQMOVNsv8i8 = 3140 CEFBS_HasNEON, // VQMOVNuv2i32 = 3141 CEFBS_HasNEON, // VQMOVNuv4i16 = 3142 CEFBS_HasNEON, // VQMOVNuv8i8 = 3143 CEFBS_HasNEON, // VQNEGv16i8 = 3144 CEFBS_HasNEON, // VQNEGv2i32 = 3145 CEFBS_HasNEON, // VQNEGv4i16 = 3146 CEFBS_HasNEON, // VQNEGv4i32 = 3147 CEFBS_HasNEON, // VQNEGv8i16 = 3148 CEFBS_HasNEON, // VQNEGv8i8 = 3149 CEFBS_HasNEON_HasV8_1a, // VQRDMLAHslv2i32 = 3150 CEFBS_HasNEON_HasV8_1a, // VQRDMLAHslv4i16 = 3151 CEFBS_HasNEON_HasV8_1a, // VQRDMLAHslv4i32 = 3152 CEFBS_HasNEON_HasV8_1a, // VQRDMLAHslv8i16 = 3153 CEFBS_HasNEON_HasV8_1a, // VQRDMLAHv2i32 = 3154 CEFBS_HasNEON_HasV8_1a, // VQRDMLAHv4i16 = 3155 CEFBS_HasNEON_HasV8_1a, // VQRDMLAHv4i32 = 3156 CEFBS_HasNEON_HasV8_1a, // VQRDMLAHv8i16 = 3157 CEFBS_HasNEON_HasV8_1a, // VQRDMLSHslv2i32 = 3158 CEFBS_HasNEON_HasV8_1a, // VQRDMLSHslv4i16 = 3159 CEFBS_HasNEON_HasV8_1a, // VQRDMLSHslv4i32 = 3160 CEFBS_HasNEON_HasV8_1a, // VQRDMLSHslv8i16 = 3161 CEFBS_HasNEON_HasV8_1a, // VQRDMLSHv2i32 = 3162 CEFBS_HasNEON_HasV8_1a, // VQRDMLSHv4i16 = 3163 CEFBS_HasNEON_HasV8_1a, // VQRDMLSHv4i32 = 3164 CEFBS_HasNEON_HasV8_1a, // VQRDMLSHv8i16 = 3165 CEFBS_HasNEON, // VQRDMULHslv2i32 = 3166 CEFBS_HasNEON, // VQRDMULHslv4i16 = 3167 CEFBS_HasNEON, // VQRDMULHslv4i32 = 3168 CEFBS_HasNEON, // VQRDMULHslv8i16 = 3169 CEFBS_HasNEON, // VQRDMULHv2i32 = 3170 CEFBS_HasNEON, // VQRDMULHv4i16 = 3171 CEFBS_HasNEON, // VQRDMULHv4i32 = 3172 CEFBS_HasNEON, // VQRDMULHv8i16 = 3173 CEFBS_HasNEON, // VQRSHLsv16i8 = 3174 CEFBS_HasNEON, // VQRSHLsv1i64 = 3175 CEFBS_HasNEON, // VQRSHLsv2i32 = 3176 CEFBS_HasNEON, // VQRSHLsv2i64 = 3177 CEFBS_HasNEON, // VQRSHLsv4i16 = 3178 CEFBS_HasNEON, // VQRSHLsv4i32 = 3179 CEFBS_HasNEON, // VQRSHLsv8i16 = 3180 CEFBS_HasNEON, // VQRSHLsv8i8 = 3181 CEFBS_HasNEON, // VQRSHLuv16i8 = 3182 CEFBS_HasNEON, // VQRSHLuv1i64 = 3183 CEFBS_HasNEON, // VQRSHLuv2i32 = 3184 CEFBS_HasNEON, // VQRSHLuv2i64 = 3185 CEFBS_HasNEON, // VQRSHLuv4i16 = 3186 CEFBS_HasNEON, // VQRSHLuv4i32 = 3187 CEFBS_HasNEON, // VQRSHLuv8i16 = 3188 CEFBS_HasNEON, // VQRSHLuv8i8 = 3189 CEFBS_HasNEON, // VQRSHRNsv2i32 = 3190 CEFBS_HasNEON, // VQRSHRNsv4i16 = 3191 CEFBS_HasNEON, // VQRSHRNsv8i8 = 3192 CEFBS_HasNEON, // VQRSHRNuv2i32 = 3193 CEFBS_HasNEON, // VQRSHRNuv4i16 = 3194 CEFBS_HasNEON, // VQRSHRNuv8i8 = 3195 CEFBS_HasNEON, // VQRSHRUNv2i32 = 3196 CEFBS_HasNEON, // VQRSHRUNv4i16 = 3197 CEFBS_HasNEON, // VQRSHRUNv8i8 = 3198 CEFBS_HasNEON, // VQSHLsiv16i8 = 3199 CEFBS_HasNEON, // VQSHLsiv1i64 = 3200 CEFBS_HasNEON, // VQSHLsiv2i32 = 3201 CEFBS_HasNEON, // VQSHLsiv2i64 = 3202 CEFBS_HasNEON, // VQSHLsiv4i16 = 3203 CEFBS_HasNEON, // VQSHLsiv4i32 = 3204 CEFBS_HasNEON, // VQSHLsiv8i16 = 3205 CEFBS_HasNEON, // VQSHLsiv8i8 = 3206 CEFBS_HasNEON, // VQSHLsuv16i8 = 3207 CEFBS_HasNEON, // VQSHLsuv1i64 = 3208 CEFBS_HasNEON, // VQSHLsuv2i32 = 3209 CEFBS_HasNEON, // VQSHLsuv2i64 = 3210 CEFBS_HasNEON, // VQSHLsuv4i16 = 3211 CEFBS_HasNEON, // VQSHLsuv4i32 = 3212 CEFBS_HasNEON, // VQSHLsuv8i16 = 3213 CEFBS_HasNEON, // VQSHLsuv8i8 = 3214 CEFBS_HasNEON, // VQSHLsv16i8 = 3215 CEFBS_HasNEON, // VQSHLsv1i64 = 3216 CEFBS_HasNEON, // VQSHLsv2i32 = 3217 CEFBS_HasNEON, // VQSHLsv2i64 = 3218 CEFBS_HasNEON, // VQSHLsv4i16 = 3219 CEFBS_HasNEON, // VQSHLsv4i32 = 3220 CEFBS_HasNEON, // VQSHLsv8i16 = 3221 CEFBS_HasNEON, // VQSHLsv8i8 = 3222 CEFBS_HasNEON, // VQSHLuiv16i8 = 3223 CEFBS_HasNEON, // VQSHLuiv1i64 = 3224 CEFBS_HasNEON, // VQSHLuiv2i32 = 3225 CEFBS_HasNEON, // VQSHLuiv2i64 = 3226 CEFBS_HasNEON, // VQSHLuiv4i16 = 3227 CEFBS_HasNEON, // VQSHLuiv4i32 = 3228 CEFBS_HasNEON, // VQSHLuiv8i16 = 3229 CEFBS_HasNEON, // VQSHLuiv8i8 = 3230 CEFBS_HasNEON, // VQSHLuv16i8 = 3231 CEFBS_HasNEON, // VQSHLuv1i64 = 3232 CEFBS_HasNEON, // VQSHLuv2i32 = 3233 CEFBS_HasNEON, // VQSHLuv2i64 = 3234 CEFBS_HasNEON, // VQSHLuv4i16 = 3235 CEFBS_HasNEON, // VQSHLuv4i32 = 3236 CEFBS_HasNEON, // VQSHLuv8i16 = 3237 CEFBS_HasNEON, // VQSHLuv8i8 = 3238 CEFBS_HasNEON, // VQSHRNsv2i32 = 3239 CEFBS_HasNEON, // VQSHRNsv4i16 = 3240 CEFBS_HasNEON, // VQSHRNsv8i8 = 3241 CEFBS_HasNEON, // VQSHRNuv2i32 = 3242 CEFBS_HasNEON, // VQSHRNuv4i16 = 3243 CEFBS_HasNEON, // VQSHRNuv8i8 = 3244 CEFBS_HasNEON, // VQSHRUNv2i32 = 3245 CEFBS_HasNEON, // VQSHRUNv4i16 = 3246 CEFBS_HasNEON, // VQSHRUNv8i8 = 3247 CEFBS_HasNEON, // VQSUBsv16i8 = 3248 CEFBS_HasNEON, // VQSUBsv1i64 = 3249 CEFBS_HasNEON, // VQSUBsv2i32 = 3250 CEFBS_HasNEON, // VQSUBsv2i64 = 3251 CEFBS_HasNEON, // VQSUBsv4i16 = 3252 CEFBS_HasNEON, // VQSUBsv4i32 = 3253 CEFBS_HasNEON, // VQSUBsv8i16 = 3254 CEFBS_HasNEON, // VQSUBsv8i8 = 3255 CEFBS_HasNEON, // VQSUBuv16i8 = 3256 CEFBS_HasNEON, // VQSUBuv1i64 = 3257 CEFBS_HasNEON, // VQSUBuv2i32 = 3258 CEFBS_HasNEON, // VQSUBuv2i64 = 3259 CEFBS_HasNEON, // VQSUBuv4i16 = 3260 CEFBS_HasNEON, // VQSUBuv4i32 = 3261 CEFBS_HasNEON, // VQSUBuv8i16 = 3262 CEFBS_HasNEON, // VQSUBuv8i8 = 3263 CEFBS_HasNEON, // VRADDHNv2i32 = 3264 CEFBS_HasNEON, // VRADDHNv4i16 = 3265 CEFBS_HasNEON, // VRADDHNv8i8 = 3266 CEFBS_HasNEON, // VRECPEd = 3267 CEFBS_HasNEON, // VRECPEfd = 3268 CEFBS_HasNEON, // VRECPEfq = 3269 CEFBS_HasNEON_HasFullFP16, // VRECPEhd = 3270 CEFBS_HasNEON_HasFullFP16, // VRECPEhq = 3271 CEFBS_HasNEON, // VRECPEq = 3272 CEFBS_HasNEON, // VRECPSfd = 3273 CEFBS_HasNEON, // VRECPSfq = 3274 CEFBS_HasNEON_HasFullFP16, // VRECPShd = 3275 CEFBS_HasNEON_HasFullFP16, // VRECPShq = 3276 CEFBS_HasNEON, // VREV16d8 = 3277 CEFBS_HasNEON, // VREV16q8 = 3278 CEFBS_HasNEON, // VREV32d16 = 3279 CEFBS_HasNEON, // VREV32d8 = 3280 CEFBS_HasNEON, // VREV32q16 = 3281 CEFBS_HasNEON, // VREV32q8 = 3282 CEFBS_HasNEON, // VREV64d16 = 3283 CEFBS_HasNEON, // VREV64d32 = 3284 CEFBS_HasNEON, // VREV64d8 = 3285 CEFBS_HasNEON, // VREV64q16 = 3286 CEFBS_HasNEON, // VREV64q32 = 3287 CEFBS_HasNEON, // VREV64q8 = 3288 CEFBS_HasNEON, // VRHADDsv16i8 = 3289 CEFBS_HasNEON, // VRHADDsv2i32 = 3290 CEFBS_HasNEON, // VRHADDsv4i16 = 3291 CEFBS_HasNEON, // VRHADDsv4i32 = 3292 CEFBS_HasNEON, // VRHADDsv8i16 = 3293 CEFBS_HasNEON, // VRHADDsv8i8 = 3294 CEFBS_HasNEON, // VRHADDuv16i8 = 3295 CEFBS_HasNEON, // VRHADDuv2i32 = 3296 CEFBS_HasNEON, // VRHADDuv4i16 = 3297 CEFBS_HasNEON, // VRHADDuv4i32 = 3298 CEFBS_HasNEON, // VRHADDuv8i16 = 3299 CEFBS_HasNEON, // VRHADDuv8i8 = 3300 CEFBS_HasFPARMv8_HasDPVFP, // VRINTAD = 3301 CEFBS_HasFullFP16, // VRINTAH = 3302 CEFBS_HasV8_HasNEON, // VRINTANDf = 3303 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTANDh = 3304 CEFBS_HasV8_HasNEON, // VRINTANQf = 3305 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTANQh = 3306 CEFBS_HasFPARMv8, // VRINTAS = 3307 CEFBS_HasFPARMv8_HasDPVFP, // VRINTMD = 3308 CEFBS_HasFullFP16, // VRINTMH = 3309 CEFBS_HasV8_HasNEON, // VRINTMNDf = 3310 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTMNDh = 3311 CEFBS_HasV8_HasNEON, // VRINTMNQf = 3312 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTMNQh = 3313 CEFBS_HasFPARMv8, // VRINTMS = 3314 CEFBS_HasFPARMv8_HasDPVFP, // VRINTND = 3315 CEFBS_HasFullFP16, // VRINTNH = 3316 CEFBS_HasV8_HasNEON, // VRINTNNDf = 3317 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTNNDh = 3318 CEFBS_HasV8_HasNEON, // VRINTNNQf = 3319 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTNNQh = 3320 CEFBS_HasFPARMv8, // VRINTNS = 3321 CEFBS_HasFPARMv8_HasDPVFP, // VRINTPD = 3322 CEFBS_HasFullFP16, // VRINTPH = 3323 CEFBS_HasV8_HasNEON, // VRINTPNDf = 3324 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTPNDh = 3325 CEFBS_HasV8_HasNEON, // VRINTPNQf = 3326 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTPNQh = 3327 CEFBS_HasFPARMv8, // VRINTPS = 3328 CEFBS_HasFPARMv8_HasDPVFP, // VRINTRD = 3329 CEFBS_HasFullFP16, // VRINTRH = 3330 CEFBS_HasFPARMv8, // VRINTRS = 3331 CEFBS_HasFPARMv8_HasDPVFP, // VRINTXD = 3332 CEFBS_HasFullFP16, // VRINTXH = 3333 CEFBS_HasV8_HasNEON, // VRINTXNDf = 3334 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTXNDh = 3335 CEFBS_HasV8_HasNEON, // VRINTXNQf = 3336 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTXNQh = 3337 CEFBS_HasFPARMv8, // VRINTXS = 3338 CEFBS_HasFPARMv8_HasDPVFP, // VRINTZD = 3339 CEFBS_HasFullFP16, // VRINTZH = 3340 CEFBS_HasV8_HasNEON, // VRINTZNDf = 3341 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTZNDh = 3342 CEFBS_HasV8_HasNEON, // VRINTZNQf = 3343 CEFBS_HasV8_HasNEON_HasFullFP16, // VRINTZNQh = 3344 CEFBS_HasFPARMv8, // VRINTZS = 3345 CEFBS_HasNEON, // VRSHLsv16i8 = 3346 CEFBS_HasNEON, // VRSHLsv1i64 = 3347 CEFBS_HasNEON, // VRSHLsv2i32 = 3348 CEFBS_HasNEON, // VRSHLsv2i64 = 3349 CEFBS_HasNEON, // VRSHLsv4i16 = 3350 CEFBS_HasNEON, // VRSHLsv4i32 = 3351 CEFBS_HasNEON, // VRSHLsv8i16 = 3352 CEFBS_HasNEON, // VRSHLsv8i8 = 3353 CEFBS_HasNEON, // VRSHLuv16i8 = 3354 CEFBS_HasNEON, // VRSHLuv1i64 = 3355 CEFBS_HasNEON, // VRSHLuv2i32 = 3356 CEFBS_HasNEON, // VRSHLuv2i64 = 3357 CEFBS_HasNEON, // VRSHLuv4i16 = 3358 CEFBS_HasNEON, // VRSHLuv4i32 = 3359 CEFBS_HasNEON, // VRSHLuv8i16 = 3360 CEFBS_HasNEON, // VRSHLuv8i8 = 3361 CEFBS_HasNEON, // VRSHRNv2i32 = 3362 CEFBS_HasNEON, // VRSHRNv4i16 = 3363 CEFBS_HasNEON, // VRSHRNv8i8 = 3364 CEFBS_HasNEON, // VRSHRsv16i8 = 3365 CEFBS_HasNEON, // VRSHRsv1i64 = 3366 CEFBS_HasNEON, // VRSHRsv2i32 = 3367 CEFBS_HasNEON, // VRSHRsv2i64 = 3368 CEFBS_HasNEON, // VRSHRsv4i16 = 3369 CEFBS_HasNEON, // VRSHRsv4i32 = 3370 CEFBS_HasNEON, // VRSHRsv8i16 = 3371 CEFBS_HasNEON, // VRSHRsv8i8 = 3372 CEFBS_HasNEON, // VRSHRuv16i8 = 3373 CEFBS_HasNEON, // VRSHRuv1i64 = 3374 CEFBS_HasNEON, // VRSHRuv2i32 = 3375 CEFBS_HasNEON, // VRSHRuv2i64 = 3376 CEFBS_HasNEON, // VRSHRuv4i16 = 3377 CEFBS_HasNEON, // VRSHRuv4i32 = 3378 CEFBS_HasNEON, // VRSHRuv8i16 = 3379 CEFBS_HasNEON, // VRSHRuv8i8 = 3380 CEFBS_HasNEON, // VRSQRTEd = 3381 CEFBS_HasNEON, // VRSQRTEfd = 3382 CEFBS_HasNEON, // VRSQRTEfq = 3383 CEFBS_HasNEON_HasFullFP16, // VRSQRTEhd = 3384 CEFBS_HasNEON_HasFullFP16, // VRSQRTEhq = 3385 CEFBS_HasNEON, // VRSQRTEq = 3386 CEFBS_HasNEON, // VRSQRTSfd = 3387 CEFBS_HasNEON, // VRSQRTSfq = 3388 CEFBS_HasNEON_HasFullFP16, // VRSQRTShd = 3389 CEFBS_HasNEON_HasFullFP16, // VRSQRTShq = 3390 CEFBS_HasNEON, // VRSRAsv16i8 = 3391 CEFBS_HasNEON, // VRSRAsv1i64 = 3392 CEFBS_HasNEON, // VRSRAsv2i32 = 3393 CEFBS_HasNEON, // VRSRAsv2i64 = 3394 CEFBS_HasNEON, // VRSRAsv4i16 = 3395 CEFBS_HasNEON, // VRSRAsv4i32 = 3396 CEFBS_HasNEON, // VRSRAsv8i16 = 3397 CEFBS_HasNEON, // VRSRAsv8i8 = 3398 CEFBS_HasNEON, // VRSRAuv16i8 = 3399 CEFBS_HasNEON, // VRSRAuv1i64 = 3400 CEFBS_HasNEON, // VRSRAuv2i32 = 3401 CEFBS_HasNEON, // VRSRAuv2i64 = 3402 CEFBS_HasNEON, // VRSRAuv4i16 = 3403 CEFBS_HasNEON, // VRSRAuv4i32 = 3404 CEFBS_HasNEON, // VRSRAuv8i16 = 3405 CEFBS_HasNEON, // VRSRAuv8i8 = 3406 CEFBS_HasNEON, // VRSUBHNv2i32 = 3407 CEFBS_HasNEON, // VRSUBHNv4i16 = 3408 CEFBS_HasNEON, // VRSUBHNv8i8 = 3409 CEFBS_HasV8_1MMainline_Has8MSecExt, // VSCCLRMD = 3410 CEFBS_HasV8_1MMainline_Has8MSecExt, // VSCCLRMS = 3411 CEFBS_HasDotProd, // VSDOTD = 3412 CEFBS_HasDotProd, // VSDOTDI = 3413 CEFBS_HasDotProd, // VSDOTQ = 3414 CEFBS_HasDotProd, // VSDOTQI = 3415 CEFBS_HasFPARMv8_HasDPVFP, // VSELEQD = 3416 CEFBS_HasFullFP16, // VSELEQH = 3417 CEFBS_HasFPARMv8, // VSELEQS = 3418 CEFBS_HasFPARMv8_HasDPVFP, // VSELGED = 3419 CEFBS_HasFullFP16, // VSELGEH = 3420 CEFBS_HasFPARMv8, // VSELGES = 3421 CEFBS_HasFPARMv8_HasDPVFP, // VSELGTD = 3422 CEFBS_HasFullFP16, // VSELGTH = 3423 CEFBS_HasFPARMv8, // VSELGTS = 3424 CEFBS_HasFPARMv8_HasDPVFP, // VSELVSD = 3425 CEFBS_HasFullFP16, // VSELVSH = 3426 CEFBS_HasFPARMv8, // VSELVSS = 3427 CEFBS_HasNEON, // VSETLNi16 = 3428 CEFBS_HasVFP2, // VSETLNi32 = 3429 CEFBS_HasNEON, // VSETLNi8 = 3430 CEFBS_HasNEON, // VSHLLi16 = 3431 CEFBS_HasNEON, // VSHLLi32 = 3432 CEFBS_HasNEON, // VSHLLi8 = 3433 CEFBS_HasNEON, // VSHLLsv2i64 = 3434 CEFBS_HasNEON, // VSHLLsv4i32 = 3435 CEFBS_HasNEON, // VSHLLsv8i16 = 3436 CEFBS_HasNEON, // VSHLLuv2i64 = 3437 CEFBS_HasNEON, // VSHLLuv4i32 = 3438 CEFBS_HasNEON, // VSHLLuv8i16 = 3439 CEFBS_HasNEON, // VSHLiv16i8 = 3440 CEFBS_HasNEON, // VSHLiv1i64 = 3441 CEFBS_HasNEON, // VSHLiv2i32 = 3442 CEFBS_HasNEON, // VSHLiv2i64 = 3443 CEFBS_HasNEON, // VSHLiv4i16 = 3444 CEFBS_HasNEON, // VSHLiv4i32 = 3445 CEFBS_HasNEON, // VSHLiv8i16 = 3446 CEFBS_HasNEON, // VSHLiv8i8 = 3447 CEFBS_HasNEON, // VSHLsv16i8 = 3448 CEFBS_HasNEON, // VSHLsv1i64 = 3449 CEFBS_HasNEON, // VSHLsv2i32 = 3450 CEFBS_HasNEON, // VSHLsv2i64 = 3451 CEFBS_HasNEON, // VSHLsv4i16 = 3452 CEFBS_HasNEON, // VSHLsv4i32 = 3453 CEFBS_HasNEON, // VSHLsv8i16 = 3454 CEFBS_HasNEON, // VSHLsv8i8 = 3455 CEFBS_HasNEON, // VSHLuv16i8 = 3456 CEFBS_HasNEON, // VSHLuv1i64 = 3457 CEFBS_HasNEON, // VSHLuv2i32 = 3458 CEFBS_HasNEON, // VSHLuv2i64 = 3459 CEFBS_HasNEON, // VSHLuv4i16 = 3460 CEFBS_HasNEON, // VSHLuv4i32 = 3461 CEFBS_HasNEON, // VSHLuv8i16 = 3462 CEFBS_HasNEON, // VSHLuv8i8 = 3463 CEFBS_HasNEON, // VSHRNv2i32 = 3464 CEFBS_HasNEON, // VSHRNv4i16 = 3465 CEFBS_HasNEON, // VSHRNv8i8 = 3466 CEFBS_HasNEON, // VSHRsv16i8 = 3467 CEFBS_HasNEON, // VSHRsv1i64 = 3468 CEFBS_HasNEON, // VSHRsv2i32 = 3469 CEFBS_HasNEON, // VSHRsv2i64 = 3470 CEFBS_HasNEON, // VSHRsv4i16 = 3471 CEFBS_HasNEON, // VSHRsv4i32 = 3472 CEFBS_HasNEON, // VSHRsv8i16 = 3473 CEFBS_HasNEON, // VSHRsv8i8 = 3474 CEFBS_HasNEON, // VSHRuv16i8 = 3475 CEFBS_HasNEON, // VSHRuv1i64 = 3476 CEFBS_HasNEON, // VSHRuv2i32 = 3477 CEFBS_HasNEON, // VSHRuv2i64 = 3478 CEFBS_HasNEON, // VSHRuv4i16 = 3479 CEFBS_HasNEON, // VSHRuv4i32 = 3480 CEFBS_HasNEON, // VSHRuv8i16 = 3481 CEFBS_HasNEON, // VSHRuv8i8 = 3482 CEFBS_HasVFP2_HasDPVFP, // VSHTOD = 3483 CEFBS_HasFullFP16, // VSHTOH = 3484 CEFBS_HasVFP2, // VSHTOS = 3485 CEFBS_HasVFP2_HasDPVFP, // VSITOD = 3486 CEFBS_HasFullFP16, // VSITOH = 3487 CEFBS_HasVFP2, // VSITOS = 3488 CEFBS_HasNEON, // VSLIv16i8 = 3489 CEFBS_HasNEON, // VSLIv1i64 = 3490 CEFBS_HasNEON, // VSLIv2i32 = 3491 CEFBS_HasNEON, // VSLIv2i64 = 3492 CEFBS_HasNEON, // VSLIv4i16 = 3493 CEFBS_HasNEON, // VSLIv4i32 = 3494 CEFBS_HasNEON, // VSLIv8i16 = 3495 CEFBS_HasNEON, // VSLIv8i8 = 3496 CEFBS_HasVFP2_HasDPVFP, // VSLTOD = 3497 CEFBS_HasFullFP16, // VSLTOH = 3498 CEFBS_HasVFP2, // VSLTOS = 3499 CEFBS_HasMatMulInt8, // VSMMLA = 3500 CEFBS_HasVFP2_HasDPVFP, // VSQRTD = 3501 CEFBS_HasFullFP16, // VSQRTH = 3502 CEFBS_HasVFP2, // VSQRTS = 3503 CEFBS_HasNEON, // VSRAsv16i8 = 3504 CEFBS_HasNEON, // VSRAsv1i64 = 3505 CEFBS_HasNEON, // VSRAsv2i32 = 3506 CEFBS_HasNEON, // VSRAsv2i64 = 3507 CEFBS_HasNEON, // VSRAsv4i16 = 3508 CEFBS_HasNEON, // VSRAsv4i32 = 3509 CEFBS_HasNEON, // VSRAsv8i16 = 3510 CEFBS_HasNEON, // VSRAsv8i8 = 3511 CEFBS_HasNEON, // VSRAuv16i8 = 3512 CEFBS_HasNEON, // VSRAuv1i64 = 3513 CEFBS_HasNEON, // VSRAuv2i32 = 3514 CEFBS_HasNEON, // VSRAuv2i64 = 3515 CEFBS_HasNEON, // VSRAuv4i16 = 3516 CEFBS_HasNEON, // VSRAuv4i32 = 3517 CEFBS_HasNEON, // VSRAuv8i16 = 3518 CEFBS_HasNEON, // VSRAuv8i8 = 3519 CEFBS_HasNEON, // VSRIv16i8 = 3520 CEFBS_HasNEON, // VSRIv1i64 = 3521 CEFBS_HasNEON, // VSRIv2i32 = 3522 CEFBS_HasNEON, // VSRIv2i64 = 3523 CEFBS_HasNEON, // VSRIv4i16 = 3524 CEFBS_HasNEON, // VSRIv4i32 = 3525 CEFBS_HasNEON, // VSRIv8i16 = 3526 CEFBS_HasNEON, // VSRIv8i8 = 3527 CEFBS_HasNEON, // VST1LNd16 = 3528 CEFBS_HasNEON, // VST1LNd16_UPD = 3529 CEFBS_HasNEON, // VST1LNd32 = 3530 CEFBS_HasNEON, // VST1LNd32_UPD = 3531 CEFBS_HasNEON, // VST1LNd8 = 3532 CEFBS_HasNEON, // VST1LNd8_UPD = 3533 CEFBS_HasNEON, // VST1LNq16Pseudo = 3534 CEFBS_HasNEON, // VST1LNq16Pseudo_UPD = 3535 CEFBS_HasNEON, // VST1LNq32Pseudo = 3536 CEFBS_HasNEON, // VST1LNq32Pseudo_UPD = 3537 CEFBS_HasNEON, // VST1LNq8Pseudo = 3538 CEFBS_HasNEON, // VST1LNq8Pseudo_UPD = 3539 CEFBS_HasNEON, // VST1d16 = 3540 CEFBS_HasNEON, // VST1d16Q = 3541 CEFBS_HasNEON, // VST1d16QPseudo = 3542 CEFBS_HasNEON, // VST1d16QPseudoWB_fixed = 3543 CEFBS_HasNEON, // VST1d16QPseudoWB_register = 3544 CEFBS_HasNEON, // VST1d16Qwb_fixed = 3545 CEFBS_HasNEON, // VST1d16Qwb_register = 3546 CEFBS_HasNEON, // VST1d16T = 3547 CEFBS_HasNEON, // VST1d16TPseudo = 3548 CEFBS_HasNEON, // VST1d16TPseudoWB_fixed = 3549 CEFBS_HasNEON, // VST1d16TPseudoWB_register = 3550 CEFBS_HasNEON, // VST1d16Twb_fixed = 3551 CEFBS_HasNEON, // VST1d16Twb_register = 3552 CEFBS_HasNEON, // VST1d16wb_fixed = 3553 CEFBS_HasNEON, // VST1d16wb_register = 3554 CEFBS_HasNEON, // VST1d32 = 3555 CEFBS_HasNEON, // VST1d32Q = 3556 CEFBS_HasNEON, // VST1d32QPseudo = 3557 CEFBS_HasNEON, // VST1d32QPseudoWB_fixed = 3558 CEFBS_HasNEON, // VST1d32QPseudoWB_register = 3559 CEFBS_HasNEON, // VST1d32Qwb_fixed = 3560 CEFBS_HasNEON, // VST1d32Qwb_register = 3561 CEFBS_HasNEON, // VST1d32T = 3562 CEFBS_HasNEON, // VST1d32TPseudo = 3563 CEFBS_HasNEON, // VST1d32TPseudoWB_fixed = 3564 CEFBS_HasNEON, // VST1d32TPseudoWB_register = 3565 CEFBS_HasNEON, // VST1d32Twb_fixed = 3566 CEFBS_HasNEON, // VST1d32Twb_register = 3567 CEFBS_HasNEON, // VST1d32wb_fixed = 3568 CEFBS_HasNEON, // VST1d32wb_register = 3569 CEFBS_HasNEON, // VST1d64 = 3570 CEFBS_HasNEON, // VST1d64Q = 3571 CEFBS_HasNEON, // VST1d64QPseudo = 3572 CEFBS_HasNEON, // VST1d64QPseudoWB_fixed = 3573 CEFBS_HasNEON, // VST1d64QPseudoWB_register = 3574 CEFBS_HasNEON, // VST1d64Qwb_fixed = 3575 CEFBS_HasNEON, // VST1d64Qwb_register = 3576 CEFBS_HasNEON, // VST1d64T = 3577 CEFBS_HasNEON, // VST1d64TPseudo = 3578 CEFBS_HasNEON, // VST1d64TPseudoWB_fixed = 3579 CEFBS_HasNEON, // VST1d64TPseudoWB_register = 3580 CEFBS_HasNEON, // VST1d64Twb_fixed = 3581 CEFBS_HasNEON, // VST1d64Twb_register = 3582 CEFBS_HasNEON, // VST1d64wb_fixed = 3583 CEFBS_HasNEON, // VST1d64wb_register = 3584 CEFBS_HasNEON, // VST1d8 = 3585 CEFBS_HasNEON, // VST1d8Q = 3586 CEFBS_HasNEON, // VST1d8QPseudo = 3587 CEFBS_HasNEON, // VST1d8QPseudoWB_fixed = 3588 CEFBS_HasNEON, // VST1d8QPseudoWB_register = 3589 CEFBS_HasNEON, // VST1d8Qwb_fixed = 3590 CEFBS_HasNEON, // VST1d8Qwb_register = 3591 CEFBS_HasNEON, // VST1d8T = 3592 CEFBS_HasNEON, // VST1d8TPseudo = 3593 CEFBS_HasNEON, // VST1d8TPseudoWB_fixed = 3594 CEFBS_HasNEON, // VST1d8TPseudoWB_register = 3595 CEFBS_HasNEON, // VST1d8Twb_fixed = 3596 CEFBS_HasNEON, // VST1d8Twb_register = 3597 CEFBS_HasNEON, // VST1d8wb_fixed = 3598 CEFBS_HasNEON, // VST1d8wb_register = 3599 CEFBS_HasNEON, // VST1q16 = 3600 CEFBS_HasNEON, // VST1q16HighQPseudo = 3601 CEFBS_HasNEON, // VST1q16HighQPseudo_UPD = 3602 CEFBS_HasNEON, // VST1q16HighTPseudo = 3603 CEFBS_HasNEON, // VST1q16HighTPseudo_UPD = 3604 CEFBS_HasNEON, // VST1q16LowQPseudo_UPD = 3605 CEFBS_HasNEON, // VST1q16LowTPseudo_UPD = 3606 CEFBS_HasNEON, // VST1q16wb_fixed = 3607 CEFBS_HasNEON, // VST1q16wb_register = 3608 CEFBS_HasNEON, // VST1q32 = 3609 CEFBS_HasNEON, // VST1q32HighQPseudo = 3610 CEFBS_HasNEON, // VST1q32HighQPseudo_UPD = 3611 CEFBS_HasNEON, // VST1q32HighTPseudo = 3612 CEFBS_HasNEON, // VST1q32HighTPseudo_UPD = 3613 CEFBS_HasNEON, // VST1q32LowQPseudo_UPD = 3614 CEFBS_HasNEON, // VST1q32LowTPseudo_UPD = 3615 CEFBS_HasNEON, // VST1q32wb_fixed = 3616 CEFBS_HasNEON, // VST1q32wb_register = 3617 CEFBS_HasNEON, // VST1q64 = 3618 CEFBS_HasNEON, // VST1q64HighQPseudo = 3619 CEFBS_HasNEON, // VST1q64HighQPseudo_UPD = 3620 CEFBS_HasNEON, // VST1q64HighTPseudo = 3621 CEFBS_HasNEON, // VST1q64HighTPseudo_UPD = 3622 CEFBS_HasNEON, // VST1q64LowQPseudo_UPD = 3623 CEFBS_HasNEON, // VST1q64LowTPseudo_UPD = 3624 CEFBS_HasNEON, // VST1q64wb_fixed = 3625 CEFBS_HasNEON, // VST1q64wb_register = 3626 CEFBS_HasNEON, // VST1q8 = 3627 CEFBS_HasNEON, // VST1q8HighQPseudo = 3628 CEFBS_HasNEON, // VST1q8HighQPseudo_UPD = 3629 CEFBS_HasNEON, // VST1q8HighTPseudo = 3630 CEFBS_HasNEON, // VST1q8HighTPseudo_UPD = 3631 CEFBS_HasNEON, // VST1q8LowQPseudo_UPD = 3632 CEFBS_HasNEON, // VST1q8LowTPseudo_UPD = 3633 CEFBS_HasNEON, // VST1q8wb_fixed = 3634 CEFBS_HasNEON, // VST1q8wb_register = 3635 CEFBS_HasNEON, // VST2LNd16 = 3636 CEFBS_HasNEON, // VST2LNd16Pseudo = 3637 CEFBS_HasNEON, // VST2LNd16Pseudo_UPD = 3638 CEFBS_HasNEON, // VST2LNd16_UPD = 3639 CEFBS_HasNEON, // VST2LNd32 = 3640 CEFBS_HasNEON, // VST2LNd32Pseudo = 3641 CEFBS_HasNEON, // VST2LNd32Pseudo_UPD = 3642 CEFBS_HasNEON, // VST2LNd32_UPD = 3643 CEFBS_HasNEON, // VST2LNd8 = 3644 CEFBS_HasNEON, // VST2LNd8Pseudo = 3645 CEFBS_HasNEON, // VST2LNd8Pseudo_UPD = 3646 CEFBS_HasNEON, // VST2LNd8_UPD = 3647 CEFBS_HasNEON, // VST2LNq16 = 3648 CEFBS_HasNEON, // VST2LNq16Pseudo = 3649 CEFBS_HasNEON, // VST2LNq16Pseudo_UPD = 3650 CEFBS_HasNEON, // VST2LNq16_UPD = 3651 CEFBS_HasNEON, // VST2LNq32 = 3652 CEFBS_HasNEON, // VST2LNq32Pseudo = 3653 CEFBS_HasNEON, // VST2LNq32Pseudo_UPD = 3654 CEFBS_HasNEON, // VST2LNq32_UPD = 3655 CEFBS_HasNEON, // VST2b16 = 3656 CEFBS_HasNEON, // VST2b16wb_fixed = 3657 CEFBS_HasNEON, // VST2b16wb_register = 3658 CEFBS_HasNEON, // VST2b32 = 3659 CEFBS_HasNEON, // VST2b32wb_fixed = 3660 CEFBS_HasNEON, // VST2b32wb_register = 3661 CEFBS_HasNEON, // VST2b8 = 3662 CEFBS_HasNEON, // VST2b8wb_fixed = 3663 CEFBS_HasNEON, // VST2b8wb_register = 3664 CEFBS_HasNEON, // VST2d16 = 3665 CEFBS_HasNEON, // VST2d16wb_fixed = 3666 CEFBS_HasNEON, // VST2d16wb_register = 3667 CEFBS_HasNEON, // VST2d32 = 3668 CEFBS_HasNEON, // VST2d32wb_fixed = 3669 CEFBS_HasNEON, // VST2d32wb_register = 3670 CEFBS_HasNEON, // VST2d8 = 3671 CEFBS_HasNEON, // VST2d8wb_fixed = 3672 CEFBS_HasNEON, // VST2d8wb_register = 3673 CEFBS_HasNEON, // VST2q16 = 3674 CEFBS_HasNEON, // VST2q16Pseudo = 3675 CEFBS_HasNEON, // VST2q16PseudoWB_fixed = 3676 CEFBS_HasNEON, // VST2q16PseudoWB_register = 3677 CEFBS_HasNEON, // VST2q16wb_fixed = 3678 CEFBS_HasNEON, // VST2q16wb_register = 3679 CEFBS_HasNEON, // VST2q32 = 3680 CEFBS_HasNEON, // VST2q32Pseudo = 3681 CEFBS_HasNEON, // VST2q32PseudoWB_fixed = 3682 CEFBS_HasNEON, // VST2q32PseudoWB_register = 3683 CEFBS_HasNEON, // VST2q32wb_fixed = 3684 CEFBS_HasNEON, // VST2q32wb_register = 3685 CEFBS_HasNEON, // VST2q8 = 3686 CEFBS_HasNEON, // VST2q8Pseudo = 3687 CEFBS_HasNEON, // VST2q8PseudoWB_fixed = 3688 CEFBS_HasNEON, // VST2q8PseudoWB_register = 3689 CEFBS_HasNEON, // VST2q8wb_fixed = 3690 CEFBS_HasNEON, // VST2q8wb_register = 3691 CEFBS_HasNEON, // VST3LNd16 = 3692 CEFBS_HasNEON, // VST3LNd16Pseudo = 3693 CEFBS_HasNEON, // VST3LNd16Pseudo_UPD = 3694 CEFBS_HasNEON, // VST3LNd16_UPD = 3695 CEFBS_HasNEON, // VST3LNd32 = 3696 CEFBS_HasNEON, // VST3LNd32Pseudo = 3697 CEFBS_HasNEON, // VST3LNd32Pseudo_UPD = 3698 CEFBS_HasNEON, // VST3LNd32_UPD = 3699 CEFBS_HasNEON, // VST3LNd8 = 3700 CEFBS_HasNEON, // VST3LNd8Pseudo = 3701 CEFBS_HasNEON, // VST3LNd8Pseudo_UPD = 3702 CEFBS_HasNEON, // VST3LNd8_UPD = 3703 CEFBS_HasNEON, // VST3LNq16 = 3704 CEFBS_HasNEON, // VST3LNq16Pseudo = 3705 CEFBS_HasNEON, // VST3LNq16Pseudo_UPD = 3706 CEFBS_HasNEON, // VST3LNq16_UPD = 3707 CEFBS_HasNEON, // VST3LNq32 = 3708 CEFBS_HasNEON, // VST3LNq32Pseudo = 3709 CEFBS_HasNEON, // VST3LNq32Pseudo_UPD = 3710 CEFBS_HasNEON, // VST3LNq32_UPD = 3711 CEFBS_HasNEON, // VST3d16 = 3712 CEFBS_HasNEON, // VST3d16Pseudo = 3713 CEFBS_HasNEON, // VST3d16Pseudo_UPD = 3714 CEFBS_HasNEON, // VST3d16_UPD = 3715 CEFBS_HasNEON, // VST3d32 = 3716 CEFBS_HasNEON, // VST3d32Pseudo = 3717 CEFBS_HasNEON, // VST3d32Pseudo_UPD = 3718 CEFBS_HasNEON, // VST3d32_UPD = 3719 CEFBS_HasNEON, // VST3d8 = 3720 CEFBS_HasNEON, // VST3d8Pseudo = 3721 CEFBS_HasNEON, // VST3d8Pseudo_UPD = 3722 CEFBS_HasNEON, // VST3d8_UPD = 3723 CEFBS_HasNEON, // VST3q16 = 3724 CEFBS_HasNEON, // VST3q16Pseudo_UPD = 3725 CEFBS_HasNEON, // VST3q16_UPD = 3726 CEFBS_HasNEON, // VST3q16oddPseudo = 3727 CEFBS_HasNEON, // VST3q16oddPseudo_UPD = 3728 CEFBS_HasNEON, // VST3q32 = 3729 CEFBS_HasNEON, // VST3q32Pseudo_UPD = 3730 CEFBS_HasNEON, // VST3q32_UPD = 3731 CEFBS_HasNEON, // VST3q32oddPseudo = 3732 CEFBS_HasNEON, // VST3q32oddPseudo_UPD = 3733 CEFBS_HasNEON, // VST3q8 = 3734 CEFBS_HasNEON, // VST3q8Pseudo_UPD = 3735 CEFBS_HasNEON, // VST3q8_UPD = 3736 CEFBS_HasNEON, // VST3q8oddPseudo = 3737 CEFBS_HasNEON, // VST3q8oddPseudo_UPD = 3738 CEFBS_HasNEON, // VST4LNd16 = 3739 CEFBS_HasNEON, // VST4LNd16Pseudo = 3740 CEFBS_HasNEON, // VST4LNd16Pseudo_UPD = 3741 CEFBS_HasNEON, // VST4LNd16_UPD = 3742 CEFBS_HasNEON, // VST4LNd32 = 3743 CEFBS_HasNEON, // VST4LNd32Pseudo = 3744 CEFBS_HasNEON, // VST4LNd32Pseudo_UPD = 3745 CEFBS_HasNEON, // VST4LNd32_UPD = 3746 CEFBS_HasNEON, // VST4LNd8 = 3747 CEFBS_HasNEON, // VST4LNd8Pseudo = 3748 CEFBS_HasNEON, // VST4LNd8Pseudo_UPD = 3749 CEFBS_HasNEON, // VST4LNd8_UPD = 3750 CEFBS_HasNEON, // VST4LNq16 = 3751 CEFBS_HasNEON, // VST4LNq16Pseudo = 3752 CEFBS_HasNEON, // VST4LNq16Pseudo_UPD = 3753 CEFBS_HasNEON, // VST4LNq16_UPD = 3754 CEFBS_HasNEON, // VST4LNq32 = 3755 CEFBS_HasNEON, // VST4LNq32Pseudo = 3756 CEFBS_HasNEON, // VST4LNq32Pseudo_UPD = 3757 CEFBS_HasNEON, // VST4LNq32_UPD = 3758 CEFBS_HasNEON, // VST4d16 = 3759 CEFBS_HasNEON, // VST4d16Pseudo = 3760 CEFBS_HasNEON, // VST4d16Pseudo_UPD = 3761 CEFBS_HasNEON, // VST4d16_UPD = 3762 CEFBS_HasNEON, // VST4d32 = 3763 CEFBS_HasNEON, // VST4d32Pseudo = 3764 CEFBS_HasNEON, // VST4d32Pseudo_UPD = 3765 CEFBS_HasNEON, // VST4d32_UPD = 3766 CEFBS_HasNEON, // VST4d8 = 3767 CEFBS_HasNEON, // VST4d8Pseudo = 3768 CEFBS_HasNEON, // VST4d8Pseudo_UPD = 3769 CEFBS_HasNEON, // VST4d8_UPD = 3770 CEFBS_HasNEON, // VST4q16 = 3771 CEFBS_HasNEON, // VST4q16Pseudo_UPD = 3772 CEFBS_HasNEON, // VST4q16_UPD = 3773 CEFBS_HasNEON, // VST4q16oddPseudo = 3774 CEFBS_HasNEON, // VST4q16oddPseudo_UPD = 3775 CEFBS_HasNEON, // VST4q32 = 3776 CEFBS_HasNEON, // VST4q32Pseudo_UPD = 3777 CEFBS_HasNEON, // VST4q32_UPD = 3778 CEFBS_HasNEON, // VST4q32oddPseudo = 3779 CEFBS_HasNEON, // VST4q32oddPseudo_UPD = 3780 CEFBS_HasNEON, // VST4q8 = 3781 CEFBS_HasNEON, // VST4q8Pseudo_UPD = 3782 CEFBS_HasNEON, // VST4q8_UPD = 3783 CEFBS_HasNEON, // VST4q8oddPseudo = 3784 CEFBS_HasNEON, // VST4q8oddPseudo_UPD = 3785 CEFBS_HasFPRegs, // VSTMDDB_UPD = 3786 CEFBS_HasFPRegs, // VSTMDIA = 3787 CEFBS_HasFPRegs, // VSTMDIA_UPD = 3788 CEFBS_HasVFP2, // VSTMQIA = 3789 CEFBS_HasFPRegs, // VSTMSDB_UPD = 3790 CEFBS_HasFPRegs, // VSTMSIA = 3791 CEFBS_HasFPRegs, // VSTMSIA_UPD = 3792 CEFBS_HasFPRegs, // VSTRD = 3793 CEFBS_HasFPRegs16, // VSTRH = 3794 CEFBS_HasFPRegs, // VSTRS = 3795 CEFBS_HasV8_1MMainline_Has8MSecExt, // VSTR_FPCXTNS_off = 3796 CEFBS_HasV8_1MMainline_Has8MSecExt, // VSTR_FPCXTNS_post = 3797 CEFBS_HasV8_1MMainline_Has8MSecExt, // VSTR_FPCXTNS_pre = 3798 CEFBS_HasV8_1MMainline_Has8MSecExt, // VSTR_FPCXTS_off = 3799 CEFBS_HasV8_1MMainline_Has8MSecExt, // VSTR_FPCXTS_post = 3800 CEFBS_HasV8_1MMainline_Has8MSecExt, // VSTR_FPCXTS_pre = 3801 CEFBS_HasFPRegs_HasV8_1MMainline, // VSTR_FPSCR_NZCVQC_off = 3802 CEFBS_HasFPRegs_HasV8_1MMainline, // VSTR_FPSCR_NZCVQC_post = 3803 CEFBS_HasFPRegs_HasV8_1MMainline, // VSTR_FPSCR_NZCVQC_pre = 3804 CEFBS_HasFPRegs_HasV8_1MMainline, // VSTR_FPSCR_off = 3805 CEFBS_HasFPRegs_HasV8_1MMainline, // VSTR_FPSCR_post = 3806 CEFBS_HasFPRegs_HasV8_1MMainline, // VSTR_FPSCR_pre = 3807 CEFBS_HasV8_1MMainline_HasMVEInt, // VSTR_P0_off = 3808 CEFBS_HasV8_1MMainline_HasMVEInt, // VSTR_P0_post = 3809 CEFBS_HasV8_1MMainline_HasMVEInt, // VSTR_P0_pre = 3810 CEFBS_HasV8_1MMainline_HasMVEInt, // VSTR_VPR_off = 3811 CEFBS_HasV8_1MMainline_HasMVEInt, // VSTR_VPR_post = 3812 CEFBS_HasV8_1MMainline_HasMVEInt, // VSTR_VPR_pre = 3813 CEFBS_HasVFP2_HasDPVFP, // VSUBD = 3814 CEFBS_HasFullFP16, // VSUBH = 3815 CEFBS_HasNEON, // VSUBHNv2i32 = 3816 CEFBS_HasNEON, // VSUBHNv4i16 = 3817 CEFBS_HasNEON, // VSUBHNv8i8 = 3818 CEFBS_HasNEON, // VSUBLsv2i64 = 3819 CEFBS_HasNEON, // VSUBLsv4i32 = 3820 CEFBS_HasNEON, // VSUBLsv8i16 = 3821 CEFBS_HasNEON, // VSUBLuv2i64 = 3822 CEFBS_HasNEON, // VSUBLuv4i32 = 3823 CEFBS_HasNEON, // VSUBLuv8i16 = 3824 CEFBS_HasVFP2, // VSUBS = 3825 CEFBS_HasNEON, // VSUBWsv2i64 = 3826 CEFBS_HasNEON, // VSUBWsv4i32 = 3827 CEFBS_HasNEON, // VSUBWsv8i16 = 3828 CEFBS_HasNEON, // VSUBWuv2i64 = 3829 CEFBS_HasNEON, // VSUBWuv4i32 = 3830 CEFBS_HasNEON, // VSUBWuv8i16 = 3831 CEFBS_HasNEON, // VSUBfd = 3832 CEFBS_HasNEON, // VSUBfq = 3833 CEFBS_HasNEON_HasFullFP16, // VSUBhd = 3834 CEFBS_HasNEON_HasFullFP16, // VSUBhq = 3835 CEFBS_HasNEON, // VSUBv16i8 = 3836 CEFBS_HasNEON, // VSUBv1i64 = 3837 CEFBS_HasNEON, // VSUBv2i32 = 3838 CEFBS_HasNEON, // VSUBv2i64 = 3839 CEFBS_HasNEON, // VSUBv4i16 = 3840 CEFBS_HasNEON, // VSUBv4i32 = 3841 CEFBS_HasNEON, // VSUBv8i16 = 3842 CEFBS_HasNEON, // VSUBv8i8 = 3843 CEFBS_HasMatMulInt8, // VSUDOTDI = 3844 CEFBS_HasMatMulInt8, // VSUDOTQI = 3845 CEFBS_HasNEON, // VSWPd = 3846 CEFBS_HasNEON, // VSWPq = 3847 CEFBS_HasNEON, // VTBL1 = 3848 CEFBS_HasNEON, // VTBL2 = 3849 CEFBS_HasNEON, // VTBL3 = 3850 CEFBS_HasNEON, // VTBL3Pseudo = 3851 CEFBS_HasNEON, // VTBL4 = 3852 CEFBS_HasNEON, // VTBL4Pseudo = 3853 CEFBS_HasNEON, // VTBX1 = 3854 CEFBS_HasNEON, // VTBX2 = 3855 CEFBS_HasNEON, // VTBX3 = 3856 CEFBS_HasNEON, // VTBX3Pseudo = 3857 CEFBS_HasNEON, // VTBX4 = 3858 CEFBS_HasNEON, // VTBX4Pseudo = 3859 CEFBS_HasVFP2_HasDPVFP, // VTOSHD = 3860 CEFBS_HasFullFP16, // VTOSHH = 3861 CEFBS_HasVFP2, // VTOSHS = 3862 CEFBS_HasVFP2_HasDPVFP, // VTOSIRD = 3863 CEFBS_HasFullFP16, // VTOSIRH = 3864 CEFBS_HasVFP2, // VTOSIRS = 3865 CEFBS_HasVFP2_HasDPVFP, // VTOSIZD = 3866 CEFBS_HasFullFP16, // VTOSIZH = 3867 CEFBS_HasVFP2, // VTOSIZS = 3868 CEFBS_HasVFP2_HasDPVFP, // VTOSLD = 3869 CEFBS_HasFullFP16, // VTOSLH = 3870 CEFBS_HasVFP2, // VTOSLS = 3871 CEFBS_HasVFP2_HasDPVFP, // VTOUHD = 3872 CEFBS_HasFullFP16, // VTOUHH = 3873 CEFBS_HasVFP2, // VTOUHS = 3874 CEFBS_HasVFP2_HasDPVFP, // VTOUIRD = 3875 CEFBS_HasFullFP16, // VTOUIRH = 3876 CEFBS_HasVFP2, // VTOUIRS = 3877 CEFBS_HasVFP2_HasDPVFP, // VTOUIZD = 3878 CEFBS_HasFullFP16, // VTOUIZH = 3879 CEFBS_HasVFP2, // VTOUIZS = 3880 CEFBS_HasVFP2_HasDPVFP, // VTOULD = 3881 CEFBS_HasFullFP16, // VTOULH = 3882 CEFBS_HasVFP2, // VTOULS = 3883 CEFBS_HasNEON, // VTRNd16 = 3884 CEFBS_HasNEON, // VTRNd32 = 3885 CEFBS_HasNEON, // VTRNd8 = 3886 CEFBS_HasNEON, // VTRNq16 = 3887 CEFBS_HasNEON, // VTRNq32 = 3888 CEFBS_HasNEON, // VTRNq8 = 3889 CEFBS_HasNEON, // VTSTv16i8 = 3890 CEFBS_HasNEON, // VTSTv2i32 = 3891 CEFBS_HasNEON, // VTSTv4i16 = 3892 CEFBS_HasNEON, // VTSTv4i32 = 3893 CEFBS_HasNEON, // VTSTv8i16 = 3894 CEFBS_HasNEON, // VTSTv8i8 = 3895 CEFBS_HasDotProd, // VUDOTD = 3896 CEFBS_HasDotProd, // VUDOTDI = 3897 CEFBS_HasDotProd, // VUDOTQ = 3898 CEFBS_HasDotProd, // VUDOTQI = 3899 CEFBS_HasVFP2_HasDPVFP, // VUHTOD = 3900 CEFBS_HasFullFP16, // VUHTOH = 3901 CEFBS_HasVFP2, // VUHTOS = 3902 CEFBS_HasVFP2_HasDPVFP, // VUITOD = 3903 CEFBS_HasFullFP16, // VUITOH = 3904 CEFBS_HasVFP2, // VUITOS = 3905 CEFBS_HasVFP2_HasDPVFP, // VULTOD = 3906 CEFBS_HasFullFP16, // VULTOH = 3907 CEFBS_HasVFP2, // VULTOS = 3908 CEFBS_HasMatMulInt8, // VUMMLA = 3909 CEFBS_HasMatMulInt8, // VUSDOTD = 3910 CEFBS_HasMatMulInt8, // VUSDOTDI = 3911 CEFBS_HasMatMulInt8, // VUSDOTQ = 3912 CEFBS_HasMatMulInt8, // VUSDOTQI = 3913 CEFBS_HasMatMulInt8, // VUSMMLA = 3914 CEFBS_HasNEON, // VUZPd16 = 3915 CEFBS_HasNEON, // VUZPd8 = 3916 CEFBS_HasNEON, // VUZPq16 = 3917 CEFBS_HasNEON, // VUZPq32 = 3918 CEFBS_HasNEON, // VUZPq8 = 3919 CEFBS_HasNEON, // VZIPd16 = 3920 CEFBS_HasNEON, // VZIPd8 = 3921 CEFBS_HasNEON, // VZIPq16 = 3922 CEFBS_HasNEON, // VZIPq32 = 3923 CEFBS_HasNEON, // VZIPq8 = 3924 CEFBS_IsARM, // sysLDMDA = 3925 CEFBS_IsARM, // sysLDMDA_UPD = 3926 CEFBS_IsARM, // sysLDMDB = 3927 CEFBS_IsARM, // sysLDMDB_UPD = 3928 CEFBS_IsARM, // sysLDMIA = 3929 CEFBS_IsARM, // sysLDMIA_UPD = 3930 CEFBS_IsARM, // sysLDMIB = 3931 CEFBS_IsARM, // sysLDMIB_UPD = 3932 CEFBS_IsARM, // sysSTMDA = 3933 CEFBS_IsARM, // sysSTMDA_UPD = 3934 CEFBS_IsARM, // sysSTMDB = 3935 CEFBS_IsARM, // sysSTMDB_UPD = 3936 CEFBS_IsARM, // sysSTMIA = 3937 CEFBS_IsARM, // sysSTMIA_UPD = 3938 CEFBS_IsARM, // sysSTMIB = 3939 CEFBS_IsARM, // sysSTMIB_UPD = 3940 CEFBS_IsThumb2, // t2ADCri = 3941 CEFBS_IsThumb2, // t2ADCrr = 3942 CEFBS_IsThumb2, // t2ADCrs = 3943 CEFBS_IsThumb2, // t2ADDri = 3944 CEFBS_IsThumb2, // t2ADDri12 = 3945 CEFBS_IsThumb2, // t2ADDrr = 3946 CEFBS_IsThumb2, // t2ADDrs = 3947 CEFBS_IsThumb2, // t2ADDspImm = 3948 CEFBS_IsThumb2, // t2ADDspImm12 = 3949 CEFBS_IsThumb2, // t2ADR = 3950 CEFBS_IsThumb2, // t2ANDri = 3951 CEFBS_IsThumb2, // t2ANDrr = 3952 CEFBS_IsThumb2, // t2ANDrs = 3953 CEFBS_IsThumb2, // t2ASRri = 3954 CEFBS_IsThumb2, // t2ASRrr = 3955 CEFBS_HasV7_IsMClass, // t2AUT = 3956 CEFBS_IsThumb2_HasV8_1MMainline_HasPACBTI, // t2AUTG = 3957 CEFBS_IsThumb_HasV8MBaseline, // t2B = 3958 CEFBS_IsThumb2, // t2BFC = 3959 CEFBS_IsThumb2, // t2BFI = 3960 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2BFLi = 3961 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2BFLr = 3962 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2BFi = 3963 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2BFic = 3964 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2BFr = 3965 CEFBS_IsThumb2, // t2BICri = 3966 CEFBS_IsThumb2, // t2BICrr = 3967 CEFBS_IsThumb2, // t2BICrs = 3968 CEFBS_HasV7_IsMClass, // t2BTI = 3969 CEFBS_IsThumb2_HasV8_1MMainline_HasPACBTI, // t2BXAUT = 3970 CEFBS_IsThumb2_IsNotMClass, // t2BXJ = 3971 CEFBS_IsThumb2, // t2Bcc = 3972 CEFBS_IsThumb2_PreV8, // t2CDP = 3973 CEFBS_IsThumb2_PreV8, // t2CDP2 = 3974 CEFBS_IsThumb_HasV7Clrex, // t2CLREX = 3975 CEFBS_HasV8_1MMainline, // t2CLRM = 3976 CEFBS_IsThumb2, // t2CLZ = 3977 CEFBS_IsThumb2, // t2CMNri = 3978 CEFBS_IsThumb2, // t2CMNzrr = 3979 CEFBS_IsThumb2, // t2CMNzrs = 3980 CEFBS_IsThumb2, // t2CMPri = 3981 CEFBS_IsThumb2, // t2CMPrr = 3982 CEFBS_IsThumb2, // t2CMPrs = 3983 CEFBS_IsThumb2_IsNotMClass, // t2CPS1p = 3984 CEFBS_IsThumb2_IsNotMClass, // t2CPS2p = 3985 CEFBS_IsThumb2_IsNotMClass, // t2CPS3p = 3986 CEFBS_IsThumb2_HasV8_HasCRC, // t2CRC32B = 3987 CEFBS_IsThumb2_HasV8_HasCRC, // t2CRC32CB = 3988 CEFBS_IsThumb2_HasV8_HasCRC, // t2CRC32CH = 3989 CEFBS_IsThumb2_HasV8_HasCRC, // t2CRC32CW = 3990 CEFBS_IsThumb2_HasV8_HasCRC, // t2CRC32H = 3991 CEFBS_IsThumb2_HasV8_HasCRC, // t2CRC32W = 3992 CEFBS_HasV8_1MMainline, // t2CSEL = 3993 CEFBS_HasV8_1MMainline, // t2CSINC = 3994 CEFBS_HasV8_1MMainline, // t2CSINV = 3995 CEFBS_HasV8_1MMainline, // t2CSNEG = 3996 CEFBS_IsThumb2, // t2DBG = 3997 CEFBS_IsThumb2_HasV8, // t2DCPS1 = 3998 CEFBS_IsThumb2_HasV8, // t2DCPS2 = 3999 CEFBS_IsThumb2_HasV8, // t2DCPS3 = 4000 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2DLS = 4001 CEFBS_IsThumb_HasDB, // t2DMB = 4002 CEFBS_IsThumb_HasDB, // t2DSB = 4003 CEFBS_IsThumb2, // t2EORri = 4004 CEFBS_IsThumb2, // t2EORrr = 4005 CEFBS_IsThumb2, // t2EORrs = 4006 CEFBS_IsThumb2, // t2HINT = 4007 CEFBS_IsThumb2_HasVirtualization, // t2HVC = 4008 CEFBS_IsThumb_HasDB, // t2ISB = 4009 CEFBS_IsThumb2, // t2IT = 4010 CEFBS_IsThumb2_HasVFP2, // t2Int_eh_sjlj_setjmp = 4011 CEFBS_IsThumb2, // t2Int_eh_sjlj_setjmp_nofp = 4012 CEFBS_IsThumb_HasAcquireRelease, // t2LDA = 4013 CEFBS_IsThumb_HasAcquireRelease, // t2LDAB = 4014 CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex, // t2LDAEX = 4015 CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex, // t2LDAEXB = 4016 CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex_IsNotMClass, // t2LDAEXD = 4017 CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex, // t2LDAEXH = 4018 CEFBS_IsThumb_HasAcquireRelease, // t2LDAH = 4019 CEFBS_PreV8_IsThumb2, // t2LDC2L_OFFSET = 4020 CEFBS_PreV8_IsThumb2, // t2LDC2L_OPTION = 4021 CEFBS_PreV8_IsThumb2, // t2LDC2L_POST = 4022 CEFBS_PreV8_IsThumb2, // t2LDC2L_PRE = 4023 CEFBS_PreV8_IsThumb2, // t2LDC2_OFFSET = 4024 CEFBS_PreV8_IsThumb2, // t2LDC2_OPTION = 4025 CEFBS_PreV8_IsThumb2, // t2LDC2_POST = 4026 CEFBS_PreV8_IsThumb2, // t2LDC2_PRE = 4027 CEFBS_IsThumb2, // t2LDCL_OFFSET = 4028 CEFBS_IsThumb2, // t2LDCL_OPTION = 4029 CEFBS_IsThumb2, // t2LDCL_POST = 4030 CEFBS_IsThumb2, // t2LDCL_PRE = 4031 CEFBS_IsThumb2, // t2LDC_OFFSET = 4032 CEFBS_IsThumb2, // t2LDC_OPTION = 4033 CEFBS_IsThumb2, // t2LDC_POST = 4034 CEFBS_IsThumb2, // t2LDC_PRE = 4035 CEFBS_IsThumb2, // t2LDMDB = 4036 CEFBS_IsThumb2, // t2LDMDB_UPD = 4037 CEFBS_IsThumb2, // t2LDMIA = 4038 CEFBS_IsThumb2, // t2LDMIA_UPD = 4039 CEFBS_IsThumb2, // t2LDRBT = 4040 CEFBS_IsThumb2, // t2LDRB_POST = 4041 CEFBS_IsThumb2, // t2LDRB_PRE = 4042 CEFBS_IsThumb2, // t2LDRBi12 = 4043 CEFBS_IsThumb2, // t2LDRBi8 = 4044 CEFBS_IsThumb2, // t2LDRBpci = 4045 CEFBS_IsThumb2, // t2LDRBs = 4046 CEFBS_IsThumb2, // t2LDRD_POST = 4047 CEFBS_IsThumb2, // t2LDRD_PRE = 4048 CEFBS_IsThumb2, // t2LDRDi8 = 4049 CEFBS_IsThumb_HasV8MBaseline, // t2LDREX = 4050 CEFBS_IsThumb_HasV8MBaseline, // t2LDREXB = 4051 CEFBS_IsThumb2_IsNotMClass, // t2LDREXD = 4052 CEFBS_IsThumb_HasV8MBaseline, // t2LDREXH = 4053 CEFBS_IsThumb2, // t2LDRHT = 4054 CEFBS_IsThumb2, // t2LDRH_POST = 4055 CEFBS_IsThumb2, // t2LDRH_PRE = 4056 CEFBS_IsThumb2, // t2LDRHi12 = 4057 CEFBS_IsThumb2, // t2LDRHi8 = 4058 CEFBS_IsThumb2, // t2LDRHpci = 4059 CEFBS_IsThumb2, // t2LDRHs = 4060 CEFBS_IsThumb2, // t2LDRSBT = 4061 CEFBS_IsThumb2, // t2LDRSB_POST = 4062 CEFBS_IsThumb2, // t2LDRSB_PRE = 4063 CEFBS_IsThumb2, // t2LDRSBi12 = 4064 CEFBS_IsThumb2, // t2LDRSBi8 = 4065 CEFBS_IsThumb2, // t2LDRSBpci = 4066 CEFBS_IsThumb2, // t2LDRSBs = 4067 CEFBS_IsThumb2, // t2LDRSHT = 4068 CEFBS_IsThumb2, // t2LDRSH_POST = 4069 CEFBS_IsThumb2, // t2LDRSH_PRE = 4070 CEFBS_IsThumb2, // t2LDRSHi12 = 4071 CEFBS_IsThumb2, // t2LDRSHi8 = 4072 CEFBS_IsThumb2, // t2LDRSHpci = 4073 CEFBS_IsThumb2, // t2LDRSHs = 4074 CEFBS_IsThumb2, // t2LDRT = 4075 CEFBS_IsThumb2, // t2LDR_POST = 4076 CEFBS_IsThumb2, // t2LDR_PRE = 4077 CEFBS_IsThumb2, // t2LDRi12 = 4078 CEFBS_IsThumb2, // t2LDRi8 = 4079 CEFBS_IsThumb2, // t2LDRpci = 4080 CEFBS_IsThumb2, // t2LDRs = 4081 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2LE = 4082 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2LEUpdate = 4083 CEFBS_IsThumb2, // t2LSLri = 4084 CEFBS_IsThumb2, // t2LSLrr = 4085 CEFBS_IsThumb2, // t2LSRri = 4086 CEFBS_IsThumb2, // t2LSRrr = 4087 CEFBS_IsThumb2, // t2MCR = 4088 CEFBS_IsThumb2_PreV8, // t2MCR2 = 4089 CEFBS_IsThumb2, // t2MCRR = 4090 CEFBS_IsThumb2_PreV8, // t2MCRR2 = 4091 CEFBS_IsThumb2, // t2MLA = 4092 CEFBS_IsThumb2, // t2MLS = 4093 CEFBS_IsThumb_HasV8MBaseline, // t2MOVTi16 = 4094 CEFBS_IsThumb2, // t2MOVi = 4095 CEFBS_IsThumb_HasV8MBaseline, // t2MOVi16 = 4096 CEFBS_IsThumb2, // t2MOVr = 4097 CEFBS_IsThumb2, // t2MOVsra_flag = 4098 CEFBS_IsThumb2, // t2MOVsrl_flag = 4099 CEFBS_IsThumb2, // t2MRC = 4100 CEFBS_IsThumb2_PreV8, // t2MRC2 = 4101 CEFBS_IsThumb2, // t2MRRC = 4102 CEFBS_IsThumb2_PreV8, // t2MRRC2 = 4103 CEFBS_IsThumb2_IsNotMClass, // t2MRS_AR = 4104 CEFBS_IsThumb_IsMClass, // t2MRS_M = 4105 CEFBS_IsThumb_HasVirtualization, // t2MRSbanked = 4106 CEFBS_IsThumb2_IsNotMClass, // t2MRSsys_AR = 4107 CEFBS_IsThumb2_IsNotMClass, // t2MSR_AR = 4108 CEFBS_IsThumb_IsMClass, // t2MSR_M = 4109 CEFBS_IsThumb_HasVirtualization, // t2MSRbanked = 4110 CEFBS_IsThumb2, // t2MUL = 4111 CEFBS_IsThumb2, // t2MVNi = 4112 CEFBS_IsThumb2, // t2MVNr = 4113 CEFBS_IsThumb2, // t2MVNs = 4114 CEFBS_IsThumb2, // t2ORNri = 4115 CEFBS_IsThumb2, // t2ORNrr = 4116 CEFBS_IsThumb2, // t2ORNrs = 4117 CEFBS_IsThumb2, // t2ORRri = 4118 CEFBS_IsThumb2, // t2ORRrr = 4119 CEFBS_IsThumb2, // t2ORRrs = 4120 CEFBS_HasV7_IsMClass, // t2PAC = 4121 CEFBS_HasV7_IsMClass, // t2PACBTI = 4122 CEFBS_IsThumb2_HasV8_1MMainline_HasPACBTI, // t2PACG = 4123 CEFBS_HasDSP_IsThumb2, // t2PKHBT = 4124 CEFBS_HasDSP_IsThumb2, // t2PKHTB = 4125 CEFBS_IsThumb2_HasV7_HasMP, // t2PLDWi12 = 4126 CEFBS_IsThumb2_HasV7_HasMP, // t2PLDWi8 = 4127 CEFBS_IsThumb2_HasV7_HasMP, // t2PLDWs = 4128 CEFBS_IsThumb2, // t2PLDi12 = 4129 CEFBS_IsThumb2, // t2PLDi8 = 4130 CEFBS_IsThumb2, // t2PLDpci = 4131 CEFBS_IsThumb2, // t2PLDs = 4132 CEFBS_IsThumb2_HasV7, // t2PLIi12 = 4133 CEFBS_IsThumb2_HasV7, // t2PLIi8 = 4134 CEFBS_IsThumb2_HasV7, // t2PLIpci = 4135 CEFBS_IsThumb2_HasV7, // t2PLIs = 4136 CEFBS_IsThumb2_HasDSP, // t2QADD = 4137 CEFBS_IsThumb2_HasDSP, // t2QADD16 = 4138 CEFBS_IsThumb2_HasDSP, // t2QADD8 = 4139 CEFBS_IsThumb2_HasDSP, // t2QASX = 4140 CEFBS_IsThumb2_HasDSP, // t2QDADD = 4141 CEFBS_IsThumb2_HasDSP, // t2QDSUB = 4142 CEFBS_IsThumb2_HasDSP, // t2QSAX = 4143 CEFBS_IsThumb2_HasDSP, // t2QSUB = 4144 CEFBS_IsThumb2_HasDSP, // t2QSUB16 = 4145 CEFBS_IsThumb2_HasDSP, // t2QSUB8 = 4146 CEFBS_IsThumb2, // t2RBIT = 4147 CEFBS_IsThumb2, // t2REV = 4148 CEFBS_IsThumb2, // t2REV16 = 4149 CEFBS_IsThumb2, // t2REVSH = 4150 CEFBS_IsThumb2_IsNotMClass, // t2RFEDB = 4151 CEFBS_IsThumb2_IsNotMClass, // t2RFEDBW = 4152 CEFBS_IsThumb2_IsNotMClass, // t2RFEIA = 4153 CEFBS_IsThumb2_IsNotMClass, // t2RFEIAW = 4154 CEFBS_IsThumb2, // t2RORri = 4155 CEFBS_IsThumb2, // t2RORrr = 4156 CEFBS_IsThumb2, // t2RRX = 4157 CEFBS_IsThumb2, // t2RSBri = 4158 CEFBS_IsThumb2, // t2RSBrr = 4159 CEFBS_IsThumb2, // t2RSBrs = 4160 CEFBS_IsThumb2_HasDSP, // t2SADD16 = 4161 CEFBS_IsThumb2_HasDSP, // t2SADD8 = 4162 CEFBS_IsThumb2_HasDSP, // t2SASX = 4163 CEFBS_IsThumb2_HasSB, // t2SB = 4164 CEFBS_IsThumb2, // t2SBCri = 4165 CEFBS_IsThumb2, // t2SBCrr = 4166 CEFBS_IsThumb2, // t2SBCrs = 4167 CEFBS_IsThumb2, // t2SBFX = 4168 CEFBS_HasDivideInThumb_IsThumb_HasV8MBaseline, // t2SDIV = 4169 CEFBS_IsThumb2_HasDSP, // t2SEL = 4170 CEFBS_IsThumb2_HasV8_HasV8_1a, // t2SETPAN = 4171 CEFBS_Has8MSecExt, // t2SG = 4172 CEFBS_IsThumb2_HasDSP, // t2SHADD16 = 4173 CEFBS_IsThumb2_HasDSP, // t2SHADD8 = 4174 CEFBS_IsThumb2_HasDSP, // t2SHASX = 4175 CEFBS_IsThumb2_HasDSP, // t2SHSAX = 4176 CEFBS_IsThumb2_HasDSP, // t2SHSUB16 = 4177 CEFBS_IsThumb2_HasDSP, // t2SHSUB8 = 4178 CEFBS_IsThumb2_HasTrustZone, // t2SMC = 4179 CEFBS_IsThumb2_HasDSP, // t2SMLABB = 4180 CEFBS_IsThumb2_HasDSP, // t2SMLABT = 4181 CEFBS_IsThumb2_HasDSP, // t2SMLAD = 4182 CEFBS_IsThumb2_HasDSP, // t2SMLADX = 4183 CEFBS_IsThumb2, // t2SMLAL = 4184 CEFBS_IsThumb2_HasDSP, // t2SMLALBB = 4185 CEFBS_IsThumb2_HasDSP, // t2SMLALBT = 4186 CEFBS_IsThumb2_HasDSP, // t2SMLALD = 4187 CEFBS_IsThumb2_HasDSP, // t2SMLALDX = 4188 CEFBS_IsThumb2_HasDSP, // t2SMLALTB = 4189 CEFBS_IsThumb2_HasDSP, // t2SMLALTT = 4190 CEFBS_IsThumb2_HasDSP, // t2SMLATB = 4191 CEFBS_IsThumb2_HasDSP, // t2SMLATT = 4192 CEFBS_IsThumb2_HasDSP, // t2SMLAWB = 4193 CEFBS_IsThumb2_HasDSP, // t2SMLAWT = 4194 CEFBS_IsThumb2_HasDSP, // t2SMLSD = 4195 CEFBS_IsThumb2_HasDSP, // t2SMLSDX = 4196 CEFBS_IsThumb2_HasDSP, // t2SMLSLD = 4197 CEFBS_IsThumb2_HasDSP, // t2SMLSLDX = 4198 CEFBS_IsThumb2_HasDSP, // t2SMMLA = 4199 CEFBS_IsThumb2_HasDSP, // t2SMMLAR = 4200 CEFBS_IsThumb2_HasDSP, // t2SMMLS = 4201 CEFBS_IsThumb2_HasDSP, // t2SMMLSR = 4202 CEFBS_IsThumb2_HasDSP, // t2SMMUL = 4203 CEFBS_IsThumb2_HasDSP, // t2SMMULR = 4204 CEFBS_IsThumb2_HasDSP, // t2SMUAD = 4205 CEFBS_IsThumb2_HasDSP, // t2SMUADX = 4206 CEFBS_IsThumb2_HasDSP, // t2SMULBB = 4207 CEFBS_IsThumb2_HasDSP, // t2SMULBT = 4208 CEFBS_IsThumb2, // t2SMULL = 4209 CEFBS_IsThumb2_HasDSP, // t2SMULTB = 4210 CEFBS_IsThumb2_HasDSP, // t2SMULTT = 4211 CEFBS_IsThumb2_HasDSP, // t2SMULWB = 4212 CEFBS_IsThumb2_HasDSP, // t2SMULWT = 4213 CEFBS_IsThumb2_HasDSP, // t2SMUSD = 4214 CEFBS_IsThumb2_HasDSP, // t2SMUSDX = 4215 CEFBS_IsThumb2_IsNotMClass, // t2SRSDB = 4216 CEFBS_IsThumb2_IsNotMClass, // t2SRSDB_UPD = 4217 CEFBS_IsThumb2_IsNotMClass, // t2SRSIA = 4218 CEFBS_IsThumb2_IsNotMClass, // t2SRSIA_UPD = 4219 CEFBS_IsThumb2, // t2SSAT = 4220 CEFBS_IsThumb2_HasDSP, // t2SSAT16 = 4221 CEFBS_IsThumb2_HasDSP, // t2SSAX = 4222 CEFBS_IsThumb2_HasDSP, // t2SSUB16 = 4223 CEFBS_IsThumb2_HasDSP, // t2SSUB8 = 4224 CEFBS_PreV8_IsThumb2, // t2STC2L_OFFSET = 4225 CEFBS_PreV8_IsThumb2, // t2STC2L_OPTION = 4226 CEFBS_PreV8_IsThumb2, // t2STC2L_POST = 4227 CEFBS_PreV8_IsThumb2, // t2STC2L_PRE = 4228 CEFBS_PreV8_IsThumb2, // t2STC2_OFFSET = 4229 CEFBS_PreV8_IsThumb2, // t2STC2_OPTION = 4230 CEFBS_PreV8_IsThumb2, // t2STC2_POST = 4231 CEFBS_PreV8_IsThumb2, // t2STC2_PRE = 4232 CEFBS_IsThumb2, // t2STCL_OFFSET = 4233 CEFBS_IsThumb2, // t2STCL_OPTION = 4234 CEFBS_IsThumb2, // t2STCL_POST = 4235 CEFBS_IsThumb2, // t2STCL_PRE = 4236 CEFBS_IsThumb2, // t2STC_OFFSET = 4237 CEFBS_IsThumb2, // t2STC_OPTION = 4238 CEFBS_IsThumb2, // t2STC_POST = 4239 CEFBS_IsThumb2, // t2STC_PRE = 4240 CEFBS_IsThumb_HasAcquireRelease, // t2STL = 4241 CEFBS_IsThumb_HasAcquireRelease, // t2STLB = 4242 CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex, // t2STLEX = 4243 CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex, // t2STLEXB = 4244 CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex_IsNotMClass, // t2STLEXD = 4245 CEFBS_IsThumb_HasAcquireRelease_HasV7Clrex, // t2STLEXH = 4246 CEFBS_IsThumb_HasAcquireRelease, // t2STLH = 4247 CEFBS_IsThumb2, // t2STMDB = 4248 CEFBS_IsThumb2, // t2STMDB_UPD = 4249 CEFBS_IsThumb2, // t2STMIA = 4250 CEFBS_IsThumb2, // t2STMIA_UPD = 4251 CEFBS_IsThumb2, // t2STRBT = 4252 CEFBS_IsThumb2, // t2STRB_POST = 4253 CEFBS_IsThumb2, // t2STRB_PRE = 4254 CEFBS_IsThumb2, // t2STRBi12 = 4255 CEFBS_IsThumb2, // t2STRBi8 = 4256 CEFBS_IsThumb2, // t2STRBs = 4257 CEFBS_IsThumb2, // t2STRD_POST = 4258 CEFBS_IsThumb2, // t2STRD_PRE = 4259 CEFBS_IsThumb2, // t2STRDi8 = 4260 CEFBS_IsThumb_HasV8MBaseline, // t2STREX = 4261 CEFBS_IsThumb_HasV8MBaseline, // t2STREXB = 4262 CEFBS_IsThumb2_IsNotMClass, // t2STREXD = 4263 CEFBS_IsThumb_HasV8MBaseline, // t2STREXH = 4264 CEFBS_IsThumb2, // t2STRHT = 4265 CEFBS_IsThumb2, // t2STRH_POST = 4266 CEFBS_IsThumb2, // t2STRH_PRE = 4267 CEFBS_IsThumb2, // t2STRHi12 = 4268 CEFBS_IsThumb2, // t2STRHi8 = 4269 CEFBS_IsThumb2, // t2STRHs = 4270 CEFBS_IsThumb2, // t2STRT = 4271 CEFBS_IsThumb2, // t2STR_POST = 4272 CEFBS_IsThumb2, // t2STR_PRE = 4273 CEFBS_IsThumb2, // t2STRi12 = 4274 CEFBS_IsThumb2, // t2STRi8 = 4275 CEFBS_IsThumb2, // t2STRs = 4276 CEFBS_IsThumb2_IsNotMClass, // t2SUBS_PC_LR = 4277 CEFBS_IsThumb2, // t2SUBri = 4278 CEFBS_IsThumb2, // t2SUBri12 = 4279 CEFBS_IsThumb2, // t2SUBrr = 4280 CEFBS_IsThumb2, // t2SUBrs = 4281 CEFBS_IsThumb2, // t2SUBspImm = 4282 CEFBS_IsThumb2, // t2SUBspImm12 = 4283 CEFBS_HasDSP_IsThumb2, // t2SXTAB = 4284 CEFBS_HasDSP_IsThumb2, // t2SXTAB16 = 4285 CEFBS_HasDSP_IsThumb2, // t2SXTAH = 4286 CEFBS_IsThumb2, // t2SXTB = 4287 CEFBS_HasDSP_IsThumb2, // t2SXTB16 = 4288 CEFBS_IsThumb2, // t2SXTH = 4289 CEFBS_IsThumb2, // t2TBB = 4290 CEFBS_IsThumb2, // t2TBH = 4291 CEFBS_IsThumb2, // t2TEQri = 4292 CEFBS_IsThumb2, // t2TEQrr = 4293 CEFBS_IsThumb2, // t2TEQrs = 4294 CEFBS_IsThumb_HasV8_4a, // t2TSB = 4295 CEFBS_IsThumb2, // t2TSTri = 4296 CEFBS_IsThumb2, // t2TSTrr = 4297 CEFBS_IsThumb2, // t2TSTrs = 4298 CEFBS_IsThumb_Has8MSecExt, // t2TT = 4299 CEFBS_IsThumb_Has8MSecExt, // t2TTA = 4300 CEFBS_IsThumb_Has8MSecExt, // t2TTAT = 4301 CEFBS_IsThumb_Has8MSecExt, // t2TTT = 4302 CEFBS_IsThumb2_HasDSP, // t2UADD16 = 4303 CEFBS_IsThumb2_HasDSP, // t2UADD8 = 4304 CEFBS_IsThumb2_HasDSP, // t2UASX = 4305 CEFBS_IsThumb2, // t2UBFX = 4306 CEFBS_IsThumb2, // t2UDF = 4307 CEFBS_HasDivideInThumb_IsThumb_HasV8MBaseline, // t2UDIV = 4308 CEFBS_IsThumb2_HasDSP, // t2UHADD16 = 4309 CEFBS_IsThumb2_HasDSP, // t2UHADD8 = 4310 CEFBS_IsThumb2_HasDSP, // t2UHASX = 4311 CEFBS_IsThumb2_HasDSP, // t2UHSAX = 4312 CEFBS_IsThumb2_HasDSP, // t2UHSUB16 = 4313 CEFBS_IsThumb2_HasDSP, // t2UHSUB8 = 4314 CEFBS_IsThumb2_HasDSP, // t2UMAAL = 4315 CEFBS_IsThumb2, // t2UMLAL = 4316 CEFBS_IsThumb2, // t2UMULL = 4317 CEFBS_IsThumb2_HasDSP, // t2UQADD16 = 4318 CEFBS_IsThumb2_HasDSP, // t2UQADD8 = 4319 CEFBS_IsThumb2_HasDSP, // t2UQASX = 4320 CEFBS_IsThumb2_HasDSP, // t2UQSAX = 4321 CEFBS_IsThumb2_HasDSP, // t2UQSUB16 = 4322 CEFBS_IsThumb2_HasDSP, // t2UQSUB8 = 4323 CEFBS_IsThumb2_HasDSP, // t2USAD8 = 4324 CEFBS_IsThumb2_HasDSP, // t2USADA8 = 4325 CEFBS_IsThumb2, // t2USAT = 4326 CEFBS_IsThumb2_HasDSP, // t2USAT16 = 4327 CEFBS_IsThumb2_HasDSP, // t2USAX = 4328 CEFBS_IsThumb2_HasDSP, // t2USUB16 = 4329 CEFBS_IsThumb2_HasDSP, // t2USUB8 = 4330 CEFBS_HasDSP_IsThumb2, // t2UXTAB = 4331 CEFBS_HasDSP_IsThumb2, // t2UXTAB16 = 4332 CEFBS_HasDSP_IsThumb2, // t2UXTAH = 4333 CEFBS_IsThumb2, // t2UXTB = 4334 CEFBS_HasDSP_IsThumb2, // t2UXTB16 = 4335 CEFBS_IsThumb2, // t2UXTH = 4336 CEFBS_IsThumb2_HasV8_1MMainline_HasLOB, // t2WLS = 4337 CEFBS_IsThumb, // tADC = 4338 CEFBS_IsThumb, // tADDhirr = 4339 CEFBS_IsThumb, // tADDi3 = 4340 CEFBS_IsThumb, // tADDi8 = 4341 CEFBS_IsThumb, // tADDrSP = 4342 CEFBS_IsThumb, // tADDrSPi = 4343 CEFBS_IsThumb, // tADDrr = 4344 CEFBS_IsThumb, // tADDspi = 4345 CEFBS_IsThumb, // tADDspr = 4346 CEFBS_IsThumb, // tADR = 4347 CEFBS_IsThumb, // tAND = 4348 CEFBS_IsThumb, // tASRri = 4349 CEFBS_IsThumb, // tASRrr = 4350 CEFBS_IsThumb, // tB = 4351 CEFBS_IsThumb, // tBIC = 4352 CEFBS_IsThumb, // tBKPT = 4353 CEFBS_IsThumb, // tBL = 4354 CEFBS_IsThumb_Has8MSecExt, // tBLXNSr = 4355 CEFBS_IsThumb_HasV5T_IsNotMClass, // tBLXi = 4356 CEFBS_IsThumb_HasV5T, // tBLXr = 4357 CEFBS_IsThumb, // tBX = 4358 CEFBS_IsThumb_Has8MSecExt, // tBXNS = 4359 CEFBS_IsThumb, // tBcc = 4360 CEFBS_IsThumb_HasV8MBaseline, // tCBNZ = 4361 CEFBS_IsThumb_HasV8MBaseline, // tCBZ = 4362 CEFBS_IsThumb, // tCMNz = 4363 CEFBS_IsThumb, // tCMPhir = 4364 CEFBS_IsThumb, // tCMPi8 = 4365 CEFBS_IsThumb, // tCMPr = 4366 CEFBS_IsThumb, // tCPS = 4367 CEFBS_IsThumb, // tEOR = 4368 CEFBS_IsThumb_HasV6M, // tHINT = 4369 CEFBS_IsThumb_HasV8, // tHLT = 4370 CEFBS_IsThumb, // tInt_WIN_eh_sjlj_longjmp = 4371 CEFBS_IsThumb, // tInt_eh_sjlj_longjmp = 4372 CEFBS_IsThumb, // tInt_eh_sjlj_setjmp = 4373 CEFBS_IsThumb, // tLDMIA = 4374 CEFBS_IsThumb, // tLDRBi = 4375 CEFBS_IsThumb, // tLDRBr = 4376 CEFBS_IsThumb, // tLDRHi = 4377 CEFBS_IsThumb, // tLDRHr = 4378 CEFBS_IsThumb, // tLDRSB = 4379 CEFBS_IsThumb, // tLDRSH = 4380 CEFBS_IsThumb, // tLDRi = 4381 CEFBS_IsThumb, // tLDRpci = 4382 CEFBS_IsThumb, // tLDRr = 4383 CEFBS_IsThumb, // tLDRspi = 4384 CEFBS_IsThumb, // tLSLri = 4385 CEFBS_IsThumb, // tLSLrr = 4386 CEFBS_IsThumb, // tLSRri = 4387 CEFBS_IsThumb, // tLSRrr = 4388 CEFBS_IsThumb, // tMOVSr = 4389 CEFBS_IsThumb, // tMOVi8 = 4390 CEFBS_IsThumb, // tMOVr = 4391 CEFBS_IsThumb, // tMUL = 4392 CEFBS_IsThumb, // tMVN = 4393 CEFBS_IsThumb, // tORR = 4394 CEFBS_IsThumb, // tPICADD = 4395 CEFBS_IsThumb, // tPOP = 4396 CEFBS_IsThumb, // tPUSH = 4397 CEFBS_IsThumb_HasV6, // tREV = 4398 CEFBS_IsThumb_HasV6, // tREV16 = 4399 CEFBS_IsThumb_HasV6, // tREVSH = 4400 CEFBS_IsThumb, // tROR = 4401 CEFBS_IsThumb, // tRSB = 4402 CEFBS_IsThumb, // tSBC = 4403 CEFBS_IsThumb_IsNotMClass, // tSETEND = 4404 CEFBS_IsThumb, // tSTMIA_UPD = 4405 CEFBS_IsThumb, // tSTRBi = 4406 CEFBS_IsThumb, // tSTRBr = 4407 CEFBS_IsThumb, // tSTRHi = 4408 CEFBS_IsThumb, // tSTRHr = 4409 CEFBS_IsThumb, // tSTRi = 4410 CEFBS_IsThumb, // tSTRr = 4411 CEFBS_IsThumb, // tSTRspi = 4412 CEFBS_IsThumb, // tSUBi3 = 4413 CEFBS_IsThumb, // tSUBi8 = 4414 CEFBS_IsThumb, // tSUBrr = 4415 CEFBS_IsThumb, // tSUBspi = 4416 CEFBS_IsThumb, // tSVC = 4417 CEFBS_IsThumb_HasV6, // tSXTB = 4418 CEFBS_IsThumb_HasV6, // tSXTH = 4419 CEFBS_IsThumb, // tTRAP = 4420 CEFBS_IsThumb, // tTST = 4421 CEFBS_IsThumb, // tUDF = 4422 CEFBS_IsThumb_HasV6, // tUXTB = 4423 CEFBS_IsThumb_HasV6, // tUXTH = 4424 CEFBS_IsThumb, // t__brkdiv0 = 4425 }; assert(Opcode < 4426); FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); const FeatureBitset &RequiredFeatures = FeatureBitsets[RequiredFeaturesRefs[Opcode]]; FeatureBitset MissingFeatures = (AvailableFeatures & RequiredFeatures) ^ RequiredFeatures; if (MissingFeatures.any()) { std::ostringstream Msg; Msg << "Attempting to emit " << &ARMInstrNameData[ARMInstrNameIndices[Opcode]] << " instruction but the "; for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i) if (MissingFeatures.test(i)) Msg << SubtargetFeatureNames[i] << " "; Msg << "predicate(s) are not met"; report_fatal_error(Msg.str().c_str()); } #endif // NDEBUG } } // end namespace ARM_MC } // end namespace llvm #endif // ENABLE_INSTR_PREDICATE_VERIFIER