/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Global Instruction Selector for the X86 target *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_GLOBALISEL_PREDICATE_BITSET const unsigned MAX_SUBTARGET_PREDICATES = 114; using PredicateBitset = llvm::PredicateBitsetImpl; #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET #ifdef GET_GLOBALISEL_TEMPORARIES_DECL mutable MatcherState State; typedef ComplexRendererFns(X86InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const; typedef void(X86InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr&, int) const; const ISelInfoTy ISelInfo; static X86InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[]; static X86InstructionSelector::CustomRendererFn CustomRenderers[]; bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override; bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override; bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override; const int64_t *getMatchTable() const override; bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI) const override; #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL #ifdef GET_GLOBALISEL_TEMPORARIES_INIT , State(0), ISelInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers) #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT #ifdef GET_GLOBALISEL_IMPL // Bits for subtarget features that participate in instruction matching. enum SubtargetFeatureBits : uint8_t { Feature_TruePredicateBit = 49, Feature_HasCMovBit = 20, Feature_NoCMovBit = 102, Feature_HasMMXBit = 83, Feature_Has3DNowBit = 85, Feature_HasSSE1Bit = 35, Feature_UseSSE1Bit = 43, Feature_HasSSE2Bit = 36, Feature_UseSSE2Bit = 44, Feature_HasSSE3Bit = 27, Feature_UseSSE3Bit = 52, Feature_HasSSSE3Bit = 84, Feature_UseSSSE3Bit = 53, Feature_UseSSE41Bit = 50, Feature_HasSSE42Bit = 57, Feature_UseSSE42Bit = 56, Feature_HasSSE4ABit = 66, Feature_NoAVXBit = 62, Feature_HasAVXBit = 45, Feature_HasAVX2Bit = 39, Feature_HasAVX1OnlyBit = 37, Feature_HasAVX512Bit = 69, Feature_UseAVXBit = 41, Feature_NoAVX512Bit = 32, Feature_HasCDIBit = 73, Feature_HasVPOPCNTDQBit = 77, Feature_HasERIBit = 76, Feature_HasDQIBit = 71, Feature_NoDQIBit = 54, Feature_HasBWIBit = 72, Feature_NoBWIBit = 51, Feature_HasVLXBit = 70, Feature_NoVLXBit = 31, Feature_NoVLX_Or_NoBWIBit = 48, Feature_HasVNNIBit = 79, Feature_HasVP2INTERSECTBit = 81, Feature_HasBF16Bit = 82, Feature_HasBITALGBit = 80, Feature_HasPOPCNTBit = 55, Feature_HasAESBit = 59, Feature_HasVAESBit = 61, Feature_NoVLX_Or_NoVAESBit = 60, Feature_HasFXSRBit = 28, Feature_HasXSAVEBit = 91, Feature_HasXSAVEOPTBit = 92, Feature_HasXSAVECBit = 93, Feature_HasXSAVESBit = 94, Feature_HasPCLMULBit = 63, Feature_NoVLX_Or_NoVPCLMULQDQBit = 64, Feature_HasVPCLMULQDQBit = 65, Feature_HasGFNIBit = 68, Feature_HasFMABit = 29, Feature_HasFMA4Bit = 33, Feature_NoFMA4Bit = 30, Feature_HasXOPBit = 34, Feature_HasTBMBit = 9, Feature_NoTBMBit = 106, Feature_HasLWPBit = 10, Feature_HasMOVBEBit = 3, Feature_HasRDRANDBit = 4, Feature_HasF16CBit = 67, Feature_HasFSGSBaseBit = 95, Feature_HasLZCNTBit = 6, Feature_HasBMIBit = 7, Feature_HasBMI2Bit = 8, Feature_NoBMI2Bit = 105, Feature_HasVBMIBit = 74, Feature_HasVBMI2Bit = 78, Feature_HasIFMABit = 75, Feature_HasRTMBit = 89, Feature_HasSHABit = 58, Feature_HasRDSEEDBit = 5, Feature_HasSSEPrefetchBit = 46, Feature_NoSSEPrefetchBit = 86, Feature_HasPrefetchWBit = 87, Feature_HasPREFETCHWT1Bit = 88, Feature_HasLAHFSAHFBit = 2, Feature_HasMWAITXBit = 11, Feature_HasCLDEMOTEBit = 18, Feature_HasMOVDIRIBit = 13, Feature_HasMOVDIR64BBit = 14, Feature_HasPTWRITEBit = 98, Feature_FPStackf32Bit = 25, Feature_FPStackf64Bit = 26, Feature_HasCLFLUSHOPTBit = 16, Feature_HasCLWBBit = 17, Feature_HasWBNOINVDBit = 90, Feature_HasRDPIDBit = 97, Feature_HasWAITPKGBit = 12, Feature_HasINVPCIDBit = 96, Feature_HasCmpxchg8bBit = 103, Feature_HasCmpxchg16bBit = 104, Feature_HasENQCMDBit = 15, Feature_Not64BitModeBit = 0, Feature_In64BitModeBit = 1, Feature_IsLP64Bit = 100, Feature_NotLP64Bit = 99, Feature_NotWin64WithoutFPBit = 101, Feature_IsPS4Bit = 109, Feature_NotPS4Bit = 108, Feature_KernelCodeBit = 110, Feature_NearDataBit = 112, Feature_IsNotPICBit = 111, Feature_OptForSizeBit = 40, Feature_OptForMinSizeBit = 38, Feature_OptForSpeedBit = 107, Feature_UseIncDecBit = 19, Feature_NoSSE41_Or_OptForSizeBit = 42, Feature_CallImmAddrBit = 113, Feature_FavorMemIndirectCallBit = 21, Feature_HasFastSHLDRotateBit = 24, Feature_HasMFenceBit = 47, Feature_UseRetpolineIndirectCallsBit = 23, Feature_NotUseRetpolineIndirectCallsBit = 22, }; PredicateBitset X86InstructionSelector:: computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const { PredicateBitset Features; if (true) Features.set(Feature_TruePredicateBit); if (Subtarget->hasCMov()) Features.set(Feature_HasCMovBit); if (!Subtarget->hasCMov()) Features.set(Feature_NoCMovBit); if (Subtarget->hasMMX()) Features.set(Feature_HasMMXBit); if (Subtarget->has3DNow()) Features.set(Feature_Has3DNowBit); if (Subtarget->hasSSE1()) Features.set(Feature_HasSSE1Bit); if (Subtarget->hasSSE1() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE1Bit); if (Subtarget->hasSSE2()) Features.set(Feature_HasSSE2Bit); if (Subtarget->hasSSE2() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE2Bit); if (Subtarget->hasSSE3()) Features.set(Feature_HasSSE3Bit); if (Subtarget->hasSSE3() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE3Bit); if (Subtarget->hasSSSE3()) Features.set(Feature_HasSSSE3Bit); if (Subtarget->hasSSSE3() && !Subtarget->hasAVX()) Features.set(Feature_UseSSSE3Bit); if (Subtarget->hasSSE41() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE41Bit); if (Subtarget->hasSSE42()) Features.set(Feature_HasSSE42Bit); if (Subtarget->hasSSE42() && !Subtarget->hasAVX()) Features.set(Feature_UseSSE42Bit); if (Subtarget->hasSSE4A()) Features.set(Feature_HasSSE4ABit); if (!Subtarget->hasAVX()) Features.set(Feature_NoAVXBit); if (Subtarget->hasAVX()) Features.set(Feature_HasAVXBit); if (Subtarget->hasAVX2()) Features.set(Feature_HasAVX2Bit); if (Subtarget->hasAVX() && !Subtarget->hasAVX2()) Features.set(Feature_HasAVX1OnlyBit); if (Subtarget->hasAVX512()) Features.set(Feature_HasAVX512Bit); if (Subtarget->hasAVX() && !Subtarget->hasAVX512()) Features.set(Feature_UseAVXBit); if (!Subtarget->hasAVX512()) Features.set(Feature_NoAVX512Bit); if (Subtarget->hasCDI()) Features.set(Feature_HasCDIBit); if (Subtarget->hasVPOPCNTDQ()) Features.set(Feature_HasVPOPCNTDQBit); if (Subtarget->hasERI()) Features.set(Feature_HasERIBit); if (Subtarget->hasDQI()) Features.set(Feature_HasDQIBit); if (!Subtarget->hasDQI()) Features.set(Feature_NoDQIBit); if (Subtarget->hasBWI()) Features.set(Feature_HasBWIBit); if (!Subtarget->hasBWI()) Features.set(Feature_NoBWIBit); if (Subtarget->hasVLX()) Features.set(Feature_HasVLXBit); if (!Subtarget->hasVLX()) Features.set(Feature_NoVLXBit); if (!Subtarget->hasVLX() || !Subtarget->hasBWI()) Features.set(Feature_NoVLX_Or_NoBWIBit); if (Subtarget->hasVNNI()) Features.set(Feature_HasVNNIBit); if (Subtarget->hasVP2INTERSECT()) Features.set(Feature_HasVP2INTERSECTBit); if (Subtarget->hasBF16()) Features.set(Feature_HasBF16Bit); if (Subtarget->hasBITALG()) Features.set(Feature_HasBITALGBit); if (Subtarget->hasPOPCNT()) Features.set(Feature_HasPOPCNTBit); if (Subtarget->hasAES()) Features.set(Feature_HasAESBit); if (Subtarget->hasVAES()) Features.set(Feature_HasVAESBit); if (!Subtarget->hasVLX() || !Subtarget->hasVAES()) Features.set(Feature_NoVLX_Or_NoVAESBit); if (Subtarget->hasFXSR()) Features.set(Feature_HasFXSRBit); if (Subtarget->hasXSAVE()) Features.set(Feature_HasXSAVEBit); if (Subtarget->hasXSAVEOPT()) Features.set(Feature_HasXSAVEOPTBit); if (Subtarget->hasXSAVEC()) Features.set(Feature_HasXSAVECBit); if (Subtarget->hasXSAVES()) Features.set(Feature_HasXSAVESBit); if (Subtarget->hasPCLMUL()) Features.set(Feature_HasPCLMULBit); if (!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ()) Features.set(Feature_NoVLX_Or_NoVPCLMULQDQBit); if (Subtarget->hasVPCLMULQDQ()) Features.set(Feature_HasVPCLMULQDQBit); if (Subtarget->hasGFNI()) Features.set(Feature_HasGFNIBit); if (Subtarget->hasFMA()) Features.set(Feature_HasFMABit); if (Subtarget->hasFMA4()) Features.set(Feature_HasFMA4Bit); if (!Subtarget->hasFMA4()) Features.set(Feature_NoFMA4Bit); if (Subtarget->hasXOP()) Features.set(Feature_HasXOPBit); if (Subtarget->hasTBM()) Features.set(Feature_HasTBMBit); if (!Subtarget->hasTBM()) Features.set(Feature_NoTBMBit); if (Subtarget->hasLWP()) Features.set(Feature_HasLWPBit); if (Subtarget->hasMOVBE()) Features.set(Feature_HasMOVBEBit); if (Subtarget->hasRDRAND()) Features.set(Feature_HasRDRANDBit); if (Subtarget->hasF16C()) Features.set(Feature_HasF16CBit); if (Subtarget->hasFSGSBase()) Features.set(Feature_HasFSGSBaseBit); if (Subtarget->hasLZCNT()) Features.set(Feature_HasLZCNTBit); if (Subtarget->hasBMI()) Features.set(Feature_HasBMIBit); if (Subtarget->hasBMI2()) Features.set(Feature_HasBMI2Bit); if (!Subtarget->hasBMI2()) Features.set(Feature_NoBMI2Bit); if (Subtarget->hasVBMI()) Features.set(Feature_HasVBMIBit); if (Subtarget->hasVBMI2()) Features.set(Feature_HasVBMI2Bit); if (Subtarget->hasIFMA()) Features.set(Feature_HasIFMABit); if (Subtarget->hasRTM()) Features.set(Feature_HasRTMBit); if (Subtarget->hasSHA()) Features.set(Feature_HasSHABit); if (Subtarget->hasRDSEED()) Features.set(Feature_HasRDSEEDBit); if (Subtarget->hasSSEPrefetch()) Features.set(Feature_HasSSEPrefetchBit); if (!Subtarget->hasSSEPrefetch()) Features.set(Feature_NoSSEPrefetchBit); if (Subtarget->hasPRFCHW()) Features.set(Feature_HasPrefetchWBit); if (Subtarget->hasPREFETCHWT1()) Features.set(Feature_HasPREFETCHWT1Bit); if (Subtarget->hasLAHFSAHF()) Features.set(Feature_HasLAHFSAHFBit); if (Subtarget->hasMWAITX()) Features.set(Feature_HasMWAITXBit); if (Subtarget->hasCLDEMOTE()) Features.set(Feature_HasCLDEMOTEBit); if (Subtarget->hasMOVDIRI()) Features.set(Feature_HasMOVDIRIBit); if (Subtarget->hasMOVDIR64B()) Features.set(Feature_HasMOVDIR64BBit); if (Subtarget->hasPTWRITE()) Features.set(Feature_HasPTWRITEBit); if (!Subtarget->hasSSE1()) Features.set(Feature_FPStackf32Bit); if (!Subtarget->hasSSE2()) Features.set(Feature_FPStackf64Bit); if (Subtarget->hasCLFLUSHOPT()) Features.set(Feature_HasCLFLUSHOPTBit); if (Subtarget->hasCLWB()) Features.set(Feature_HasCLWBBit); if (Subtarget->hasWBNOINVD()) Features.set(Feature_HasWBNOINVDBit); if (Subtarget->hasRDPID()) Features.set(Feature_HasRDPIDBit); if (Subtarget->hasWAITPKG()) Features.set(Feature_HasWAITPKGBit); if (Subtarget->hasINVPCID()) Features.set(Feature_HasINVPCIDBit); if (Subtarget->hasCmpxchg8b()) Features.set(Feature_HasCmpxchg8bBit); if (Subtarget->hasCmpxchg16b()) Features.set(Feature_HasCmpxchg16bBit); if (Subtarget->hasENQCMD()) Features.set(Feature_HasENQCMDBit); if (!Subtarget->is64Bit()) Features.set(Feature_Not64BitModeBit); if (Subtarget->is64Bit()) Features.set(Feature_In64BitModeBit); if (Subtarget->isTarget64BitLP64()) Features.set(Feature_IsLP64Bit); if (!Subtarget->isTarget64BitLP64()) Features.set(Feature_NotLP64Bit); if (Subtarget->isTargetPS4()) Features.set(Feature_IsPS4Bit); if (!Subtarget->isTargetPS4()) Features.set(Feature_NotPS4Bit); if (TM.getCodeModel() == CodeModel::Kernel) Features.set(Feature_KernelCodeBit); if (TM.getCodeModel() == CodeModel::Small ||TM.getCodeModel() == CodeModel::Kernel) Features.set(Feature_NearDataBit); if (!TM.isPositionIndependent()) Features.set(Feature_IsNotPICBit); if (Subtarget->isLegalToCallImmediateAddr()) Features.set(Feature_CallImmAddrBit); if (!Subtarget->slowTwoMemOps()) Features.set(Feature_FavorMemIndirectCallBit); if (Subtarget->hasFastSHLDRotate()) Features.set(Feature_HasFastSHLDRotateBit); if (Subtarget->hasMFence()) Features.set(Feature_HasMFenceBit); if (Subtarget->useRetpolineIndirectCalls()) Features.set(Feature_UseRetpolineIndirectCallsBit); if (!Subtarget->useRetpolineIndirectCalls()) Features.set(Feature_NotUseRetpolineIndirectCallsBit); return Features; } void X86InstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) { AvailableFunctionFeatures = computeAvailableFunctionFeatures((const X86Subtarget*)&MF.getSubtarget(), &MF); } static bool shouldOptForSize(const MachineFunction *MF) { return MF->getFunction().hasOptSize(); } PredicateBitset X86InstructionSelector:: computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const { PredicateBitset Features; if (!Subtarget->isTargetWin64() ||Subtarget->getFrameLowering()->hasFP(*MF)) Features.set(Feature_NotWin64WithoutFPBit); if (shouldOptForSize(MF)) Features.set(Feature_OptForSizeBit); if (MF->getFunction().hasMinSize()) Features.set(Feature_OptForMinSizeBit); if (!shouldOptForSize(MF)) Features.set(Feature_OptForSpeedBit); if (!Subtarget->slowIncDec() || shouldOptForSize(MF)) Features.set(Feature_UseIncDecBit); if (shouldOptForSize(MF) || !Subtarget->hasSSE41()) Features.set(Feature_NoSSE41_Or_OptForSizeBit); return Features; } // LLT Objects. enum { GILLT_s1, GILLT_s8, GILLT_s16, GILLT_s32, GILLT_s64, GILLT_s80, GILLT_s128, GILLT_v2s1, GILLT_v2s64, GILLT_v4s1, GILLT_v4s32, GILLT_v4s64, GILLT_v8s1, GILLT_v8s16, GILLT_v8s32, GILLT_v8s64, GILLT_v16s1, GILLT_v16s8, GILLT_v16s16, GILLT_v16s32, GILLT_v32s1, GILLT_v32s8, GILLT_v32s16, GILLT_v64s1, GILLT_v64s8, }; const static size_t NumTypeObjects = 25; const static LLT TypeObjects[] = { LLT::scalar(1), LLT::scalar(8), LLT::scalar(16), LLT::scalar(32), LLT::scalar(64), LLT::scalar(80), LLT::scalar(128), LLT::vector(2, 1), LLT::vector(2, 64), LLT::vector(4, 1), LLT::vector(4, 32), LLT::vector(4, 64), LLT::vector(8, 1), LLT::vector(8, 16), LLT::vector(8, 32), LLT::vector(8, 64), LLT::vector(16, 1), LLT::vector(16, 8), LLT::vector(16, 16), LLT::vector(16, 32), LLT::vector(32, 1), LLT::vector(32, 8), LLT::vector(32, 16), LLT::vector(64, 1), LLT::vector(64, 8), }; // Feature bitsets. enum { GIFBS_Invalid, GIFBS_FPStackf32, GIFBS_FPStackf64, GIFBS_Has3DNow, GIFBS_HasAVX, GIFBS_HasAVX1Only, GIFBS_HasAVX2, GIFBS_HasAVX512, GIFBS_HasBITALG, GIFBS_HasBMI, GIFBS_HasBMI2, GIFBS_HasBWI, GIFBS_HasCDI, GIFBS_HasDQI, GIFBS_HasLWP, GIFBS_HasMFence, GIFBS_HasMMX, GIFBS_HasMOVBE, GIFBS_HasMWAITX, GIFBS_HasPTWRITE, GIFBS_HasRTM, GIFBS_HasSHA, GIFBS_HasSSE1, GIFBS_HasSSE2, GIFBS_HasSSE3, GIFBS_HasSSE42, GIFBS_HasSSE4A, GIFBS_HasTBM, GIFBS_HasVLX, GIFBS_HasVPOPCNTDQ, GIFBS_HasWAITPKG, GIFBS_HasWBNOINVD, GIFBS_HasXOP, GIFBS_HasXSAVE, GIFBS_In64BitMode, GIFBS_NoDQI, GIFBS_Not64BitMode, GIFBS_UseAVX, GIFBS_UseIncDec, GIFBS_UseSSE1, GIFBS_UseSSE2, GIFBS_UseSSE41, GIFBS_UseSSSE3, GIFBS_HasAES_HasAVX, GIFBS_HasAES_NoAVX, GIFBS_HasAVX_In64BitMode, GIFBS_HasAVX_NoVLX, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIFBS_HasAVX_Not64BitMode, GIFBS_HasAVX2_NoVLX, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIFBS_HasAVX512_HasVAES, GIFBS_HasAVX512_HasVLX, GIFBS_HasAVX512_HasVPCLMULQDQ, GIFBS_HasAVX512_NoBWI, GIFBS_HasBITALG_HasVLX, GIFBS_HasBWI_HasVLX, GIFBS_HasCDI_HasVLX, GIFBS_HasDQI_HasVLX, GIFBS_HasDQI_NoBWI, GIFBS_HasFSGSBase_In64BitMode, GIFBS_HasPCLMUL_NoAVX, GIFBS_HasPTWRITE_In64BitMode, GIFBS_HasRDPID_Not64BitMode, GIFBS_HasVAES_HasVLX, GIFBS_HasVAES_NoVLX, GIFBS_HasVLX_HasVPCLMULQDQ, GIFBS_HasVLX_HasVPOPCNTDQ, GIFBS_HasVPCLMULQDQ_NoVLX, GIFBS_HasWAITPKG_In64BitMode, GIFBS_HasWAITPKG_Not64BitMode, GIFBS_In64BitMode_UseSSE2, GIFBS_Not64BitMode_OptForSize, GIFBS_Not64BitMode_UseSSE2, GIFBS_NotWin64WithoutFP_OptForMinSize, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ, GIFBS_HasDQI_HasVLX_NoBWI, }; const static PredicateBitset FeatureBitsets[] { {}, // GIFBS_Invalid {Feature_FPStackf32Bit, }, {Feature_FPStackf64Bit, }, {Feature_Has3DNowBit, }, {Feature_HasAVXBit, }, {Feature_HasAVX1OnlyBit, }, {Feature_HasAVX2Bit, }, {Feature_HasAVX512Bit, }, {Feature_HasBITALGBit, }, {Feature_HasBMIBit, }, {Feature_HasBMI2Bit, }, {Feature_HasBWIBit, }, {Feature_HasCDIBit, }, {Feature_HasDQIBit, }, {Feature_HasLWPBit, }, {Feature_HasMFenceBit, }, {Feature_HasMMXBit, }, {Feature_HasMOVBEBit, }, {Feature_HasMWAITXBit, }, {Feature_HasPTWRITEBit, }, {Feature_HasRTMBit, }, {Feature_HasSHABit, }, {Feature_HasSSE1Bit, }, {Feature_HasSSE2Bit, }, {Feature_HasSSE3Bit, }, {Feature_HasSSE42Bit, }, {Feature_HasSSE4ABit, }, {Feature_HasTBMBit, }, {Feature_HasVLXBit, }, {Feature_HasVPOPCNTDQBit, }, {Feature_HasWAITPKGBit, }, {Feature_HasWBNOINVDBit, }, {Feature_HasXOPBit, }, {Feature_HasXSAVEBit, }, {Feature_In64BitModeBit, }, {Feature_NoDQIBit, }, {Feature_Not64BitModeBit, }, {Feature_UseAVXBit, }, {Feature_UseIncDecBit, }, {Feature_UseSSE1Bit, }, {Feature_UseSSE2Bit, }, {Feature_UseSSE41Bit, }, {Feature_UseSSSE3Bit, }, {Feature_HasAESBit, Feature_HasAVXBit, }, {Feature_HasAESBit, Feature_NoAVXBit, }, {Feature_HasAVXBit, Feature_In64BitModeBit, }, {Feature_HasAVXBit, Feature_NoVLXBit, }, {Feature_HasAVXBit, Feature_NoVLX_Or_NoBWIBit, }, {Feature_HasAVXBit, Feature_Not64BitModeBit, }, {Feature_HasAVX2Bit, Feature_NoVLXBit, }, {Feature_HasAVX2Bit, Feature_NoVLX_Or_NoBWIBit, }, {Feature_HasAVX512Bit, Feature_HasVAESBit, }, {Feature_HasAVX512Bit, Feature_HasVLXBit, }, {Feature_HasAVX512Bit, Feature_HasVPCLMULQDQBit, }, {Feature_HasAVX512Bit, Feature_NoBWIBit, }, {Feature_HasBITALGBit, Feature_HasVLXBit, }, {Feature_HasBWIBit, Feature_HasVLXBit, }, {Feature_HasCDIBit, Feature_HasVLXBit, }, {Feature_HasDQIBit, Feature_HasVLXBit, }, {Feature_HasDQIBit, Feature_NoBWIBit, }, {Feature_HasFSGSBaseBit, Feature_In64BitModeBit, }, {Feature_HasPCLMULBit, Feature_NoAVXBit, }, {Feature_HasPTWRITEBit, Feature_In64BitModeBit, }, {Feature_HasRDPIDBit, Feature_Not64BitModeBit, }, {Feature_HasVAESBit, Feature_HasVLXBit, }, {Feature_HasVAESBit, Feature_NoVLXBit, }, {Feature_HasVLXBit, Feature_HasVPCLMULQDQBit, }, {Feature_HasVLXBit, Feature_HasVPOPCNTDQBit, }, {Feature_HasVPCLMULQDQBit, Feature_NoVLXBit, }, {Feature_HasWAITPKGBit, Feature_In64BitModeBit, }, {Feature_HasWAITPKGBit, Feature_Not64BitModeBit, }, {Feature_In64BitModeBit, Feature_UseSSE2Bit, }, {Feature_Not64BitModeBit, Feature_OptForSizeBit, }, {Feature_Not64BitModeBit, Feature_UseSSE2Bit, }, {Feature_NotWin64WithoutFPBit, Feature_OptForMinSizeBit, }, {Feature_HasAESBit, Feature_HasAVXBit, Feature_NoVLX_Or_NoVAESBit, }, {Feature_HasAVXBit, Feature_HasPCLMULBit, Feature_NoVLX_Or_NoVPCLMULQDQBit, }, {Feature_HasDQIBit, Feature_HasVLXBit, Feature_NoBWIBit, }, }; // ComplexPattern predicates. enum { GICP_Invalid, }; // See constructor for table contents // PatFrag predicates. enum { GIPFP_I64_Predicate_AndMask64 = GIPFP_I64_Invalid + 1, GIPFP_I64_Predicate_BTCBTSMask64, GIPFP_I64_Predicate_BTRMask64, GIPFP_I64_Predicate_PrefetchWT1Level, GIPFP_I64_Predicate_i16immSExt8, GIPFP_I64_Predicate_i32immSExt8, GIPFP_I64_Predicate_i64immSExt32, GIPFP_I64_Predicate_i64immSExt8, GIPFP_I64_Predicate_i64immZExt32, GIPFP_I64_Predicate_i64immZExt32SExt8, GIPFP_I64_Predicate_immff00_ffff, }; bool X86InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const { switch (PredicateID) { case GIPFP_I64_Predicate_AndMask64: { return isMask_64(Imm) && !isUInt<32>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_BTCBTSMask64: { return !isInt<32>(Imm) && isPowerOf2_64(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_BTRMask64: { return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_PrefetchWT1Level: { return Imm < 3; llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i16immSExt8: { return isInt<8>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i32immSExt8: { return isInt<8>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i64immSExt32: { return isInt<32>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i64immSExt8: { return isInt<8>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i64immZExt32: { return isUInt<32>(Imm); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_i64immZExt32SExt8: { return isUInt<32>(Imm) && isInt<8>(static_cast(Imm)); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_I64_Predicate_immff00_ffff: { return Imm >= 0xff00 && Imm <= 0xffff; llvm_unreachable("ImmediateCode should have returned"); return false; } } llvm_unreachable("Unknown predicate"); return false; } // PatFrag predicates. enum { GIPFP_APFloat_Predicate_fpimm0 = GIPFP_APFloat_Invalid + 1, GIPFP_APFloat_Predicate_fpimm1, GIPFP_APFloat_Predicate_fpimmneg0, GIPFP_APFloat_Predicate_fpimmneg1, }; bool X86InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const { switch (PredicateID) { case GIPFP_APFloat_Predicate_fpimm0: { return Imm.isExactlyValue(+0.0); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_APFloat_Predicate_fpimm1: { return Imm.isExactlyValue(+1.0); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_APFloat_Predicate_fpimmneg0: { return Imm.isExactlyValue(-0.0); llvm_unreachable("ImmediateCode should have returned"); return false; } case GIPFP_APFloat_Predicate_fpimmneg1: { return Imm.isExactlyValue(-1.0); llvm_unreachable("ImmediateCode should have returned"); return false; } } llvm_unreachable("Unknown predicate"); return false; } bool X86InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const { llvm_unreachable("Unknown predicate"); return false; } bool X86InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI) const { const MachineFunction &MF = *MI.getParent()->getParent(); const MachineRegisterInfo &MRI = MF.getRegInfo(); (void)MRI; llvm_unreachable("Unknown predicate"); return false; } X86InstructionSelector::ComplexMatcherMemFn X86InstructionSelector::ComplexPredicateFns[] = { nullptr, // GICP_Invalid }; // Custom renderers. enum { GICR_Invalid, }; X86InstructionSelector::CustomRendererFn X86InstructionSelector::CustomRenderers[] = { nullptr, // GICR_Invalid }; bool X86InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const { MachineFunction &MF = *I.getParent()->getParent(); MachineRegisterInfo &MRI = MF.getRegInfo(); const PredicateBitset AvailableFeatures = getAvailableFeatures(); NewMIVector OutMIs; State.MIs.clear(); State.MIs.push_back(&I); if (executeMatchTable(*this, OutMIs, State, ISelInfo, getMatchTable(), TII, MRI, TRI, RBI, AvailableFeatures, CoverageInfo)) { return true; } return false; } const int64_t *X86InstructionSelector::getMatchTable() const { constexpr static int64_t MatchTable0[] = { GIM_SwitchOpcode, /*MI*/0, /*[*/35, 168, /*)*//*default:*//*Label 43*/ 37038, /*TargetOpcode::G_ADD*//*Label 0*/ 138, /*TargetOpcode::G_SUB*//*Label 1*/ 1755, /*TargetOpcode::G_MUL*//*Label 2*/ 2836, 0, 0, 0, 0, /*TargetOpcode::G_AND*//*Label 3*/ 3602, /*TargetOpcode::G_OR*//*Label 4*/ 7119, /*TargetOpcode::G_XOR*//*Label 5*/ 10989, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_CONCAT_VECTORS*//*Label 6*/ 14165, 0, 0, /*TargetOpcode::G_BITCAST*//*Label 7*/ 14321, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_INTRINSIC*//*Label 8*/ 15051, /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 9*/ 21028, /*TargetOpcode::G_ANYEXT*//*Label 10*/ 22825, /*TargetOpcode::G_TRUNC*//*Label 11*/ 23606, /*TargetOpcode::G_CONSTANT*//*Label 12*/ 23989, /*TargetOpcode::G_FCONSTANT*//*Label 13*/ 24192, 0, 0, /*TargetOpcode::G_SEXT*//*Label 14*/ 24339, 0, /*TargetOpcode::G_ZEXT*//*Label 15*/ 25144, /*TargetOpcode::G_SHL*//*Label 16*/ 25877, /*TargetOpcode::G_LSHR*//*Label 17*/ 26470, /*TargetOpcode::G_ASHR*//*Label 18*/ 27047, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_UMULH*//*Label 19*/ 27624, /*TargetOpcode::G_SMULH*//*Label 20*/ 27812, /*TargetOpcode::G_FADD*//*Label 21*/ 28000, /*TargetOpcode::G_FSUB*//*Label 22*/ 28676, /*TargetOpcode::G_FMUL*//*Label 23*/ 29352, 0, 0, /*TargetOpcode::G_FDIV*//*Label 24*/ 30028, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_FNEG*//*Label 25*/ 30704, /*TargetOpcode::G_FPEXT*//*Label 26*/ 30793, /*TargetOpcode::G_FPTRUNC*//*Label 27*/ 31081, /*TargetOpcode::G_FPTOSI*//*Label 28*/ 31289, /*TargetOpcode::G_FPTOUI*//*Label 29*/ 31645, /*TargetOpcode::G_SITOFP*//*Label 30*/ 31760, /*TargetOpcode::G_UITOFP*//*Label 31*/ 32632, /*TargetOpcode::G_FABS*//*Label 32*/ 33110, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*TargetOpcode::G_SMIN*//*Label 33*/ 33199, /*TargetOpcode::G_SMAX*//*Label 34*/ 33832, /*TargetOpcode::G_UMIN*//*Label 35*/ 34465, /*TargetOpcode::G_UMAX*//*Label 36*/ 35098, /*TargetOpcode::G_BR*//*Label 37*/ 35731, 0, 0, 0, 0, 0, /*TargetOpcode::G_CTTZ_ZERO_UNDEF*//*Label 38*/ 35744, /*TargetOpcode::G_CTLZ*//*Label 39*/ 35829, 0, /*TargetOpcode::G_CTPOP*//*Label 40*/ 35992, /*TargetOpcode::G_BSWAP*//*Label 41*/ 36304, 0, 0, 0, 0, /*TargetOpcode::G_FSQRT*//*Label 42*/ 36394, // Label 0: @138 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 60*/ 1754, /*GILLT_s8*//*Label 44*/ 168, /*GILLT_s16*//*Label 45*/ 282, /*GILLT_s32*//*Label 46*/ 454, /*GILLT_s64*//*Label 47*/ 626, 0, 0, 0, /*GILLT_v2s64*//*Label 48*/ 826, 0, /*GILLT_v4s32*//*Label 49*/ 907, /*GILLT_v4s64*//*Label 50*/ 1110, 0, /*GILLT_v8s16*//*Label 51*/ 1168, /*GILLT_v8s32*//*Label 52*/ 1371, /*GILLT_v8s64*//*Label 53*/ 1429, 0, /*GILLT_v16s8*//*Label 54*/ 1461, /*GILLT_v16s16*//*Label 55*/ 1542, /*GILLT_v16s32*//*Label 56*/ 1600, 0, /*GILLT_v32s8*//*Label 57*/ 1632, /*GILLT_v32s16*//*Label 58*/ 1690, 0, /*GILLT_v64s8*//*Label 59*/ 1722, // Label 44: @168 GIM_Try, /*On fail goto*//*Label 61*/ 281, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 62*/ 210, // Rule ID 17335 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, 1:{ *:[i8] }) => (INC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC8r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17335, GIR_Done, // Label 62: @210 GIM_Try, /*On fail goto*//*Label 63*/ 234, // Rule ID 17339 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, -1:{ *:[i8] }) => (DEC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC8r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17339, GIR_Done, // Label 63: @234 GIM_Try, /*On fail goto*//*Label 64*/ 264, // Rule ID 17290 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17290, GIR_Done, // Label 64: @264 GIM_Try, /*On fail goto*//*Label 65*/ 280, // Rule ID 17282 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17282, GIR_Done, // Label 65: @280 GIM_Reject, // Label 61: @281 GIM_Reject, // Label 45: @282 GIM_Try, /*On fail goto*//*Label 66*/ 453, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 67*/ 325, // Rule ID 17144 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, 128:{ *:[i16] }) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -128:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17144, GIR_Done, // Label 67: @325 GIM_Try, /*On fail goto*//*Label 68*/ 349, // Rule ID 17336 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, 1:{ *:[i16] }) => (INC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC16r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17336, GIR_Done, // Label 68: @349 GIM_Try, /*On fail goto*//*Label 69*/ 373, // Rule ID 17340 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, -1:{ *:[i16] }) => (DEC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC16r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17340, GIR_Done, // Label 69: @373 GIM_Try, /*On fail goto*//*Label 70*/ 406, // Rule ID 17293 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (ADD16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17293, GIR_Done, // Label 70: @406 GIM_Try, /*On fail goto*//*Label 71*/ 436, // Rule ID 17291 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17291, GIR_Done, // Label 71: @436 GIM_Try, /*On fail goto*//*Label 72*/ 452, // Rule ID 17283 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17283, GIR_Done, // Label 72: @452 GIM_Reject, // Label 66: @453 GIM_Reject, // Label 46: @454 GIM_Try, /*On fail goto*//*Label 73*/ 625, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 74*/ 497, // Rule ID 17146 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, 128:{ *:[i32] }) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -128:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17146, GIR_Done, // Label 74: @497 GIM_Try, /*On fail goto*//*Label 75*/ 521, // Rule ID 17337 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }) => (INC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC32r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17337, GIR_Done, // Label 75: @521 GIM_Try, /*On fail goto*//*Label 76*/ 545, // Rule ID 17341 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }) => (DEC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC32r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17341, GIR_Done, // Label 76: @545 GIM_Try, /*On fail goto*//*Label 77*/ 578, // Rule ID 17294 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (ADD32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17294, GIR_Done, // Label 77: @578 GIM_Try, /*On fail goto*//*Label 78*/ 608, // Rule ID 17292 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17292, GIR_Done, // Label 78: @608 GIM_Try, /*On fail goto*//*Label 79*/ 624, // Rule ID 17284 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17284, GIR_Done, // Label 79: @624 GIM_Reject, // Label 73: @625 GIM_Reject, // Label 47: @626 GIM_Try, /*On fail goto*//*Label 80*/ 825, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 81*/ 669, // Rule ID 17148 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 128:{ *:[i64] }) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -128:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-128, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17148, GIR_Done, // Label 81: @669 GIM_Try, /*On fail goto*//*Label 82*/ 694, // Rule ID 17153 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 2147483648, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 2147483648:{ *:[i64] }) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -2147483648:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddImm, /*InsnID*/0, /*Imm*/-2147483648, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17153, GIR_Done, // Label 82: @694 GIM_Try, /*On fail goto*//*Label 83*/ 718, // Rule ID 17338 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }) => (INC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC64r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17338, GIR_Done, // Label 83: @718 GIM_Try, /*On fail goto*//*Label 84*/ 742, // Rule ID 17342 // GIM_CheckFeatures, GIFBS_UseIncDec, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }) => (DEC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC64r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17342, GIR_Done, // Label 84: @742 GIM_Try, /*On fail goto*//*Label 85*/ 775, // Rule ID 17295 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (ADD64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17295, GIR_Done, // Label 85: @775 GIM_Try, /*On fail goto*//*Label 86*/ 808, // Rule ID 17296 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (ADD64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17296, GIR_Done, // Label 86: @808 GIM_Try, /*On fail goto*//*Label 87*/ 824, // Rule ID 17285 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17285, GIR_Done, // Label 87: @824 GIM_Reject, // Label 80: @825 GIM_Reject, // Label 48: @826 GIM_Try, /*On fail goto*//*Label 88*/ 906, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 89*/ 859, // Rule ID 1999 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1999, GIR_Done, // Label 89: @859 GIM_Try, /*On fail goto*//*Label 90*/ 882, // Rule ID 2001 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2001, GIR_Done, // Label 90: @882 GIM_Try, /*On fail goto*//*Label 91*/ 905, // Rule ID 3913 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (add:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPADDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3913, GIR_Done, // Label 91: @905 GIM_Reject, // Label 88: @906 GIM_Reject, // Label 49: @907 GIM_Try, /*On fail goto*//*Label 92*/ 1109, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 93*/ 978, // Rule ID 13212 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2), VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13212, GIR_Done, // Label 93: @978 GIM_Try, /*On fail goto*//*Label 94*/ 1039, // Rule ID 19275 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src3, (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19275, GIR_Done, // Label 94: @1039 GIM_Try, /*On fail goto*//*Label 95*/ 1062, // Rule ID 1993 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1993, GIR_Done, // Label 95: @1062 GIM_Try, /*On fail goto*//*Label 96*/ 1085, // Rule ID 1995 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1995, GIR_Done, // Label 96: @1085 GIM_Try, /*On fail goto*//*Label 97*/ 1108, // Rule ID 3940 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (add:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPADDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3940, GIR_Done, // Label 97: @1108 GIM_Reject, // Label 92: @1109 GIM_Reject, // Label 50: @1110 GIM_Try, /*On fail goto*//*Label 98*/ 1167, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 99*/ 1143, // Rule ID 2003 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (add:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPADDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2003, GIR_Done, // Label 99: @1143 GIM_Try, /*On fail goto*//*Label 100*/ 1166, // Rule ID 3904 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (add:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPADDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3904, GIR_Done, // Label 100: @1166 GIM_Reject, // Label 98: @1167 GIM_Reject, // Label 51: @1168 GIM_Try, /*On fail goto*//*Label 101*/ 1370, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 102*/ 1239, // Rule ID 13211 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2), VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13211, GIR_Done, // Label 102: @1239 GIM_Try, /*On fail goto*//*Label 103*/ 1300, // Rule ID 19274 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src3, (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19274, GIR_Done, // Label 103: @1300 GIM_Try, /*On fail goto*//*Label 104*/ 1323, // Rule ID 1987 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1987, GIR_Done, // Label 104: @1323 GIM_Try, /*On fail goto*//*Label 105*/ 1346, // Rule ID 1989 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1989, GIR_Done, // Label 105: @1346 GIM_Try, /*On fail goto*//*Label 106*/ 1369, // Rule ID 3961 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (add:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3961, GIR_Done, // Label 106: @1369 GIM_Reject, // Label 101: @1370 GIM_Reject, // Label 52: @1371 GIM_Try, /*On fail goto*//*Label 107*/ 1428, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 108*/ 1404, // Rule ID 1997 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (add:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPADDDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1997, GIR_Done, // Label 108: @1404 GIM_Try, /*On fail goto*//*Label 109*/ 1427, // Rule ID 3931 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (add:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPADDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3931, GIR_Done, // Label 109: @1427 GIM_Reject, // Label 107: @1428 GIM_Reject, // Label 53: @1429 GIM_Try, /*On fail goto*//*Label 110*/ 1460, // Rule ID 3895 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (add:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPADDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3895, GIR_Done, // Label 110: @1460 GIM_Reject, // Label 54: @1461 GIM_Try, /*On fail goto*//*Label 111*/ 1541, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 112*/ 1494, // Rule ID 1981 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1981, GIR_Done, // Label 112: @1494 GIM_Try, /*On fail goto*//*Label 113*/ 1517, // Rule ID 1983 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1983, GIR_Done, // Label 113: @1517 GIM_Try, /*On fail goto*//*Label 114*/ 1540, // Rule ID 3979 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (add:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3979, GIR_Done, // Label 114: @1540 GIM_Reject, // Label 111: @1541 GIM_Reject, // Label 55: @1542 GIM_Try, /*On fail goto*//*Label 115*/ 1599, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 116*/ 1575, // Rule ID 1991 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (add:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1991, GIR_Done, // Label 116: @1575 GIM_Try, /*On fail goto*//*Label 117*/ 1598, // Rule ID 3955 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (add:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3955, GIR_Done, // Label 117: @1598 GIM_Reject, // Label 115: @1599 GIM_Reject, // Label 56: @1600 GIM_Try, /*On fail goto*//*Label 118*/ 1631, // Rule ID 3922 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (add:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPADDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3922, GIR_Done, // Label 118: @1631 GIM_Reject, // Label 57: @1632 GIM_Try, /*On fail goto*//*Label 119*/ 1689, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 120*/ 1665, // Rule ID 1985 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (add:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1985, GIR_Done, // Label 120: @1665 GIM_Try, /*On fail goto*//*Label 121*/ 1688, // Rule ID 3973 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (add:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3973, GIR_Done, // Label 121: @1688 GIM_Reject, // Label 119: @1689 GIM_Reject, // Label 58: @1690 GIM_Try, /*On fail goto*//*Label 122*/ 1721, // Rule ID 3949 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (add:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3949, GIR_Done, // Label 122: @1721 GIM_Reject, // Label 59: @1722 GIM_Try, /*On fail goto*//*Label 123*/ 1753, // Rule ID 3967 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (add:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3967, GIR_Done, // Label 123: @1753 GIM_Reject, // Label 60: @1754 GIM_Reject, // Label 1: @1755 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 140*/ 2835, /*GILLT_s8*//*Label 124*/ 1785, /*GILLT_s16*//*Label 125*/ 1851, /*GILLT_s32*//*Label 126*/ 1950, /*GILLT_s64*//*Label 127*/ 2049, 0, 0, 0, /*GILLT_v2s64*//*Label 128*/ 2151, 0, /*GILLT_v4s32*//*Label 129*/ 2232, /*GILLT_v4s64*//*Label 130*/ 2313, 0, /*GILLT_v8s16*//*Label 131*/ 2371, /*GILLT_v8s32*//*Label 132*/ 2452, /*GILLT_v8s64*//*Label 133*/ 2510, 0, /*GILLT_v16s8*//*Label 134*/ 2542, /*GILLT_v16s16*//*Label 135*/ 2623, /*GILLT_v16s32*//*Label 136*/ 2681, 0, /*GILLT_v32s8*//*Label 137*/ 2713, /*GILLT_v32s16*//*Label 138*/ 2771, 0, /*GILLT_v64s8*//*Label 139*/ 2803, // Label 124: @1785 GIM_Try, /*On fail goto*//*Label 141*/ 1850, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 142*/ 1833, // Rule ID 17305 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SUB8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17305, GIR_Done, // Label 142: @1833 GIM_Try, /*On fail goto*//*Label 143*/ 1849, // Rule ID 17297 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (SUB8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17297, GIR_Done, // Label 143: @1849 GIM_Reject, // Label 141: @1850 GIM_Reject, // Label 125: @1851 GIM_Try, /*On fail goto*//*Label 144*/ 1949, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 145*/ 1902, // Rule ID 17308 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17308, GIR_Done, // Label 145: @1902 GIM_Try, /*On fail goto*//*Label 146*/ 1932, // Rule ID 17306 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (SUB16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17306, GIR_Done, // Label 146: @1932 GIM_Try, /*On fail goto*//*Label 147*/ 1948, // Rule ID 17298 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (SUB16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17298, GIR_Done, // Label 147: @1948 GIM_Reject, // Label 144: @1949 GIM_Reject, // Label 126: @1950 GIM_Try, /*On fail goto*//*Label 148*/ 2048, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 149*/ 2001, // Rule ID 17309 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17309, GIR_Done, // Label 149: @2001 GIM_Try, /*On fail goto*//*Label 150*/ 2031, // Rule ID 17307 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (SUB32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17307, GIR_Done, // Label 150: @2031 GIM_Try, /*On fail goto*//*Label 151*/ 2047, // Rule ID 17299 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (SUB32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17299, GIR_Done, // Label 151: @2047 GIM_Reject, // Label 148: @2048 GIM_Reject, // Label 127: @2049 GIM_Try, /*On fail goto*//*Label 152*/ 2150, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 153*/ 2100, // Rule ID 17310 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17310, GIR_Done, // Label 153: @2100 GIM_Try, /*On fail goto*//*Label 154*/ 2133, // Rule ID 17311 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17311, GIR_Done, // Label 154: @2133 GIM_Try, /*On fail goto*//*Label 155*/ 2149, // Rule ID 17300 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (SUB64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17300, GIR_Done, // Label 155: @2149 GIM_Reject, // Label 152: @2150 GIM_Reject, // Label 128: @2151 GIM_Try, /*On fail goto*//*Label 156*/ 2231, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 157*/ 2184, // Rule ID 2065 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2065, GIR_Done, // Label 157: @2184 GIM_Try, /*On fail goto*//*Label 158*/ 2207, // Rule ID 2067 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2067, GIR_Done, // Label 158: @2207 GIM_Try, /*On fail goto*//*Label 159*/ 2230, // Rule ID 4003 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (sub:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSUBQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4003, GIR_Done, // Label 159: @2230 GIM_Reject, // Label 156: @2231 GIM_Reject, // Label 129: @2232 GIM_Try, /*On fail goto*//*Label 160*/ 2312, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 161*/ 2265, // Rule ID 2059 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2059, GIR_Done, // Label 161: @2265 GIM_Try, /*On fail goto*//*Label 162*/ 2288, // Rule ID 2061 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2061, GIR_Done, // Label 162: @2288 GIM_Try, /*On fail goto*//*Label 163*/ 2311, // Rule ID 4030 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (sub:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSUBDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4030, GIR_Done, // Label 163: @2311 GIM_Reject, // Label 160: @2312 GIM_Reject, // Label 130: @2313 GIM_Try, /*On fail goto*//*Label 164*/ 2370, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 165*/ 2346, // Rule ID 2069 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (sub:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSUBQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2069, GIR_Done, // Label 165: @2346 GIM_Try, /*On fail goto*//*Label 166*/ 2369, // Rule ID 3994 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (sub:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSUBQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3994, GIR_Done, // Label 166: @2369 GIM_Reject, // Label 164: @2370 GIM_Reject, // Label 131: @2371 GIM_Try, /*On fail goto*//*Label 167*/ 2451, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 168*/ 2404, // Rule ID 2053 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2053, GIR_Done, // Label 168: @2404 GIM_Try, /*On fail goto*//*Label 169*/ 2427, // Rule ID 2055 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2055, GIR_Done, // Label 169: @2427 GIM_Try, /*On fail goto*//*Label 170*/ 2450, // Rule ID 4051 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (sub:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4051, GIR_Done, // Label 170: @2450 GIM_Reject, // Label 167: @2451 GIM_Reject, // Label 132: @2452 GIM_Try, /*On fail goto*//*Label 171*/ 2509, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 172*/ 2485, // Rule ID 2063 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (sub:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSUBDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2063, GIR_Done, // Label 172: @2485 GIM_Try, /*On fail goto*//*Label 173*/ 2508, // Rule ID 4021 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (sub:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSUBDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4021, GIR_Done, // Label 173: @2508 GIM_Reject, // Label 171: @2509 GIM_Reject, // Label 133: @2510 GIM_Try, /*On fail goto*//*Label 174*/ 2541, // Rule ID 3985 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (sub:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSUBQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3985, GIR_Done, // Label 174: @2541 GIM_Reject, // Label 134: @2542 GIM_Try, /*On fail goto*//*Label 175*/ 2622, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 176*/ 2575, // Rule ID 2047 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2047, GIR_Done, // Label 176: @2575 GIM_Try, /*On fail goto*//*Label 177*/ 2598, // Rule ID 2049 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2049, GIR_Done, // Label 177: @2598 GIM_Try, /*On fail goto*//*Label 178*/ 2621, // Rule ID 4069 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (sub:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4069, GIR_Done, // Label 178: @2621 GIM_Reject, // Label 175: @2622 GIM_Reject, // Label 135: @2623 GIM_Try, /*On fail goto*//*Label 179*/ 2680, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 180*/ 2656, // Rule ID 2057 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (sub:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2057, GIR_Done, // Label 180: @2656 GIM_Try, /*On fail goto*//*Label 181*/ 2679, // Rule ID 4045 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (sub:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4045, GIR_Done, // Label 181: @2679 GIM_Reject, // Label 179: @2680 GIM_Reject, // Label 136: @2681 GIM_Try, /*On fail goto*//*Label 182*/ 2712, // Rule ID 4012 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (sub:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSUBDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4012, GIR_Done, // Label 182: @2712 GIM_Reject, // Label 137: @2713 GIM_Try, /*On fail goto*//*Label 183*/ 2770, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 184*/ 2746, // Rule ID 2051 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (sub:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2051, GIR_Done, // Label 184: @2746 GIM_Try, /*On fail goto*//*Label 185*/ 2769, // Rule ID 4063 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (sub:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4063, GIR_Done, // Label 185: @2769 GIM_Reject, // Label 183: @2770 GIM_Reject, // Label 138: @2771 GIM_Try, /*On fail goto*//*Label 186*/ 2802, // Rule ID 4039 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (sub:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4039, GIR_Done, // Label 186: @2802 GIM_Reject, // Label 139: @2803 GIM_Try, /*On fail goto*//*Label 187*/ 2834, // Rule ID 4057 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (sub:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4057, GIR_Done, // Label 187: @2834 GIM_Reject, // Label 140: @2835 GIM_Reject, // Label 2: @2836 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 200*/ 3601, /*GILLT_s16*//*Label 188*/ 2863, /*GILLT_s32*//*Label 189*/ 2962, /*GILLT_s64*//*Label 190*/ 3061, 0, 0, 0, /*GILLT_v2s64*//*Label 191*/ 3163, 0, /*GILLT_v4s32*//*Label 192*/ 3195, /*GILLT_v4s64*//*Label 193*/ 3276, 0, /*GILLT_v8s16*//*Label 194*/ 3308, /*GILLT_v8s32*//*Label 195*/ 3389, /*GILLT_v8s64*//*Label 196*/ 3447, 0, 0, /*GILLT_v16s16*//*Label 197*/ 3479, /*GILLT_v16s32*//*Label 198*/ 3537, 0, 0, /*GILLT_v32s16*//*Label 199*/ 3569, // Label 188: @2863 GIM_Try, /*On fail goto*//*Label 201*/ 2961, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 202*/ 2914, // Rule ID 17325 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (IMUL16rri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17325, GIR_Done, // Label 202: @2914 GIM_Try, /*On fail goto*//*Label 203*/ 2944, // Rule ID 17323 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (IMUL16rri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17323, GIR_Done, // Label 203: @2944 GIM_Try, /*On fail goto*//*Label 204*/ 2960, // Rule ID 17317 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (IMUL16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17317, GIR_Done, // Label 204: @2960 GIM_Reject, // Label 201: @2961 GIM_Reject, // Label 189: @2962 GIM_Try, /*On fail goto*//*Label 205*/ 3060, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 206*/ 3013, // Rule ID 17326 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (IMUL32rri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17326, GIR_Done, // Label 206: @3013 GIM_Try, /*On fail goto*//*Label 207*/ 3043, // Rule ID 17324 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (IMUL32rri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17324, GIR_Done, // Label 207: @3043 GIM_Try, /*On fail goto*//*Label 208*/ 3059, // Rule ID 17318 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (IMUL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17318, GIR_Done, // Label 208: @3059 GIM_Reject, // Label 205: @3060 GIM_Reject, // Label 190: @3061 GIM_Try, /*On fail goto*//*Label 209*/ 3162, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 210*/ 3112, // Rule ID 17327 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (IMUL64rri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17327, GIR_Done, // Label 210: @3112 GIM_Try, /*On fail goto*//*Label 211*/ 3145, // Rule ID 17328 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (IMUL64rri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17328, GIR_Done, // Label 211: @3145 GIM_Try, /*On fail goto*//*Label 212*/ 3161, // Rule ID 17319 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (IMUL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17319, GIR_Done, // Label 212: @3161 GIM_Reject, // Label 209: @3162 GIM_Reject, // Label 191: @3163 GIM_Try, /*On fail goto*//*Label 213*/ 3194, // Rule ID 4282 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMULLQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4282, GIR_Done, // Label 213: @3194 GIM_Reject, // Label 192: @3195 GIM_Try, /*On fail goto*//*Label 214*/ 3275, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 215*/ 3228, // Rule ID 2690 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2690, GIR_Done, // Label 215: @3228 GIM_Try, /*On fail goto*//*Label 216*/ 3251, // Rule ID 2698 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULLDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2698, GIR_Done, // Label 216: @3251 GIM_Try, /*On fail goto*//*Label 217*/ 3274, // Rule ID 4237 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mul:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMULLDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4237, GIR_Done, // Label 217: @3274 GIM_Reject, // Label 214: @3275 GIM_Reject, // Label 193: @3276 GIM_Try, /*On fail goto*//*Label 218*/ 3307, // Rule ID 4273 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mul:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMULLQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4273, GIR_Done, // Label 218: @3307 GIM_Reject, // Label 194: @3308 GIM_Try, /*On fail goto*//*Label 219*/ 3388, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 220*/ 3341, // Rule ID 2029 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2029, GIR_Done, // Label 220: @3341 GIM_Try, /*On fail goto*//*Label 221*/ 3364, // Rule ID 2031 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULLWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2031, GIR_Done, // Label 221: @3364 GIM_Try, /*On fail goto*//*Label 222*/ 3387, // Rule ID 4258 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mul:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULLWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4258, GIR_Done, // Label 222: @3387 GIM_Reject, // Label 219: @3388 GIM_Reject, // Label 195: @3389 GIM_Try, /*On fail goto*//*Label 223*/ 3446, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 224*/ 3422, // Rule ID 2694 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (mul:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMULLDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2694, GIR_Done, // Label 224: @3422 GIM_Try, /*On fail goto*//*Label 225*/ 3445, // Rule ID 4228 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mul:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMULLDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4228, GIR_Done, // Label 225: @3445 GIM_Reject, // Label 223: @3446 GIM_Reject, // Label 196: @3447 GIM_Try, /*On fail goto*//*Label 226*/ 3478, // Rule ID 4264 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mul:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMULLQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4264, GIR_Done, // Label 226: @3478 GIM_Reject, // Label 197: @3479 GIM_Try, /*On fail goto*//*Label 227*/ 3536, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 228*/ 3512, // Rule ID 2033 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (mul:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULLWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2033, GIR_Done, // Label 228: @3512 GIM_Try, /*On fail goto*//*Label 229*/ 3535, // Rule ID 4252 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mul:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULLWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4252, GIR_Done, // Label 229: @3535 GIM_Reject, // Label 227: @3536 GIM_Reject, // Label 198: @3537 GIM_Try, /*On fail goto*//*Label 230*/ 3568, // Rule ID 4219 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mul:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMULLDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4219, GIR_Done, // Label 230: @3568 GIM_Reject, // Label 199: @3569 GIM_Try, /*On fail goto*//*Label 231*/ 3600, // Rule ID 4246 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mul:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULLWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4246, GIR_Done, // Label 231: @3600 GIM_Reject, // Label 200: @3601 GIM_Reject, // Label 3: @3602 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 25, /*)*//*default:*//*Label 255*/ 7118, /*GILLT_s1*//*Label 232*/ 3633, /*GILLT_s8*//*Label 233*/ 3931, /*GILLT_s16*//*Label 234*/ 3997, /*GILLT_s32*//*Label 235*/ 4096, /*GILLT_s64*//*Label 236*/ 5079, 0, 0, /*GILLT_v2s1*//*Label 237*/ 5951, /*GILLT_v2s64*//*Label 238*/ 6044, /*GILLT_v4s1*//*Label 239*/ 6125, /*GILLT_v4s32*//*Label 240*/ 6218, /*GILLT_v4s64*//*Label 241*/ 6299, /*GILLT_v8s1*//*Label 242*/ 6380, /*GILLT_v8s16*//*Label 243*/ 6489, /*GILLT_v8s32*//*Label 244*/ 6570, /*GILLT_v8s64*//*Label 245*/ 6651, /*GILLT_v16s1*//*Label 246*/ 6683, /*GILLT_v16s8*//*Label 247*/ 6715, /*GILLT_v16s16*//*Label 248*/ 6796, /*GILLT_v16s32*//*Label 249*/ 6877, /*GILLT_v32s1*//*Label 250*/ 6909, /*GILLT_v32s8*//*Label 251*/ 6941, /*GILLT_v32s16*//*Label 252*/ 7022, /*GILLT_v64s1*//*Label 253*/ 7054, /*GILLT_v64s8*//*Label 254*/ 7086, // Label 232: @3633 GIM_Try, /*On fail goto*//*Label 256*/ 3930, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_Try, /*On fail goto*//*Label 257*/ 3748, // Rule ID 14590 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14590, GIR_Done, // Label 257: @3748 GIM_Try, /*On fail goto*//*Label 258*/ 3849, // Rule ID 19443 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 19443, GIR_Done, // Label 258: @3849 GIM_Try, /*On fail goto*//*Label 259*/ 3929, // Rule ID 14586 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14586, GIR_Done, // Label 259: @3929 GIM_Reject, // Label 256: @3930 GIM_Reject, // Label 233: @3931 GIM_Try, /*On fail goto*//*Label 260*/ 3996, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 261*/ 3979, // Rule ID 17389 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (AND8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17389, GIR_Done, // Label 261: @3979 GIM_Try, /*On fail goto*//*Label 262*/ 3995, // Rule ID 17381 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (AND8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17381, GIR_Done, // Label 262: @3995 GIM_Reject, // Label 260: @3996 GIM_Reject, // Label 234: @3997 GIM_Try, /*On fail goto*//*Label 263*/ 4095, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 264*/ 4048, // Rule ID 17392 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (AND16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17392, GIR_Done, // Label 264: @4048 GIM_Try, /*On fail goto*//*Label 265*/ 4078, // Rule ID 17390 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (AND16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17390, GIR_Done, // Label 265: @4078 GIM_Try, /*On fail goto*//*Label 266*/ 4094, // Rule ID 17382 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (AND16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17382, GIR_Done, // Label 266: @4094 GIM_Reject, // Label 263: @4095 GIM_Reject, // Label 235: @4096 GIM_Try, /*On fail goto*//*Label 267*/ 5078, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 268*/ 4177, // Rule ID 19188 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19188, GIR_Done, // Label 268: @4177 GIM_Try, /*On fail goto*//*Label 269*/ 4252, // Rule ID 19200 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19200, GIR_Done, // Label 269: @4252 GIM_Try, /*On fail goto*//*Label 270*/ 4327, // Rule ID 13009 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13009, GIR_Done, // Label 270: @4327 GIM_Try, /*On fail goto*//*Label 271*/ 4402, // Rule ID 13021 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13021, GIR_Done, // Label 271: @4402 GIM_Try, /*On fail goto*//*Label 272*/ 4456, // Rule ID 19170 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19170, GIR_Done, // Label 272: @4456 GIM_Try, /*On fail goto*//*Label 273*/ 4510, // Rule ID 19182 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19182, GIR_Done, // Label 273: @4510 GIM_Try, /*On fail goto*//*Label 274*/ 4564, // Rule ID 19174 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLSI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19174, GIR_Done, // Label 274: @4564 GIM_Try, /*On fail goto*//*Label 275*/ 4618, // Rule ID 12985 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12985, GIR_Done, // Label 275: @4618 GIM_Try, /*On fail goto*//*Label 276*/ 4672, // Rule ID 13003 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13003, GIR_Done, // Label 276: @4672 GIM_Try, /*On fail goto*//*Label 277*/ 4726, // Rule ID 12989 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLSI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12989, GIR_Done, // Label 277: @4726 GIM_Try, /*On fail goto*//*Label 278*/ 4783, // Rule ID 17158 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 65535, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 65535:{ *:[i32] }) => (MOVZX32rr16:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src1, sub_16bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/4, // src1 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR32*/33, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOVZX32rr16, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17158, GIR_Done, // Label 278: @4783 GIM_Try, /*On fail goto*//*Label 279*/ 4840, // Rule ID 17159 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 255, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 255:{ *:[i32] }) => (MOVZX32rr8:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src1, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s8, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src1 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR8*/0, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR32*/33, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOVZX32rr8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17159, GIR_Done, // Label 279: @4840 GIM_Try, /*On fail goto*//*Label 280*/ 4885, // Rule ID 17393 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (AND32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17393, GIR_Done, // Label 280: @4885 GIM_Try, /*On fail goto*//*Label 281*/ 4927, // Rule ID 17391 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (AND32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17391, GIR_Done, // Label 281: @4927 GIM_Try, /*On fail goto*//*Label 282*/ 4988, // Rule ID 13049 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src2) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13049, GIR_Done, // Label 282: @4988 GIM_Try, /*On fail goto*//*Label 283*/ 5049, // Rule ID 19220 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src2, (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] })) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19220, GIR_Done, // Label 283: @5049 GIM_Try, /*On fail goto*//*Label 284*/ 5077, // Rule ID 17383 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (AND32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17383, GIR_Done, // Label 284: @5077 GIM_Reject, // Label 267: @5078 GIM_Reject, // Label 236: @5079 GIM_Try, /*On fail goto*//*Label 285*/ 5950, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 286*/ 5160, // Rule ID 19189 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19189, GIR_Done, // Label 286: @5160 GIM_Try, /*On fail goto*//*Label 287*/ 5235, // Rule ID 19201 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19201, GIR_Done, // Label 287: @5235 GIM_Try, /*On fail goto*//*Label 288*/ 5310, // Rule ID 13010 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13010, GIR_Done, // Label 288: @5310 GIM_Try, /*On fail goto*//*Label 289*/ 5385, // Rule ID 13022 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13022, GIR_Done, // Label 289: @5385 GIM_Try, /*On fail goto*//*Label 290*/ 5439, // Rule ID 19171 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19171, GIR_Done, // Label 290: @5439 GIM_Try, /*On fail goto*//*Label 291*/ 5493, // Rule ID 19183 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19183, GIR_Done, // Label 291: @5493 GIM_Try, /*On fail goto*//*Label 292*/ 5547, // Rule ID 19175 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLSI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19175, GIR_Done, // Label 292: @5547 GIM_Try, /*On fail goto*//*Label 293*/ 5601, // Rule ID 12986 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12986, GIR_Done, // Label 293: @5601 GIM_Try, /*On fail goto*//*Label 294*/ 5655, // Rule ID 13004 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13004, GIR_Done, // Label 294: @5655 GIM_Try, /*On fail goto*//*Label 295*/ 5709, // Rule ID 12990 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLSI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12990, GIR_Done, // Label 295: @5709 GIM_Try, /*On fail goto*//*Label 296*/ 5754, // Rule ID 17394 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (AND64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17394, GIR_Done, // Label 296: @5754 GIM_Try, /*On fail goto*//*Label 297*/ 5799, // Rule ID 17395 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (AND64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17395, GIR_Done, // Label 297: @5799 GIM_Try, /*On fail goto*//*Label 298*/ 5860, // Rule ID 13050 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src2) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13050, GIR_Done, // Label 298: @5860 GIM_Try, /*On fail goto*//*Label 299*/ 5921, // Rule ID 19221 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src2, (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] })) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19221, GIR_Done, // Label 299: @5921 GIM_Try, /*On fail goto*//*Label 300*/ 5949, // Rule ID 17384 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (AND64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17384, GIR_Done, // Label 300: @5949 GIM_Reject, // Label 285: @5950 GIM_Reject, // Label 237: @5951 GIM_Try, /*On fail goto*//*Label 301*/ 6043, // Rule ID 14587 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, // (and:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14587, GIR_Done, // Label 301: @6043 GIM_Reject, // Label 238: @6044 GIM_Try, /*On fail goto*//*Label 302*/ 6124, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 303*/ 6077, // Rule ID 1625 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1625, GIR_Done, // Label 303: @6077 GIM_Try, /*On fail goto*//*Label 304*/ 6100, // Rule ID 1627 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1627, GIR_Done, // Label 304: @6100 GIM_Try, /*On fail goto*//*Label 305*/ 6123, // Rule ID 4966 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (and:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPANDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4966, GIR_Done, // Label 305: @6123 GIM_Reject, // Label 302: @6124 GIM_Reject, // Label 239: @6125 GIM_Try, /*On fail goto*//*Label 306*/ 6217, // Rule ID 14588 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, // (and:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14588, GIR_Done, // Label 306: @6217 GIM_Reject, // Label 240: @6218 GIM_Try, /*On fail goto*//*Label 307*/ 6298, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 308*/ 6251, // Rule ID 4993 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (and:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPANDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4993, GIR_Done, // Label 308: @6251 GIM_Try, /*On fail goto*//*Label 309*/ 6274, // Rule ID 13465 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPANDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13465, GIR_Done, // Label 309: @6274 GIM_Try, /*On fail goto*//*Label 310*/ 6297, // Rule ID 13489 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PANDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13489, GIR_Done, // Label 310: @6297 GIM_Reject, // Label 307: @6298 GIM_Reject, // Label 241: @6299 GIM_Try, /*On fail goto*//*Label 311*/ 6379, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 312*/ 6332, // Rule ID 1629 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPANDYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1629, GIR_Done, // Label 312: @6332 GIM_Try, /*On fail goto*//*Label 313*/ 6355, // Rule ID 4957 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (and:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPANDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4957, GIR_Done, // Label 313: @6355 GIM_Try, /*On fail goto*//*Label 314*/ 6378, // Rule ID 13434 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VANDPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13434, GIR_Done, // Label 314: @6378 GIM_Reject, // Label 311: @6379 GIM_Reject, // Label 242: @6380 GIM_Try, /*On fail goto*//*Label 315*/ 6488, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_Try, /*On fail goto*//*Label 316*/ 6413, // Rule ID 3683 // GIM_CheckFeatures, GIFBS_HasDQI, // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KANDBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3683, GIR_Done, // Label 316: @6413 GIM_Try, /*On fail goto*//*Label 317*/ 6487, // Rule ID 14585 // GIM_CheckFeatures, GIFBS_NoDQI, // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12, // GIR_Coverage, 14585, GIR_Done, // Label 317: @6487 GIM_Reject, // Label 315: @6488 GIM_Reject, // Label 243: @6489 GIM_Try, /*On fail goto*//*Label 318*/ 6569, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 319*/ 6522, // Rule ID 13464 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPANDrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13464, GIR_Done, // Label 319: @6522 GIM_Try, /*On fail goto*//*Label 320*/ 6545, // Rule ID 13488 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PANDrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13488, GIR_Done, // Label 320: @6545 GIM_Try, /*On fail goto*//*Label 321*/ 6568, // Rule ID 15056 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (and:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPANDQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15056, GIR_Done, // Label 321: @6568 GIM_Reject, // Label 318: @6569 GIM_Reject, // Label 244: @6570 GIM_Try, /*On fail goto*//*Label 322*/ 6650, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 323*/ 6603, // Rule ID 4984 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (and:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPANDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4984, GIR_Done, // Label 323: @6603 GIM_Try, /*On fail goto*//*Label 324*/ 6626, // Rule ID 13409 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPANDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13409, GIR_Done, // Label 324: @6626 GIM_Try, /*On fail goto*//*Label 325*/ 6649, // Rule ID 13433 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VANDPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13433, GIR_Done, // Label 325: @6649 GIM_Reject, // Label 322: @6650 GIM_Reject, // Label 245: @6651 GIM_Try, /*On fail goto*//*Label 326*/ 6682, // Rule ID 4948 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (and:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPANDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4948, GIR_Done, // Label 326: @6682 GIM_Reject, // Label 246: @6683 GIM_Try, /*On fail goto*//*Label 327*/ 6714, // Rule ID 3684 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, // (and:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KANDWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3684, GIR_Done, // Label 327: @6714 GIM_Reject, // Label 247: @6715 GIM_Try, /*On fail goto*//*Label 328*/ 6795, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 329*/ 6748, // Rule ID 13463 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPANDrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13463, GIR_Done, // Label 329: @6748 GIM_Try, /*On fail goto*//*Label 330*/ 6771, // Rule ID 13487 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (and:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PANDrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13487, GIR_Done, // Label 330: @6771 GIM_Try, /*On fail goto*//*Label 331*/ 6794, // Rule ID 15055 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (and:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPANDQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15055, GIR_Done, // Label 331: @6794 GIM_Reject, // Label 328: @6795 GIM_Reject, // Label 248: @6796 GIM_Try, /*On fail goto*//*Label 332*/ 6876, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 333*/ 6829, // Rule ID 13408 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPANDYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13408, GIR_Done, // Label 333: @6829 GIM_Try, /*On fail goto*//*Label 334*/ 6852, // Rule ID 13432 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VANDPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13432, GIR_Done, // Label 334: @6852 GIM_Try, /*On fail goto*//*Label 335*/ 6875, // Rule ID 15072 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (and:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPANDQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15072, GIR_Done, // Label 335: @6875 GIM_Reject, // Label 332: @6876 GIM_Reject, // Label 249: @6877 GIM_Try, /*On fail goto*//*Label 336*/ 6908, // Rule ID 4975 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (and:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPANDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4975, GIR_Done, // Label 336: @6908 GIM_Reject, // Label 250: @6909 GIM_Try, /*On fail goto*//*Label 337*/ 6940, // Rule ID 3685 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, // (and:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KANDDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3685, GIR_Done, // Label 337: @6940 GIM_Reject, // Label 251: @6941 GIM_Try, /*On fail goto*//*Label 338*/ 7021, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 339*/ 6974, // Rule ID 13407 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPANDYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13407, GIR_Done, // Label 339: @6974 GIM_Try, /*On fail goto*//*Label 340*/ 6997, // Rule ID 13431 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (and:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VANDPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13431, GIR_Done, // Label 340: @6997 GIM_Try, /*On fail goto*//*Label 341*/ 7020, // Rule ID 15071 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (and:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPANDQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15071, GIR_Done, // Label 341: @7020 GIM_Reject, // Label 338: @7021 GIM_Reject, // Label 252: @7022 GIM_Try, /*On fail goto*//*Label 342*/ 7053, // Rule ID 15088 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (and:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPANDQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15088, GIR_Done, // Label 342: @7053 GIM_Reject, // Label 253: @7054 GIM_Try, /*On fail goto*//*Label 343*/ 7085, // Rule ID 3686 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, // (and:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KANDQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3686, GIR_Done, // Label 343: @7085 GIM_Reject, // Label 254: @7086 GIM_Try, /*On fail goto*//*Label 344*/ 7117, // Rule ID 15087 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (and:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPANDQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15087, GIR_Done, // Label 344: @7117 GIM_Reject, // Label 255: @7118 GIM_Reject, // Label 4: @7119 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 25, /*)*//*default:*//*Label 368*/ 10988, /*GILLT_s1*//*Label 345*/ 7150, /*GILLT_s8*//*Label 346*/ 7243, /*GILLT_s16*//*Label 347*/ 7309, /*GILLT_s32*//*Label 348*/ 7608, /*GILLT_s64*//*Label 349*/ 8713, 0, 0, /*GILLT_v2s1*//*Label 350*/ 9821, /*GILLT_v2s64*//*Label 351*/ 9914, /*GILLT_v4s1*//*Label 352*/ 9995, /*GILLT_v4s32*//*Label 353*/ 10088, /*GILLT_v4s64*//*Label 354*/ 10169, /*GILLT_v8s1*//*Label 355*/ 10250, /*GILLT_v8s16*//*Label 356*/ 10359, /*GILLT_v8s32*//*Label 357*/ 10440, /*GILLT_v8s64*//*Label 358*/ 10521, /*GILLT_v16s1*//*Label 359*/ 10553, /*GILLT_v16s8*//*Label 360*/ 10585, /*GILLT_v16s16*//*Label 361*/ 10666, /*GILLT_v16s32*//*Label 362*/ 10747, /*GILLT_v32s1*//*Label 363*/ 10779, /*GILLT_v32s8*//*Label 364*/ 10811, /*GILLT_v32s16*//*Label 365*/ 10892, /*GILLT_v64s1*//*Label 366*/ 10924, /*GILLT_v64s8*//*Label 367*/ 10956, // Label 345: @7150 GIM_Try, /*On fail goto*//*Label 369*/ 7242, // Rule ID 14594 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, // (or:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14594, GIR_Done, // Label 369: @7242 GIM_Reject, // Label 346: @7243 GIM_Try, /*On fail goto*//*Label 370*/ 7308, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 371*/ 7291, // Rule ID 17359 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (OR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17359, GIR_Done, // Label 371: @7291 GIM_Try, /*On fail goto*//*Label 372*/ 7307, // Rule ID 17351 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (OR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17351, GIR_Done, // Label 372: @7307 GIM_Reject, // Label 370: @7308 GIM_Reject, // Label 347: @7309 GIM_Try, /*On fail goto*//*Label 373*/ 7607, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 374*/ 7419, // Rule ID 20033 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i16] } (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTS16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20033, GIR_Done, // Label 374: @7419 GIM_Try, /*On fail goto*//*Label 375*/ 7515, // Rule ID 17262 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTS16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17262, GIR_Done, // Label 375: @7515 GIM_Try, /*On fail goto*//*Label 376*/ 7552, // Rule ID 17362 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (OR16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17362, GIR_Done, // Label 376: @7552 GIM_Try, /*On fail goto*//*Label 377*/ 7586, // Rule ID 17360 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (OR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17360, GIR_Done, // Label 377: @7586 GIM_Try, /*On fail goto*//*Label 378*/ 7606, // Rule ID 17352 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (OR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17352, GIR_Done, // Label 378: @7606 GIM_Reject, // Label 373: @7607 GIM_Reject, // Label 348: @7608 GIM_Try, /*On fail goto*//*Label 379*/ 8712, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 380*/ 7689, // Rule ID 19196 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19196, GIR_Done, // Label 380: @7689 GIM_Try, /*On fail goto*//*Label 381*/ 7764, // Rule ID 19198 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19198, GIR_Done, // Label 381: @7764 GIM_Try, /*On fail goto*//*Label 382*/ 7839, // Rule ID 19184 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19184, GIR_Done, // Label 382: @7839 GIM_Try, /*On fail goto*//*Label 383*/ 7914, // Rule ID 13017 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13017, GIR_Done, // Label 383: @7914 GIM_Try, /*On fail goto*//*Label 384*/ 7989, // Rule ID 13019 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13019, GIR_Done, // Label 384: @7989 GIM_Try, /*On fail goto*//*Label 385*/ 8064, // Rule ID 13005 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] })) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13005, GIR_Done, // Label 385: @8064 GIM_Try, /*On fail goto*//*Label 386*/ 8118, // Rule ID 19192 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19192, GIR_Done, // Label 386: @8118 GIM_Try, /*On fail goto*//*Label 387*/ 8172, // Rule ID 19194 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19194, GIR_Done, // Label 387: @8172 GIM_Try, /*On fail goto*//*Label 388*/ 8276, // Rule ID 20039 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20039, GIR_Done, // Label 388: @8276 GIM_Try, /*On fail goto*//*Label 389*/ 8330, // Rule ID 19186 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19186, GIR_Done, // Label 389: @8330 GIM_Try, /*On fail goto*//*Label 390*/ 8384, // Rule ID 13013 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13013, GIR_Done, // Label 390: @8384 GIM_Try, /*On fail goto*//*Label 391*/ 8438, // Rule ID 13015 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13015, GIR_Done, // Label 391: @8438 GIM_Try, /*On fail goto*//*Label 392*/ 8542, // Rule ID 17268 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17268, GIR_Done, // Label 392: @8542 GIM_Try, /*On fail goto*//*Label 393*/ 8596, // Rule ID 13007 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13007, GIR_Done, // Label 393: @8596 GIM_Try, /*On fail goto*//*Label 394*/ 8641, // Rule ID 17363 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (OR32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17363, GIR_Done, // Label 394: @8641 GIM_Try, /*On fail goto*//*Label 395*/ 8683, // Rule ID 17361 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (OR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17361, GIR_Done, // Label 395: @8683 GIM_Try, /*On fail goto*//*Label 396*/ 8711, // Rule ID 17353 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (OR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17353, GIR_Done, // Label 396: @8711 GIM_Reject, // Label 379: @8712 GIM_Reject, // Label 349: @8713 GIM_Try, /*On fail goto*//*Label 397*/ 9820, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 398*/ 8794, // Rule ID 19197 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19197, GIR_Done, // Label 398: @8794 GIM_Try, /*On fail goto*//*Label 399*/ 8869, // Rule ID 19199 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19199, GIR_Done, // Label 399: @8869 GIM_Try, /*On fail goto*//*Label 400*/ 8944, // Rule ID 19185 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19185, GIR_Done, // Label 400: @8944 GIM_Try, /*On fail goto*//*Label 401*/ 9019, // Rule ID 13018 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13018, GIR_Done, // Label 401: @9019 GIM_Try, /*On fail goto*//*Label 402*/ 9094, // Rule ID 13020 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13020, GIR_Done, // Label 402: @9094 GIM_Try, /*On fail goto*//*Label 403*/ 9169, // Rule ID 13006 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2] GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64, // MIs[2] src GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, GIM_CheckIsSafeToFold, /*InsnID*/2, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] })) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13006, GIR_Done, // Label 403: @9169 GIM_Try, /*On fail goto*//*Label 404*/ 9223, // Rule ID 19193 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19193, GIR_Done, // Label 404: @9223 GIM_Try, /*On fail goto*//*Label 405*/ 9277, // Rule ID 19195 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19195, GIR_Done, // Label 405: @9277 GIM_Try, /*On fail goto*//*Label 406*/ 9381, // Rule ID 20045 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20045, GIR_Done, // Label 406: @9381 GIM_Try, /*On fail goto*//*Label 407*/ 9435, // Rule ID 19187 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19187, GIR_Done, // Label 407: @9435 GIM_Try, /*On fail goto*//*Label 408*/ 9489, // Rule ID 13014 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13014, GIR_Done, // Label 408: @9489 GIM_Try, /*On fail goto*//*Label 409*/ 9543, // Rule ID 13016 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13016, GIR_Done, // Label 409: @9543 GIM_Try, /*On fail goto*//*Label 410*/ 9647, // Rule ID 17274 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTS64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17274, GIR_Done, // Label 410: @9647 GIM_Try, /*On fail goto*//*Label 411*/ 9701, // Rule ID 13008 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13008, GIR_Done, // Label 411: @9701 GIM_Try, /*On fail goto*//*Label 412*/ 9746, // Rule ID 17364 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (OR64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17364, GIR_Done, // Label 412: @9746 GIM_Try, /*On fail goto*//*Label 413*/ 9791, // Rule ID 17365 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (OR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17365, GIR_Done, // Label 413: @9791 GIM_Try, /*On fail goto*//*Label 414*/ 9819, // Rule ID 17354 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (OR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17354, GIR_Done, // Label 414: @9819 GIM_Reject, // Label 397: @9820 GIM_Reject, // Label 350: @9821 GIM_Try, /*On fail goto*//*Label 415*/ 9913, // Rule ID 14595 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, // (or:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14595, GIR_Done, // Label 415: @9913 GIM_Reject, // Label 351: @9914 GIM_Try, /*On fail goto*//*Label 416*/ 9994, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 417*/ 9947, // Rule ID 1631 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1631, GIR_Done, // Label 417: @9947 GIM_Try, /*On fail goto*//*Label 418*/ 9970, // Rule ID 1633 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1633, GIR_Done, // Label 418: @9970 GIM_Try, /*On fail goto*//*Label 419*/ 9993, // Rule ID 5020 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (or:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5020, GIR_Done, // Label 419: @9993 GIM_Reject, // Label 416: @9994 GIM_Reject, // Label 352: @9995 GIM_Try, /*On fail goto*//*Label 420*/ 10087, // Rule ID 14596 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, // (or:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14596, GIR_Done, // Label 420: @10087 GIM_Reject, // Label 353: @10088 GIM_Try, /*On fail goto*//*Label 421*/ 10168, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 422*/ 10121, // Rule ID 5047 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (or:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPORDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5047, GIR_Done, // Label 422: @10121 GIM_Try, /*On fail goto*//*Label 423*/ 10144, // Rule ID 13468 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13468, GIR_Done, // Label 423: @10144 GIM_Try, /*On fail goto*//*Label 424*/ 10167, // Rule ID 13492 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13492, GIR_Done, // Label 424: @10167 GIM_Reject, // Label 421: @10168 GIM_Reject, // Label 354: @10169 GIM_Try, /*On fail goto*//*Label 425*/ 10249, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 426*/ 10202, // Rule ID 1635 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1635, GIR_Done, // Label 426: @10202 GIM_Try, /*On fail goto*//*Label 427*/ 10225, // Rule ID 5011 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (or:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5011, GIR_Done, // Label 427: @10225 GIM_Try, /*On fail goto*//*Label 428*/ 10248, // Rule ID 13438 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13438, GIR_Done, // Label 428: @10248 GIM_Reject, // Label 425: @10249 GIM_Reject, // Label 355: @10250 GIM_Try, /*On fail goto*//*Label 429*/ 10358, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_Try, /*On fail goto*//*Label 430*/ 10283, // Rule ID 3687 // GIM_CheckFeatures, GIFBS_HasDQI, // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3687, GIR_Done, // Label 430: @10283 GIM_Try, /*On fail goto*//*Label 431*/ 10357, // Rule ID 14593 // GIM_CheckFeatures, GIFBS_NoDQI, // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12, // GIR_Coverage, 14593, GIR_Done, // Label 431: @10357 GIM_Reject, // Label 429: @10358 GIM_Reject, // Label 356: @10359 GIM_Try, /*On fail goto*//*Label 432*/ 10439, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 433*/ 10392, // Rule ID 13467 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13467, GIR_Done, // Label 433: @10392 GIM_Try, /*On fail goto*//*Label 434*/ 10415, // Rule ID 13491 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13491, GIR_Done, // Label 434: @10415 GIM_Try, /*On fail goto*//*Label 435*/ 10438, // Rule ID 15058 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (or:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPORQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15058, GIR_Done, // Label 435: @10438 GIM_Reject, // Label 432: @10439 GIM_Reject, // Label 357: @10440 GIM_Try, /*On fail goto*//*Label 436*/ 10520, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 437*/ 10473, // Rule ID 5038 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (or:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPORDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5038, GIR_Done, // Label 437: @10473 GIM_Try, /*On fail goto*//*Label 438*/ 10496, // Rule ID 13412 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPORYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13412, GIR_Done, // Label 438: @10496 GIM_Try, /*On fail goto*//*Label 439*/ 10519, // Rule ID 13437 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VORPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13437, GIR_Done, // Label 439: @10519 GIM_Reject, // Label 436: @10520 GIM_Reject, // Label 358: @10521 GIM_Try, /*On fail goto*//*Label 440*/ 10552, // Rule ID 5002 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (or:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5002, GIR_Done, // Label 440: @10552 GIM_Reject, // Label 359: @10553 GIM_Try, /*On fail goto*//*Label 441*/ 10584, // Rule ID 3688 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, // (or:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3688, GIR_Done, // Label 441: @10584 GIM_Reject, // Label 360: @10585 GIM_Try, /*On fail goto*//*Label 442*/ 10665, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 443*/ 10618, // Rule ID 13466 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13466, GIR_Done, // Label 443: @10618 GIM_Try, /*On fail goto*//*Label 444*/ 10641, // Rule ID 13490 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (or:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13490, GIR_Done, // Label 444: @10641 GIM_Try, /*On fail goto*//*Label 445*/ 10664, // Rule ID 15057 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (or:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPORQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15057, GIR_Done, // Label 445: @10664 GIM_Reject, // Label 442: @10665 GIM_Reject, // Label 361: @10666 GIM_Try, /*On fail goto*//*Label 446*/ 10746, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 447*/ 10699, // Rule ID 13411 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPORYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13411, GIR_Done, // Label 447: @10699 GIM_Try, /*On fail goto*//*Label 448*/ 10722, // Rule ID 13436 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VORPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13436, GIR_Done, // Label 448: @10722 GIM_Try, /*On fail goto*//*Label 449*/ 10745, // Rule ID 15074 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (or:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPORQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15074, GIR_Done, // Label 449: @10745 GIM_Reject, // Label 446: @10746 GIM_Reject, // Label 362: @10747 GIM_Try, /*On fail goto*//*Label 450*/ 10778, // Rule ID 5029 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (or:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPORDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5029, GIR_Done, // Label 450: @10778 GIM_Reject, // Label 363: @10779 GIM_Try, /*On fail goto*//*Label 451*/ 10810, // Rule ID 3689 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, // (or:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3689, GIR_Done, // Label 451: @10810 GIM_Reject, // Label 364: @10811 GIM_Try, /*On fail goto*//*Label 452*/ 10891, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 453*/ 10844, // Rule ID 13410 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPORYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13410, GIR_Done, // Label 453: @10844 GIM_Try, /*On fail goto*//*Label 454*/ 10867, // Rule ID 13435 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (or:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VORPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13435, GIR_Done, // Label 454: @10867 GIM_Try, /*On fail goto*//*Label 455*/ 10890, // Rule ID 15073 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (or:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPORQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15073, GIR_Done, // Label 455: @10890 GIM_Reject, // Label 452: @10891 GIM_Reject, // Label 365: @10892 GIM_Try, /*On fail goto*//*Label 456*/ 10923, // Rule ID 15090 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (or:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPORQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15090, GIR_Done, // Label 456: @10923 GIM_Reject, // Label 366: @10924 GIM_Try, /*On fail goto*//*Label 457*/ 10955, // Rule ID 3690 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, // (or:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3690, GIR_Done, // Label 457: @10955 GIM_Reject, // Label 367: @10956 GIM_Try, /*On fail goto*//*Label 458*/ 10987, // Rule ID 15089 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (or:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPORQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15089, GIR_Done, // Label 458: @10987 GIM_Reject, // Label 368: @10988 GIM_Reject, // Label 5: @10989 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 25, /*)*//*default:*//*Label 482*/ 14164, /*GILLT_s1*//*Label 459*/ 11020, /*GILLT_s8*//*Label 460*/ 11419, /*GILLT_s16*//*Label 461*/ 11507, /*GILLT_s32*//*Label 462*/ 11832, /*GILLT_s64*//*Label 463*/ 12413, 0, 0, /*GILLT_v2s1*//*Label 464*/ 12997, /*GILLT_v2s64*//*Label 465*/ 13090, /*GILLT_v4s1*//*Label 466*/ 13171, /*GILLT_v4s32*//*Label 467*/ 13264, /*GILLT_v4s64*//*Label 468*/ 13345, /*GILLT_v8s1*//*Label 469*/ 13426, /*GILLT_v8s16*//*Label 470*/ 13535, /*GILLT_v8s32*//*Label 471*/ 13616, /*GILLT_v8s64*//*Label 472*/ 13697, /*GILLT_v16s1*//*Label 473*/ 13729, /*GILLT_v16s8*//*Label 474*/ 13761, /*GILLT_v16s16*//*Label 475*/ 13842, /*GILLT_v16s32*//*Label 476*/ 13923, /*GILLT_v32s1*//*Label 477*/ 13955, /*GILLT_v32s8*//*Label 478*/ 13987, /*GILLT_v32s16*//*Label 479*/ 14068, /*GILLT_v64s1*//*Label 480*/ 14100, /*GILLT_v64s8*//*Label 481*/ 14132, // Label 459: @11020 GIM_Try, /*On fail goto*//*Label 483*/ 11418, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_Try, /*On fail goto*//*Label 484*/ 11135, // Rule ID 19455 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 19455, GIR_Done, // Label 484: @11135 GIM_Try, /*On fail goto*//*Label 485*/ 11236, // Rule ID 14598 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK1RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2), -1:{ *:[v1i1] }) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14598, GIR_Done, // Label 485: @11236 GIM_Try, /*On fail goto*//*Label 486*/ 11337, // Rule ID 19456 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 19456, GIR_Done, // Label 486: @11337 GIM_Try, /*On fail goto*//*Label 487*/ 11417, // Rule ID 14602 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID, // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14602, GIR_Done, // Label 487: @11417 GIM_Reject, // Label 483: @11418 GIM_Reject, // Label 460: @11419 GIM_Try, /*On fail goto*//*Label 488*/ 11506, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 489*/ 11459, // Rule ID 156 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -1:{ *:[i8] }) => (NOT8r:{ *:[i8] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT8r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 156, GIR_Done, // Label 489: @11459 GIM_Try, /*On fail goto*//*Label 490*/ 11489, // Rule ID 17374 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (XOR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17374, GIR_Done, // Label 490: @11489 GIM_Try, /*On fail goto*//*Label 491*/ 11505, // Rule ID 17366 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (XOR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR8rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17366, GIR_Done, // Label 491: @11505 GIM_Reject, // Label 488: @11506 GIM_Reject, // Label 461: @11507 GIM_Try, /*On fail goto*//*Label 492*/ 11831, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 493*/ 11617, // Rule ID 20034 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i16] } (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2), GR16:{ *:[i16] }:$src1) => (BTC16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20034, GIR_Done, // Label 493: @11617 GIM_Try, /*On fail goto*//*Label 494*/ 11713, // Rule ID 17263 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (shl:{ *:[i16] } 1:{ *:[i16] }, GR8:{ *:[i8] }:$src2)) => (BTC16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (INSERT_SUBREG:{ *:[i16] } (IMPLICIT_DEF:{ *:[i16] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s16, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17263, GIR_Done, // Label 494: @11713 GIM_Try, /*On fail goto*//*Label 495*/ 11739, // Rule ID 157 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -1:{ *:[i16] }) => (NOT16r:{ *:[i16] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT16r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 157, GIR_Done, // Label 495: @11739 GIM_Try, /*On fail goto*//*Label 496*/ 11776, // Rule ID 17377 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) => (XOR16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR16ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17377, GIR_Done, // Label 496: @11776 GIM_Try, /*On fail goto*//*Label 497*/ 11810, // Rule ID 17375 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (XOR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17375, GIR_Done, // Label 497: @11810 GIM_Try, /*On fail goto*//*Label 498*/ 11830, // Rule ID 17367 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (XOR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17367, GIR_Done, // Label 498: @11830 GIM_Reject, // Label 492: @11831 GIM_Reject, // Label 462: @11832 GIM_Try, /*On fail goto*//*Label 499*/ 12412, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 500*/ 11892, // Rule ID 19172 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19172, GIR_Done, // Label 500: @11892 GIM_Try, /*On fail goto*//*Label 501*/ 11946, // Rule ID 19190 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19190, GIR_Done, // Label 501: @11946 GIM_Try, /*On fail goto*//*Label 502*/ 12050, // Rule ID 20040 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2), GR32:{ *:[i32] }:$src1) => (BTC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20040, GIR_Done, // Label 502: @12050 GIM_Try, /*On fail goto*//*Label 503*/ 12104, // Rule ID 12987 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12987, GIR_Done, // Label 503: @12104 GIM_Try, /*On fail goto*//*Label 504*/ 12158, // Rule ID 13011 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13011, GIR_Done, // Label 504: @12158 GIM_Try, /*On fail goto*//*Label 505*/ 12262, // Rule ID 17269 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (shl:{ *:[i32] } 1:{ *:[i32] }, GR8:{ *:[i8] }:$src2)) => (BTC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17269, GIR_Done, // Label 505: @12262 GIM_Try, /*On fail goto*//*Label 506*/ 12296, // Rule ID 158 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }) => (NOT32r:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT32r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 158, GIR_Done, // Label 506: @12296 GIM_Try, /*On fail goto*//*Label 507*/ 12341, // Rule ID 17378 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) => (XOR32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR32ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17378, GIR_Done, // Label 507: @12341 GIM_Try, /*On fail goto*//*Label 508*/ 12383, // Rule ID 17376 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (XOR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17376, GIR_Done, // Label 508: @12383 GIM_Try, /*On fail goto*//*Label 509*/ 12411, // Rule ID 17368 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (XOR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17368, GIR_Done, // Label 509: @12411 GIM_Reject, // Label 499: @12412 GIM_Reject, // Label 463: @12413 GIM_Try, /*On fail goto*//*Label 510*/ 12996, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 511*/ 12473, // Rule ID 19173 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19173, GIR_Done, // Label 511: @12473 GIM_Try, /*On fail goto*//*Label 512*/ 12527, // Rule ID 19191 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, // MIs[0] src GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19191, GIR_Done, // Label 512: @12527 GIM_Try, /*On fail goto*//*Label 513*/ 12631, // Rule ID 20046 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2), GR64:{ *:[i64] }:$src1) => (BTC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20046, GIR_Done, // Label 513: @12631 GIM_Try, /*On fail goto*//*Label 514*/ 12685, // Rule ID 12988 // GIM_CheckFeatures, GIFBS_HasBMI, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12988, GIR_Done, // Label 514: @12685 GIM_Try, /*On fail goto*//*Label 515*/ 12739, // Rule ID 13012 // GIM_CheckFeatures, GIFBS_HasTBM, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, // MIs[1] src GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1, GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13012, GIR_Done, // Label 515: @12739 GIM_Try, /*On fail goto*//*Label 516*/ 12843, // Rule ID 17275 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (shl:{ *:[i64] } 1:{ *:[i64] }, GR8:{ *:[i8] }:$src2)) => (BTC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BTC64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17275, GIR_Done, // Label 516: @12843 GIM_Try, /*On fail goto*//*Label 517*/ 12877, // Rule ID 159 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }) => (NOT64r:{ *:[i64] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT64r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 159, GIR_Done, // Label 517: @12877 GIM_Try, /*On fail goto*//*Label 518*/ 12922, // Rule ID 17379 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (XOR64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR64ri8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17379, GIR_Done, // Label 518: @12922 GIM_Try, /*On fail goto*//*Label 519*/ 12967, // Rule ID 17380 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) => (XOR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<>:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17380, GIR_Done, // Label 519: @12967 GIM_Try, /*On fail goto*//*Label 520*/ 12995, // Rule ID 17369 // GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (XOR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17369, GIR_Done, // Label 520: @12995 GIM_Reject, // Label 510: @12996 GIM_Reject, // Label 464: @12997 GIM_Try, /*On fail goto*//*Label 521*/ 13089, // Rule ID 14603 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID, // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14603, GIR_Done, // Label 521: @13089 GIM_Reject, // Label 465: @13090 GIM_Try, /*On fail goto*//*Label 522*/ 13170, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 523*/ 13123, // Rule ID 1637 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1637, GIR_Done, // Label 523: @13123 GIM_Try, /*On fail goto*//*Label 524*/ 13146, // Rule ID 1639 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1639, GIR_Done, // Label 524: @13146 GIM_Try, /*On fail goto*//*Label 525*/ 13169, // Rule ID 5074 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPXORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5074, GIR_Done, // Label 525: @13169 GIM_Reject, // Label 522: @13170 GIM_Reject, // Label 466: @13171 GIM_Try, /*On fail goto*//*Label 526*/ 13263, // Rule ID 14604 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID, // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8, // GIR_Coverage, 14604, GIR_Done, // Label 526: @13263 GIM_Reject, // Label 467: @13264 GIM_Try, /*On fail goto*//*Label 527*/ 13344, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 528*/ 13297, // Rule ID 5101 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (xor:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPXORDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5101, GIR_Done, // Label 528: @13297 GIM_Try, /*On fail goto*//*Label 529*/ 13320, // Rule ID 13471 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPXORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13471, GIR_Done, // Label 529: @13320 GIM_Try, /*On fail goto*//*Label 530*/ 13343, // Rule ID 13495 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PXORrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13495, GIR_Done, // Label 530: @13343 GIM_Reject, // Label 527: @13344 GIM_Reject, // Label 468: @13345 GIM_Try, /*On fail goto*//*Label 531*/ 13425, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 532*/ 13378, // Rule ID 1641 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPXORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1641, GIR_Done, // Label 532: @13378 GIM_Try, /*On fail goto*//*Label 533*/ 13401, // Rule ID 5065 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPXORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5065, GIR_Done, // Label 533: @13401 GIM_Try, /*On fail goto*//*Label 534*/ 13424, // Rule ID 13442 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VXORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13442, GIR_Done, // Label 534: @13424 GIM_Reject, // Label 531: @13425 GIM_Reject, // Label 469: @13426 GIM_Try, /*On fail goto*//*Label 535*/ 13534, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, GIM_Try, /*On fail goto*//*Label 536*/ 13459, // Rule ID 3695 // GIM_CheckFeatures, GIFBS_HasDQI, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KXORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3695, GIR_Done, // Label 536: @13459 GIM_Try, /*On fail goto*//*Label 537*/ 13533, // Rule ID 14601 // GIM_CheckFeatures, GIFBS_NoDQI, // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1, GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1, GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_ConstrainSelectedInstOperands, /*InsnID*/3, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12, // GIR_Coverage, 14601, GIR_Done, // Label 537: @13533 GIM_Reject, // Label 535: @13534 GIM_Reject, // Label 470: @13535 GIM_Try, /*On fail goto*//*Label 538*/ 13615, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 539*/ 13568, // Rule ID 13470 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPXORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13470, GIR_Done, // Label 539: @13568 GIM_Try, /*On fail goto*//*Label 540*/ 13591, // Rule ID 13494 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PXORrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13494, GIR_Done, // Label 540: @13591 GIM_Try, /*On fail goto*//*Label 541*/ 13614, // Rule ID 15060 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (xor:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPXORQZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15060, GIR_Done, // Label 541: @13614 GIM_Reject, // Label 538: @13615 GIM_Reject, // Label 471: @13616 GIM_Try, /*On fail goto*//*Label 542*/ 13696, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 543*/ 13649, // Rule ID 5092 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (xor:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPXORDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5092, GIR_Done, // Label 543: @13649 GIM_Try, /*On fail goto*//*Label 544*/ 13672, // Rule ID 13415 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPXORYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13415, GIR_Done, // Label 544: @13672 GIM_Try, /*On fail goto*//*Label 545*/ 13695, // Rule ID 13441 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VXORPSYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13441, GIR_Done, // Label 545: @13695 GIM_Reject, // Label 542: @13696 GIM_Reject, // Label 472: @13697 GIM_Try, /*On fail goto*//*Label 546*/ 13728, // Rule ID 5056 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (xor:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPXORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5056, GIR_Done, // Label 546: @13728 GIM_Reject, // Label 473: @13729 GIM_Try, /*On fail goto*//*Label 547*/ 13760, // Rule ID 3696 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KXORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3696, GIR_Done, // Label 547: @13760 GIM_Reject, // Label 474: @13761 GIM_Try, /*On fail goto*//*Label 548*/ 13841, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 549*/ 13794, // Rule ID 13469 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPXORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13469, GIR_Done, // Label 549: @13794 GIM_Try, /*On fail goto*//*Label 550*/ 13817, // Rule ID 13493 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (xor:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PXORrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13493, GIR_Done, // Label 550: @13817 GIM_Try, /*On fail goto*//*Label 551*/ 13840, // Rule ID 15059 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (xor:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPXORQZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15059, GIR_Done, // Label 551: @13840 GIM_Reject, // Label 548: @13841 GIM_Reject, // Label 475: @13842 GIM_Try, /*On fail goto*//*Label 552*/ 13922, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 553*/ 13875, // Rule ID 13414 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPXORYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13414, GIR_Done, // Label 553: @13875 GIM_Try, /*On fail goto*//*Label 554*/ 13898, // Rule ID 13440 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VXORPSYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13440, GIR_Done, // Label 554: @13898 GIM_Try, /*On fail goto*//*Label 555*/ 13921, // Rule ID 15076 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (xor:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPXORQZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15076, GIR_Done, // Label 555: @13921 GIM_Reject, // Label 552: @13922 GIM_Reject, // Label 476: @13923 GIM_Try, /*On fail goto*//*Label 556*/ 13954, // Rule ID 5083 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (xor:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPXORDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5083, GIR_Done, // Label 556: @13954 GIM_Reject, // Label 477: @13955 GIM_Try, /*On fail goto*//*Label 557*/ 13986, // Rule ID 3697 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KXORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3697, GIR_Done, // Label 557: @13986 GIM_Reject, // Label 478: @13987 GIM_Try, /*On fail goto*//*Label 558*/ 14067, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 559*/ 14020, // Rule ID 13413 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPXORYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13413, GIR_Done, // Label 559: @14020 GIM_Try, /*On fail goto*//*Label 560*/ 14043, // Rule ID 13439 // GIM_CheckFeatures, GIFBS_HasAVX1Only, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (xor:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VXORPSYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13439, GIR_Done, // Label 560: @14043 GIM_Try, /*On fail goto*//*Label 561*/ 14066, // Rule ID 15075 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (xor:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPXORQZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15075, GIR_Done, // Label 561: @14066 GIM_Reject, // Label 558: @14067 GIM_Reject, // Label 479: @14068 GIM_Try, /*On fail goto*//*Label 562*/ 14099, // Rule ID 15092 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (xor:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPXORQZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15092, GIR_Done, // Label 562: @14099 GIM_Reject, // Label 480: @14100 GIM_Try, /*On fail goto*//*Label 563*/ 14131, // Rule ID 3698 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID, // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KXORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORQrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3698, GIR_Done, // Label 563: @14131 GIM_Reject, // Label 481: @14132 GIM_Try, /*On fail goto*//*Label 564*/ 14163, // Rule ID 15091 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (xor:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPXORQZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 15091, GIR_Done, // Label 564: @14163 GIM_Reject, // Label 482: @14164 GIM_Reject, // Label 6: @14165 GIM_Try, /*On fail goto*//*Label 565*/ 14320, GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/16, 24, /*)*//*default:*//*Label 569*/ 14319, /*GILLT_v16s1*//*Label 566*/ 14184, 0, 0, 0, /*GILLT_v32s1*//*Label 567*/ 14229, 0, 0, /*GILLT_v64s1*//*Label 568*/ 14274, // Label 566: @14184 GIM_Try, /*On fail goto*//*Label 570*/ 14228, // Rule ID 14605 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID, // (concat_vectors:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KUNPCKBWrr:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK8:{ *:[v8i1] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KUNPCKBWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14605, GIR_Done, // Label 570: @14228 GIM_Reject, // Label 567: @14229 GIM_Try, /*On fail goto*//*Label 571*/ 14273, // Rule ID 14606 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID, // (concat_vectors:{ *:[v32i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KUNPCKWDrr:{ *:[v32i1] } VK16:{ *:[v16i1] }:$src2, VK16:{ *:[v16i1] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KUNPCKWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14606, GIR_Done, // Label 571: @14273 GIM_Reject, // Label 568: @14274 GIM_Try, /*On fail goto*//*Label 572*/ 14318, // Rule ID 14607 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID, // (concat_vectors:{ *:[v64i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KUNPCKDQrr:{ *:[v64i1] } VK32:{ *:[v32i1] }:$src2, VK32:{ *:[v32i1] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KUNPCKDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14607, GIR_Done, // Label 572: @14318 GIM_Reject, // Label 569: @14319 GIM_Reject, // Label 565: @14320 GIM_Reject, // Label 7: @14321 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 24, /*)*//*default:*//*Label 579*/ 15050, /*GILLT_s32*//*Label 573*/ 14348, /*GILLT_s64*//*Label 574*/ 14556, 0, 0, 0, 0, 0, 0, 0, /*GILLT_v8s1*//*Label 575*/ 14764, 0, 0, 0, /*GILLT_v16s1*//*Label 576*/ 14842, 0, 0, 0, /*GILLT_v32s1*//*Label 577*/ 14920, 0, 0, /*GILLT_v64s1*//*Label 578*/ 14985, // Label 573: @14348 GIM_Try, /*On fail goto*//*Label 580*/ 14371, // Rule ID 2374 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVDI2SSrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2374, GIR_Done, // Label 580: @14371 GIM_Try, /*On fail goto*//*Label 581*/ 14394, // Rule ID 2375 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (MOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVDI2SSrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2375, GIR_Done, // Label 581: @14394 GIM_Try, /*On fail goto*//*Label 582*/ 14417, // Rule ID 2384 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VMOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSS2DIrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2384, GIR_Done, // Label 582: @14417 GIM_Try, /*On fail goto*//*Label 583*/ 14440, // Rule ID 2385 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (MOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSS2DIrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2385, GIR_Done, // Label 583: @14440 GIM_Try, /*On fail goto*//*Label 584*/ 14463, // Rule ID 3866 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVDI2SSZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3866, GIR_Done, // Label 584: @14463 GIM_Try, /*On fail goto*//*Label 585*/ 14486, // Rule ID 3871 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (bitconvert:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSS2DIZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3871, GIR_Done, // Label 585: @14486 GIM_Try, /*On fail goto*//*Label 586*/ 14509, // Rule ID 14544 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (bitconvert:{ *:[i32] } VK32:{ *:[v32i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i32] } VK32:{ *:[v32i1] }:$src, GR32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR32*/33, // GIR_Coverage, 14544, GIR_Done, // Label 586: @14509 GIM_Try, /*On fail goto*//*Label 587*/ 14555, // Rule ID 14944 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (bitconvert:{ *:[f32] } VK32:{ *:[v32i1] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } (KMOVDrk:{ *:[i32] } VK32:{ *:[v32i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KMOVDrk, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMOVDI2SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14944, GIR_Done, // Label 587: @14555 GIM_Reject, // Label 574: @14556 GIM_Try, /*On fail goto*//*Label 588*/ 14579, // Rule ID 2369 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOV64toSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2369, GIR_Done, // Label 588: @14579 GIM_Try, /*On fail goto*//*Label 589*/ 14602, // Rule ID 2373 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (MOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOV64toSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2373, GIR_Done, // Label 589: @14602 GIM_Try, /*On fail goto*//*Label 590*/ 14625, // Rule ID 2382 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VMOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSDto64rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2382, GIR_Done, // Label 590: @14625 GIM_Try, /*On fail goto*//*Label 591*/ 14648, // Rule ID 2383 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (MOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSDto64rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2383, GIR_Done, // Label 591: @14648 GIM_Try, /*On fail goto*//*Label 592*/ 14671, // Rule ID 3864 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDZrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOV64toSDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3864, GIR_Done, // Label 592: @14671 GIM_Try, /*On fail goto*//*Label 593*/ 14694, // Rule ID 3865 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (bitconvert:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSDto64Zrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3865, GIR_Done, // Label 593: @14694 GIM_Try, /*On fail goto*//*Label 594*/ 14717, // Rule ID 14546 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, // (bitconvert:{ *:[i64] } VK64:{ *:[v64i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i64] } VK64:{ *:[v64i1] }:$src, GR64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/65, // GIR_Coverage, 14546, GIR_Done, // Label 594: @14717 GIM_Try, /*On fail goto*//*Label 595*/ 14763, // Rule ID 14946 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, // (bitconvert:{ *:[f64] } VK64:{ *:[v64i1] }:$src) => (VMOV64toSDZrr:{ *:[f64] } (KMOVQrk:{ *:[i64] } VK64:{ *:[v64i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KMOVQrk, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMOV64toSDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14946, GIR_Done, // Label 595: @14763 GIM_Reject, // Label 575: @14764 GIM_Try, /*On fail goto*//*Label 596*/ 14841, // Rule ID 14535 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (bitconvert:{ *:[v8i1] } GR8:{ *:[i8] }:$src) => (COPY_TO_REGCLASS:{ *:[v8i1] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src, sub_8bit:{ *:[i32] }), VK8:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12, // GIR_Coverage, 14535, GIR_Done, // Label 596: @14841 GIM_Reject, // Label 576: @14842 GIM_Try, /*On fail goto*//*Label 597*/ 14919, // Rule ID 14533 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (bitconvert:{ *:[v16i1] } GR16:{ *:[i16] }:$src) => (COPY_TO_REGCLASS:{ *:[v16i1] } (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }), VK16:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/1, /*Imm*/4, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP*/28, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP*/28, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR16*/6, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK16*/9, // GIR_Coverage, 14533, GIR_Done, // Label 597: @14919 GIM_Reject, // Label 577: @14920 GIM_Try, /*On fail goto*//*Label 598*/ 14984, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID, GIM_Try, /*On fail goto*//*Label 599*/ 14945, // Rule ID 14543 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bitconvert:{ *:[v32i1] } GR32:{ *:[i32] }:$src) => (COPY_TO_REGCLASS:{ *:[v32i1] } GR32:{ *:[i32] }:$src, VK32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK32*/37, // GIR_Coverage, 14543, GIR_Done, // Label 599: @14945 GIM_Try, /*On fail goto*//*Label 600*/ 14983, // Rule ID 14943 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (bitconvert:{ *:[v32i1] } FR32X:{ *:[f32] }:$src) => (KMOVDkr:{ *:[v32i1] } (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VMOVSS2DIZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVDkr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14943, GIR_Done, // Label 600: @14983 GIM_Reject, // Label 598: @14984 GIM_Reject, // Label 578: @14985 GIM_Try, /*On fail goto*//*Label 601*/ 15049, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID, GIM_Try, /*On fail goto*//*Label 602*/ 15010, // Rule ID 14545 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bitconvert:{ *:[v64i1] } GR64:{ *:[i64] }:$src) => (COPY_TO_REGCLASS:{ *:[v64i1] } GR64:{ *:[i64] }:$src, VK64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK64*/78, // GIR_Coverage, 14545, GIR_Done, // Label 602: @15010 GIM_Try, /*On fail goto*//*Label 603*/ 15048, // Rule ID 14945 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (bitconvert:{ *:[v64i1] } FR64X:{ *:[f64] }:$src) => (KMOVQkr:{ *:[v64i1] } (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VMOVSDto64Zrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVQkr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14945, GIR_Done, // Label 603: @15048 GIM_Reject, // Label 601: @15049 GIM_Reject, // Label 579: @15050 GIM_Reject, // Label 8: @15051 GIM_Try, /*On fail goto*//*Label 604*/ 16153, GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, GIM_Try, /*On fail goto*//*Label 605*/ 15096, // Rule ID 1123 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubwd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7458:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHSUBWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1123, GIR_Done, // Label 605: @15096 GIM_Try, /*On fail goto*//*Label 606*/ 15136, // Rule ID 1125 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubdq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7457:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHSUBDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1125, GIR_Done, // Label 606: @15136 GIM_Try, /*On fail goto*//*Label 607*/ 15176, // Rule ID 1127 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7456:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHSUBBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBBWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1127, GIR_Done, // Label 607: @15176 GIM_Try, /*On fail goto*//*Label 608*/ 15216, // Rule ID 1129 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7455:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1129, GIR_Done, // Label 608: @15216 GIM_Try, /*On fail goto*//*Label 609*/ 15256, // Rule ID 1131 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7454:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1131, GIR_Done, // Label 609: @15256 GIM_Try, /*On fail goto*//*Label 610*/ 15296, // Rule ID 1133 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7453:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1133, GIR_Done, // Label 610: @15296 GIM_Try, /*On fail goto*//*Label 611*/ 15336, // Rule ID 1135 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7452:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1135, GIR_Done, // Label 611: @15336 GIM_Try, /*On fail goto*//*Label 612*/ 15376, // Rule ID 1137 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddudq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7451:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDUDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1137, GIR_Done, // Label 612: @15376 GIM_Try, /*On fail goto*//*Label 613*/ 15416, // Rule ID 1139 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7450:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1139, GIR_Done, // Label 613: @15416 GIM_Try, /*On fail goto*//*Label 614*/ 15456, // Rule ID 1141 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7449:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1141, GIR_Done, // Label 614: @15456 GIM_Try, /*On fail goto*//*Label 615*/ 15496, // Rule ID 1143 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7448:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1143, GIR_Done, // Label 615: @15496 GIM_Try, /*On fail goto*//*Label 616*/ 15536, // Rule ID 1145 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadddq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7447:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1145, GIR_Done, // Label 616: @15536 GIM_Try, /*On fail goto*//*Label 617*/ 15576, // Rule ID 1147 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7446:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1147, GIR_Done, // Label 617: @15576 GIM_Try, /*On fail goto*//*Label 618*/ 15616, // Rule ID 1149 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7445:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1149, GIR_Done, // Label 618: @15616 GIM_Try, /*On fail goto*//*Label 619*/ 15656, // Rule ID 1151 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7444:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1151, GIR_Done, // Label 619: @15656 GIM_Try, /*On fail goto*//*Label 620*/ 15696, // Rule ID 1153 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 7439:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZSSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1153, GIR_Done, // Label 620: @15696 GIM_Try, /*On fail goto*//*Label 621*/ 15736, // Rule ID 1155 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 7436:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1155, GIR_Done, // Label 621: @15736 GIM_Try, /*On fail goto*//*Label 622*/ 15776, // Rule ID 1157 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v8f32] } 7437:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src) => (VFRCZPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1157, GIR_Done, // Label 622: @15776 GIM_Try, /*On fail goto*//*Label 623*/ 15816, // Rule ID 1159 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_sd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2f64] } 7438:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZSDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1159, GIR_Done, // Label 623: @15816 GIM_Try, /*On fail goto*//*Label 624*/ 15856, // Rule ID 1161 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2f64] } 7434:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1161, GIR_Done, // Label 624: @15856 GIM_Try, /*On fail goto*//*Label 625*/ 15896, // Rule ID 1163 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4f64] } 7435:{ *:[iPTR] }, VR256:{ *:[v4f64] }:$src) => (VFRCZPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1163, GIR_Done, // Label 625: @15896 GIM_Try, /*On fail goto*//*Label 626*/ 15936, // Rule ID 2806 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6360:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (VAESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESIMCrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2806, GIR_Done, // Label 626: @15936 GIM_Try, /*On fail goto*//*Label 627*/ 15976, // Rule ID 2808 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6360:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (AESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESIMCrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2808, GIR_Done, // Label 627: @15976 GIM_Try, /*On fail goto*//*Label 628*/ 16020, // Rule ID 13583 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 7256:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RSQRTSSr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13583, GIR_Done, // Label 628: @16020 GIM_Try, /*On fail goto*//*Label 629*/ 16064, // Rule ID 13585 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 7256:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRSQRTSSr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13585, GIR_Done, // Label 629: @16064 GIM_Try, /*On fail goto*//*Label 630*/ 16108, // Rule ID 13599 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 7254:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RCPSSr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13599, GIR_Done, // Label 630: @16108 GIM_Try, /*On fail goto*//*Label 631*/ 16152, // Rule ID 13601 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4f32] } 7254:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRCPSSr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13601, GIR_Done, // Label 631: @16152 GIM_Reject, // Label 604: @16153 GIM_Try, /*On fail goto*//*Label 632*/ 19061, GIM_CheckNumOperands, /*MI*/0, /*Expected*/4, GIM_Try, /*On fail goto*//*Label 633*/ 16205, // Rule ID 2810 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_wo_chain:{ *:[v2i64] } 6361:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) => (VAESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESKEYGENASSIST128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2810, GIR_Done, // Label 633: @16205 GIM_Try, /*On fail goto*//*Label 634*/ 16252, // Rule ID 2812 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] src2 GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_wo_chain:{ *:[v2i64] } 6361:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) => (AESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (timm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESKEYGENASSIST128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2812, GIR_Done, // Label 634: @16252 GIM_Try, /*On fail goto*//*Label 635*/ 16304, // Rule ID 82 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pdep_32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID, // (intrinsic_wo_chain:{ *:[i32] } 7088:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (PDEP32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PDEP32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 82, GIR_Done, // Label 635: @16304 GIM_Try, /*On fail goto*//*Label 636*/ 16356, // Rule ID 84 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pdep_64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID, // (intrinsic_wo_chain:{ *:[i64] } 7089:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (PDEP64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PDEP64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 84, GIR_Done, // Label 636: @16356 GIM_Try, /*On fail goto*//*Label 637*/ 16408, // Rule ID 86 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pext_32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID, // (intrinsic_wo_chain:{ *:[i32] } 7090:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (PEXT32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PEXT32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 86, GIR_Done, // Label 637: @16408 GIM_Try, /*On fail goto*//*Label 638*/ 16460, // Rule ID 88 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pext_64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID, // (intrinsic_wo_chain:{ *:[i64] } 7091:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (PEXT64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PEXT64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 88, GIR_Done, // Label 638: @16460 GIM_Try, /*On fail goto*//*Label 639*/ 16512, // Rule ID 2481 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v16i8] } 7394:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2481, GIR_Done, // Label 639: @16512 GIM_Try, /*On fail goto*//*Label 640*/ 16564, // Rule ID 2483 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7398:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2483, GIR_Done, // Label 640: @16564 GIM_Try, /*On fail goto*//*Label 641*/ 16616, // Rule ID 2485 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7396:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2485, GIR_Done, // Label 641: @16616 GIM_Try, /*On fail goto*//*Label 642*/ 16668, // Rule ID 2487 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7378:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2487, GIR_Done, // Label 642: @16668 GIM_Try, /*On fail goto*//*Label 643*/ 16720, // Rule ID 2489 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7384:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2489, GIR_Done, // Label 643: @16720 GIM_Try, /*On fail goto*//*Label 644*/ 16772, // Rule ID 2505 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_b, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v32i8] } 6466:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSIGNBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2505, GIR_Done, // Label 644: @16772 GIM_Try, /*On fail goto*//*Label 645*/ 16824, // Rule ID 2507 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_w, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v16i16] } 6468:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSIGNWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2507, GIR_Done, // Label 645: @16824 GIM_Try, /*On fail goto*//*Label 646*/ 16876, // Rule ID 2509 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_d, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v8i32] } 6467:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSIGNDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2509, GIR_Done, // Label 646: @16876 GIM_Try, /*On fail goto*//*Label 647*/ 16928, // Rule ID 2511 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phadd_sw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v16i16] } 6453:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHADDSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2511, GIR_Done, // Label 647: @16928 GIM_Try, /*On fail goto*//*Label 648*/ 16980, // Rule ID 2513 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phsub_sw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v16i16] } 6456:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHSUBSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2513, GIR_Done, // Label 648: @16980 GIM_Try, /*On fail goto*//*Label 649*/ 17032, // Rule ID 2523 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v16i8] } 7394:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNBrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2523, GIR_Done, // Label 649: @17032 GIM_Try, /*On fail goto*//*Label 650*/ 17084, // Rule ID 2525 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7398:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2525, GIR_Done, // Label 650: @17084 GIM_Try, /*On fail goto*//*Label 651*/ 17136, // Rule ID 2527 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7396:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2527, GIR_Done, // Label 651: @17136 GIM_Try, /*On fail goto*//*Label 652*/ 17188, // Rule ID 2531 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7378:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHADDSWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2531, GIR_Done, // Label 652: @17188 GIM_Try, /*On fail goto*//*Label 653*/ 17240, // Rule ID 2533 // GIM_CheckFeatures, GIFBS_UseSSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7384:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHSUBSWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2533, GIR_Done, // Label 653: @17240 GIM_Try, /*On fail goto*//*Label 654*/ 17292, // Rule ID 2761 // GIM_CheckFeatures, GIFBS_HasSSE42, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_8, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR8RegClassID, // (intrinsic_wo_chain:{ *:[i32] } 7352:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (CRC32r32r8:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2761, GIR_Done, // Label 654: @17292 GIM_Try, /*On fail goto*//*Label 655*/ 17344, // Rule ID 2763 // GIM_CheckFeatures, GIFBS_HasSSE42, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_16, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR16RegClassID, // (intrinsic_wo_chain:{ *:[i32] } 7350:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) => (CRC32r32r16:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r16, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2763, GIR_Done, // Label 655: @17344 GIM_Try, /*On fail goto*//*Label 656*/ 17396, // Rule ID 2765 // GIM_CheckFeatures, GIFBS_HasSSE42, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID, // (intrinsic_wo_chain:{ *:[i32] } 7351:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (CRC32r32r32:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2765, GIR_Done, // Label 656: @17396 GIM_Try, /*On fail goto*//*Label 657*/ 17448, // Rule ID 2767 // GIM_CheckFeatures, GIFBS_HasSSE42, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_64_64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID, // (intrinsic_wo_chain:{ *:[i64] } 7353:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (CRC32r64r64:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r64r64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2767, GIR_Done, // Label 657: @17448 GIM_Try, /*On fail goto*//*Label 658*/ 17500, // Rule ID 2770 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1nexte, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7222:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1NEXTErr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1NEXTErr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2770, GIR_Done, // Label 658: @17500 GIM_Try, /*On fail goto*//*Label 659*/ 17552, // Rule ID 2772 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg1, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7220:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG1rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2772, GIR_Done, // Label 659: @17552 GIM_Try, /*On fail goto*//*Label 660*/ 17604, // Rule ID 2774 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg2, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7221:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG2rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2774, GIR_Done, // Label 660: @17604 GIM_Try, /*On fail goto*//*Label 661*/ 17656, // Rule ID 2778 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg1, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7224:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG1rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2778, GIR_Done, // Label 661: @17656 GIM_Try, /*On fail goto*//*Label 662*/ 17708, // Rule ID 2780 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg2, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7225:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG2rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2780, GIR_Done, // Label 662: @17708 GIM_Try, /*On fail goto*//*Label 663*/ 17760, // Rule ID 2782 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6354:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2782, GIR_Done, // Label 663: @17760 GIM_Try, /*On fail goto*//*Label 664*/ 17812, // Rule ID 2784 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6357:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2784, GIR_Done, // Label 664: @17812 GIM_Try, /*On fail goto*//*Label 665*/ 17864, // Rule ID 2786 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6348:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2786, GIR_Done, // Label 665: @17864 GIM_Try, /*On fail goto*//*Label 666*/ 17916, // Rule ID 2788 // GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6351:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2788, GIR_Done, // Label 666: @17916 GIM_Try, /*On fail goto*//*Label 667*/ 17968, // Rule ID 2790 // GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 6355:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2790, GIR_Done, // Label 667: @17968 GIM_Try, /*On fail goto*//*Label 668*/ 18020, // Rule ID 2792 // GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 6358:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2792, GIR_Done, // Label 668: @18020 GIM_Try, /*On fail goto*//*Label 669*/ 18072, // Rule ID 2794 // GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 6349:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2794, GIR_Done, // Label 669: @18072 GIM_Try, /*On fail goto*//*Label 670*/ 18124, // Rule ID 2796 // GIM_CheckFeatures, GIFBS_HasVAES_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 6352:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2796, GIR_Done, // Label 670: @18124 GIM_Try, /*On fail goto*//*Label 671*/ 18176, // Rule ID 2798 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6354:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2798, GIR_Done, // Label 671: @18176 GIM_Try, /*On fail goto*//*Label 672*/ 18228, // Rule ID 2800 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6357:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCLASTrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2800, GIR_Done, // Label 672: @18228 GIM_Try, /*On fail goto*//*Label 673*/ 18280, // Rule ID 2802 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6348:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2802, GIR_Done, // Label 673: @18280 GIM_Try, /*On fail goto*//*Label 674*/ 18332, // Rule ID 2804 // GIM_CheckFeatures, GIFBS_HasAES_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6351:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECLASTrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2804, GIR_Done, // Label 674: @18332 GIM_Try, /*On fail goto*//*Label 675*/ 18384, // Rule ID 2821 // GIM_CheckFeatures, GIFBS_HasSSE4A, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_extrq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7368:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) => (EXTRQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::EXTRQ, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2821, GIR_Done, // Label 675: @18384 GIM_Try, /*On fail goto*//*Label 676*/ 18436, // Rule ID 2823 // GIM_CheckFeatures, GIFBS_HasSSE4A, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_insertq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7370:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) => (INSERTQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INSERTQ, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2823, GIR_Done, // Label 676: @18436 GIM_Try, /*On fail goto*//*Label 677*/ 18488, // Rule ID 11910 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6354:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11910, GIR_Done, // Label 677: @18488 GIM_Try, /*On fail goto*//*Label 678*/ 18540, // Rule ID 11912 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 6355:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11912, GIR_Done, // Label 678: @18540 GIM_Try, /*On fail goto*//*Label 679*/ 18592, // Rule ID 11914 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (intrinsic_wo_chain:{ *:[v8i64] } 6356:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11914, GIR_Done, // Label 679: @18592 GIM_Try, /*On fail goto*//*Label 680*/ 18644, // Rule ID 11916 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6357:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11916, GIR_Done, // Label 680: @18644 GIM_Try, /*On fail goto*//*Label 681*/ 18696, // Rule ID 11918 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 6358:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11918, GIR_Done, // Label 681: @18696 GIM_Try, /*On fail goto*//*Label 682*/ 18748, // Rule ID 11920 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (intrinsic_wo_chain:{ *:[v8i64] } 6359:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11920, GIR_Done, // Label 682: @18748 GIM_Try, /*On fail goto*//*Label 683*/ 18800, // Rule ID 11922 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6348:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11922, GIR_Done, // Label 683: @18800 GIM_Try, /*On fail goto*//*Label 684*/ 18852, // Rule ID 11924 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 6349:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11924, GIR_Done, // Label 684: @18852 GIM_Try, /*On fail goto*//*Label 685*/ 18904, // Rule ID 11926 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (intrinsic_wo_chain:{ *:[v8i64] } 6350:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11926, GIR_Done, // Label 685: @18904 GIM_Try, /*On fail goto*//*Label 686*/ 18956, // Rule ID 11928 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 6351:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11928, GIR_Done, // Label 686: @18956 GIM_Try, /*On fail goto*//*Label 687*/ 19008, // Rule ID 11930 // GIM_CheckFeatures, GIFBS_HasVAES_HasVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // (intrinsic_wo_chain:{ *:[v4i64] } 6352:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11930, GIR_Done, // Label 687: @19008 GIM_Try, /*On fail goto*//*Label 688*/ 19060, // Rule ID 11932 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // (intrinsic_wo_chain:{ *:[v8i64] } 6353:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11932, GIR_Done, // Label 688: @19060 GIM_Reject, // Label 632: @19061 GIM_Try, /*On fail goto*//*Label 689*/ 21027, GIM_CheckNumOperands, /*MI*/0, /*Expected*/5, GIM_Try, /*On fail goto*//*Label 690*/ 19125, // Rule ID 1511 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cmp_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] cc GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4f32] } 7229:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (timm:{ *:[i8] }):$cc) => (VCMPSSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (timm:{ *:[i8] }):$cc) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCMPSSrr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // cc GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1511, GIR_Done, // Label 690: @19125 GIM_Try, /*On fail goto*//*Label 691*/ 19184, // Rule ID 1513 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cmp_sd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] cc GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2f64] } 7267:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (timm:{ *:[i8] }):$cc) => (VCMPSDrr_Int:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (timm:{ *:[i8] }):$cc) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCMPSDrr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // cc GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1513, GIR_Done, // Label 691: @19184 GIM_Try, /*On fail goto*//*Label 692*/ 19243, // Rule ID 1515 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cmp_ss, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] cc GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4f32] } 7229:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (timm:{ *:[i8] }):$cc) => (CMPSSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (timm:{ *:[i8] }):$cc) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CMPSSrr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // cc GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1515, GIR_Done, // Label 692: @19243 GIM_Try, /*On fail goto*//*Label 693*/ 19302, // Rule ID 1517 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cmp_sd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] cc GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2f64] } 7267:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (timm:{ *:[i8] }):$cc) => (CMPSDrr_Int:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (timm:{ *:[i8] }):$cc) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CMPSDrr_Int, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // cc GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1517, GIR_Done, // Label 693: @19302 GIM_Try, /*On fail goto*//*Label 694*/ 19361, // Rule ID 2702 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8i16] } 7339:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) => (VMPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2702, GIR_Done, // Label 694: @19361 GIM_Try, /*On fail goto*//*Label 695*/ 19420, // Rule ID 2704 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4f32] } 7337:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2704, GIR_Done, // Label 695: @19420 GIM_Try, /*On fail goto*//*Label 696*/ 19479, // Rule ID 2706 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2f64] } 7336:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPDrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2706, GIR_Done, // Label 696: @19479 GIM_Try, /*On fail goto*//*Label 697*/ 19538, // Rule ID 2708 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_dp_ps_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8f32] } 6373:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (timm:{ *:[i8] }):$src3) => (VDPPSYrri:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSYrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2708, GIR_Done, // Label 697: @19538 GIM_Try, /*On fail goto*//*Label 698*/ 19597, // Rule ID 2710 // GIM_CheckFeatures, GIFBS_HasAVX2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_mpsadbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v16i16] } 6442:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (timm:{ *:[i8] }):$src3) => (VMPSADBWYrri:{ *:[v16i16] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWYrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2710, GIR_Done, // Label 698: @19597 GIM_Try, /*On fail goto*//*Label 699*/ 19656, // Rule ID 2712 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8i16] } 7339:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) => (MPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MPSADBWrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2712, GIR_Done, // Label 699: @19656 GIM_Try, /*On fail goto*//*Label 700*/ 19715, // Rule ID 2714 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4f32] } 7337:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) => (DPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPSrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2714, GIR_Done, // Label 700: @19715 GIM_Try, /*On fail goto*//*Label 701*/ 19774, // Rule ID 2716 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2f64] } 7336:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) => (DPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPDrri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2716, GIR_Done, // Label 701: @19774 GIM_Try, /*On fail goto*//*Label 702*/ 19833, // Rule ID 2768 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1rnds4, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4i32] } 7223:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (timm:{ *:[i8] }):$src3) => (SHA1RNDS4rri:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1RNDS4rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2768, GIR_Done, // Label 702: @19833 GIM_Try, /*On fail goto*//*Label 703*/ 19892, // Rule ID 2814 // GIM_CheckFeatures, GIFBS_HasPCLMUL_NoAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2i64] } 7192:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (PCLMULQDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PCLMULQDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2814, GIR_Done, // Label 703: @19892 GIM_Try, /*On fail goto*//*Label 704*/ 19951, // Rule ID 2816 // GIM_CheckFeatures, GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2i64] } 7192:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2816, GIR_Done, // Label 704: @19951 GIM_Try, /*On fail goto*//*Label 705*/ 20010, // Rule ID 2818 // GIM_CheckFeatures, GIFBS_HasVPCLMULQDQ_NoVLX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4i64] } 7193:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQYrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2818, GIR_Done, // Label 705: @20010 GIM_Try, /*On fail goto*//*Label 706*/ 20069, // Rule ID 11934 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVPCLMULQDQ, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_512, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v8i64] } 7194:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11934, GIR_Done, // Label 706: @20069 GIM_Try, /*On fail goto*//*Label 707*/ 20128, // Rule ID 11936 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPCLMULQDQ, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v2i64] } 7192:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZ128rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11936, GIR_Done, // Label 707: @20128 GIM_Try, /*On fail goto*//*Label 708*/ 20187, // Rule ID 11938 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPCLMULQDQ, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_256, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID, // MIs[0] src3 GIM_CheckIsImm, /*MI*/0, /*Op*/4, // (intrinsic_wo_chain:{ *:[v4i64] } 7193:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) => (VPCLMULQDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (timm:{ *:[i8] }):$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11938, GIR_Done, // Label 708: @20187 GIM_Try, /*On fail goto*//*Label 709*/ 20251, // Rule ID 1209 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcswd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7470:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1209, GIR_Done, // Label 709: @20251 GIM_Try, /*On fail goto*//*Label 710*/ 20315, // Rule ID 1211 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcsswd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7469:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSSWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1211, GIR_Done, // Label 710: @20315 GIM_Try, /*On fail goto*//*Label 711*/ 20379, // Rule ID 1213 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsww, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7468:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1213, GIR_Done, // Label 711: @20379 GIM_Try, /*On fail goto*//*Label 712*/ 20443, // Rule ID 1215 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacswd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7467:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1215, GIR_Done, // Label 712: @20443 GIM_Try, /*On fail goto*//*Label 713*/ 20507, // Rule ID 1217 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssww, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v8i16] } 7466:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWWrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1217, GIR_Done, // Label 713: @20507 GIM_Try, /*On fail goto*//*Label 714*/ 20571, // Rule ID 1219 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsswd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7465:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1219, GIR_Done, // Label 714: @20571 GIM_Try, /*On fail goto*//*Label 715*/ 20635, // Rule ID 1221 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdql, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7464:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQLrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1221, GIR_Done, // Label 715: @20635 GIM_Try, /*On fail goto*//*Label 716*/ 20699, // Rule ID 1223 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdqh, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7463:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQHrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1223, GIR_Done, // Label 716: @20699 GIM_Try, /*On fail goto*//*Label 717*/ 20763, // Rule ID 1225 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7462:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1225, GIR_Done, // Label 717: @20763 GIM_Try, /*On fail goto*//*Label 718*/ 20827, // Rule ID 1227 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdql, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7461:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQLrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1227, GIR_Done, // Label 718: @20827 GIM_Try, /*On fail goto*//*Label 719*/ 20891, // Rule ID 1229 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdqh, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v2i64] } 7460:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQHrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1229, GIR_Done, // Label 719: @20891 GIM_Try, /*On fail goto*//*Label 720*/ 20955, // Rule ID 1231 // GIM_CheckFeatures, GIFBS_HasXOP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7459:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1231, GIR_Done, // Label 720: @20955 GIM_Try, /*On fail goto*//*Label 721*/ 21026, // Rule ID 2776 // GIM_CheckFeatures, GIFBS_HasSHA, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256rnds2, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID, // (intrinsic_wo_chain:{ *:[v4i32] } 7226:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, XMM0:{ *:[v4i32] }) => (SHA256RNDS2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::XMM0, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/4, // XMM0 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256RNDS2rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2776, GIR_Done, // Label 721: @21026 GIM_Reject, // Label 689: @21027 GIM_Reject, // Label 9: @21028 GIM_Try, /*On fail goto*//*Label 722*/ 21286, GIM_CheckNumOperands, /*MI*/0, /*Expected*/1, GIM_Try, /*On fail goto*//*Label 723*/ 21051, // Rule ID 1969 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_pause, // (intrinsic_void 7295:{ *:[iPTR] }) => (PAUSE) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PAUSE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1969, GIR_Done, // Label 723: @21051 GIM_Try, /*On fail goto*//*Label 724*/ 21071, // Rule ID 1970 // GIM_CheckFeatures, GIFBS_HasSSE1, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse_sfence, // (intrinsic_void 7257:{ *:[iPTR] }) => (SFENCE) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SFENCE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1970, GIR_Done, // Label 724: @21071 GIM_Try, /*On fail goto*//*Label 725*/ 21091, // Rule ID 1971 // GIM_CheckFeatures, GIFBS_HasSSE2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_lfence, // (intrinsic_void 7284:{ *:[iPTR] }) => (LFENCE) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LFENCE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1971, GIR_Done, // Label 725: @21091 GIM_Try, /*On fail goto*//*Label 726*/ 21111, // Rule ID 1972 // GIM_CheckFeatures, GIFBS_HasMFence, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_mfence, // (intrinsic_void 7288:{ *:[iPTR] }) => (MFENCE) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MFENCE, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1972, GIR_Done, // Label 726: @21111 GIM_Try, /*On fail goto*//*Label 727*/ 21131, // Rule ID 2856 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_avx_vzeroall, // (intrinsic_void 6416:{ *:[iPTR] }) => (VZEROALL) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VZEROALL, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2856, GIR_Done, // Label 727: @21131 GIM_Try, /*On fail goto*//*Label 728*/ 21151, // Rule ID 2857 // GIM_CheckFeatures, GIFBS_HasAVX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_avx_vzeroupper, // (intrinsic_void 6417:{ *:[iPTR] }) => (VZEROUPPER) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VZEROUPPER, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2857, GIR_Done, // Label 728: @21151 GIM_Try, /*On fail goto*//*Label 729*/ 21171, // Rule ID 12546 // GIM_CheckFeatures, GIFBS_HasMMX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mmx_emms, // (intrinsic_void 7118:{ *:[iPTR] }) => (MMX_EMMS:{ *:[x86mmx] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MMX_EMMS, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12546, GIR_Done, // Label 729: @21171 GIM_Try, /*On fail goto*//*Label 730*/ 21191, // Rule ID 12765 // GIM_CheckFeatures, GIFBS_Has3DNow, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mmx_femms, // (intrinsic_void 7119:{ *:[iPTR] }) => (FEMMS:{ *:[x86mmx] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::FEMMS, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12765, GIR_Done, // Label 730: @21191 GIM_Try, /*On fail goto*//*Label 731*/ 21211, // Rule ID 12780 // GIM_CheckFeatures, GIFBS_HasRTM, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xend, // (intrinsic_void 7432:{ *:[iPTR] }) => (XEND) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XEND, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12780, GIR_Done, // Label 731: @21211 GIM_Try, /*On fail goto*//*Label 732*/ 21229, // Rule ID 12786 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wbinvd, // (intrinsic_void 7419:{ *:[iPTR] }) => (WBINVD) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WBINVD, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12786, GIR_Done, // Label 732: @21229 GIM_Try, /*On fail goto*//*Label 733*/ 21249, // Rule ID 12787 // GIM_CheckFeatures, GIFBS_HasWBNOINVD, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wbnoinvd, // (intrinsic_void 7420:{ *:[iPTR] }) => (WBNOINVD) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WBNOINVD, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12787, GIR_Done, // Label 733: @21249 GIM_Try, /*On fail goto*//*Label 734*/ 21267, // Rule ID 12792 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_saveprevssp, // (intrinsic_void 7215:{ *:[iPTR] }) => (SAVEPREVSSP) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAVEPREVSSP, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12792, GIR_Done, // Label 734: @21267 GIM_Try, /*On fail goto*//*Label 735*/ 21285, // Rule ID 12798 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_setssbsy, // (intrinsic_void 7219:{ *:[iPTR] }) => (SETSSBSY) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SETSSBSY, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12798, GIR_Done, // Label 735: @21285 GIM_Reject, // Label 722: @21286 GIM_Try, /*On fail goto*//*Label 736*/ 22162, GIM_CheckNumOperands, /*MI*/0, /*Expected*/2, GIM_Try, /*On fail goto*//*Label 737*/ 21313, // Rule ID 12784 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_int, // MIs[0] Operand 1 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 3, // (intrinsic_void 7111:{ *:[iPTR] }, 3:{ *:[i8] }) => (INT3) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INT3, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12784, GIR_Done, // Label 737: @21313 GIM_Try, /*On fail goto*//*Label 738*/ 21340, // Rule ID 12782 // GIM_CheckFeatures, GIFBS_HasRTM, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xabort, // MIs[0] imm GIM_CheckIsImm, /*MI*/0, /*Op*/1, // (intrinsic_void 7430:{ *:[iPTR] }, (timm:{ *:[i8] }):$imm) => (XABORT (timm:{ *:[i8] }):$imm) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XABORT, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // imm GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12782, GIR_Done, // Label 738: @21340 GIM_Try, /*On fail goto*//*Label 739*/ 21365, // Rule ID 12785 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_int, // MIs[0] trap GIM_CheckIsImm, /*MI*/0, /*Op*/1, // (intrinsic_void 7111:{ *:[iPTR] }, (timm:{ *:[i8] }):$trap) => (INT (timm:{ *:[i8] }):$trap) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INT, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // trap GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12785, GIR_Done, // Label 739: @21365 GIM_Try, /*On fail goto*//*Label 740*/ 21397, // Rule ID 1 // GIM_CheckFeatures, GIFBS_Not64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_flags_read_u32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 7101:{ *:[iPTR] }) => (RDFLAGS32:{ *:[i32] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFLAGS32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1, GIR_Done, // Label 740: @21397 GIM_Try, /*On fail goto*//*Label 741*/ 21429, // Rule ID 2 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_flags_read_u64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 7102:{ *:[iPTR] }) => (RDFLAGS64:{ *:[i64] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFLAGS64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2, GIR_Done, // Label 741: @21429 GIM_Try, /*On fail goto*//*Label 742*/ 21461, // Rule ID 95 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_slwpcb, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 7227:{ *:[iPTR] }) => (SLWPCB:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SLWPCB, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 95, GIR_Done, // Label 742: @21461 GIM_Try, /*On fail goto*//*Label 743*/ 21493, // Rule ID 97 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_slwpcb, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 7227:{ *:[iPTR] }) => (SLWPCB64:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SLWPCB64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 97, GIR_Done, // Label 743: @21493 GIM_Try, /*On fail goto*//*Label 744*/ 21525, // Rule ID 12779 // GIM_CheckFeatures, GIFBS_HasRTM, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xbegin, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 7431:{ *:[iPTR] }) => (XBEGIN:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XBEGIN, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12779, GIR_Done, // Label 744: @21525 GIM_Try, /*On fail goto*//*Label 745*/ 21557, // Rule ID 12815 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdfsbase_32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 7197:{ *:[iPTR] }) => (RDFSBASE:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFSBASE, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12815, GIR_Done, // Label 745: @21557 GIM_Try, /*On fail goto*//*Label 746*/ 21589, // Rule ID 12816 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdfsbase_64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 7198:{ *:[iPTR] }) => (RDFSBASE64:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFSBASE64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12816, GIR_Done, // Label 746: @21589 GIM_Try, /*On fail goto*//*Label 747*/ 21621, // Rule ID 12817 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdgsbase_32, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 7199:{ *:[iPTR] }) => (RDGSBASE:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDGSBASE, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12817, GIR_Done, // Label 747: @21621 GIM_Try, /*On fail goto*//*Label 748*/ 21653, // Rule ID 12818 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdgsbase_64, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 7200:{ *:[iPTR] }) => (RDGSBASE64:{ *:[i64] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDGSBASE64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12818, GIR_Done, // Label 748: @21653 GIM_Try, /*On fail goto*//*Label 749*/ 21685, // Rule ID 12824 // GIM_CheckFeatures, GIFBS_HasRDPID_Not64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdpid, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 7201:{ *:[iPTR] }) => (RDPID32:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDPID32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12824, GIR_Done, // Label 749: @21685 GIM_Try, /*On fail goto*//*Label 750*/ 21717, // Rule ID 3 // GIM_CheckFeatures, GIFBS_Not64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_flags_write_u32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 7103:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFLAGS32:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFLAGS32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 3, GIR_Done, // Label 750: @21717 GIM_Try, /*On fail goto*//*Label 751*/ 21749, // Rule ID 4 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_flags_write_u64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 7104:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFLAGS64:{ *:[i64] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFLAGS64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4, GIR_Done, // Label 751: @21749 GIM_Try, /*On fail goto*//*Label 752*/ 21779, // Rule ID 12788 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_incsspd, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 7109:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (INCSSPD GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INCSSPD, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12788, GIR_Done, // Label 752: @21779 GIM_Try, /*On fail goto*//*Label 753*/ 21809, // Rule ID 12789 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_incsspq, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 7110:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (INCSSPQ GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INCSSPQ, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12789, GIR_Done, // Label 753: @21809 GIM_Try, /*On fail goto*//*Label 754*/ 21841, // Rule ID 12819 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrfsbase_32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 7421:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFSBASE GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFSBASE, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12819, GIR_Done, // Label 754: @21841 GIM_Try, /*On fail goto*//*Label 755*/ 21873, // Rule ID 12820 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrfsbase_64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 7422:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFSBASE64 GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFSBASE64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12820, GIR_Done, // Label 755: @21873 GIM_Try, /*On fail goto*//*Label 756*/ 21905, // Rule ID 12821 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrgsbase_32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 7423:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRGSBASE GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRGSBASE, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12821, GIR_Done, // Label 756: @21905 GIM_Try, /*On fail goto*//*Label 757*/ 21937, // Rule ID 12822 // GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrgsbase_64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 7424:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRGSBASE64 GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRGSBASE64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12822, GIR_Done, // Label 757: @21937 GIM_Try, /*On fail goto*//*Label 758*/ 21969, // Rule ID 12827 // GIM_CheckFeatures, GIFBS_HasPTWRITE, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_ptwrite32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 7195:{ *:[iPTR] }, GR32:{ *:[i32] }:$dst) => (PTWRITEr GR32:{ *:[i32] }:$dst) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTWRITEr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12827, GIR_Done, // Label 758: @21969 GIM_Try, /*On fail goto*//*Label 759*/ 22001, // Rule ID 12828 // GIM_CheckFeatures, GIFBS_HasPTWRITE_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_ptwrite64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 7196:{ *:[iPTR] }, GR64:{ *:[i64] }:$dst) => (PTWRITE64r GR64:{ *:[i64] }:$dst) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTWRITE64r, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // dst GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12828, GIR_Done, // Label 759: @22001 GIM_Try, /*On fail goto*//*Label 760*/ 22033, // Rule ID 94 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_llwpcb, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 7113:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (LLWPCB GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LLWPCB, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 94, GIR_Done, // Label 760: @22033 GIM_Try, /*On fail goto*//*Label 761*/ 22065, // Rule ID 96 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_llwpcb, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 7113:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (LLWPCB64 GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LLWPCB64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 96, GIR_Done, // Label 761: @22065 GIM_Try, /*On fail goto*//*Label 762*/ 22097, // Rule ID 107 // GIM_CheckFeatures, GIFBS_HasWAITPKG_Not64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (intrinsic_void 7404:{ *:[iPTR] }, GR16:{ *:[i16] }:$src) => (UMONITOR16 GR16:{ *:[i16] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR16, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 107, GIR_Done, // Label 762: @22097 GIM_Try, /*On fail goto*//*Label 763*/ 22129, // Rule ID 108 // GIM_CheckFeatures, GIFBS_HasWAITPKG, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (intrinsic_void 7404:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (UMONITOR32 GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 108, GIR_Done, // Label 763: @22129 GIM_Try, /*On fail goto*//*Label 764*/ 22161, // Rule ID 109 // GIM_CheckFeatures, GIFBS_HasWAITPKG_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor, // MIs[0] src GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (intrinsic_void 7404:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (UMONITOR64 GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 109, GIR_Done, // Label 764: @22161 GIM_Reject, // Label 736: @22162 GIM_Try, /*On fail goto*//*Label 765*/ 22310, GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, GIM_Try, /*On fail goto*//*Label 766*/ 22209, // Rule ID 12790 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdsspd, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // (intrinsic_w_chain:{ *:[i32] } 7210:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (RDSSPD:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDSSPD, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12790, GIR_Done, // Label 766: @22209 GIM_Try, /*On fail goto*//*Label 767*/ 22251, // Rule ID 12791 // GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdsspq, GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, // (intrinsic_w_chain:{ *:[i64] } 7211:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (RDSSPQ:{ *:[i64] } GR64:{ *:[i64] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDSSPQ, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12791, GIR_Done, // Label 767: @22251 GIM_Try, /*On fail goto*//*Label 768*/ 22309, // Rule ID 2545 // GIM_CheckFeatures, GIFBS_HasSSE3, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse3_mwait, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32_CB_and_GR32_DCRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32_ADRegClassID, // (intrinsic_void 7333:{ *:[iPTR] }, ECX:{ *:[i32] }, EAX:{ *:[i32] }) => (MWAITrr) GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/2, X86::EAX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/2, // EAX GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::ECX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // ECX GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MWAITrr, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2545, GIR_Done, // Label 768: @22309 GIM_Reject, // Label 765: @22310 GIM_Try, /*On fail goto*//*Label 769*/ 22824, GIM_CheckNumOperands, /*MI*/0, /*Expected*/4, GIM_Try, /*On fail goto*//*Label 770*/ 22366, // Rule ID 102 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_lwpval32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // MIs[0] cntl GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 7116:{ *:[iPTR] }, GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) => (LWPVAL32rri GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LWPVAL32rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // cntl GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 102, GIR_Done, // Label 770: @22366 GIM_Try, /*On fail goto*//*Label 771*/ 22417, // Rule ID 104 // GIM_CheckFeatures, GIFBS_HasLWP, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_lwpval64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, // MIs[0] cntl GIM_CheckIsImm, /*MI*/0, /*Op*/3, // (intrinsic_void 7117:{ *:[iPTR] }, GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) => (LWPVAL64rri GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (timm:{ *:[i32] }):$cntl) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LWPVAL64rri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // cntl GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 104, GIR_Done, // Label 771: @22417 GIM_Try, /*On fail goto*//*Label 772*/ 22494, // Rule ID 106 // GIM_CheckFeatures, GIFBS_HasMWAITX, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mwaitx, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32_CB_and_GR32_DCRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32_ADRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32_ABCD_and_GR32_BSIRegClassID, // (intrinsic_void 7191:{ *:[iPTR] }, ECX:{ *:[i32] }, EAX:{ *:[i32] }, EBX:{ *:[i32] }) => (MWAITXrrr) GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/3, X86::EBX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/3, // EBX GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/2, X86::EAX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/2, // EAX GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::ECX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // ECX GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MWAITXrrr, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 106, GIR_Done, // Label 772: @22494 GIM_Try, /*On fail goto*//*Label 773*/ 22571, // Rule ID 12800 // GIM_CheckFeatures, GIFBS_HasXSAVE, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xsetbv, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32_CB_and_GR32_DCRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32_AD_and_GR32_DCRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32_ADRegClassID, // (intrinsic_void 7492:{ *:[iPTR] }, ECX:{ *:[i32] }, EDX:{ *:[i32] }, EAX:{ *:[i32] }) => (XSETBV) GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/3, X86::EAX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/3, // EAX GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/2, X86::EDX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/2, // EDX GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::ECX, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // ECX GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XSETBV, GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12800, GIR_Done, // Label 773: @22571 GIM_Try, /*On fail goto*//*Label 774*/ 22634, // Rule ID 2362 // GIM_CheckFeatures, GIFBS_HasAVX_Not64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_maskmov_dqu, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] Operand 3 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32_DIBP_and_GR32_SIDIRegClassID, // (intrinsic_void 7285:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, EDI:{ *:[i32] }) => (VMASKMOVDQU VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::EDI, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // EDI GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMASKMOVDQU, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // mask GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2362, GIR_Done, // Label 774: @22634 GIM_Try, /*On fail goto*//*Label 775*/ 22697, // Rule ID 2363 // GIM_CheckFeatures, GIFBS_HasAVX_In64BitMode, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_maskmov_dqu, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] Operand 3 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64_with_sub_32bit_in_GR32_DIBP_and_GR32_SIDIRegClassID, // (intrinsic_void 7285:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, RDI:{ *:[i64] }) => (VMASKMOVDQU64 VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::RDI, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // RDI GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMASKMOVDQU64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // mask GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2363, GIR_Done, // Label 775: @22697 GIM_Try, /*On fail goto*//*Label 776*/ 22760, // Rule ID 2364 // GIM_CheckFeatures, GIFBS_Not64BitMode_UseSSE2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_maskmov_dqu, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] Operand 3 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32_DIBP_and_GR32_SIDIRegClassID, // (intrinsic_void 7285:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, EDI:{ *:[i32] }) => (MASKMOVDQU VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::EDI, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // EDI GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MASKMOVDQU, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // mask GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2364, GIR_Done, // Label 776: @22760 GIM_Try, /*On fail goto*//*Label 777*/ 22823, // Rule ID 2365 // GIM_CheckFeatures, GIFBS_In64BitMode_UseSSE2, GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_maskmov_dqu, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // MIs[0] Operand 3 GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64_with_sub_32bit_in_GR32_DIBP_and_GR32_SIDIRegClassID, // (intrinsic_void 7285:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask, RDI:{ *:[i64] }) => (MASKMOVDQU64 VR128:{ *:[v16i8] }:$src, VR128:{ *:[v16i8] }:$mask) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::RDI, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/3, // RDI GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MASKMOVDQU64, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // mask GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2365, GIR_Done, // Label 777: @22823 GIM_Reject, // Label 769: @22824 GIM_Reject, // Label 10: @22825 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 25, /*)*//*default:*//*Label 792*/ 23605, /*GILLT_s32*//*Label 778*/ 22853, /*GILLT_s64*//*Label 779*/ 23024, 0, 0, 0, /*GILLT_v2s64*//*Label 780*/ 23200, 0, /*GILLT_v4s32*//*Label 781*/ 23224, /*GILLT_v4s64*//*Label 782*/ 23248, 0, /*GILLT_v8s16*//*Label 783*/ 23272, /*GILLT_v8s32*//*Label 784*/ 23335, /*GILLT_v8s64*//*Label 785*/ 23359, 0, /*GILLT_v16s8*//*Label 786*/ 23383, /*GILLT_v16s16*//*Label 787*/ 23446, /*GILLT_v16s32*//*Label 788*/ 23509, 0, /*GILLT_v32s8*//*Label 789*/ 23533, /*GILLT_v32s16*//*Label 790*/ 23557, 0, /*GILLT_v64s8*//*Label 791*/ 23581, // Label 778: @22853 GIM_Try, /*On fail goto*//*Label 793*/ 22898, // Rule ID 14539 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (anyext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR32*/33, // GIR_Coverage, 14539, GIR_Done, // Label 793: @22898 GIM_Try, /*On fail goto*//*Label 794*/ 22943, // Rule ID 14542 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (anyext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK8:{ *:[v8i1] }:$src, GR32:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR32*/33, // GIR_Coverage, 14542, GIR_Done, // Label 794: @22943 GIM_Try, /*On fail goto*//*Label 795*/ 22964, // Rule ID 17129 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (anyext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17129, GIR_Done, // Label 795: @22964 GIM_Try, /*On fail goto*//*Label 796*/ 23023, // Rule ID 17130 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::LOW32_ADDR_ACCESS_RBPRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (anyext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR16:{ *:[i16] }:$src, sub_16bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/4, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP*/28, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP*/28, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GR16*/6, // GIR_Coverage, 17130, GIR_Done, // Label 796: @23023 GIM_Reject, // Label 779: @23024 GIM_Try, /*On fail goto*//*Label 797*/ 23082, // Rule ID 17131 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (anyext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr8, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/65, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GR32*/33, // GIR_Coverage, 17131, GIR_Done, // Label 797: @23082 GIM_Try, /*On fail goto*//*Label 798*/ 23140, // Rule ID 17132 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (anyext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr16, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/65, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GR32*/33, // GIR_Coverage, 17132, GIR_Done, // Label 798: @23140 GIM_Try, /*On fail goto*//*Label 799*/ 23199, // Rule ID 17133 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (anyext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR32:{ *:[i32] }:$src, sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/65, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR64*/65, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GR32*/33, // GIR_Coverage, 17133, GIR_Done, // Label 799: @23199 GIM_Reject, // Label 780: @23200 GIM_Try, /*On fail goto*//*Label 800*/ 23223, // Rule ID 16466 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, // (anyext:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) => (VPMOVM2QZ128rr:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16466, GIR_Done, // Label 800: @23223 GIM_Reject, // Label 781: @23224 GIM_Try, /*On fail goto*//*Label 801*/ 23247, // Rule ID 16463 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, // (anyext:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2DZ128rr:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16463, GIR_Done, // Label 801: @23247 GIM_Reject, // Label 782: @23248 GIM_Try, /*On fail goto*//*Label 802*/ 23271, // Rule ID 16465 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, // (anyext:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2QZ256rr:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16465, GIR_Done, // Label 802: @23271 GIM_Reject, // Label 783: @23272 GIM_Try, /*On fail goto*//*Label 803*/ 23334, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_Try, /*On fail goto*//*Label 804*/ 23297, // Rule ID 16460 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, // (anyext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2WZ128rr:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16460, GIR_Done, // Label 804: @23297 GIM_Try, /*On fail goto*//*Label 805*/ 23333, // Rule ID 16480 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX_NoBWI, // (anyext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVDWZ256rr:{ *:[v8i16] } (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZ256rr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDWZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16480, GIR_Done, // Label 805: @23333 GIM_Reject, // Label 803: @23334 GIM_Reject, // Label 784: @23335 GIM_Try, /*On fail goto*//*Label 806*/ 23358, // Rule ID 16462 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, // (anyext:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16462, GIR_Done, // Label 806: @23358 GIM_Reject, // Label 785: @23359 GIM_Try, /*On fail goto*//*Label 807*/ 23382, // Rule ID 16464 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, // (anyext:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2QZrr:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16464, GIR_Done, // Label 807: @23382 GIM_Reject, // Label 786: @23383 GIM_Try, /*On fail goto*//*Label 808*/ 23445, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_Try, /*On fail goto*//*Label 809*/ 23408, // Rule ID 16457 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, // (anyext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2BZ128rr:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16457, GIR_Done, // Label 809: @23408 GIM_Try, /*On fail goto*//*Label 810*/ 23444, // Rule ID 16477 // GIM_CheckFeatures, GIFBS_HasDQI_NoBWI, // (anyext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDBZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16477, GIR_Done, // Label 810: @23444 GIM_Reject, // Label 808: @23445 GIM_Reject, // Label 787: @23446 GIM_Try, /*On fail goto*//*Label 811*/ 23508, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_Try, /*On fail goto*//*Label 812*/ 23471, // Rule ID 16459 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, // (anyext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2WZ256rr:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16459, GIR_Done, // Label 812: @23471 GIM_Try, /*On fail goto*//*Label 813*/ 23507, // Rule ID 16478 // GIM_CheckFeatures, GIFBS_HasDQI_NoBWI, // (anyext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVDWZrr:{ *:[v16i16] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDWZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16478, GIR_Done, // Label 813: @23507 GIM_Reject, // Label 811: @23508 GIM_Reject, // Label 788: @23509 GIM_Try, /*On fail goto*//*Label 814*/ 23532, // Rule ID 16461 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, // (anyext:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16461, GIR_Done, // Label 814: @23532 GIM_Reject, // Label 789: @23533 GIM_Try, /*On fail goto*//*Label 815*/ 23556, // Rule ID 16456 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (anyext:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2BZ256rr:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16456, GIR_Done, // Label 815: @23556 GIM_Reject, // Label 790: @23557 GIM_Try, /*On fail goto*//*Label 816*/ 23580, // Rule ID 16458 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (anyext:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2WZrr:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16458, GIR_Done, // Label 816: @23580 GIM_Reject, // Label 791: @23581 GIM_Try, /*On fail goto*//*Label 817*/ 23604, // Rule ID 16455 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, // (anyext:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) => (VPMOVM2BZrr:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16455, GIR_Done, // Label 817: @23604 GIM_Reject, // Label 792: @23605 GIM_Reject, // Label 11: @23606 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 22, /*)*//*default:*//*Label 826*/ 23988, /*GILLT_s8*//*Label 818*/ 23633, /*GILLT_s16*//*Label 819*/ 23712, 0, 0, 0, 0, 0, 0, 0, /*GILLT_v4s32*//*Label 820*/ 23750, 0, 0, /*GILLT_v8s16*//*Label 821*/ 23774, /*GILLT_v8s32*//*Label 822*/ 23821, 0, 0, /*GILLT_v16s8*//*Label 823*/ 23845, /*GILLT_v16s16*//*Label 824*/ 23940, 0, 0, /*GILLT_v32s8*//*Label 825*/ 23964, // Label 818: @23633 GIM_Try, /*On fail goto*//*Label 827*/ 23672, // Rule ID 17183 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (trunc:{ *:[i8] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src, sub_8bit:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR8*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR32*/33, // GIR_Coverage, 17183, GIR_Done, // Label 827: @23672 GIM_Try, /*On fail goto*//*Label 828*/ 23711, // Rule ID 17184 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (trunc:{ *:[i8] } GR16:{ *:[i16] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR16:{ *:[i16] }:$src, sub_8bit:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR8*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR16*/6, // GIR_Coverage, 17184, GIR_Done, // Label 828: @23711 GIM_Reject, // Label 819: @23712 GIM_Try, /*On fail goto*//*Label 829*/ 23749, // Rule ID 17177 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (trunc:{ *:[i16] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src, sub_16bit:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/4, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR16*/6, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR32*/33, // GIR_Coverage, 17177, GIR_Done, // Label 829: @23749 GIM_Reject, // Label 820: @23750 GIM_Try, /*On fail goto*//*Label 830*/ 23773, // Rule ID 10193 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src) => (VPMOVQDZ256rr:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10193, GIR_Done, // Label 830: @23773 GIM_Reject, // Label 821: @23774 GIM_Try, /*On fail goto*//*Label 831*/ 23797, // Rule ID 10169 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src) => (VPMOVQWZrr:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10169, GIR_Done, // Label 831: @23797 GIM_Try, /*On fail goto*//*Label 832*/ 23820, // Rule ID 10247 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src) => (VPMOVDWZ256rr:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10247, GIR_Done, // Label 832: @23820 GIM_Reject, // Label 822: @23821 GIM_Try, /*On fail goto*//*Label 833*/ 23844, // Rule ID 10196 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src) => (VPMOVQDZrr:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10196, GIR_Done, // Label 833: @23844 GIM_Reject, // Label 823: @23845 GIM_Try, /*On fail goto*//*Label 834*/ 23868, // Rule ID 10223 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10223, GIR_Done, // Label 834: @23868 GIM_Try, /*On fail goto*//*Label 835*/ 23891, // Rule ID 10274 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) => (VPMOVWBZ256rr:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVWBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10274, GIR_Done, // Label 835: @23891 GIM_Try, /*On fail goto*//*Label 836*/ 23939, // Rule ID 16453 // GIM_CheckFeatures, GIFBS_HasAVX512_NoBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } (VPMOVZXWDZrr:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVZXWDZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDBZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16453, GIR_Done, // Label 836: @23939 GIM_Reject, // Label 824: @23940 GIM_Try, /*On fail goto*//*Label 837*/ 23963, // Rule ID 10250 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src) => (VPMOVDWZrr:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10250, GIR_Done, // Label 837: @23963 GIM_Reject, // Label 825: @23964 GIM_Try, /*On fail goto*//*Label 838*/ 23987, // Rule ID 10277 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (trunc:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src) => (VPMOVWBZrr:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVWBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10277, GIR_Done, // Label 838: @23987 GIM_Reject, // Label 826: @23988 GIM_Reject, // Label 12: @23989 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 843*/ 24191, /*GILLT_s8*//*Label 839*/ 23999, /*GILLT_s16*//*Label 840*/ 24021, /*GILLT_s32*//*Label 841*/ 24043, /*GILLT_s64*//*Label 842*/ 24140, // Label 839: @23999 GIM_Try, /*On fail goto*//*Label 844*/ 24020, // Rule ID 19 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i8] }):$src => (MOV8ri:{ *:[i8] } (imm:{ *:[i8] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 19, GIR_Done, // Label 844: @24020 GIM_Reject, // Label 840: @24021 GIM_Try, /*On fail goto*//*Label 845*/ 24042, // Rule ID 20 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i16] }):$src => (MOV16ri:{ *:[i16] } (imm:{ *:[i16] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 20, GIR_Done, // Label 845: @24042 GIM_Reject, // Label 841: @24043 GIM_Try, /*On fail goto*//*Label 846*/ 24065, // Rule ID 12846 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // MIs[0] Operand 1 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 0, // 0:{ *:[i32] } => (MOV32r0:{ *:[i32] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12846, GIR_Done, // Label 846: @24065 GIM_Try, /*On fail goto*//*Label 847*/ 24089, // Rule ID 12847 // GIM_CheckFeatures, GIFBS_Not64BitMode_OptForSize, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // MIs[0] Operand 1 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 1, // 1:{ *:[i32] } => (MOV32r1:{ *:[i32] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12847, GIR_Done, // Label 847: @24089 GIM_Try, /*On fail goto*//*Label 848*/ 24113, // Rule ID 12848 // GIM_CheckFeatures, GIFBS_Not64BitMode_OptForSize, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // MIs[0] Operand 1 GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, -1, // -1:{ *:[i32] } => (MOV32r_1:{ *:[i32] }:{ *:[i32] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r_1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12848, GIR_Done, // Label 848: @24113 GIM_Try, /*On fail goto*//*Label 849*/ 24139, // Rule ID 12849 // GIM_CheckFeatures, GIFBS_NotWin64WithoutFP_OptForMinSize, GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i32] })<>:$src => (MOV32ImmSExti8:{ *:[i32] } (imm:{ *:[i32] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32ImmSExti8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12849, GIR_Done, // Label 849: @24139 GIM_Reject, // Label 842: @24140 GIM_Try, /*On fail goto*//*Label 850*/ 24166, // Rule ID 12850 // GIM_CheckFeatures, GIFBS_NotWin64WithoutFP_OptForMinSize, GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i64] })<>:$src => (MOV64ImmSExti8:{ *:[i64] } (imm:{ *:[i64] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ImmSExti8, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12850, GIR_Done, // Label 850: @24166 GIM_Try, /*On fail goto*//*Label 851*/ 24190, // Rule ID 22 // GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, // MIs[0] Operand 1 // No operand predicates // (imm:{ *:[i64] })<>:$src => (MOV64ri32:{ *:[i64] } (imm:{ *:[i64] }):$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ri32, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 22, GIR_Done, // Label 851: @24190 GIM_Reject, // Label 843: @24191 GIM_Reject, // Label 13: @24192 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 855*/ 24338, /*GILLT_s32*//*Label 852*/ 24201, /*GILLT_s64*//*Label 853*/ 24248, /*GILLT_s80*//*Label 854*/ 24295, // Label 852: @24201 GIM_Try, /*On fail goto*//*Label 856*/ 24224, // Rule ID 827 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f32] })<> => (LD_Fp032:{ *:[f32] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp032, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 827, GIR_Done, // Label 856: @24224 GIM_Try, /*On fail goto*//*Label 857*/ 24247, // Rule ID 828 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f32] })<> => (LD_Fp132:{ *:[f32] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp132, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 828, GIR_Done, // Label 857: @24247 GIM_Reject, // Label 853: @24248 GIM_Try, /*On fail goto*//*Label 858*/ 24271, // Rule ID 829 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f64] })<> => (LD_Fp064:{ *:[f64] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp064, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 829, GIR_Done, // Label 858: @24271 GIM_Try, /*On fail goto*//*Label 859*/ 24294, // Rule ID 830 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f64] })<> => (LD_Fp164:{ *:[f64] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp164, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 830, GIR_Done, // Label 859: @24294 GIM_Reject, // Label 854: @24295 GIM_Try, /*On fail goto*//*Label 860*/ 24316, // Rule ID 831 // GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f80] })<> => (LD_Fp080:{ *:[f80] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp080, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 831, GIR_Done, // Label 860: @24316 GIM_Try, /*On fail goto*//*Label 861*/ 24337, // Rule ID 832 // GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, // MIs[0] Operand 1 // No operand predicates // (fpimm:{ *:[f80] })<> => (LD_Fp180:{ *:[f80] }:{ *:[i16] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp180, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 832, GIR_Done, // Label 861: @24337 GIM_Reject, // Label 855: @24338 GIM_Reject, // Label 14: @24339 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 25, /*)*//*default:*//*Label 876*/ 25143, /*GILLT_s32*//*Label 862*/ 24367, /*GILLT_s64*//*Label 863*/ 24410, 0, 0, 0, /*GILLT_v2s64*//*Label 864*/ 24476, 0, /*GILLT_v4s32*//*Label 865*/ 24500, /*GILLT_v4s64*//*Label 866*/ 24524, 0, /*GILLT_v8s16*//*Label 867*/ 24594, /*GILLT_v8s32*//*Label 868*/ 24657, /*GILLT_v8s64*//*Label 869*/ 24727, 0, /*GILLT_v16s8*//*Label 870*/ 24797, /*GILLT_v16s16*//*Label 871*/ 24860, /*GILLT_v16s32*//*Label 872*/ 24978, 0, /*GILLT_v32s8*//*Label 873*/ 25048, /*GILLT_v32s16*//*Label 874*/ 25072, 0, /*GILLT_v64s8*//*Label 875*/ 25119, // Label 862: @24367 GIM_Try, /*On fail goto*//*Label 877*/ 24388, // Rule ID 408 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (sext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVSX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX32rr8, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 408, GIR_Done, // Label 877: @24388 GIM_Try, /*On fail goto*//*Label 878*/ 24409, // Rule ID 410 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (sext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVSX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX32rr16, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 410, GIR_Done, // Label 878: @24409 GIM_Reject, // Label 863: @24410 GIM_Try, /*On fail goto*//*Label 879*/ 24431, // Rule ID 416 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (sext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (MOVSX64rr8:{ *:[i64] } GR8:{ *:[i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr8, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 416, GIR_Done, // Label 879: @24431 GIM_Try, /*On fail goto*//*Label 880*/ 24452, // Rule ID 418 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (sext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (MOVSX64rr16:{ *:[i64] } GR16:{ *:[i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr16, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 418, GIR_Done, // Label 880: @24452 GIM_Try, /*On fail goto*//*Label 881*/ 24475, // Rule ID 420 // GIM_CheckFeatures, GIFBS_In64BitMode, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (MOVSX64rr32:{ *:[i64] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr32, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 420, GIR_Done, // Label 881: @24475 GIM_Reject, // Label 864: @24476 GIM_Try, /*On fail goto*//*Label 882*/ 24499, // Rule ID 10573 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID, // (sext:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) => (VPMOVM2QZ128rr:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10573, GIR_Done, // Label 882: @24499 GIM_Reject, // Label 865: @24500 GIM_Try, /*On fail goto*//*Label 883*/ 24523, // Rule ID 10570 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, // (sext:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2DZ128rr:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10570, GIR_Done, // Label 883: @24523 GIM_Reject, // Label 866: @24524 GIM_Try, /*On fail goto*//*Label 884*/ 24547, // Rule ID 10502 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) => (VPMOVSXDQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10502, GIR_Done, // Label 884: @24547 GIM_Try, /*On fail goto*//*Label 885*/ 24570, // Rule ID 10572 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID, // (sext:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2QZ256rr:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10572, GIR_Done, // Label 885: @24570 GIM_Try, /*On fail goto*//*Label 886*/ 24593, // Rule ID 13676 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sext:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) => (VPMOVSXDQYrr:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXDQYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13676, GIR_Done, // Label 886: @24593 GIM_Reject, // Label 867: @24594 GIM_Try, /*On fail goto*//*Label 887*/ 24656, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_Try, /*On fail goto*//*Label 888*/ 24619, // Rule ID 10567 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, // (sext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2WZ128rr:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10567, GIR_Done, // Label 888: @24619 GIM_Try, /*On fail goto*//*Label 889*/ 24655, // Rule ID 16479 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX_NoBWI, // (sext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVDWZ256rr:{ *:[v8i16] } (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZ256rr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDWZ256rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16479, GIR_Done, // Label 889: @24655 GIM_Reject, // Label 887: @24656 GIM_Reject, // Label 868: @24657 GIM_Try, /*On fail goto*//*Label 890*/ 24680, // Rule ID 10466 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) => (VPMOVSXWDZ256rr:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXWDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10466, GIR_Done, // Label 890: @24680 GIM_Try, /*On fail goto*//*Label 891*/ 24703, // Rule ID 10569 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, // (sext:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10569, GIR_Done, // Label 891: @24703 GIM_Try, /*On fail goto*//*Label 892*/ 24726, // Rule ID 13674 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sext:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) => (VPMOVSXWDYrr:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXWDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13674, GIR_Done, // Label 892: @24726 GIM_Reject, // Label 869: @24727 GIM_Try, /*On fail goto*//*Label 893*/ 24750, // Rule ID 10490 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) => (VPMOVSXWQZrr:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXWQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10490, GIR_Done, // Label 893: @24750 GIM_Try, /*On fail goto*//*Label 894*/ 24773, // Rule ID 10508 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sext:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) => (VPMOVSXDQZrr:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10508, GIR_Done, // Label 894: @24773 GIM_Try, /*On fail goto*//*Label 895*/ 24796, // Rule ID 10571 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID, // (sext:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2QZrr:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10571, GIR_Done, // Label 895: @24796 GIM_Reject, // Label 870: @24797 GIM_Try, /*On fail goto*//*Label 896*/ 24859, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_Try, /*On fail goto*//*Label 897*/ 24822, // Rule ID 10564 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2BZ128rr:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10564, GIR_Done, // Label 897: @24822 GIM_Try, /*On fail goto*//*Label 898*/ 24858, // Rule ID 16475 // GIM_CheckFeatures, GIFBS_HasDQI_NoBWI, // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDBZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16475, GIR_Done, // Label 898: @24858 GIM_Reject, // Label 896: @24859 GIM_Reject, // Label 871: @24860 GIM_Try, /*On fail goto*//*Label 899*/ 24883, // Rule ID 10412 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) => (VPMOVSXBWZ256rr:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXBWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10412, GIR_Done, // Label 899: @24883 GIM_Try, /*On fail goto*//*Label 900*/ 24906, // Rule ID 10566 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2WZ256rr:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10566, GIR_Done, // Label 900: @24906 GIM_Try, /*On fail goto*//*Label 901*/ 24929, // Rule ID 13671 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sext:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) => (VPMOVSXBWYrr:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXBWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13671, GIR_Done, // Label 901: @24929 GIM_Try, /*On fail goto*//*Label 902*/ 24977, // Rule ID 16476 // GIM_CheckFeatures, GIFBS_HasDQI_NoBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVDWZrr:{ *:[v16i16] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDWZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16476, GIR_Done, // Label 902: @24977 GIM_Reject, // Label 872: @24978 GIM_Try, /*On fail goto*//*Label 903*/ 25001, // Rule ID 10436 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sext:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) => (VPMOVSXBDZrr:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXBDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10436, GIR_Done, // Label 903: @25001 GIM_Try, /*On fail goto*//*Label 904*/ 25024, // Rule ID 10472 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sext:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) => (VPMOVSXWDZrr:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXWDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10472, GIR_Done, // Label 904: @25024 GIM_Try, /*On fail goto*//*Label 905*/ 25047, // Rule ID 10568 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID, // (sext:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10568, GIR_Done, // Label 905: @25047 GIM_Reject, // Label 873: @25048 GIM_Try, /*On fail goto*//*Label 906*/ 25071, // Rule ID 10563 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (sext:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2BZ256rr:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10563, GIR_Done, // Label 906: @25071 GIM_Reject, // Label 874: @25072 GIM_Try, /*On fail goto*//*Label 907*/ 25095, // Rule ID 10418 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sext:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) => (VPMOVSXBWZrr:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVSXBWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10418, GIR_Done, // Label 907: @25095 GIM_Try, /*On fail goto*//*Label 908*/ 25118, // Rule ID 10565 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID, // (sext:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2WZrr:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10565, GIR_Done, // Label 908: @25118 GIM_Reject, // Label 875: @25119 GIM_Try, /*On fail goto*//*Label 909*/ 25142, // Rule ID 10562 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID, // (sext:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) => (VPMOVM2BZrr:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10562, GIR_Done, // Label 909: @25142 GIM_Reject, // Label 876: @25143 GIM_Reject, // Label 15: @25144 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 23, /*)*//*default:*//*Label 918*/ 25876, /*GILLT_s32*//*Label 910*/ 25170, /*GILLT_s64*//*Label 911*/ 25301, 0, 0, 0, 0, 0, 0, /*GILLT_v4s64*//*Label 912*/ 25620, 0, 0, /*GILLT_v8s32*//*Label 913*/ 25666, /*GILLT_v8s64*//*Label 914*/ 25712, 0, 0, /*GILLT_v16s16*//*Label 915*/ 25759, /*GILLT_v16s32*//*Label 916*/ 25805, 0, 0, /*GILLT_v32s16*//*Label 917*/ 25852, // Label 910: @25170 GIM_Try, /*On fail goto*//*Label 919*/ 25213, // Rule ID 14537 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (zext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (KMOVWrk:{ *:[i32] } VK16:{ *:[v16i1] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVWrk, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14537, GIR_Done, // Label 919: @25213 GIM_Try, /*On fail goto*//*Label 920*/ 25258, // Rule ID 14540 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (zext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (KMOVBrk:{ *:[i32] } VK8:{ *:[v8i1] }:$src) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVBrk, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 14540, GIR_Done, // Label 920: @25258 GIM_Try, /*On fail goto*//*Label 921*/ 25279, // Rule ID 412 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (zext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 412, GIR_Done, // Label 921: @25279 GIM_Try, /*On fail goto*//*Label 922*/ 25300, // Rule ID 414 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (zext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr16, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 414, GIR_Done, // Label 922: @25300 GIM_Reject, // Label 911: @25301 GIM_Try, /*On fail goto*//*Label 923*/ 25372, // Rule ID 14538 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (zext:{ *:[i64] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (KMOVWrk:{ *:[i32] } VK16:{ *:[v16i1] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KMOVWrk, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/65, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GR32*/33, // GIR_Coverage, 14538, GIR_Done, // Label 923: @25372 GIM_Try, /*On fail goto*//*Label 924*/ 25445, // Rule ID 14541 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST, GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1, GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID, GIM_CheckIsSafeToFold, /*InsnID*/1, // (zext:{ *:[i64] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (KMOVBrk:{ *:[i32] } VK8:{ *:[v8i1] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KMOVBrk, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/65, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GR32*/33, // GIR_Coverage, 14541, GIR_Done, // Label 924: @25445 GIM_Try, /*On fail goto*//*Label 925*/ 25503, // Rule ID 13056 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, // (zext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr8, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/65, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GR32*/33, // GIR_Coverage, 13056, GIR_Done, // Label 925: @25503 GIM_Try, /*On fail goto*//*Label 926*/ 25561, // Rule ID 13058 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (zext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr16, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/65, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GR32*/33, // GIR_Coverage, 13058, GIR_Done, // Label 926: @25561 GIM_Try, /*On fail goto*//*Label 927*/ 25619, // Rule ID 13060 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (zext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (SUBREG_TO_REG:{ *:[i64] } 0:{ *:[i64] }, (MOV32rr:{ *:[i32] } GR32:{ *:[i32] }:$src), sub_32bit:{ *:[i32] }) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOV32rr, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::SUBREG_TO_REG, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddImm, /*InsnID*/0, /*Imm*/0, GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_AddImm, /*InsnID*/0, /*Imm*/6, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/65, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GR32*/33, // GIR_Coverage, 13060, GIR_Done, // Label 927: @25619 GIM_Reject, // Label 912: @25620 GIM_Try, /*On fail goto*//*Label 928*/ 25665, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 929*/ 25645, // Rule ID 10394 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) => (VPMOVZXDQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXDQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10394, GIR_Done, // Label 929: @25645 GIM_Try, /*On fail goto*//*Label 930*/ 25664, // Rule ID 13697 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (zext:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) => (VPMOVZXDQYrr:{ *:[v4i64] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXDQYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13697, GIR_Done, // Label 930: @25664 GIM_Reject, // Label 928: @25665 GIM_Reject, // Label 913: @25666 GIM_Try, /*On fail goto*//*Label 931*/ 25711, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 932*/ 25691, // Rule ID 10358 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) => (VPMOVZXWDZ256rr:{ *:[v8i32] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXWDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10358, GIR_Done, // Label 932: @25691 GIM_Try, /*On fail goto*//*Label 933*/ 25710, // Rule ID 13695 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (zext:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) => (VPMOVZXWDYrr:{ *:[v8i32] } VR128:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXWDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13695, GIR_Done, // Label 933: @25710 GIM_Reject, // Label 931: @25711 GIM_Reject, // Label 914: @25712 GIM_Try, /*On fail goto*//*Label 934*/ 25735, // Rule ID 10382 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) => (VPMOVZXWQZrr:{ *:[v8i64] } VR128X:{ *:[v8i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXWQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10382, GIR_Done, // Label 934: @25735 GIM_Try, /*On fail goto*//*Label 935*/ 25758, // Rule ID 10400 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (zext:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) => (VPMOVZXDQZrr:{ *:[v8i64] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXDQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10400, GIR_Done, // Label 935: @25758 GIM_Reject, // Label 915: @25759 GIM_Try, /*On fail goto*//*Label 936*/ 25804, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 937*/ 25784, // Rule ID 10304 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) => (VPMOVZXBWZ256rr:{ *:[v16i16] } VR128X:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXBWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10304, GIR_Done, // Label 937: @25784 GIM_Try, /*On fail goto*//*Label 938*/ 25803, // Rule ID 13692 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (zext:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) => (VPMOVZXBWYrr:{ *:[v16i16] } VR128:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXBWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13692, GIR_Done, // Label 938: @25803 GIM_Reject, // Label 936: @25804 GIM_Reject, // Label 916: @25805 GIM_Try, /*On fail goto*//*Label 939*/ 25828, // Rule ID 10328 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (zext:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) => (VPMOVZXBDZrr:{ *:[v16i32] } VR128X:{ *:[v16i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXBDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10328, GIR_Done, // Label 939: @25828 GIM_Try, /*On fail goto*//*Label 940*/ 25851, // Rule ID 10364 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (zext:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) => (VPMOVZXWDZrr:{ *:[v16i32] } VR256X:{ *:[v16i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXWDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10364, GIR_Done, // Label 940: @25851 GIM_Reject, // Label 917: @25852 GIM_Try, /*On fail goto*//*Label 941*/ 25875, // Rule ID 10310 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (zext:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) => (VPMOVZXBWZrr:{ *:[v32i16] } VR256X:{ *:[v32i8] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVZXBWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10310, GIR_Done, // Label 941: @25875 GIM_Reject, // Label 918: @25876 GIM_Reject, // Label 16: @25877 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 946*/ 26469, /*GILLT_s8*//*Label 942*/ 25887, /*GILLT_s16*//*Label 943*/ 25996, /*GILLT_s32*//*Label 944*/ 26105, /*GILLT_s64*//*Label 945*/ 26287, // Label 942: @25887 GIM_Try, /*On fail goto*//*Label 947*/ 25995, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 948*/ 25931, // Rule ID 17199 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17199, GIR_Done, // Label 948: @25931 GIM_Try, /*On fail goto*//*Label 949*/ 25961, // Rule ID 456 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 456, GIR_Done, // Label 949: @25961 GIM_Try, /*On fail goto*//*Label 950*/ 25994, // Rule ID 452 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SHL8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL8rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 452, GIR_Done, // Label 950: @25994 GIM_Reject, // Label 947: @25995 GIM_Reject, // Label 943: @25996 GIM_Try, /*On fail goto*//*Label 951*/ 26104, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 952*/ 26040, // Rule ID 17200 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17200, GIR_Done, // Label 952: @26040 GIM_Try, /*On fail goto*//*Label 953*/ 26070, // Rule ID 457 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 457, GIR_Done, // Label 953: @26070 GIM_Try, /*On fail goto*//*Label 954*/ 26103, // Rule ID 453 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SHL16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL16rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 453, GIR_Done, // Label 954: @26103 GIM_Reject, // Label 951: @26104 GIM_Reject, // Label 944: @26105 GIM_Try, /*On fail goto*//*Label 955*/ 26286, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 956*/ 26149, // Rule ID 17201 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17201, GIR_Done, // Label 956: @26149 GIM_Try, /*On fail goto*//*Label 957*/ 26179, // Rule ID 458 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 458, GIR_Done, // Label 957: @26179 GIM_Try, /*On fail goto*//*Label 958*/ 26252, // Rule ID 13090 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SHLX32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLX32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13090, GIR_Done, // Label 958: @26252 GIM_Try, /*On fail goto*//*Label 959*/ 26285, // Rule ID 454 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHL32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL32rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 454, GIR_Done, // Label 959: @26285 GIM_Reject, // Label 955: @26286 GIM_Reject, // Label 945: @26287 GIM_Try, /*On fail goto*//*Label 960*/ 26468, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 961*/ 26331, // Rule ID 17202 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17202, GIR_Done, // Label 961: @26331 GIM_Try, /*On fail goto*//*Label 962*/ 26361, // Rule ID 459 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 459, GIR_Done, // Label 962: @26361 GIM_Try, /*On fail goto*//*Label 963*/ 26434, // Rule ID 13091 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SHLX64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHLX64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13091, GIR_Done, // Label 963: @26434 GIM_Try, /*On fail goto*//*Label 964*/ 26467, // Rule ID 455 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHL64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL64rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 455, GIR_Done, // Label 964: @26467 GIM_Reject, // Label 960: @26468 GIM_Reject, // Label 946: @26469 GIM_Reject, // Label 17: @26470 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 969*/ 27046, /*GILLT_s8*//*Label 965*/ 26480, /*GILLT_s16*//*Label 966*/ 26585, /*GILLT_s32*//*Label 967*/ 26690, /*GILLT_s64*//*Label 968*/ 26868, // Label 965: @26480 GIM_Try, /*On fail goto*//*Label 970*/ 26584, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 971*/ 26520, // Rule ID 480 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (SHR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 480, GIR_Done, // Label 971: @26520 GIM_Try, /*On fail goto*//*Label 972*/ 26550, // Rule ID 476 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 476, GIR_Done, // Label 972: @26550 GIM_Try, /*On fail goto*//*Label 973*/ 26583, // Rule ID 472 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SHR8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 472, GIR_Done, // Label 973: @26583 GIM_Reject, // Label 970: @26584 GIM_Reject, // Label 966: @26585 GIM_Try, /*On fail goto*//*Label 974*/ 26689, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 975*/ 26625, // Rule ID 481 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (SHR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 481, GIR_Done, // Label 975: @26625 GIM_Try, /*On fail goto*//*Label 976*/ 26655, // Rule ID 477 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 477, GIR_Done, // Label 976: @26655 GIM_Try, /*On fail goto*//*Label 977*/ 26688, // Rule ID 473 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SHR16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 473, GIR_Done, // Label 977: @26688 GIM_Reject, // Label 974: @26689 GIM_Reject, // Label 967: @26690 GIM_Try, /*On fail goto*//*Label 978*/ 26867, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 979*/ 26730, // Rule ID 482 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (SHR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 482, GIR_Done, // Label 979: @26730 GIM_Try, /*On fail goto*//*Label 980*/ 26760, // Rule ID 478 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 478, GIR_Done, // Label 980: @26760 GIM_Try, /*On fail goto*//*Label 981*/ 26833, // Rule ID 13088 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SHRX32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRX32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13088, GIR_Done, // Label 981: @26833 GIM_Try, /*On fail goto*//*Label 982*/ 26866, // Rule ID 474 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SHR32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 474, GIR_Done, // Label 982: @26866 GIM_Reject, // Label 978: @26867 GIM_Reject, // Label 968: @26868 GIM_Try, /*On fail goto*//*Label 983*/ 27045, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 984*/ 26908, // Rule ID 483 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (SHR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 483, GIR_Done, // Label 984: @26908 GIM_Try, /*On fail goto*//*Label 985*/ 26938, // Rule ID 479 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 479, GIR_Done, // Label 985: @26938 GIM_Try, /*On fail goto*//*Label 986*/ 27011, // Rule ID 13089 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SHRX64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHRX64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13089, GIR_Done, // Label 986: @27011 GIM_Try, /*On fail goto*//*Label 987*/ 27044, // Rule ID 475 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SHR64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 475, GIR_Done, // Label 987: @27044 GIM_Reject, // Label 983: @27045 GIM_Reject, // Label 969: @27046 GIM_Reject, // Label 18: @27047 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 992*/ 27623, /*GILLT_s8*//*Label 988*/ 27057, /*GILLT_s16*//*Label 989*/ 27162, /*GILLT_s32*//*Label 990*/ 27267, /*GILLT_s64*//*Label 991*/ 27445, // Label 988: @27057 GIM_Try, /*On fail goto*//*Label 993*/ 27161, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, GIM_Try, /*On fail goto*//*Label 994*/ 27097, // Rule ID 504 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (SAR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 504, GIR_Done, // Label 994: @27097 GIM_Try, /*On fail goto*//*Label 995*/ 27127, // Rule ID 500 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 500, GIR_Done, // Label 995: @27127 GIM_Try, /*On fail goto*//*Label 996*/ 27160, // Rule ID 496 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, CL:{ *:[i8] }) => (SAR8rCL:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 496, GIR_Done, // Label 996: @27160 GIM_Reject, // Label 993: @27161 GIM_Reject, // Label 989: @27162 GIM_Try, /*On fail goto*//*Label 997*/ 27266, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, GIM_Try, /*On fail goto*//*Label 998*/ 27202, // Rule ID 505 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (SAR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 505, GIR_Done, // Label 998: @27202 GIM_Try, /*On fail goto*//*Label 999*/ 27232, // Rule ID 501 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 501, GIR_Done, // Label 999: @27232 GIM_Try, /*On fail goto*//*Label 1000*/ 27265, // Rule ID 497 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, CL:{ *:[i8] }) => (SAR16rCL:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 497, GIR_Done, // Label 1000: @27265 GIM_Reject, // Label 997: @27266 GIM_Reject, // Label 990: @27267 GIM_Try, /*On fail goto*//*Label 1001*/ 27444, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, GIM_Try, /*On fail goto*//*Label 1002*/ 27307, // Rule ID 506 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (SAR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 506, GIR_Done, // Label 1002: @27307 GIM_Try, /*On fail goto*//*Label 1003*/ 27337, // Rule ID 502 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 502, GIR_Done, // Label 1003: @27337 GIM_Try, /*On fail goto*//*Label 1004*/ 27410, // Rule ID 13086 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (SARX32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, (INSERT_SUBREG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC LOW32_ADDR_ACCESS_RBP_with_sub_8bit*/30, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SARX32rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13086, GIR_Done, // Label 1004: @27410 GIM_Try, /*On fail goto*//*Label 1005*/ 27443, // Rule ID 498 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, CL:{ *:[i8] }) => (SAR32rCL:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 498, GIR_Done, // Label 1005: @27443 GIM_Reject, // Label 1001: @27444 GIM_Reject, // Label 991: @27445 GIM_Try, /*On fail goto*//*Label 1006*/ 27622, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, GIM_Try, /*On fail goto*//*Label 1007*/ 27485, // Rule ID 507 // GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (SAR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64r1, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 507, GIR_Done, // Label 1007: @27485 GIM_Try, /*On fail goto*//*Label 1008*/ 27515, // Rule ID 503 // GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, // MIs[1] Operand 1 // No operand predicates GIM_CheckIsSafeToFold, /*InsnID*/1, // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 503, GIR_Done, // Label 1008: @27515 GIM_Try, /*On fail goto*//*Label 1009*/ 27588, // Rule ID 13087 // GIM_CheckFeatures, GIFBS_HasBMI2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR8:{ *:[i8] }:$src2) => (SARX64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, (INSERT_SUBREG:{ *:[i64] } (IMPLICIT_DEF:{ *:[i64] }), GR8:{ *:[i8] }:$src2, sub_8bit:{ *:[i32] })) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/2, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::INSERT_SUBREG, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // src2 GIR_AddImm, /*InsnID*/1, /*Imm*/1, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR64_with_sub_8bit*/68, GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/2, /*RC GR8*/0, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SARX64rr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13087, GIR_Done, // Label 1009: @27588 GIM_Try, /*On fail goto*//*Label 1010*/ 27621, // Rule ID 499 // GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8_ABCD_LRegClassID, // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, CL:{ *:[i8] }) => (SAR64rCL:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1) GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY, GIR_AddRegister, /*InsnID*/1, X86::CL, /*AddRegisterRegFlags*/RegState::Define, GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // CL GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64rCL, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 499, GIR_Done, // Label 1010: @27621 GIM_Reject, // Label 1006: @27622 GIM_Reject, // Label 992: @27623 GIM_Reject, // Label 19: @27624 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/13, 23, /*)*//*default:*//*Label 1014*/ 27811, /*GILLT_v8s16*//*Label 1011*/ 27640, 0, 0, 0, 0, /*GILLT_v16s16*//*Label 1012*/ 27721, 0, 0, 0, /*GILLT_v32s16*//*Label 1013*/ 27779, // Label 1011: @27640 GIM_Try, /*On fail goto*//*Label 1015*/ 27720, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1016*/ 27673, // Rule ID 2035 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mulhu:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULHUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2035, GIR_Done, // Label 1016: @27673 GIM_Try, /*On fail goto*//*Label 1017*/ 27696, // Rule ID 2037 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mulhu:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULHUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULHUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2037, GIR_Done, // Label 1017: @27696 GIM_Try, /*On fail goto*//*Label 1018*/ 27719, // Rule ID 4321 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mulhu:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULHUWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4321, GIR_Done, // Label 1018: @27719 GIM_Reject, // Label 1015: @27720 GIM_Reject, // Label 1012: @27721 GIM_Try, /*On fail goto*//*Label 1019*/ 27778, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1020*/ 27754, // Rule ID 2039 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (mulhu:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULHUWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2039, GIR_Done, // Label 1020: @27754 GIM_Try, /*On fail goto*//*Label 1021*/ 27777, // Rule ID 4315 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mulhu:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULHUWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4315, GIR_Done, // Label 1021: @27777 GIM_Reject, // Label 1019: @27778 GIM_Reject, // Label 1013: @27779 GIM_Try, /*On fail goto*//*Label 1022*/ 27810, // Rule ID 4309 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mulhu:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULHUWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHUWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4309, GIR_Done, // Label 1022: @27810 GIM_Reject, // Label 1014: @27811 GIM_Reject, // Label 20: @27812 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/13, 23, /*)*//*default:*//*Label 1026*/ 27999, /*GILLT_v8s16*//*Label 1023*/ 27828, 0, 0, 0, 0, /*GILLT_v16s16*//*Label 1024*/ 27909, 0, 0, 0, /*GILLT_v32s16*//*Label 1025*/ 27967, // Label 1023: @27828 GIM_Try, /*On fail goto*//*Label 1027*/ 27908, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1028*/ 27861, // Rule ID 2041 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mulhs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULHWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2041, GIR_Done, // Label 1028: @27861 GIM_Try, /*On fail goto*//*Label 1029*/ 27884, // Rule ID 2043 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (mulhs:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULHWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULHWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2043, GIR_Done, // Label 1029: @27884 GIM_Try, /*On fail goto*//*Label 1030*/ 27907, // Rule ID 4303 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (mulhs:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULHWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4303, GIR_Done, // Label 1030: @27907 GIM_Reject, // Label 1027: @27908 GIM_Reject, // Label 1024: @27909 GIM_Try, /*On fail goto*//*Label 1031*/ 27966, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1032*/ 27942, // Rule ID 2045 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (mulhs:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULHWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2045, GIR_Done, // Label 1032: @27942 GIM_Try, /*On fail goto*//*Label 1033*/ 27965, // Rule ID 4297 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (mulhs:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULHWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4297, GIR_Done, // Label 1033: @27965 GIM_Reject, // Label 1031: @27966 GIM_Reject, // Label 1025: @27967 GIM_Try, /*On fail goto*//*Label 1034*/ 27998, // Rule ID 4291 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (mulhs:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULHWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULHWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4291, GIR_Done, // Label 1034: @27998 GIM_Reject, // Label 1026: @27999 GIM_Reject, // Label 21: @28000 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1044*/ 28675, /*GILLT_s32*//*Label 1035*/ 28023, /*GILLT_s64*//*Label 1036*/ 28142, /*GILLT_s80*//*Label 1037*/ 28261, 0, 0, /*GILLT_v2s64*//*Label 1038*/ 28297, 0, /*GILLT_v4s32*//*Label 1039*/ 28387, /*GILLT_v4s64*//*Label 1040*/ 28477, 0, 0, /*GILLT_v8s32*//*Label 1041*/ 28541, /*GILLT_v8s64*//*Label 1042*/ 28605, 0, 0, 0, /*GILLT_v16s32*//*Label 1043*/ 28640, // Label 1035: @28023 GIM_Try, /*On fail goto*//*Label 1045*/ 28141, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1046*/ 28062, // Rule ID 606 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (fadd:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (ADD_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 606, GIR_Done, // Label 1046: @28062 GIM_Try, /*On fail goto*//*Label 1047*/ 28088, // Rule ID 1674 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1674, GIR_Done, // Label 1047: @28088 GIM_Try, /*On fail goto*//*Label 1048*/ 28114, // Rule ID 1682 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (ADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1682, GIR_Done, // Label 1048: @28114 GIM_Try, /*On fail goto*//*Label 1049*/ 28140, // Rule ID 5171 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (fadd:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VADDSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5171, GIR_Done, // Label 1049: @28140 GIM_Reject, // Label 1045: @28141 GIM_Reject, // Label 1036: @28142 GIM_Try, /*On fail goto*//*Label 1050*/ 28260, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1051*/ 28181, // Rule ID 608 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (fadd:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (ADD_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 608, GIR_Done, // Label 1051: @28181 GIM_Try, /*On fail goto*//*Label 1052*/ 28207, // Rule ID 1678 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1678, GIR_Done, // Label 1052: @28207 GIM_Try, /*On fail goto*//*Label 1053*/ 28233, // Rule ID 1686 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (ADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1686, GIR_Done, // Label 1053: @28233 GIM_Try, /*On fail goto*//*Label 1054*/ 28259, // Rule ID 5184 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (fadd:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VADDSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5184, GIR_Done, // Label 1054: @28259 GIM_Reject, // Label 1050: @28260 GIM_Reject, // Label 1037: @28261 GIM_Try, /*On fail goto*//*Label 1055*/ 28296, // Rule ID 610 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (fadd:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (ADD_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 610, GIR_Done, // Label 1055: @28296 GIM_Reject, // Label 1038: @28297 GIM_Try, /*On fail goto*//*Label 1056*/ 28386, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1057*/ 28333, // Rule ID 1654 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1654, GIR_Done, // Label 1057: @28333 GIM_Try, /*On fail goto*//*Label 1058*/ 28359, // Rule ID 1670 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (ADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1670, GIR_Done, // Label 1058: @28359 GIM_Try, /*On fail goto*//*Label 1059*/ 28385, // Rule ID 5393 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fadd:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VADDPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5393, GIR_Done, // Label 1059: @28385 GIM_Reject, // Label 1056: @28386 GIM_Reject, // Label 1039: @28387 GIM_Try, /*On fail goto*//*Label 1060*/ 28476, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1061*/ 28423, // Rule ID 1650 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1650, GIR_Done, // Label 1061: @28423 GIM_Try, /*On fail goto*//*Label 1062*/ 28449, // Rule ID 1666 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (ADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1666, GIR_Done, // Label 1062: @28449 GIM_Try, /*On fail goto*//*Label 1063*/ 28475, // Rule ID 5357 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fadd:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VADDPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5357, GIR_Done, // Label 1063: @28475 GIM_Reject, // Label 1060: @28476 GIM_Reject, // Label 1040: @28477 GIM_Try, /*On fail goto*//*Label 1064*/ 28540, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1065*/ 28513, // Rule ID 1662 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fadd:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VADDPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1662, GIR_Done, // Label 1065: @28513 GIM_Try, /*On fail goto*//*Label 1066*/ 28539, // Rule ID 5411 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fadd:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VADDPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5411, GIR_Done, // Label 1066: @28539 GIM_Reject, // Label 1064: @28540 GIM_Reject, // Label 1041: @28541 GIM_Try, /*On fail goto*//*Label 1067*/ 28604, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1068*/ 28577, // Rule ID 1658 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fadd:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VADDPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1658, GIR_Done, // Label 1068: @28577 GIM_Try, /*On fail goto*//*Label 1069*/ 28603, // Rule ID 5375 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fadd:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VADDPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5375, GIR_Done, // Label 1069: @28603 GIM_Reject, // Label 1067: @28604 GIM_Reject, // Label 1042: @28605 GIM_Try, /*On fail goto*//*Label 1070*/ 28639, // Rule ID 5339 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fadd:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VADDPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5339, GIR_Done, // Label 1070: @28639 GIM_Reject, // Label 1043: @28640 GIM_Try, /*On fail goto*//*Label 1071*/ 28674, // Rule ID 5321 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fadd:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VADDPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5321, GIR_Done, // Label 1071: @28674 GIM_Reject, // Label 1044: @28675 GIM_Reject, // Label 22: @28676 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1081*/ 29351, /*GILLT_s32*//*Label 1072*/ 28699, /*GILLT_s64*//*Label 1073*/ 28818, /*GILLT_s80*//*Label 1074*/ 28937, 0, 0, /*GILLT_v2s64*//*Label 1075*/ 28973, 0, /*GILLT_v4s32*//*Label 1076*/ 29063, /*GILLT_v4s64*//*Label 1077*/ 29153, 0, 0, /*GILLT_v8s32*//*Label 1078*/ 29217, /*GILLT_v8s64*//*Label 1079*/ 29281, 0, 0, 0, /*GILLT_v16s32*//*Label 1080*/ 29316, // Label 1072: @28699 GIM_Try, /*On fail goto*//*Label 1082*/ 28817, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1083*/ 28738, // Rule ID 612 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (fsub:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (SUB_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 612, GIR_Done, // Label 1083: @28738 GIM_Try, /*On fail goto*//*Label 1084*/ 28764, // Rule ID 1754 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VSUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1754, GIR_Done, // Label 1084: @28764 GIM_Try, /*On fail goto*//*Label 1085*/ 28790, // Rule ID 1762 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (SUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1762, GIR_Done, // Label 1085: @28790 GIM_Try, /*On fail goto*//*Label 1086*/ 28816, // Rule ID 5223 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (fsub:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VSUBSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5223, GIR_Done, // Label 1086: @28816 GIM_Reject, // Label 1082: @28817 GIM_Reject, // Label 1073: @28818 GIM_Try, /*On fail goto*//*Label 1087*/ 28936, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1088*/ 28857, // Rule ID 614 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (fsub:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (SUB_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 614, GIR_Done, // Label 1088: @28857 GIM_Try, /*On fail goto*//*Label 1089*/ 28883, // Rule ID 1758 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VSUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1758, GIR_Done, // Label 1089: @28883 GIM_Try, /*On fail goto*//*Label 1090*/ 28909, // Rule ID 1766 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (SUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1766, GIR_Done, // Label 1090: @28909 GIM_Try, /*On fail goto*//*Label 1091*/ 28935, // Rule ID 5236 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (fsub:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VSUBSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5236, GIR_Done, // Label 1091: @28935 GIM_Reject, // Label 1087: @28936 GIM_Reject, // Label 1074: @28937 GIM_Try, /*On fail goto*//*Label 1092*/ 28972, // Rule ID 616 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (fsub:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (SUB_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 616, GIR_Done, // Label 1092: @28972 GIM_Reject, // Label 1075: @28973 GIM_Try, /*On fail goto*//*Label 1093*/ 29062, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1094*/ 29009, // Rule ID 1734 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VSUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1734, GIR_Done, // Label 1094: @29009 GIM_Try, /*On fail goto*//*Label 1095*/ 29035, // Rule ID 1750 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (SUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1750, GIR_Done, // Label 1095: @29035 GIM_Try, /*On fail goto*//*Label 1096*/ 29061, // Rule ID 5621 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fsub:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VSUBPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5621, GIR_Done, // Label 1096: @29061 GIM_Reject, // Label 1093: @29062 GIM_Reject, // Label 1076: @29063 GIM_Try, /*On fail goto*//*Label 1097*/ 29152, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1098*/ 29099, // Rule ID 1730 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VSUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1730, GIR_Done, // Label 1098: @29099 GIM_Try, /*On fail goto*//*Label 1099*/ 29125, // Rule ID 1746 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (SUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1746, GIR_Done, // Label 1099: @29125 GIM_Try, /*On fail goto*//*Label 1100*/ 29151, // Rule ID 5585 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fsub:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VSUBPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5585, GIR_Done, // Label 1100: @29151 GIM_Reject, // Label 1097: @29152 GIM_Reject, // Label 1077: @29153 GIM_Try, /*On fail goto*//*Label 1101*/ 29216, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1102*/ 29189, // Rule ID 1742 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fsub:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VSUBPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1742, GIR_Done, // Label 1102: @29189 GIM_Try, /*On fail goto*//*Label 1103*/ 29215, // Rule ID 5639 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fsub:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VSUBPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5639, GIR_Done, // Label 1103: @29215 GIM_Reject, // Label 1101: @29216 GIM_Reject, // Label 1078: @29217 GIM_Try, /*On fail goto*//*Label 1104*/ 29280, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1105*/ 29253, // Rule ID 1738 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fsub:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VSUBPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1738, GIR_Done, // Label 1105: @29253 GIM_Try, /*On fail goto*//*Label 1106*/ 29279, // Rule ID 5603 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fsub:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VSUBPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5603, GIR_Done, // Label 1106: @29279 GIM_Reject, // Label 1104: @29280 GIM_Reject, // Label 1079: @29281 GIM_Try, /*On fail goto*//*Label 1107*/ 29315, // Rule ID 5567 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fsub:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VSUBPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5567, GIR_Done, // Label 1107: @29315 GIM_Reject, // Label 1080: @29316 GIM_Try, /*On fail goto*//*Label 1108*/ 29350, // Rule ID 5549 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fsub:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VSUBPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5549, GIR_Done, // Label 1108: @29350 GIM_Reject, // Label 1081: @29351 GIM_Reject, // Label 23: @29352 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1118*/ 30027, /*GILLT_s32*//*Label 1109*/ 29375, /*GILLT_s64*//*Label 1110*/ 29494, /*GILLT_s80*//*Label 1111*/ 29613, 0, 0, /*GILLT_v2s64*//*Label 1112*/ 29649, 0, /*GILLT_v4s32*//*Label 1113*/ 29739, /*GILLT_v4s64*//*Label 1114*/ 29829, 0, 0, /*GILLT_v8s32*//*Label 1115*/ 29893, /*GILLT_v8s64*//*Label 1116*/ 29957, 0, 0, 0, /*GILLT_v16s32*//*Label 1117*/ 29992, // Label 1109: @29375 GIM_Try, /*On fail goto*//*Label 1119*/ 29493, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1120*/ 29414, // Rule ID 618 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (fmul:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (MUL_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 618, GIR_Done, // Label 1120: @29414 GIM_Try, /*On fail goto*//*Label 1121*/ 29440, // Rule ID 1714 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VMULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1714, GIR_Done, // Label 1121: @29440 GIM_Try, /*On fail goto*//*Label 1122*/ 29466, // Rule ID 1722 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (MULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1722, GIR_Done, // Label 1122: @29466 GIM_Try, /*On fail goto*//*Label 1123*/ 29492, // Rule ID 5197 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (fmul:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VMULSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5197, GIR_Done, // Label 1123: @29492 GIM_Reject, // Label 1119: @29493 GIM_Reject, // Label 1110: @29494 GIM_Try, /*On fail goto*//*Label 1124*/ 29612, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1125*/ 29533, // Rule ID 620 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (fmul:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (MUL_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 620, GIR_Done, // Label 1125: @29533 GIM_Try, /*On fail goto*//*Label 1126*/ 29559, // Rule ID 1718 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VMULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1718, GIR_Done, // Label 1126: @29559 GIM_Try, /*On fail goto*//*Label 1127*/ 29585, // Rule ID 1726 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (MULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1726, GIR_Done, // Label 1127: @29585 GIM_Try, /*On fail goto*//*Label 1128*/ 29611, // Rule ID 5210 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (fmul:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VMULSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5210, GIR_Done, // Label 1128: @29611 GIM_Reject, // Label 1124: @29612 GIM_Reject, // Label 1111: @29613 GIM_Try, /*On fail goto*//*Label 1129*/ 29648, // Rule ID 622 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (fmul:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (MUL_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 622, GIR_Done, // Label 1129: @29648 GIM_Reject, // Label 1112: @29649 GIM_Try, /*On fail goto*//*Label 1130*/ 29738, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1131*/ 29685, // Rule ID 1694 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VMULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1694, GIR_Done, // Label 1131: @29685 GIM_Try, /*On fail goto*//*Label 1132*/ 29711, // Rule ID 1710 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (MULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1710, GIR_Done, // Label 1132: @29711 GIM_Try, /*On fail goto*//*Label 1133*/ 29737, // Rule ID 5507 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fmul:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VMULPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5507, GIR_Done, // Label 1133: @29737 GIM_Reject, // Label 1130: @29738 GIM_Reject, // Label 1113: @29739 GIM_Try, /*On fail goto*//*Label 1134*/ 29828, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1135*/ 29775, // Rule ID 1690 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VMULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1690, GIR_Done, // Label 1135: @29775 GIM_Try, /*On fail goto*//*Label 1136*/ 29801, // Rule ID 1706 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (MULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1706, GIR_Done, // Label 1136: @29801 GIM_Try, /*On fail goto*//*Label 1137*/ 29827, // Rule ID 5471 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fmul:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VMULPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5471, GIR_Done, // Label 1137: @29827 GIM_Reject, // Label 1134: @29828 GIM_Reject, // Label 1114: @29829 GIM_Try, /*On fail goto*//*Label 1138*/ 29892, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1139*/ 29865, // Rule ID 1702 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fmul:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VMULPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1702, GIR_Done, // Label 1139: @29865 GIM_Try, /*On fail goto*//*Label 1140*/ 29891, // Rule ID 5525 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fmul:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VMULPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5525, GIR_Done, // Label 1140: @29891 GIM_Reject, // Label 1138: @29892 GIM_Reject, // Label 1115: @29893 GIM_Try, /*On fail goto*//*Label 1141*/ 29956, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1142*/ 29929, // Rule ID 1698 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fmul:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VMULPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1698, GIR_Done, // Label 1142: @29929 GIM_Try, /*On fail goto*//*Label 1143*/ 29955, // Rule ID 5489 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fmul:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VMULPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5489, GIR_Done, // Label 1143: @29955 GIM_Reject, // Label 1141: @29956 GIM_Reject, // Label 1116: @29957 GIM_Try, /*On fail goto*//*Label 1144*/ 29991, // Rule ID 5453 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fmul:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VMULPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5453, GIR_Done, // Label 1144: @29991 GIM_Reject, // Label 1117: @29992 GIM_Try, /*On fail goto*//*Label 1145*/ 30026, // Rule ID 5435 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fmul:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VMULPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5435, GIR_Done, // Label 1145: @30026 GIM_Reject, // Label 1118: @30027 GIM_Reject, // Label 24: @30028 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1155*/ 30703, /*GILLT_s32*//*Label 1146*/ 30051, /*GILLT_s64*//*Label 1147*/ 30170, /*GILLT_s80*//*Label 1148*/ 30289, 0, 0, /*GILLT_v2s64*//*Label 1149*/ 30325, 0, /*GILLT_v4s32*//*Label 1150*/ 30415, /*GILLT_v4s64*//*Label 1151*/ 30505, 0, 0, /*GILLT_v8s32*//*Label 1152*/ 30569, /*GILLT_v8s64*//*Label 1153*/ 30633, 0, 0, 0, /*GILLT_v16s32*//*Label 1154*/ 30668, // Label 1146: @30051 GIM_Try, /*On fail goto*//*Label 1156*/ 30169, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1157*/ 30090, // Rule ID 624 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID, // (fdiv:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (DIV_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 624, GIR_Done, // Label 1157: @30090 GIM_Try, /*On fail goto*//*Label 1158*/ 30116, // Rule ID 1794 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VDIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1794, GIR_Done, // Label 1158: @30116 GIM_Try, /*On fail goto*//*Label 1159*/ 30142, // Rule ID 1802 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID, // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (DIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1802, GIR_Done, // Label 1159: @30142 GIM_Try, /*On fail goto*//*Label 1160*/ 30168, // Rule ID 5249 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID, // (fdiv:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VDIVSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5249, GIR_Done, // Label 1160: @30168 GIM_Reject, // Label 1156: @30169 GIM_Reject, // Label 1147: @30170 GIM_Try, /*On fail goto*//*Label 1161*/ 30288, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1162*/ 30209, // Rule ID 626 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID, // (fdiv:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (DIV_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 626, GIR_Done, // Label 1162: @30209 GIM_Try, /*On fail goto*//*Label 1163*/ 30235, // Rule ID 1798 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VDIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1798, GIR_Done, // Label 1163: @30235 GIM_Try, /*On fail goto*//*Label 1164*/ 30261, // Rule ID 1806 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID, // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (DIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1806, GIR_Done, // Label 1164: @30261 GIM_Try, /*On fail goto*//*Label 1165*/ 30287, // Rule ID 5262 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID, // (fdiv:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VDIVSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5262, GIR_Done, // Label 1165: @30287 GIM_Reject, // Label 1161: @30288 GIM_Reject, // Label 1148: @30289 GIM_Try, /*On fail goto*//*Label 1166*/ 30324, // Rule ID 628 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID, // (fdiv:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (DIV_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 628, GIR_Done, // Label 1166: @30324 GIM_Reject, // Label 1149: @30325 GIM_Try, /*On fail goto*//*Label 1167*/ 30414, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1168*/ 30361, // Rule ID 1774 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VDIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1774, GIR_Done, // Label 1168: @30361 GIM_Try, /*On fail goto*//*Label 1169*/ 30387, // Rule ID 1790 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (DIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1790, GIR_Done, // Label 1169: @30387 GIM_Try, /*On fail goto*//*Label 1170*/ 30413, // Rule ID 5735 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fdiv:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VDIVPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5735, GIR_Done, // Label 1170: @30413 GIM_Reject, // Label 1167: @30414 GIM_Reject, // Label 1150: @30415 GIM_Try, /*On fail goto*//*Label 1171*/ 30504, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1172*/ 30451, // Rule ID 1770 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VDIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1770, GIR_Done, // Label 1172: @30451 GIM_Try, /*On fail goto*//*Label 1173*/ 30477, // Rule ID 1786 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (DIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1786, GIR_Done, // Label 1173: @30477 GIM_Try, /*On fail goto*//*Label 1174*/ 30503, // Rule ID 5699 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (fdiv:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VDIVPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5699, GIR_Done, // Label 1174: @30503 GIM_Reject, // Label 1171: @30504 GIM_Reject, // Label 1151: @30505 GIM_Try, /*On fail goto*//*Label 1175*/ 30568, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1176*/ 30541, // Rule ID 1782 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fdiv:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VDIVPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1782, GIR_Done, // Label 1176: @30541 GIM_Try, /*On fail goto*//*Label 1177*/ 30567, // Rule ID 5753 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fdiv:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VDIVPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5753, GIR_Done, // Label 1177: @30567 GIM_Reject, // Label 1175: @30568 GIM_Reject, // Label 1152: @30569 GIM_Try, /*On fail goto*//*Label 1178*/ 30632, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1179*/ 30605, // Rule ID 1778 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (fdiv:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VDIVPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1778, GIR_Done, // Label 1179: @30605 GIM_Try, /*On fail goto*//*Label 1180*/ 30631, // Rule ID 5717 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (fdiv:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VDIVPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5717, GIR_Done, // Label 1180: @30631 GIM_Reject, // Label 1178: @30632 GIM_Reject, // Label 1153: @30633 GIM_Try, /*On fail goto*//*Label 1181*/ 30667, // Rule ID 5681 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fdiv:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VDIVPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5681, GIR_Done, // Label 1181: @30667 GIM_Reject, // Label 1154: @30668 GIM_Try, /*On fail goto*//*Label 1182*/ 30702, // Rule ID 5663 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (fdiv:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VDIVPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5663, GIR_Done, // Label 1182: @30702 GIM_Reject, // Label 1155: @30703 GIM_Reject, // Label 25: @30704 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 1186*/ 30792, /*GILLT_s32*//*Label 1183*/ 30713, /*GILLT_s64*//*Label 1184*/ 30740, /*GILLT_s80*//*Label 1185*/ 30767, // Label 1183: @30713 GIM_Try, /*On fail goto*//*Label 1187*/ 30739, // Rule ID 761 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fneg:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (CHS_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 761, GIR_Done, // Label 1187: @30739 GIM_Reject, // Label 1184: @30740 GIM_Try, /*On fail goto*//*Label 1188*/ 30766, // Rule ID 762 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fneg:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (CHS_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 762, GIR_Done, // Label 1188: @30766 GIM_Reject, // Label 1185: @30767 GIM_Try, /*On fail goto*//*Label 1189*/ 30791, // Rule ID 763 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fneg:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (CHS_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 763, GIR_Done, // Label 1189: @30791 GIM_Reject, // Label 1186: @30792 GIM_Reject, // Label 26: @30793 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/4, 16, /*)*//*default:*//*Label 1194*/ 31080, /*GILLT_s64*//*Label 1190*/ 30811, /*GILLT_s80*//*Label 1191*/ 30950, 0, 0, 0, 0, 0, /*GILLT_v4s64*//*Label 1192*/ 31001, 0, 0, 0, /*GILLT_v8s64*//*Label 1193*/ 31053, // Label 1190: @30811 GIM_Try, /*On fail goto*//*Label 1195*/ 30949, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1196*/ 30839, // Rule ID 1431 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (CVTSS2SDrr:{ *:[f64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSS2SDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1431, GIR_Done, // Label 1196: @30839 GIM_Try, /*On fail goto*//*Label 1197*/ 30860, // Rule ID 13120 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fpextend:{ *:[f64] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP32:{ *:[f32] }:$src, RFP64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP64*/63, // GIR_Coverage, 13120, GIR_Done, // Label 1197: @30860 GIM_Try, /*On fail goto*//*Label 1198*/ 30904, // Rule ID 13325 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13325, GIR_Done, // Label 1198: @30904 GIM_Try, /*On fail goto*//*Label 1199*/ 30948, // Rule ID 16118 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fpextend:{ *:[f64] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32X:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16118, GIR_Done, // Label 1199: @30948 GIM_Reject, // Label 1195: @30949 GIM_Reject, // Label 1191: @30950 GIM_Try, /*On fail goto*//*Label 1200*/ 30975, // Rule ID 13122 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fpextend:{ *:[f80] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP32:{ *:[f32] }:$src, RFP80:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP80*/109, // GIR_Coverage, 13122, GIR_Done, // Label 1200: @30975 GIM_Try, /*On fail goto*//*Label 1201*/ 31000, // Rule ID 13124 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fpextend:{ *:[f80] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP64:{ *:[f64] }:$src, RFP80:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP80*/109, // GIR_Coverage, 13124, GIR_Done, // Label 1201: @31000 GIM_Reject, // Label 1192: @31001 GIM_Try, /*On fail goto*//*Label 1202*/ 31052, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1203*/ 31029, // Rule ID 1474 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fpextend:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src) => (VCVTPS2PDYrr:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1474, GIR_Done, // Label 1203: @31029 GIM_Try, /*On fail goto*//*Label 1204*/ 31051, // Rule ID 8548 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (fpextend:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8548, GIR_Done, // Label 1204: @31051 GIM_Reject, // Label 1202: @31052 GIM_Reject, // Label 1193: @31053 GIM_Try, /*On fail goto*//*Label 1205*/ 31079, // Rule ID 8515 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (fpextend:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8515, GIR_Done, // Label 1205: @31079 GIM_Reject, // Label 1194: @31080 GIM_Reject, // Label 27: @31081 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 5, /*)*//*default:*//*Label 1208*/ 31288, /*GILLT_s32*//*Label 1206*/ 31089, /*GILLT_s64*//*Label 1207*/ 31262, // Label 1206: @31089 GIM_Try, /*On fail goto*//*Label 1209*/ 31115, // Rule ID 1423 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (CVTSD2SSrr:{ *:[f32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSD2SSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1423, GIR_Done, // Label 1209: @31115 GIM_Try, /*On fail goto*//*Label 1210*/ 31140, // Rule ID 13126 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fpround:{ *:[f32] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP64:{ *:[f64] }:$src, RFP32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP32*/39, // GIR_Coverage, 13126, GIR_Done, // Label 1210: @31140 GIM_Try, /*On fail goto*//*Label 1211*/ 31165, // Rule ID 13128 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fpround:{ *:[f32] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP80:{ *:[f80] }:$src, RFP32:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP32*/39, // GIR_Coverage, 13128, GIR_Done, // Label 1211: @31165 GIM_Try, /*On fail goto*//*Label 1212*/ 31213, // Rule ID 13323 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (VCVTSD2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13323, GIR_Done, // Label 1212: @31213 GIM_Try, /*On fail goto*//*Label 1213*/ 31261, // Rule ID 16122 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fpround:{ *:[f32] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64X:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16122, GIR_Done, // Label 1213: @31261 GIM_Reject, // Label 1207: @31262 GIM_Try, /*On fail goto*//*Label 1214*/ 31287, // Rule ID 13130 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fpround:{ *:[f64] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP80:{ *:[f80] }:$src, RFP64:{ *:[i32] }) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP64*/63, // GIR_Coverage, 13130, GIR_Done, // Label 1214: @31287 GIM_Reject, // Label 1208: @31288 GIM_Reject, // Label 28: @31289 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 11, /*)*//*default:*//*Label 1218*/ 31644, /*GILLT_s32*//*Label 1215*/ 31303, /*GILLT_s64*//*Label 1216*/ 31460, 0, 0, 0, 0, 0, /*GILLT_v4s32*//*Label 1217*/ 31617, // Label 1215: @31303 GIM_Try, /*On fail goto*//*Label 1219*/ 31329, // Rule ID 1331 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1331, GIR_Done, // Label 1219: @31329 GIM_Try, /*On fail goto*//*Label 1220*/ 31355, // Rule ID 1339 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1339, GIR_Done, // Label 1220: @31355 GIM_Try, /*On fail goto*//*Label 1221*/ 31381, // Rule ID 1347 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (CVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSS2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1347, GIR_Done, // Label 1221: @31381 GIM_Try, /*On fail goto*//*Label 1222*/ 31407, // Rule ID 1355 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (CVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSD2SIrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1355, GIR_Done, // Label 1222: @31407 GIM_Try, /*On fail goto*//*Label 1223*/ 31433, // Rule ID 8402 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fp_to_sint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8402, GIR_Done, // Label 1223: @31433 GIM_Try, /*On fail goto*//*Label 1224*/ 31459, // Rule ID 8416 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fp_to_sint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8416, GIR_Done, // Label 1224: @31459 GIM_Reject, // Label 1216: @31460 GIM_Try, /*On fail goto*//*Label 1225*/ 31486, // Rule ID 1335 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1335, GIR_Done, // Label 1225: @31486 GIM_Try, /*On fail goto*//*Label 1226*/ 31512, // Rule ID 1343 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1343, GIR_Done, // Label 1226: @31512 GIM_Try, /*On fail goto*//*Label 1227*/ 31538, // Rule ID 1351 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSS2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1351, GIR_Done, // Label 1227: @31538 GIM_Try, /*On fail goto*//*Label 1228*/ 31564, // Rule ID 1359 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSD2SI64rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1359, GIR_Done, // Label 1228: @31564 GIM_Try, /*On fail goto*//*Label 1229*/ 31590, // Rule ID 8409 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fp_to_sint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8409, GIR_Done, // Label 1229: @31590 GIM_Try, /*On fail goto*//*Label 1230*/ 31616, // Rule ID 8423 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fp_to_sint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8423, GIR_Done, // Label 1230: @31616 GIM_Reject, // Label 1217: @31617 GIM_Try, /*On fail goto*//*Label 1231*/ 31643, // Rule ID 13369 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (fp_to_sint:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) => (VCVTTPD2DQYrr:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2DQYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13369, GIR_Done, // Label 1231: @31643 GIM_Reject, // Label 1218: @31644 GIM_Reject, // Label 29: @31645 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 5, /*)*//*default:*//*Label 1234*/ 31759, /*GILLT_s32*//*Label 1232*/ 31653, /*GILLT_s64*//*Label 1233*/ 31706, // Label 1232: @31653 GIM_Try, /*On fail goto*//*Label 1235*/ 31679, // Rule ID 8430 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fp_to_uint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2USIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8430, GIR_Done, // Label 1235: @31679 GIM_Try, /*On fail goto*//*Label 1236*/ 31705, // Rule ID 8444 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fp_to_uint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2USIZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8444, GIR_Done, // Label 1236: @31705 GIM_Reject, // Label 1233: @31706 GIM_Try, /*On fail goto*//*Label 1237*/ 31732, // Rule ID 8437 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fp_to_uint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2USI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8437, GIR_Done, // Label 1237: @31732 GIM_Try, /*On fail goto*//*Label 1238*/ 31758, // Rule ID 8451 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fp_to_uint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2USI64Zrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8451, GIR_Done, // Label 1238: @31758 GIM_Reject, // Label 1234: @31759 GIM_Reject, // Label 30: @31760 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1247*/ 32631, /*GILLT_s32*//*Label 1239*/ 31783, /*GILLT_s64*//*Label 1240*/ 32028, 0, 0, 0, /*GILLT_v2s64*//*Label 1241*/ 32270, 0, /*GILLT_v4s32*//*Label 1242*/ 32297, /*GILLT_v4s64*//*Label 1243*/ 32402, 0, 0, /*GILLT_v8s32*//*Label 1244*/ 32475, /*GILLT_v8s64*//*Label 1245*/ 32554, 0, 0, 0, /*GILLT_v16s32*//*Label 1246*/ 32604, // Label 1239: @31783 GIM_Try, /*On fail goto*//*Label 1248*/ 31809, // Rule ID 1363 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (CVTSI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI2SSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1363, GIR_Done, // Label 1248: @31809 GIM_Try, /*On fail goto*//*Label 1249*/ 31835, // Rule ID 1367 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (CVTSI642SSrr:{ *:[f32] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI642SSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1367, GIR_Done, // Label 1249: @31835 GIM_Try, /*On fail goto*//*Label 1250*/ 31883, // Rule ID 13315 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13315, GIR_Done, // Label 1250: @31883 GIM_Try, /*On fail goto*//*Label 1251*/ 31931, // Rule ID 13317 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SSrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13317, GIR_Done, // Label 1251: @31931 GIM_Try, /*On fail goto*//*Label 1252*/ 31979, // Rule ID 16062 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16062, GIR_Done, // Label 1252: @31979 GIM_Try, /*On fail goto*//*Label 1253*/ 32027, // Rule ID 16064 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16064, GIR_Done, // Label 1253: @32027 GIM_Reject, // Label 1240: @32028 GIM_Try, /*On fail goto*//*Label 1254*/ 32051, // Rule ID 1371 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (CVTSI2SDrr:{ *:[f64] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI2SDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1371, GIR_Done, // Label 1254: @32051 GIM_Try, /*On fail goto*//*Label 1255*/ 32077, // Rule ID 1375 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (CVTSI642SDrr:{ *:[f64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI642SDrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1375, GIR_Done, // Label 1255: @32077 GIM_Try, /*On fail goto*//*Label 1256*/ 32125, // Rule ID 13319 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13319, GIR_Done, // Label 1256: @32125 GIM_Try, /*On fail goto*//*Label 1257*/ 32173, // Rule ID 13321 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SDrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13321, GIR_Done, // Label 1257: @32173 GIM_Try, /*On fail goto*//*Label 1258*/ 32221, // Rule ID 16066 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16066, GIR_Done, // Label 1258: @32221 GIM_Try, /*On fail goto*//*Label 1259*/ 32269, // Rule ID 16068 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16068, GIR_Done, // Label 1259: @32269 GIM_Reject, // Label 1241: @32270 GIM_Try, /*On fail goto*//*Label 1260*/ 32296, // Rule ID 9448 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9448, GIR_Done, // Label 1260: @32296 GIM_Reject, // Label 1242: @32297 GIM_Try, /*On fail goto*//*Label 1261*/ 32323, // Rule ID 1411 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1411, GIR_Done, // Label 1261: @32323 GIM_Try, /*On fail goto*//*Label 1262*/ 32349, // Rule ID 1419 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (CVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTDQ2PSrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1419, GIR_Done, // Label 1262: @32349 GIM_Try, /*On fail goto*//*Label 1263*/ 32375, // Rule ID 8638 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8638, GIR_Done, // Label 1263: @32375 GIM_Try, /*On fail goto*//*Label 1264*/ 32401, // Rule ID 9562 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9562, GIR_Done, // Label 1264: @32401 GIM_Reject, // Label 1243: @32402 GIM_Try, /*On fail goto*//*Label 1265*/ 32425, // Rule ID 1486 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (sint_to_fp:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PDYrr:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1486, GIR_Done, // Label 1265: @32425 GIM_Try, /*On fail goto*//*Label 1266*/ 32448, // Rule ID 8599 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (sint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8599, GIR_Done, // Label 1266: @32448 GIM_Try, /*On fail goto*//*Label 1267*/ 32474, // Rule ID 9466 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9466, GIR_Done, // Label 1267: @32474 GIM_Reject, // Label 1244: @32475 GIM_Try, /*On fail goto*//*Label 1268*/ 32501, // Rule ID 1415 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (sint_to_fp:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src) => (VCVTDQ2PSYrr:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSYrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1415, GIR_Done, // Label 1268: @32501 GIM_Try, /*On fail goto*//*Label 1269*/ 32527, // Rule ID 8656 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8656, GIR_Done, // Label 1269: @32527 GIM_Try, /*On fail goto*//*Label 1270*/ 32553, // Rule ID 9541 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (sint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9541, GIR_Done, // Label 1270: @32553 GIM_Reject, // Label 1245: @32554 GIM_Try, /*On fail goto*//*Label 1271*/ 32577, // Rule ID 8563 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (sint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8563, GIR_Done, // Label 1271: @32577 GIM_Try, /*On fail goto*//*Label 1272*/ 32603, // Rule ID 9427 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (sint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9427, GIR_Done, // Label 1272: @32603 GIM_Reject, // Label 1246: @32604 GIM_Try, /*On fail goto*//*Label 1273*/ 32630, // Rule ID 8617 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (sint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8617, GIR_Done, // Label 1273: @32630 GIM_Reject, // Label 1247: @32631 GIM_Reject, // Label 31: @32632 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1282*/ 33109, /*GILLT_s32*//*Label 1274*/ 32655, /*GILLT_s64*//*Label 1275*/ 32752, 0, 0, 0, /*GILLT_v2s64*//*Label 1276*/ 32849, 0, /*GILLT_v4s32*//*Label 1277*/ 32876, /*GILLT_v4s64*//*Label 1278*/ 32929, 0, 0, /*GILLT_v8s32*//*Label 1279*/ 32979, /*GILLT_v8s64*//*Label 1280*/ 33032, 0, 0, 0, /*GILLT_v16s32*//*Label 1281*/ 33082, // Label 1274: @32655 GIM_Try, /*On fail goto*//*Label 1283*/ 32703, // Rule ID 16078 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (uint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16078, GIR_Done, // Label 1283: @32703 GIM_Try, /*On fail goto*//*Label 1284*/ 32751, // Rule ID 16080 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (uint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI642SSZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16080, GIR_Done, // Label 1284: @32751 GIM_Reject, // Label 1275: @32752 GIM_Try, /*On fail goto*//*Label 1285*/ 32800, // Rule ID 16082 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (uint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16082, GIR_Done, // Label 1285: @32800 GIM_Try, /*On fail goto*//*Label 1286*/ 32848, // Rule ID 16084 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (uint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI642SDZrr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16084, GIR_Done, // Label 1286: @32848 GIM_Reject, // Label 1276: @32849 GIM_Try, /*On fail goto*//*Label 1287*/ 32875, // Rule ID 9505 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (uint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTUQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9505, GIR_Done, // Label 1287: @32875 GIM_Reject, // Label 1277: @32876 GIM_Try, /*On fail goto*//*Label 1288*/ 32902, // Rule ID 8941 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (uint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZ128rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8941, GIR_Done, // Label 1288: @32902 GIM_Try, /*On fail goto*//*Label 1289*/ 32928, // Rule ID 9601 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9601, GIR_Done, // Label 1289: @32928 GIM_Reject, // Label 1278: @32929 GIM_Try, /*On fail goto*//*Label 1290*/ 32952, // Rule ID 8902 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (uint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8902, GIR_Done, // Label 1290: @32952 GIM_Try, /*On fail goto*//*Label 1291*/ 32978, // Rule ID 9523 // GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9523, GIR_Done, // Label 1291: @32978 GIM_Reject, // Label 1279: @32979 GIM_Try, /*On fail goto*//*Label 1292*/ 33005, // Rule ID 8959 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZ256rr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8959, GIR_Done, // Label 1292: @33005 GIM_Try, /*On fail goto*//*Label 1293*/ 33031, // Rule ID 9580 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (uint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9580, GIR_Done, // Label 1293: @33031 GIM_Reject, // Label 1280: @33032 GIM_Try, /*On fail goto*//*Label 1294*/ 33055, // Rule ID 8866 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (uint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8866, GIR_Done, // Label 1294: @33055 GIM_Try, /*On fail goto*//*Label 1295*/ 33081, // Rule ID 9484 // GIM_CheckFeatures, GIFBS_HasDQI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (uint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9484, GIR_Done, // Label 1295: @33081 GIM_Reject, // Label 1281: @33082 GIM_Try, /*On fail goto*//*Label 1296*/ 33108, // Rule ID 8920 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (uint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTUDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZrr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 8920, GIR_Done, // Label 1296: @33108 GIM_Reject, // Label 1282: @33109 GIM_Reject, // Label 32: @33110 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 1300*/ 33198, /*GILLT_s32*//*Label 1297*/ 33119, /*GILLT_s64*//*Label 1298*/ 33146, /*GILLT_s80*//*Label 1299*/ 33173, // Label 1297: @33119 GIM_Try, /*On fail goto*//*Label 1301*/ 33145, // Rule ID 764 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fabs:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (ABS_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ABS_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 764, GIR_Done, // Label 1301: @33145 GIM_Reject, // Label 1298: @33146 GIM_Try, /*On fail goto*//*Label 1302*/ 33172, // Rule ID 765 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fabs:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (ABS_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ABS_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 765, GIR_Done, // Label 1302: @33172 GIM_Reject, // Label 1299: @33173 GIM_Try, /*On fail goto*//*Label 1303*/ 33197, // Rule ID 766 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fabs:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (ABS_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ABS_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 766, GIR_Done, // Label 1303: @33197 GIM_Reject, // Label 1300: @33198 GIM_Reject, // Label 33: @33199 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1316*/ 33831, /*GILLT_v2s64*//*Label 1304*/ 33222, 0, /*GILLT_v4s32*//*Label 1305*/ 33254, /*GILLT_v4s64*//*Label 1306*/ 33335, 0, /*GILLT_v8s16*//*Label 1307*/ 33367, /*GILLT_v8s32*//*Label 1308*/ 33448, /*GILLT_v8s64*//*Label 1309*/ 33506, 0, /*GILLT_v16s8*//*Label 1310*/ 33538, /*GILLT_v16s16*//*Label 1311*/ 33619, /*GILLT_v16s32*//*Label 1312*/ 33677, 0, /*GILLT_v32s8*//*Label 1313*/ 33709, /*GILLT_v32s16*//*Label 1314*/ 33767, 0, /*GILLT_v64s8*//*Label 1315*/ 33799, // Label 1304: @33222 GIM_Try, /*On fail goto*//*Label 1317*/ 33253, // Rule ID 4849 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMINSQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4849, GIR_Done, // Label 1317: @33253 GIM_Reject, // Label 1305: @33254 GIM_Try, /*On fail goto*//*Label 1318*/ 33334, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1319*/ 33287, // Rule ID 2636 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMINSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2636, GIR_Done, // Label 1319: @33287 GIM_Try, /*On fail goto*//*Label 1320*/ 33310, // Rule ID 2674 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMINSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2674, GIR_Done, // Label 1320: @33310 GIM_Try, /*On fail goto*//*Label 1321*/ 33333, // Rule ID 4822 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smin:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMINSDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4822, GIR_Done, // Label 1321: @33333 GIM_Reject, // Label 1318: @33334 GIM_Reject, // Label 1306: @33335 GIM_Try, /*On fail goto*//*Label 1322*/ 33366, // Rule ID 4840 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMINSQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4840, GIR_Done, // Label 1322: @33366 GIM_Reject, // Label 1307: @33367 GIM_Try, /*On fail goto*//*Label 1323*/ 33447, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1324*/ 33400, // Rule ID 2101 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMINSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2101, GIR_Done, // Label 1324: @33400 GIM_Try, /*On fail goto*//*Label 1325*/ 33423, // Rule ID 2103 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMINSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2103, GIR_Done, // Label 1325: @33423 GIM_Try, /*On fail goto*//*Label 1326*/ 33446, // Rule ID 4798 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smin:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMINSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4798, GIR_Done, // Label 1326: @33446 GIM_Reject, // Label 1323: @33447 GIM_Reject, // Label 1308: @33448 GIM_Try, /*On fail goto*//*Label 1327*/ 33505, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1328*/ 33481, // Rule ID 2654 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smin:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMINSDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2654, GIR_Done, // Label 1328: @33481 GIM_Try, /*On fail goto*//*Label 1329*/ 33504, // Rule ID 4813 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smin:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMINSDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4813, GIR_Done, // Label 1329: @33504 GIM_Reject, // Label 1327: @33505 GIM_Reject, // Label 1309: @33506 GIM_Try, /*On fail goto*//*Label 1330*/ 33537, // Rule ID 4831 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smin:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMINSQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4831, GIR_Done, // Label 1330: @33537 GIM_Reject, // Label 1310: @33538 GIM_Try, /*On fail goto*//*Label 1331*/ 33618, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1332*/ 33571, // Rule ID 2646 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMINSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2646, GIR_Done, // Label 1332: @33571 GIM_Try, /*On fail goto*//*Label 1333*/ 33594, // Rule ID 2672 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMINSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2672, GIR_Done, // Label 1333: @33594 GIM_Try, /*On fail goto*//*Label 1334*/ 33617, // Rule ID 4780 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smin:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMINSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4780, GIR_Done, // Label 1334: @33617 GIM_Reject, // Label 1331: @33618 GIM_Reject, // Label 1311: @33619 GIM_Try, /*On fail goto*//*Label 1335*/ 33676, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1336*/ 33652, // Rule ID 2105 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smin:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMINSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2105, GIR_Done, // Label 1336: @33652 GIM_Try, /*On fail goto*//*Label 1337*/ 33675, // Rule ID 4792 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smin:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMINSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4792, GIR_Done, // Label 1337: @33675 GIM_Reject, // Label 1335: @33676 GIM_Reject, // Label 1312: @33677 GIM_Try, /*On fail goto*//*Label 1338*/ 33708, // Rule ID 4804 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smin:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMINSDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4804, GIR_Done, // Label 1338: @33708 GIM_Reject, // Label 1313: @33709 GIM_Try, /*On fail goto*//*Label 1339*/ 33766, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1340*/ 33742, // Rule ID 2664 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smin:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMINSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2664, GIR_Done, // Label 1340: @33742 GIM_Try, /*On fail goto*//*Label 1341*/ 33765, // Rule ID 4774 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smin:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMINSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4774, GIR_Done, // Label 1341: @33765 GIM_Reject, // Label 1339: @33766 GIM_Reject, // Label 1314: @33767 GIM_Try, /*On fail goto*//*Label 1342*/ 33798, // Rule ID 4786 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smin:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMINSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4786, GIR_Done, // Label 1342: @33798 GIM_Reject, // Label 1315: @33799 GIM_Try, /*On fail goto*//*Label 1343*/ 33830, // Rule ID 4768 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smin:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMINSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINSBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4768, GIR_Done, // Label 1343: @33830 GIM_Reject, // Label 1316: @33831 GIM_Reject, // Label 34: @33832 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1356*/ 34464, /*GILLT_v2s64*//*Label 1344*/ 33855, 0, /*GILLT_v4s32*//*Label 1345*/ 33887, /*GILLT_v4s64*//*Label 1346*/ 33968, 0, /*GILLT_v8s16*//*Label 1347*/ 34000, /*GILLT_v8s32*//*Label 1348*/ 34081, /*GILLT_v8s64*//*Label 1349*/ 34139, 0, /*GILLT_v16s8*//*Label 1350*/ 34171, /*GILLT_v16s16*//*Label 1351*/ 34252, /*GILLT_v16s32*//*Label 1352*/ 34310, 0, /*GILLT_v32s8*//*Label 1353*/ 34342, /*GILLT_v32s16*//*Label 1354*/ 34400, 0, /*GILLT_v64s8*//*Label 1355*/ 34432, // Label 1344: @33855 GIM_Try, /*On fail goto*//*Label 1357*/ 33886, // Rule ID 4669 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMAXSQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4669, GIR_Done, // Label 1357: @33886 GIM_Reject, // Label 1345: @33887 GIM_Try, /*On fail goto*//*Label 1358*/ 33967, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1359*/ 33920, // Rule ID 2640 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMAXSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2640, GIR_Done, // Label 1359: @33920 GIM_Try, /*On fail goto*//*Label 1360*/ 33943, // Rule ID 2682 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMAXSDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXSDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2682, GIR_Done, // Label 1360: @33943 GIM_Try, /*On fail goto*//*Label 1361*/ 33966, // Rule ID 4642 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smax:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMAXSDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4642, GIR_Done, // Label 1361: @33966 GIM_Reject, // Label 1358: @33967 GIM_Reject, // Label 1346: @33968 GIM_Try, /*On fail goto*//*Label 1362*/ 33999, // Rule ID 4660 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMAXSQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4660, GIR_Done, // Label 1362: @33999 GIM_Reject, // Label 1347: @34000 GIM_Try, /*On fail goto*//*Label 1363*/ 34080, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1364*/ 34033, // Rule ID 2113 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMAXSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2113, GIR_Done, // Label 1364: @34033 GIM_Try, /*On fail goto*//*Label 1365*/ 34056, // Rule ID 2115 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMAXSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXSWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2115, GIR_Done, // Label 1365: @34056 GIM_Try, /*On fail goto*//*Label 1366*/ 34079, // Rule ID 4618 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smax:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMAXSWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4618, GIR_Done, // Label 1366: @34079 GIM_Reject, // Label 1363: @34080 GIM_Reject, // Label 1348: @34081 GIM_Try, /*On fail goto*//*Label 1367*/ 34138, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1368*/ 34114, // Rule ID 2658 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smax:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMAXSDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2658, GIR_Done, // Label 1368: @34114 GIM_Try, /*On fail goto*//*Label 1369*/ 34137, // Rule ID 4633 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smax:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMAXSDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4633, GIR_Done, // Label 1369: @34137 GIM_Reject, // Label 1367: @34138 GIM_Reject, // Label 1349: @34139 GIM_Try, /*On fail goto*//*Label 1370*/ 34170, // Rule ID 4651 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smax:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMAXSQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4651, GIR_Done, // Label 1370: @34170 GIM_Reject, // Label 1350: @34171 GIM_Try, /*On fail goto*//*Label 1371*/ 34251, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1372*/ 34204, // Rule ID 2650 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMAXSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2650, GIR_Done, // Label 1372: @34204 GIM_Try, /*On fail goto*//*Label 1373*/ 34227, // Rule ID 2680 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (smax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMAXSBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXSBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2680, GIR_Done, // Label 1373: @34227 GIM_Try, /*On fail goto*//*Label 1374*/ 34250, // Rule ID 4600 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (smax:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMAXSBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4600, GIR_Done, // Label 1374: @34250 GIM_Reject, // Label 1371: @34251 GIM_Reject, // Label 1351: @34252 GIM_Try, /*On fail goto*//*Label 1375*/ 34309, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1376*/ 34285, // Rule ID 2117 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smax:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMAXSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2117, GIR_Done, // Label 1376: @34285 GIM_Try, /*On fail goto*//*Label 1377*/ 34308, // Rule ID 4612 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smax:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMAXSWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4612, GIR_Done, // Label 1377: @34308 GIM_Reject, // Label 1375: @34309 GIM_Reject, // Label 1352: @34310 GIM_Try, /*On fail goto*//*Label 1378*/ 34341, // Rule ID 4624 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smax:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMAXSDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4624, GIR_Done, // Label 1378: @34341 GIM_Reject, // Label 1353: @34342 GIM_Try, /*On fail goto*//*Label 1379*/ 34399, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1380*/ 34375, // Rule ID 2668 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (smax:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMAXSBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2668, GIR_Done, // Label 1380: @34375 GIM_Try, /*On fail goto*//*Label 1381*/ 34398, // Rule ID 4594 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (smax:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMAXSBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4594, GIR_Done, // Label 1381: @34398 GIM_Reject, // Label 1379: @34399 GIM_Reject, // Label 1354: @34400 GIM_Try, /*On fail goto*//*Label 1382*/ 34431, // Rule ID 4606 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smax:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMAXSWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4606, GIR_Done, // Label 1382: @34431 GIM_Reject, // Label 1355: @34432 GIM_Try, /*On fail goto*//*Label 1383*/ 34463, // Rule ID 4588 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (smax:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMAXSBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXSBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4588, GIR_Done, // Label 1383: @34463 GIM_Reject, // Label 1356: @34464 GIM_Reject, // Label 35: @34465 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1396*/ 35097, /*GILLT_v2s64*//*Label 1384*/ 34488, 0, /*GILLT_v4s32*//*Label 1385*/ 34520, /*GILLT_v4s64*//*Label 1386*/ 34601, 0, /*GILLT_v8s16*//*Label 1387*/ 34633, /*GILLT_v8s32*//*Label 1388*/ 34714, /*GILLT_v8s64*//*Label 1389*/ 34772, 0, /*GILLT_v16s8*//*Label 1390*/ 34804, /*GILLT_v16s16*//*Label 1391*/ 34885, /*GILLT_v16s32*//*Label 1392*/ 34943, 0, /*GILLT_v32s8*//*Label 1393*/ 34975, /*GILLT_v32s16*//*Label 1394*/ 35033, 0, /*GILLT_v64s8*//*Label 1395*/ 35065, // Label 1384: @34488 GIM_Try, /*On fail goto*//*Label 1397*/ 34519, // Rule ID 4939 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umin:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMINUQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4939, GIR_Done, // Label 1397: @34519 GIM_Reject, // Label 1385: @34520 GIM_Try, /*On fail goto*//*Label 1398*/ 34600, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1399*/ 34553, // Rule ID 2638 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMINUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2638, GIR_Done, // Label 1399: @34553 GIM_Try, /*On fail goto*//*Label 1400*/ 34576, // Rule ID 2676 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMINUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINUDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2676, GIR_Done, // Label 1400: @34576 GIM_Try, /*On fail goto*//*Label 1401*/ 34599, // Rule ID 4912 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umin:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMINUDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4912, GIR_Done, // Label 1401: @34599 GIM_Reject, // Label 1398: @34600 GIM_Reject, // Label 1386: @34601 GIM_Try, /*On fail goto*//*Label 1402*/ 34632, // Rule ID 4930 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umin:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMINUQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4930, GIR_Done, // Label 1402: @34632 GIM_Reject, // Label 1387: @34633 GIM_Try, /*On fail goto*//*Label 1403*/ 34713, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1404*/ 34666, // Rule ID 2648 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMINUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2648, GIR_Done, // Label 1404: @34666 GIM_Try, /*On fail goto*//*Label 1405*/ 34689, // Rule ID 2678 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMINUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2678, GIR_Done, // Label 1405: @34689 GIM_Try, /*On fail goto*//*Label 1406*/ 34712, // Rule ID 4888 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umin:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMINUWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4888, GIR_Done, // Label 1406: @34712 GIM_Reject, // Label 1403: @34713 GIM_Reject, // Label 1388: @34714 GIM_Try, /*On fail goto*//*Label 1407*/ 34771, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1408*/ 34747, // Rule ID 2656 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umin:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMINUDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2656, GIR_Done, // Label 1408: @34747 GIM_Try, /*On fail goto*//*Label 1409*/ 34770, // Rule ID 4903 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umin:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMINUDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4903, GIR_Done, // Label 1409: @34770 GIM_Reject, // Label 1407: @34771 GIM_Reject, // Label 1389: @34772 GIM_Try, /*On fail goto*//*Label 1410*/ 34803, // Rule ID 4921 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umin:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMINUQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4921, GIR_Done, // Label 1410: @34803 GIM_Reject, // Label 1390: @34804 GIM_Try, /*On fail goto*//*Label 1411*/ 34884, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1412*/ 34837, // Rule ID 2095 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMINUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2095, GIR_Done, // Label 1412: @34837 GIM_Try, /*On fail goto*//*Label 1413*/ 34860, // Rule ID 2097 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umin:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMINUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMINUBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2097, GIR_Done, // Label 1413: @34860 GIM_Try, /*On fail goto*//*Label 1414*/ 34883, // Rule ID 4870 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umin:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMINUBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4870, GIR_Done, // Label 1414: @34883 GIM_Reject, // Label 1411: @34884 GIM_Reject, // Label 1391: @34885 GIM_Try, /*On fail goto*//*Label 1415*/ 34942, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1416*/ 34918, // Rule ID 2666 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umin:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMINUWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2666, GIR_Done, // Label 1416: @34918 GIM_Try, /*On fail goto*//*Label 1417*/ 34941, // Rule ID 4882 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umin:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMINUWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4882, GIR_Done, // Label 1417: @34941 GIM_Reject, // Label 1415: @34942 GIM_Reject, // Label 1392: @34943 GIM_Try, /*On fail goto*//*Label 1418*/ 34974, // Rule ID 4894 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umin:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMINUDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4894, GIR_Done, // Label 1418: @34974 GIM_Reject, // Label 1393: @34975 GIM_Try, /*On fail goto*//*Label 1419*/ 35032, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1420*/ 35008, // Rule ID 2099 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umin:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMINUBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2099, GIR_Done, // Label 1420: @35008 GIM_Try, /*On fail goto*//*Label 1421*/ 35031, // Rule ID 4864 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umin:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMINUBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4864, GIR_Done, // Label 1421: @35031 GIM_Reject, // Label 1419: @35032 GIM_Reject, // Label 1394: @35033 GIM_Try, /*On fail goto*//*Label 1422*/ 35064, // Rule ID 4876 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umin:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMINUWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4876, GIR_Done, // Label 1422: @35064 GIM_Reject, // Label 1395: @35065 GIM_Try, /*On fail goto*//*Label 1423*/ 35096, // Rule ID 4858 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umin:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMINUBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMINUBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4858, GIR_Done, // Label 1423: @35096 GIM_Reject, // Label 1396: @35097 GIM_Reject, // Label 36: @35098 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1436*/ 35730, /*GILLT_v2s64*//*Label 1424*/ 35121, 0, /*GILLT_v4s32*//*Label 1425*/ 35153, /*GILLT_v4s64*//*Label 1426*/ 35234, 0, /*GILLT_v8s16*//*Label 1427*/ 35266, /*GILLT_v8s32*//*Label 1428*/ 35347, /*GILLT_v8s64*//*Label 1429*/ 35405, 0, /*GILLT_v16s8*//*Label 1430*/ 35437, /*GILLT_v16s16*//*Label 1431*/ 35518, /*GILLT_v16s32*//*Label 1432*/ 35576, 0, /*GILLT_v32s8*//*Label 1433*/ 35608, /*GILLT_v32s16*//*Label 1434*/ 35666, 0, /*GILLT_v64s8*//*Label 1435*/ 35698, // Label 1424: @35121 GIM_Try, /*On fail goto*//*Label 1437*/ 35152, // Rule ID 4759 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umax:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMAXUQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4759, GIR_Done, // Label 1437: @35152 GIM_Reject, // Label 1425: @35153 GIM_Try, /*On fail goto*//*Label 1438*/ 35233, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1439*/ 35186, // Rule ID 2642 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMAXUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2642, GIR_Done, // Label 1439: @35186 GIM_Try, /*On fail goto*//*Label 1440*/ 35209, // Rule ID 2684 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMAXUDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXUDrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2684, GIR_Done, // Label 1440: @35209 GIM_Try, /*On fail goto*//*Label 1441*/ 35232, // Rule ID 4732 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umax:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMAXUDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4732, GIR_Done, // Label 1441: @35232 GIM_Reject, // Label 1438: @35233 GIM_Reject, // Label 1426: @35234 GIM_Try, /*On fail goto*//*Label 1442*/ 35265, // Rule ID 4750 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umax:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMAXUQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4750, GIR_Done, // Label 1442: @35265 GIM_Reject, // Label 1427: @35266 GIM_Try, /*On fail goto*//*Label 1443*/ 35346, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, GIM_Try, /*On fail goto*//*Label 1444*/ 35299, // Rule ID 2652 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMAXUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2652, GIR_Done, // Label 1444: @35299 GIM_Try, /*On fail goto*//*Label 1445*/ 35322, // Rule ID 2686 // GIM_CheckFeatures, GIFBS_UseSSE41, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMAXUWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXUWrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2686, GIR_Done, // Label 1445: @35322 GIM_Try, /*On fail goto*//*Label 1446*/ 35345, // Rule ID 4708 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umax:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMAXUWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4708, GIR_Done, // Label 1446: @35345 GIM_Reject, // Label 1443: @35346 GIM_Reject, // Label 1428: @35347 GIM_Try, /*On fail goto*//*Label 1447*/ 35404, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1448*/ 35380, // Rule ID 2660 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umax:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMAXUDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2660, GIR_Done, // Label 1448: @35380 GIM_Try, /*On fail goto*//*Label 1449*/ 35403, // Rule ID 4723 // GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umax:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMAXUDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4723, GIR_Done, // Label 1449: @35403 GIM_Reject, // Label 1447: @35404 GIM_Reject, // Label 1429: @35405 GIM_Try, /*On fail goto*//*Label 1450*/ 35436, // Rule ID 4741 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umax:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMAXUQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4741, GIR_Done, // Label 1450: @35436 GIM_Reject, // Label 1430: @35437 GIM_Try, /*On fail goto*//*Label 1451*/ 35517, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, GIM_Try, /*On fail goto*//*Label 1452*/ 35470, // Rule ID 2107 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPMAXUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2107, GIR_Done, // Label 1452: @35470 GIM_Try, /*On fail goto*//*Label 1453*/ 35493, // Rule ID 2109 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, // (umax:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PMAXUBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMAXUBrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2109, GIR_Done, // Label 1453: @35493 GIM_Try, /*On fail goto*//*Label 1454*/ 35516, // Rule ID 4690 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, // (umax:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPMAXUBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4690, GIR_Done, // Label 1454: @35516 GIM_Reject, // Label 1451: @35517 GIM_Reject, // Label 1431: @35518 GIM_Try, /*On fail goto*//*Label 1455*/ 35575, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, GIM_Try, /*On fail goto*//*Label 1456*/ 35551, // Rule ID 2670 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umax:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMAXUWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2670, GIR_Done, // Label 1456: @35551 GIM_Try, /*On fail goto*//*Label 1457*/ 35574, // Rule ID 4702 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umax:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMAXUWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4702, GIR_Done, // Label 1457: @35574 GIM_Reject, // Label 1455: @35575 GIM_Reject, // Label 1432: @35576 GIM_Try, /*On fail goto*//*Label 1458*/ 35607, // Rule ID 4714 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umax:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMAXUDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4714, GIR_Done, // Label 1458: @35607 GIM_Reject, // Label 1433: @35608 GIM_Try, /*On fail goto*//*Label 1459*/ 35665, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, GIM_Try, /*On fail goto*//*Label 1460*/ 35641, // Rule ID 2111 // GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, // (umax:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPMAXUBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBYrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 2111, GIR_Done, // Label 1460: @35641 GIM_Try, /*On fail goto*//*Label 1461*/ 35664, // Rule ID 4684 // GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, // (umax:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPMAXUBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4684, GIR_Done, // Label 1461: @35664 GIM_Reject, // Label 1459: @35665 GIM_Reject, // Label 1434: @35666 GIM_Try, /*On fail goto*//*Label 1462*/ 35697, // Rule ID 4696 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umax:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMAXUWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4696, GIR_Done, // Label 1462: @35697 GIM_Reject, // Label 1435: @35698 GIM_Try, /*On fail goto*//*Label 1463*/ 35729, // Rule ID 4678 // GIM_CheckFeatures, GIFBS_HasBWI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, // (umax:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPMAXUBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMAXUBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 4678, GIR_Done, // Label 1463: @35729 GIM_Reject, // Label 1436: @35730 GIM_Reject, // Label 37: @35731 GIM_Try, /*On fail goto*//*Label 1464*/ 35743, // Rule ID 424 // // MIs[0] dst GIM_CheckIsMBB, /*MI*/0, /*Op*/0, // (br (bb:{ *:[Other] }):$dst) => (JMP_1 (bb:{ *:[Other] }):$dst) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::JMP_1, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 424, GIR_Done, // Label 1464: @35743 GIM_Reject, // Label 38: @35744 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 5, /*)*//*default:*//*Label 1468*/ 35828, /*GILLT_s16*//*Label 1465*/ 35753, /*GILLT_s32*//*Label 1466*/ 35778, /*GILLT_s64*//*Label 1467*/ 35803, // Label 1465: @35753 GIM_Try, /*On fail goto*//*Label 1469*/ 35777, // Rule ID 17396 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (cttz_zero_undef:{ *:[i16] } GR16:{ *:[i16] }:$src) => (BSF16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSF16rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17396, GIR_Done, // Label 1469: @35777 GIM_Reject, // Label 1466: @35778 GIM_Try, /*On fail goto*//*Label 1470*/ 35802, // Rule ID 17397 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (cttz_zero_undef:{ *:[i32] } GR32:{ *:[i32] }:$src) => (BSF32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSF32rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17397, GIR_Done, // Label 1470: @35802 GIM_Reject, // Label 1467: @35803 GIM_Try, /*On fail goto*//*Label 1471*/ 35827, // Rule ID 17398 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (cttz_zero_undef:{ *:[i64] } GR64:{ *:[i64] }:$src) => (BSF64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSF64rr, GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17398, GIR_Done, // Label 1471: @35827 GIM_Reject, // Label 1468: @35828 GIM_Reject, // Label 39: @35829 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 20, /*)*//*default:*//*Label 1478*/ 35991, /*GILLT_v2s64*//*Label 1472*/ 35847, 0, /*GILLT_v4s32*//*Label 1473*/ 35871, /*GILLT_v4s64*//*Label 1474*/ 35895, 0, 0, /*GILLT_v8s32*//*Label 1475*/ 35919, /*GILLT_v8s64*//*Label 1476*/ 35943, 0, 0, 0, /*GILLT_v16s32*//*Label 1477*/ 35967, // Label 1472: @35847 GIM_Try, /*On fail goto*//*Label 1479*/ 35870, // Rule ID 11204 // GIM_CheckFeatures, GIFBS_HasCDI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctlz:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPLZCNTQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11204, GIR_Done, // Label 1479: @35870 GIM_Reject, // Label 1473: @35871 GIM_Try, /*On fail goto*//*Label 1480*/ 35894, // Rule ID 11231 // GIM_CheckFeatures, GIFBS_HasCDI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctlz:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPLZCNTDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11231, GIR_Done, // Label 1480: @35894 GIM_Reject, // Label 1474: @35895 GIM_Try, /*On fail goto*//*Label 1481*/ 35918, // Rule ID 11195 // GIM_CheckFeatures, GIFBS_HasCDI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctlz:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPLZCNTQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11195, GIR_Done, // Label 1481: @35918 GIM_Reject, // Label 1475: @35919 GIM_Try, /*On fail goto*//*Label 1482*/ 35942, // Rule ID 11222 // GIM_CheckFeatures, GIFBS_HasCDI_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctlz:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPLZCNTDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11222, GIR_Done, // Label 1482: @35942 GIM_Reject, // Label 1476: @35943 GIM_Try, /*On fail goto*//*Label 1483*/ 35966, // Rule ID 11186 // GIM_CheckFeatures, GIFBS_HasCDI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctlz:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPLZCNTQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11186, GIR_Done, // Label 1483: @35966 GIM_Reject, // Label 1477: @35967 GIM_Try, /*On fail goto*//*Label 1484*/ 35990, // Rule ID 11213 // GIM_CheckFeatures, GIFBS_HasCDI, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctlz:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPLZCNTDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11213, GIR_Done, // Label 1484: @35990 GIM_Reject, // Label 1478: @35991 GIM_Reject, // Label 40: @35992 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1497*/ 36303, /*GILLT_v2s64*//*Label 1485*/ 36015, 0, /*GILLT_v4s32*//*Label 1486*/ 36039, /*GILLT_v4s64*//*Label 1487*/ 36063, 0, /*GILLT_v8s16*//*Label 1488*/ 36087, /*GILLT_v8s32*//*Label 1489*/ 36111, /*GILLT_v8s64*//*Label 1490*/ 36135, 0, /*GILLT_v16s8*//*Label 1491*/ 36159, /*GILLT_v16s16*//*Label 1492*/ 36183, /*GILLT_v16s32*//*Label 1493*/ 36207, 0, /*GILLT_v32s8*//*Label 1494*/ 36231, /*GILLT_v32s16*//*Label 1495*/ 36255, 0, /*GILLT_v64s8*//*Label 1496*/ 36279, // Label 1485: @36015 GIM_Try, /*On fail goto*//*Label 1498*/ 36038, // Rule ID 11312 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPOPCNTQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTQZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11312, GIR_Done, // Label 1498: @36038 GIM_Reject, // Label 1486: @36039 GIM_Try, /*On fail goto*//*Label 1499*/ 36062, // Rule ID 11339 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPOPCNTDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTDZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11339, GIR_Done, // Label 1499: @36062 GIM_Reject, // Label 1487: @36063 GIM_Try, /*On fail goto*//*Label 1500*/ 36086, // Rule ID 11303 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPOPCNTQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTQZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11303, GIR_Done, // Label 1500: @36086 GIM_Reject, // Label 1488: @36087 GIM_Try, /*On fail goto*//*Label 1501*/ 36110, // Rule ID 12366 // GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) => (VPOPCNTWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTWZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12366, GIR_Done, // Label 1501: @36110 GIM_Reject, // Label 1489: @36111 GIM_Try, /*On fail goto*//*Label 1502*/ 36134, // Rule ID 11330 // GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPOPCNTDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTDZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11330, GIR_Done, // Label 1502: @36134 GIM_Reject, // Label 1490: @36135 GIM_Try, /*On fail goto*//*Label 1503*/ 36158, // Rule ID 11294 // GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctpop:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPOPCNTQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTQZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11294, GIR_Done, // Label 1503: @36158 GIM_Reject, // Label 1491: @36159 GIM_Try, /*On fail goto*//*Label 1504*/ 36182, // Rule ID 12348 // GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (ctpop:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) => (VPOPCNTBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTBZ128rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12348, GIR_Done, // Label 1504: @36182 GIM_Reject, // Label 1492: @36183 GIM_Try, /*On fail goto*//*Label 1505*/ 36206, // Rule ID 12360 // GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) => (VPOPCNTWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTWZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12360, GIR_Done, // Label 1505: @36206 GIM_Reject, // Label 1493: @36207 GIM_Try, /*On fail goto*//*Label 1506*/ 36230, // Rule ID 11321 // GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctpop:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPOPCNTDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTDZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 11321, GIR_Done, // Label 1506: @36230 GIM_Reject, // Label 1494: @36231 GIM_Try, /*On fail goto*//*Label 1507*/ 36254, // Rule ID 12342 // GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (ctpop:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) => (VPOPCNTBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTBZ256rr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12342, GIR_Done, // Label 1507: @36254 GIM_Reject, // Label 1495: @36255 GIM_Try, /*On fail goto*//*Label 1508*/ 36278, // Rule ID 12354 // GIM_CheckFeatures, GIFBS_HasBITALG, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctpop:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1) => (VPOPCNTWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTWZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12354, GIR_Done, // Label 1508: @36278 GIM_Reject, // Label 1496: @36279 GIM_Try, /*On fail goto*//*Label 1509*/ 36302, // Rule ID 12336 // GIM_CheckFeatures, GIFBS_HasBITALG, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (ctpop:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1) => (VPOPCNTBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTBZrr, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 12336, GIR_Done, // Label 1509: @36302 GIM_Reject, // Label 1497: @36303 GIM_Reject, // Label 41: @36304 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 5, /*)*//*default:*//*Label 1513*/ 36393, /*GILLT_s16*//*Label 1510*/ 36313, /*GILLT_s32*//*Label 1511*/ 36349, /*GILLT_s64*//*Label 1512*/ 36371, // Label 1510: @36313 GIM_Try, /*On fail goto*//*Label 1514*/ 36348, // Rule ID 17402 // GIM_CheckFeatures, GIFBS_HasMOVBE, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, // (bswap:{ *:[i16] } GR16:{ *:[i16] }:$src) => (ROL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src, 8:{ *:[i8] }) GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL16ri, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_AddImm, /*InsnID*/0, /*Imm*/8, GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 17402, GIR_Done, // Label 1514: @36348 GIM_Reject, // Label 1511: @36349 GIM_Try, /*On fail goto*//*Label 1515*/ 36370, // Rule ID 5 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, // (bswap:{ *:[i32] } GR32:{ *:[i32] }:$src) => (BSWAP32r:{ *:[i32] } GR32:{ *:[i32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSWAP32r, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 5, GIR_Done, // Label 1515: @36370 GIM_Reject, // Label 1512: @36371 GIM_Try, /*On fail goto*//*Label 1516*/ 36392, // Rule ID 6 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, // (bswap:{ *:[i64] } GR64:{ *:[i64] }:$src) => (BSWAP64r:{ *:[i64] } GR64:{ *:[i64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSWAP64r, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 6, GIR_Done, // Label 1516: @36392 GIM_Reject, // Label 1513: @36393 GIM_Reject, // Label 42: @36394 GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1526*/ 37037, /*GILLT_s32*//*Label 1517*/ 36417, /*GILLT_s64*//*Label 1518*/ 36560, /*GILLT_s80*//*Label 1519*/ 36703, 0, 0, /*GILLT_v2s64*//*Label 1520*/ 36731, 0, /*GILLT_v4s32*//*Label 1521*/ 36805, /*GILLT_v4s64*//*Label 1522*/ 36879, 0, 0, /*GILLT_v8s32*//*Label 1523*/ 36931, /*GILLT_v8s64*//*Label 1524*/ 36983, 0, 0, 0, /*GILLT_v16s32*//*Label 1525*/ 37010, // Label 1517: @36417 GIM_Try, /*On fail goto*//*Label 1527*/ 36559, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, GIM_Try, /*On fail goto*//*Label 1528*/ 36448, // Rule ID 768 // GIM_CheckFeatures, GIFBS_FPStackf32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID, // (fsqrt:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (SQRT_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRT_Fp32, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 768, GIR_Done, // Label 1528: @36448 GIM_Try, /*On fail goto*//*Label 1529*/ 36470, // Rule ID 1906 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src1) => (SQRTSSr:{ *:[f32] } FR32:{ *:[f32] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTSSr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1906, GIR_Done, // Label 1529: @36470 GIM_Try, /*On fail goto*//*Label 1530*/ 36514, // Rule ID 13588 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID, // (fsqrt:{ *:[f32] } FR32:{ *:[f32] }:$src) => (VSQRTSSr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSSr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13588, GIR_Done, // Label 1530: @36514 GIM_Try, /*On fail goto*//*Label 1531*/ 36558, // Rule ID 16241 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID, // (fsqrt:{ *:[f32] } FR32X:{ *:[f32] }:$src) => (VSQRTSSZr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR32X:{ *:[f32] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSSZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16241, GIR_Done, // Label 1531: @36558 GIM_Reject, // Label 1527: @36559 GIM_Reject, // Label 1518: @36560 GIM_Try, /*On fail goto*//*Label 1532*/ 36702, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, GIM_Try, /*On fail goto*//*Label 1533*/ 36591, // Rule ID 770 // GIM_CheckFeatures, GIFBS_FPStackf64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID, // (fsqrt:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (SQRT_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRT_Fp64, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 770, GIR_Done, // Label 1533: @36591 GIM_Try, /*On fail goto*//*Label 1534*/ 36613, // Rule ID 1922 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src1) => (SQRTSDr:{ *:[f64] } FR64:{ *:[f64] }:$src1) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTSDr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1922, GIR_Done, // Label 1534: @36613 GIM_Try, /*On fail goto*//*Label 1535*/ 36657, // Rule ID 13592 // GIM_CheckFeatures, GIFBS_UseAVX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID, // (fsqrt:{ *:[f64] } FR64:{ *:[f64] }:$src) => (VSQRTSDr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSDr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 13592, GIR_Done, // Label 1535: @36657 GIM_Try, /*On fail goto*//*Label 1536*/ 36701, // Rule ID 16245 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID, // (fsqrt:{ *:[f64] } FR64X:{ *:[f64] }:$src) => (VSQRTSDZr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR64X:{ *:[f64] }:$src) GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64, GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF, GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, GIR_ConstrainSelectedInstOperands, /*InsnID*/1, GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSDZr, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src GIR_EraseFromParent, /*InsnID*/0, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 16245, GIR_Done, // Label 1536: @36701 GIM_Reject, // Label 1532: @36702 GIM_Reject, // Label 1519: @36703 GIM_Try, /*On fail goto*//*Label 1537*/ 36730, // Rule ID 772 // GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID, // (fsqrt:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (SQRT_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRT_Fp80, GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW, GIR_AddImplicitUse, /*InsnID*/0, X86::FPCW, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 772, GIR_Done, // Label 1537: @36730 GIM_Reject, // Label 1520: @36731 GIM_Try, /*On fail goto*//*Label 1538*/ 36804, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, GIM_Try, /*On fail goto*//*Label 1539*/ 36759, // Rule ID 1926 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (VSQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1926, GIR_Done, // Label 1539: @36759 GIM_Try, /*On fail goto*//*Label 1540*/ 36781, // Rule ID 1934 // GIM_CheckFeatures, GIFBS_UseSSE2, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fsqrt:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) => (SQRTPDr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTPDr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1934, GIR_Done, // Label 1540: @36781 GIM_Try, /*On fail goto*//*Label 1541*/ 36803, // Rule ID 10059 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (fsqrt:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src) => (VSQRTPDZ128r:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDZ128r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10059, GIR_Done, // Label 1541: @36803 GIM_Reject, // Label 1538: @36804 GIM_Reject, // Label 1521: @36805 GIM_Try, /*On fail goto*//*Label 1542*/ 36878, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, GIM_Try, /*On fail goto*//*Label 1543*/ 36833, // Rule ID 1910 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (VSQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1910, GIR_Done, // Label 1543: @36833 GIM_Try, /*On fail goto*//*Label 1544*/ 36855, // Rule ID 1918 // GIM_CheckFeatures, GIFBS_UseSSE1, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, // (fsqrt:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) => (SQRTPSr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SQRTPSr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1918, GIR_Done, // Label 1544: @36855 GIM_Try, /*On fail goto*//*Label 1545*/ 36877, // Rule ID 10023 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, // (fsqrt:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src) => (VSQRTPSZ128r:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSZ128r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10023, GIR_Done, // Label 1545: @36877 GIM_Reject, // Label 1542: @36878 GIM_Reject, // Label 1522: @36879 GIM_Try, /*On fail goto*//*Label 1546*/ 36930, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, GIM_Try, /*On fail goto*//*Label 1547*/ 36907, // Rule ID 1930 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (fsqrt:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) => (VSQRTPDYr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDYr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1930, GIR_Done, // Label 1547: @36907 GIM_Try, /*On fail goto*//*Label 1548*/ 36929, // Rule ID 10077 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (fsqrt:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src) => (VSQRTPDZ256r:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDZ256r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10077, GIR_Done, // Label 1548: @36929 GIM_Reject, // Label 1546: @36930 GIM_Reject, // Label 1523: @36931 GIM_Try, /*On fail goto*//*Label 1549*/ 36982, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, GIM_Try, /*On fail goto*//*Label 1550*/ 36959, // Rule ID 1914 // GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, // (fsqrt:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) => (VSQRTPSYr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSYr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 1914, GIR_Done, // Label 1550: @36959 GIM_Try, /*On fail goto*//*Label 1551*/ 36981, // Rule ID 10041 // GIM_CheckFeatures, GIFBS_HasVLX, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, // (fsqrt:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src) => (VSQRTPSZ256r:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSZ256r, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10041, GIR_Done, // Label 1551: @36981 GIM_Reject, // Label 1549: @36982 GIM_Reject, // Label 1524: @36983 GIM_Try, /*On fail goto*//*Label 1552*/ 37009, // Rule ID 10005 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (fsqrt:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src) => (VSQRTPDZr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPDZr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 10005, GIR_Done, // Label 1552: @37009 GIM_Reject, // Label 1525: @37010 GIM_Try, /*On fail goto*//*Label 1553*/ 37036, // Rule ID 9987 // GIM_CheckFeatures, GIFBS_HasAVX512, GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, // (fsqrt:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src) => (VSQRTPSZr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src) GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSQRTPSZr, GIR_AddImplicitUse, /*InsnID*/0, X86::MXCSR, GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // GIR_Coverage, 9987, GIR_Done, // Label 1553: @37036 GIM_Reject, // Label 1526: @37037 GIM_Reject, // Label 43: @37038 GIM_Reject, }; return MatchTable0; } #endif // ifdef GET_GLOBALISEL_IMPL #ifdef GET_GLOBALISEL_PREDICATES_DECL PredicateBitset AvailableModuleFeatures; mutable PredicateBitset AvailableFunctionFeatures; PredicateBitset getAvailableFeatures() const { return AvailableModuleFeatures | AvailableFunctionFeatures; } PredicateBitset computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const; PredicateBitset computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const; void setupGeneratedPerFunctionState(MachineFunction &MF) override; #endif // ifdef GET_GLOBALISEL_PREDICATES_DECL #ifdef GET_GLOBALISEL_PREDICATES_INIT AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)), AvailableFunctionFeatures() #endif // ifdef GET_GLOBALISEL_PREDICATES_INIT