Encoding of an afuc instruction. All instructions are 32b.
special registers for operands used as a source
special registers for operands used as a destination
{SPECIALREG} >= 0x1c
{SPECIALREG}
{REG}
{SPECIALREG}
{REG}
Execute eXtra mov's based on $rem
{REP}{XMOV}{PEEK}{NAME} {DST}, {SRC1}, {SRC2}
xxx
10011
{REP}{XMOV}{NAME} {DST}, {SRC1}
xxxx
xxxxx
10011
{REP}{NAME} {DST}, {SRC1}, 0x{RIMMED}
{REP}{NAME} {DST}, {SRC1}, 0x{RIMMED}
10010
{REP}{NAME} {DST}, 0x{IMMED}
xxxxx
add and write carry flag
00001
00001
Perform high 32 bits of 64-bit addition, using carry flag written by add
00010
00010
subtract and write carry flag
00011
00011
Perform high 32 bits of 64-bit subtraction, using carry flag written by sub
00100
00100
00101
00101
{SRC1} == 0
{REP}{XMOV}{PEEK}mov {DST}, {SRC2}
00110
00110
00111
00111
01000
01000
01001
01001
10010
0010
0-extending right shift
01010
01010
10011
0011
sign-extending right shift
01011
01011
10100
0100
Rotate left (left shift with wraparound)
01100
01100
10101
0101
Multiply low 8 bits of each source to produce a 16-bit result
01101
01101
01100
01100
Unsigned minimum
01110
01110
01010
01010
Unsigned maximum
01111
01111
01011
01011
Compare two sources and produce a bitfield:
- 0x00 if src1 > src2
- 0x2b if src1 == src2
- 0x1e if src1 < src2
Often a "branch on bit set/unset" instruction is used on the
result to implement a compare-and-branch macro.
10000
10000
01101
01101
01001
01001
Return the most-significant bit of src2, or 0 if src2 == 0
10100
11001
{REP}{NAME} {DST}, {SRC}, b{BIT}
xxxxxxxxxx
10010
{REP}{NAME} {DST}, {SRC}, b{BIT}
xxxxxx
0110
10010
Set a given bit to 1
1
Clear a given bit, i.e. set it to 0
0
1
0
Set or clear a given bit. This is the non-immediate form of
setbit/clrbit. Bits 1-5 of src2 are the bit to set, bit 0 is the
value to set it to.
10110
{REP}{NAME} {DST}, {SRC}, b{LO}, b{HI}
xx
10010
Unsigned BitField eXtract
0111
BitField Insert
1000
Special move-immediate instruction with a shift
{SHIFT} == 0
{REP}mov {DST}, 0x{RIMMED}
{REP}mov {DST}, 0x{RIMMED} << {SHIFT}
10001
01110
Used in combination with writing @DRAW_STATE_SET, the source is
read the specified number of times and used to set the draw
state base.
{REP}store {SRC}, [{OFFSET} + 0x{IMMED}]{PREINCREMENT}
Store to memory directly. Mainly used by preemption to avoid
disturbing FIFO state before it is saved and after it is
restored.
00
10101
0
0
10100
{PREINCREMENT}
0x{IMMED}
{CONTROLREG}
Write to a control register.
{REP}{SDS}cwrite {SRC}, [{OFFSET} + {BASE}]{PREINCREMENT}
10101
1
0
0x{IMMED}
{SQEREG}
Write to a SQE register.
{REP}swrite {SRC}, [{OFFSET} + {BASE}]{PREINCREMENT}
00
1
10101
Load from memory directly. Mainly used by preemption to avoid
disturbing FIFO state before it is saved and after it is
restored.
{REP}load {DST}, [{OFFSET} + 0x{IMMED}]{PREINCREMENT}
00
0
10110
Read from a control register.
{REP}cread {DST}, [{OFFSET} + {BASE}]{PREINCREMENT}
00
1
10110
0
10111
Read from a SQE register.
{REP}{XREG}sread {DST}, [{OFFSET} + {BASE}]{PREINCREMENT}
00
1
10111
{NAME} {SRC}, 0x{IMMED}, #{OFFSET}
{NAME} {SRC}, b{BIT}, #{OFFSET}
Branch if not equal to an immediate.
110000
Branch if equal to an immediate.
110001
Branch if a bit is not set.
({BIT} == 0) && ({SRC} == 0)
jump #{OFFSET}
110010
Branch if a bit is set.
110011
{NAME}
xxxxxxxxxxxxxxxxxxxxxxxxxx
{NAME}
110100
xxxxxxxxxxxxxxxxxxxxxxxxx
0
Return from preemption interrupt handler.
1
call #{TARGET}
110101
jumpa #{TARGET}
111001
A special branch instruction that parses the next PM4 packet
header in $data and jumps to the packet handler routine. By
convention the delay slot always contains a "mov $01, $data"
instruction, so that $01 contains the packet header when
processing the next packet.
waitin
110110
Jump to the target and store a return address in $lr.
bl #{TARGET}
111000
3
Call the zap shader fw to switch into/out of secure mode. Skips
the next two instructions if successful.
setsecure $02, #{TARGET}
111011
{REP}nop
00000000000000000000000000
00000
{REP}nop
01000000000000000000000000
00000
110111
Indirect jump instruction. Jump to the given offset.
Used as a return instruction together with bl:
bl #fxn
...
fxn:
...
jump $lr
nop
However this is only used by hand-crafted assembly
routines that make sure to never use any stack space. Otherwise
sret is used.
jump {SRC1}
110111
000000000000000
Seems to be equivalent to "jump $lr". This seems to be used by
the compiled code, and is always immediately followed by a
"sub $sp, $sp, imm" instruction to restore the stack frame. It's
therefore possible this also includes a stack overflow check.
sret
110110
00000000000000000000