/*
 * Copyright (c) 2020, Arm Limited. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#ifndef NEOVERSE_N_COMMON_H
#define NEOVERSE_N_COMMON_H

/******************************************************************************
 * Neoverse Nx CPU Configuration register definitions
 *****************************************************************************/
#define CPUCFR_EL1		S3_0_C15_C0_0

/* SCU bit of CPU Configuration Register, EL1 */
#define SCU_SHIFT		U(2)

#endif /* NEOVERSE_N_COMMON_H */