# Copyright 2022 Google LLC # # This source code is licensed under the BSD-style license found in the # LICENSE file in the root directory of this source tree. # ARM NEON - name: xnn_qs8_vlrelu_ukernel__neon_x8 init: xnn_init_qs8_lrelu_neon_params - name: xnn_qs8_vlrelu_ukernel__neon_x16 init: xnn_init_qs8_lrelu_neon_params - name: xnn_qs8_vlrelu_ukernel__neon_x32 init: xnn_init_qs8_lrelu_neon_params # x86 SSE2 - name: xnn_qs8_vlrelu_ukernel__sse2_x16 init: xnn_init_qs8_lrelu_sse2_params - name: xnn_qs8_vlrelu_ukernel__sse2_x32 init: xnn_init_qs8_lrelu_sse2_params # x86 SSSE3 - name: xnn_qs8_vlrelu_ukernel__ssse3_x16 init: xnn_init_qs8_lrelu_sse2_params - name: xnn_qs8_vlrelu_ukernel__ssse3_x32 init: xnn_init_qs8_lrelu_sse2_params # x86 SSE4.1 - name: xnn_qs8_vlrelu_ukernel__sse41_x8 init: xnn_init_qs8_lrelu_sse2_params - name: xnn_qs8_vlrelu_ukernel__sse41_x16 init: xnn_init_qs8_lrelu_sse2_params - name: xnn_qs8_vlrelu_ukernel__sse41_x32 init: xnn_init_qs8_lrelu_sse2_params # x86 AVX - name: xnn_qs8_vlrelu_ukernel__avx_x8 init: xnn_init_qs8_lrelu_avx_params - name: xnn_qs8_vlrelu_ukernel__avx_x16 init: xnn_init_qs8_lrelu_avx_params - name: xnn_qs8_vlrelu_ukernel__avx_x32 init: xnn_init_qs8_lrelu_avx_params # x86 AVX2 - name: xnn_qs8_vlrelu_ukernel__avx2_x16 init: xnn_init_qs8_lrelu_avx2_params - name: xnn_qs8_vlrelu_ukernel__avx2_x32 init: xnn_init_qs8_lrelu_avx2_params - name: xnn_qs8_vlrelu_ukernel__avx2_x64 init: xnn_init_qs8_lrelu_avx2_params # WAsm SIMD (ARM-optimized) - name: xnn_qs8_vlrelu_ukernel__wasmsimd_arm_x16 init: xnn_init_qs8_lrelu_wasmsimd_arm_params - name: xnn_qs8_vlrelu_ukernel__wasmsimd_arm_x32 init: xnn_init_qs8_lrelu_wasmsimd_arm_params # WAsm SIMD (x86-optimized) - name: xnn_qs8_vlrelu_ukernel__wasmsimd_x86_x8 init: xnn_init_qs8_lrelu_wasmsimd_x86_params - name: xnn_qs8_vlrelu_ukernel__wasmsimd_x86_x16 init: xnn_init_qs8_lrelu_wasmsimd_x86_params - name: xnn_qs8_vlrelu_ukernel__wasmsimd_x86_x32 init: xnn_init_qs8_lrelu_wasmsimd_x86_params # WAsm Relaxed SIMD (ARM-optimized) - name: xnn_qs8_vlrelu_ukernel__wasmrelaxedsimd_arm_x16 init: xnn_init_qs8_lrelu_wasmsimd_arm_params - name: xnn_qs8_vlrelu_ukernel__wasmrelaxedsimd_arm_x32 init: xnn_init_qs8_lrelu_wasmsimd_arm_params # WAsm Relaxed SIMD (x86-optimized) - name: xnn_qs8_vlrelu_ukernel__wasmrelaxedsimd_x86_x8 init: xnn_init_qs8_lrelu_wasmsimd_x86_params - name: xnn_qs8_vlrelu_ukernel__wasmrelaxedsimd_x86_x16 init: xnn_init_qs8_lrelu_wasmsimd_x86_params - name: xnn_qs8_vlrelu_ukernel__wasmrelaxedsimd_x86_x32 init: xnn_init_qs8_lrelu_wasmsimd_x86_params # ARMv6 SIMD - name: xnn_qs8_vlrelu_ukernel__armsimd32_x4 init: xnn_init_qs8_lrelu_armsimd32_params - name: xnn_qs8_vlrelu_ukernel__armsimd32_x8 init: xnn_init_qs8_lrelu_armsimd32_params # Scalar (select) - name: xnn_qs8_vlrelu_ukernel__scalar_select_x1 init: xnn_init_qs8_lrelu_scalar_select_params - name: xnn_qs8_vlrelu_ukernel__scalar_select_x2 init: xnn_init_qs8_lrelu_scalar_select_params - name: xnn_qs8_vlrelu_ukernel__scalar_select_x4 init: xnn_init_qs8_lrelu_scalar_select_params # Scalar (and+xor) - name: xnn_qs8_vlrelu_ukernel__scalar_andxor_x1 init: xnn_init_qs8_lrelu_scalar_andxor_params - name: xnn_qs8_vlrelu_ukernel__scalar_andxor_x2 init: xnn_init_qs8_lrelu_scalar_andxor_params - name: xnn_qs8_vlrelu_ukernel__scalar_andxor_x4 init: xnn_init_qs8_lrelu_scalar_andxor_params